Precision Micropower, Low Dropout Voltage References Data Sheet REF19x Series FEATURES TEST PINS Temperature coefficient: 5 ppm/°C maximum Test Pin 1 and Test Pin 5 are reserved for in-package Zener zap. High output current: 30 mA To achieve the highest level of accuracy at the output, the Zener Low supply current: 45 μA maximum zapping technique is used to trim the output voltage. Because Initial accuracy: ±2 mV maximum1 each unit may require a different amount of adjustment, the Sleep mode: 15 μA maximum resistance value at the test pins varies widely from pin to pin Low dropout voltage and from part to part. The user should leave Pin 1 and Pin 5 Load regulation: 4 ppm/mA unconnected. Line regulation: 4 ppm/V Short-circuit protection TP 1 REF19x 8 NC VS 2 SERIES 7 NC SLEEP 3 TOP VIEW 6 OUTPUT APPLICATIONS GND 4 (Not to Scale) 5 TP Portable instruments NOTES ASmDCarst a snedn sDoArCs s 12..NTPPOC IP=NI TNNSSO, ANCROOE NU FNSAEECCRTT CO.ORNYN TEECSTTION. 00371-001 Solar powered applications Figure 1. 8-Lead SOIC_N and TSSOP Pin Configuration Loop-current-powered instruments (S Suffix and RU Suffix) TP 1 REF19x 8 NC GENERAL DESCRIPTION VS 2 SERIES 7 NC The REF19x series precision band gap voltage references use a SLEEP 3 TOP VIEW 6 OUTPUT GND 4 (Not to Scale) 5 TP patented temperature drift curvature correction circuit and laser trimming of highly stable, thin-film resistors to achieve a NOTES vTehrey RloEwF 1te9mx pseerriaetsu irse m coaedfef iucipe notf amnidc rhoipgohw inerit, ilaolw a cdcruorpaocuy.t 12..NTPPOC IP=NI TNNSSO, ANCROOE NU FNSAEECCRTT CO.ORNYN TEECSTTION. 00371-002 Figure 2. 8-Lead PDIP Pin Configuration voltage (LDV) devices, providing stable output voltage from (P Suffix) supplies as low as 100 mV above the output voltage and Table 1. Nominal Output Voltage consuming less than 45 μA of supply current. In sleep mode, Part Number Nominal Output Voltage (V) which is enabled by applying a low TTL or CMOS level to the REF191 2.048 SLEEP pin, the output is turned off and supply current is REF192 2.50 further reduced to less than 15 μA. REF193 3.00 The REF19x series references are specified over the extended REF194 4.50 industrial temperature range (−40°C to +85°C) with typical REF195 5.00 performance specifications over −40°C to +125°C for REF196 3.30 applications, such as automotive. REF198 4.096 All electrical grades are available in an 8-lead SOIC package; the PDIP and TSSOP packages are available only in the lowest electrical grade. 1 Initial accuracy does not include shift due to solder heat effect (see the Applications Information section). Rev. L Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©1996–2011 Analog Devices, Inc. All rights reserved.

REF19x Series Data Sheet TABLE OF CONTENTS Features..............................................................................................1 Electrical Characteristics—REF196 @ −40°C ≤ T ≤ +125°C A Applications.......................................................................................1 .......................................................................................................13 General Description.........................................................................1 Electrical Characteristics—REF198 @ TA = 25°C..................14 Test Pins.............................................................................................1 Electrical Characteristics—REF198 @ −40°C ≤ TA ≤ +85°C .......................................................................................................14 Revision History...............................................................................3 Electrical Characteristics—REF198 @ −40°C ≤ T ≤ 125°C15 A Specifications.....................................................................................4 Absolute Maximum Ratings.........................................................16 Electrical Characteristics—REF191 @ T = 25°C....................4 A Thermal Resistance....................................................................16 Electrical Characteristics—REF191 @ −40°C ≤ +85°C...........5 ESD Caution................................................................................16 Electrical Characteristics—REF191 @ −40°C ≤ T ≤ +125°C...................................................................6 Typical Performance Characteristics...........................................17 A Electrical Characteristics—REF192 @ T = 25°C....................6 Applications Information..............................................................20 A Output Short-Circuit Behavior................................................20 Electrical Characteristics—REF192 @ −40°C ≤ T ≤ +85°C A .........................................................................................................7 Device Power Dissipation Considerations..............................20 Electrical Characteristics—REF192 @ −40°C ≤ T ≤ +125°C Output Voltage Bypassing.........................................................20 A .........................................................................................................7 Sleep Mode Operation...............................................................20 Electrical Characteristics—REF193 @ TA = 25°C....................8 Basic Voltage Reference Connections.....................................20 Electrical Characteristics—REF193 @ −40°C ≤ TA ≤ +85°C Membrane Switch-Controlled Power Supply.............................20 .........................................................................................................8 Solder Hear Effect......................................................................21 Electrical Characteristics—REF193 @ T ≤ −40°C ≤ +125°C A Current-Boosted References with Current Limiting.............21 .........................................................................................................9 Negative Precision Reference Without Precision Resistors..22 Electrical Characteristics—REF194 @ T = 25°C....................9 A Stacking Reference ICs for Arbitrary Outputs.......................22 Electrical Characteristics—REF194 @ −40°C ≤ T ≤ +85°C A .......................................................................................................10 Precision Current Source..........................................................23 Electrical Characteristics—REF194 @ −40°C ≤ T ≤ +125°C Switched Output 5 V/3.3 V Reference.....................................23 A .......................................................................................................10 Kelvin Connections....................................................................24 Electrical Characteristics—REF195 @ TA = 25°C..................11 Fail-Safe 5 V Reference..............................................................24 Electrical Characteristics—REF195 @ −40°C ≤ TA ≤ +85°C Low Power, Strain Gage Circuit...............................................25 .......................................................................................................11 Outline Dimensions.......................................................................26 Electrical Characteristics—REF195 @ −40°C ≤ T ≤ +125°C A Ordering Guide..........................................................................27 .......................................................................................................12 Electrical Characteristics—REF196 @ T = 25°C..................12 A Electrical Characteristics—REF196 @ −40°C ≤ T ≤ +85°C A .......................................................................................................13 Rev. L | Page 2 of 28

Data Sheet REF19x Series REVISION HISTORY 9/11—Rev. K to Rev. L Changes to Precision Current Source Section ............................ 22 Change to Condition Column for Dropout Voltage Parameter, Changes to Figure 28 ...................................................................... 23 Table 2 ................................................................................................. 4 Changes to Figure 30 ...................................................................... 24 Change to Condition Column for Dropout Voltage Parameter, Changes to Low Power, Strain Gage Circuit Section .................. 25 Table 3 ................................................................................................. 5 Changes to Ordering Guide ........................................................... 27 Change to Operating Temperature Range, Table 23 ................... 16 9/06—Rev. H to Rev. I 7/10—Rev. J to Rev. K Updated Format ................................................................. Universal Add Note 1, Features Section ........................................................... 1 Changes to Table 25 ........................................................................ 16 Changes to Note 1, Table 2 ............................................................... 4 Changes to Figure 6 ........................................................................ 16 Changes to Note 1, Table 5 ............................................................... 6 Changes to Figure 10, Figure 12, Figure 14, and Figure 26 ....... 17 Changes to Note 1, Table 8 ............................................................... 8 Changes to Figure 18 ...................................................................... 18 Changes to Note 1, Table 11 ............................................................. 9 Changes to Figure 20 ...................................................................... 19 Changes to Note 1, Table 14 ........................................................... 11 Changes to Figure 23 ...................................................................... 20 Changes to Note 1, Table 17 ........................................................... 12 Changes to Figure 25 ...................................................................... 21 Changes to Note 1, Table 20 ........................................................... 14 Updated Outline Dimensions ........................................................ 25 Moved Figure 22 .............................................................................. 20 Changes to Ordering Guide ........................................................... 26 Added Figure 23, Solder Heat Effect Section, and Figure 24; 6/05—Rev. G to Rev. H Renumbered Sequentially .............................................................. 21 Updated Format ................................................................. Universal Moved Negative Precision Reference Without Precision Changes to Caption in Figure 7 ..................................................... 16 Resistors Section .............................................................................. 22 Updated Outline Dimensions ........................................................ 25 Moved Precision Current Source Section .................................... 23 Changes to Ordering Guide ........................................................... 26 Moved Kelvin Connections Section ............................................. 24 7/04—Rev. F to Rev. G Moved Figure 32 .............................................................................. 25 Changes to Ordering Guide ............................................................. 4 Updated Outline Dimensions ........................................................ 26 Changes to Ordering Guide ........................................................... 27 3/04—Rev. E to Rev. F Updated Absolute Maximum Rating .............................................. 4 3/08—Rev. I to Rev. J Changes to Ordering Guide ........................................................... 14 Changes to General Description ..................................................... 1 Updated Outline Dimensions ........................................................ 24 Changes to Specifications Section ................................................... 4 Deleted Wafer Test Limits Section ................................................ 14 1/03—Rev. D to Rev. E Changes to Table 23, Thermal Resistance Section, and Changes to Figure 3 and Figure 4 ................................................. 15 Table 24 ............................................................................................. 16 Changes to Output Short Circuit Behavior ................................. 17 Changes to Figure 6 ......................................................................... 17 Changes to Figure 20 ...................................................................... 17 Changes to Device Power Dissipation Changes to Figure 26 ...................................................................... 19 Considerations Section ................................................................... 20 Updated Outline Dimensions ........................................................ 23 Changes to Current-Boosted References with Current 1/96—Revision 0: Initial Version Limiting Section .............................................................................. 21 Rev. L | Page 3 of 28

REF19x Series Data Sheet SPECIFICATIONS ELECTRICAL CHARACTERISTICS—REF191 @ T = 25°C A @ V = 3.3 V, T = 25°C, unless otherwise noted. S A Table 2. Parameter Symbol Condition Min Typ Max Unit INITIAL ACCURACY1 V O E Grade I = 0 mA 2.046 2.048 2.050 V OUT F Grade 2.043 2.053 V G Grade 2.038 2.058 V LINE REGULATION2 ΔV /ΔV O IN E Grade 3.0 V ≤ V ≤ 15 V, I = 0 mA 2 4 ppm/V S OUT F and G Grades 4 8 ppm/V LOAD REGULATION2 ΔV /ΔV O LOAD E Grade V = 5.0 V, 0 mA ≤ I ≤ 30 mA 4 10 ppm/mA S OUT F and G Grades 6 15 ppm/mA DROPOUT VOLTAGE V − V V = 3.0 V, I = 2 mA 0.95 V S O S LOAD V = 3.3 V, I = 10 mA 1.25 V S LOAD V = 3.6 V, I = 30 mA 1.55 V S LOAD LONG-TERM STABILITY3 DV 1000 hours @ 125°C 1.2 mV O NOISE VOLTAGE e 0.1 Hz to 10 Hz 20 μV p-p N 1 Initial accuracy does not include shift due to solder heat effect (see the Applications Information section). 2 Line and load regulation specifications include the effect of self-heating. 3 Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period. Rev. L | Page 4 of 28

Data Sheet REF19x Series ELECTRICAL CHARACTERISTICS—REF191 @ −40°C ≤ +85°C @ V = 3.3 V, −40°C ≤ T ≤ +85°C, unless otherwise noted. S A Table 3. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O E Grade I = 0 mA 2 5 ppm/°C OUT F Grade 5 10 ppm/°C G Grade3 10 25 ppm/°C LINE REGULATION4 ΔV /ΔV O IN E Grade 3.0 V ≤ V ≤ 15 V, I = 0 mA 5 10 ppm/V S OUT F and G Grades 10 20 ppm/V LOAD REGULATION4 ΔV /ΔV O LOAD E Grade V = 5.0 V, 0 mA ≤ I ≤ 25 mA 5 15 ppm/mA S OUT F and G Grades 10 20 ppm/mA DROPOUT VOLTAGE V − V V = 3.0 V, I = 2 mA 0.95 V S O S LOAD V = 3.3 V, I = 10 mA 1.25 V S LOAD V = 3.6 V, I = 25 mA 1.55 V S LOAD SLEEP PIN Logic High Input Voltage V 2.4 V H Logic High Input Current I −8 μA H Logic Low Input Voltage V 0.8 V L Logic Low Input Current I −8 μA L SUPPLY CURRENT No load 45 μA Sleep Mode No load 15 μA 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. Rev. L | Page 5 of 28

REF19x Series Data Sheet ELECTRICAL CHARACTERISTICS—REF191 @ −40°C ≤ T ≤ +125°C A @ V = 3.3 V, −40°C ≤ T ≤ +125°C, unless otherwise noted. S A Table 4. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O E Grade I = 0 mA 2 ppm/°C OUT F Grade 5 ppm/°C G Grade3 10 ppm/°C LINE REGULATION4 ΔV /ΔV O IN E Grade 3.0 V ≤ V ≤ 15 V, I = 0 mA 10 ppm/V S OUT F and G Grades 20 ppm/V LOAD REGULATION4 ΔV /ΔV O LOAD E Grade V = 5.0 V, 0 mA ≤ I ≤ 20 mA 10 ppm/mA S OUT F and G Grades 20 ppm/mA DROPOUT VOLTAGE V − V V = 3.3 V, I = 10 mA 1.25 V S O S LOAD V = 3.6 V, I = 20 mA 1.55 V S LOAD 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. ELECTRICAL CHARACTERISTICS—REF192 @ T = 25°C A @ V = 3.3 V, T = 25°C, unless otherwise noted. S A Table 5. Parameter Symbol Condition Min Typ Max Unit INITIAL ACCURACY1 V O E Grade I = 0 mA 2.498 2.500 2.502 V OUT F Grade 2.495 2.505 V G Grade 2.490 2.510 V LINE REGULATION2 ΔV /ΔV O IN E Grade 3.0 V ≤ V ≤ 15 V, I = 0 mA 2 4 ppm/V S OUT F and G Grades 4 8 ppm/V LOAD REGULATION2 ΔV /ΔV O LOAD E Grade V = 5.0 V, 0 mA ≤ I ≤ 30 mA 4 10 ppm/mA S OUT F and G Grades 6 15 ppm/mA DROPOUT VOLTAGE V − V V = 3.5 V, I = 10 mA 1.00 V S O S LOAD V = 3.9 V, I = 30 mA 1.40 V S LOAD LONG-TERM STABILITY3 DV 1000 hours @ 125°C 1.2 mV O NOISE VOLTAGE e 0.1 Hz to 10 Hz 25 μV p-p N 1 Initial accuracy does not include shift due to solder heat effect (see the Applications Information section). 2 Line and load regulation specifications include the effect of self-heating. 3 Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period. Rev. L | Page 6 of 28

Data Sheet REF19x Series ELECTRICAL CHARACTERISTICS—REF192 @ −40°C ≤ T ≤ +85°C A @ V = 3.3 V, −40°C ≤ T ≤ +85°C, unless otherwise noted. S A Table 6. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O E Grade I = 0 mA 2 5 ppm/°C OUT F Grade 5 10 ppm/°C G Grade3 10 25 ppm/°C LINE REGULATION4 ΔV /ΔV O IN E Grade 3.0 V ≤ V ≤ 15 V, I = 0 mA 5 10 ppm/V S OUT F and G Grades 10 20 ppm/V LOAD REGULATION4 ΔV /ΔV O LOAD E Grade V = 5.0 V, 0 mA ≤ I ≤ 25 mA 5 15 ppm/mA S OUT F and G Grades 10 20 ppm/mA DROPOUT VOLTAGE V − V V = 3.5 V, I = 10 mA 1.00 V S O S LOAD V = 4.0 V, I = 25 mA 1.50 V S LOAD SLEEP PIN Logic High Input Voltage V 2.4 V H Logic High Input Current I −8 μA H Logic Low Input Voltage V 0.8 V L Logic Low Input Current I −8 μA L SUPPLY CURRENT No load 45 μA Sleep Mode No load 15 μA 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. ELECTRICAL CHARACTERISTICS—REF192 @ −40°C ≤ T ≤ +125°C A @ V = 3.3 V, −40°C ≤ T ≤ +125°C, unless otherwise noted. S A Table 7. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O E Grade I = 0 mA 2 ppm/°C OUT F Grade 5 ppm/°C G Grade3 10 ppm/°C LINE REGULATION4 ΔV /ΔV O IN E Grade 3.0 V ≤ V ≤ 15 V, I = 0 mA 10 ppm/V S OUT F and G Grades 20 ppm/V LOAD REGULATION4 ΔV /ΔV O LOAD E Grade V = 5.0 V, 0 mA ≤ I ≤ 20 mA 10 ppm/mA S OUT F and G Grades 20 ppm/mA DROPOUT VOLTAGE V − V V = 3.5 V, I = 10 mA 1.00 V S O S LOAD V = 4.0 V, I = 20 mA 1.50 V S LOAD 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. Rev. L | Page 7 of 28

REF19x Series Data Sheet ELECTRICAL CHARACTERISTICS—REF193 @ T = 25°C A @ V = 3.3 V, T = 25°C, unless otherwise noted. S A Table 8. Parameter Symbol Condition Min Typ Max Unit INITIAL ACCURACY1 V O G Grade I = 0 mA 2.990 3.0 3.010 V OUT LINE REGULATION2 ΔV /ΔV O IN G Grade 3.3 V, ≤ V ≤ 15 V, I = 0 mA 4 8 ppm/V S OUT LOAD REGULATION2 ΔV /ΔV O LOAD G Grade V = 5.0 V, 0 mA ≤ I ≤ 30 mA 6 15 ppm/mA S OUT DROPOUT VOLTAGE V − V V = 3.8 V, I = 10 mA 0.80 V S O S LOAD V = 4.0 V, I = 30 mA 1.00 V S LOAD LONG-TERM STABILITY3 DV 1000 hours @ 125°C 1.2 mV O NOISE VOLTAGE e 0.1 Hz to 10 Hz 30 μV p-p N 1 Initial accuracy does not include shift due to solder heat effect (see the Applications Information section). 2 Line and load regulation specifications include the effect of self-heating. 3 Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period. ELECTRICAL CHARACTERISTICS—REF193 @ −40°C ≤ T ≤ +85°C A @ V = 3.3 V, T = −40°C ≤ T ≤ +85°C, unless otherwise noted. S A A Table 9. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O G Grade3 I = 0 mA 10 25 ppm/°C OUT LINE REGULATION4 ΔV /ΔV O IN G Grade 3.3 V ≤ V ≤ 15 V, I = 0 mA 10 20 ppm/V S OUT LOAD REGULATION4 ΔV /ΔV O LOAD G Grade V = 5.0 V, 0 mA ≤ I ≤ 25 mA 10 20 ppm/mA S OUT DROPOUT VOLTAGE V − V V = 3.8 V, I = 10 mA 0.80 V S O S LOAD V = 4.1 V, I = 30 mA 1.10 V S LOAD SLEEP PIN Logic High Input Voltage VH 2.4 V Logic High Input Current IH −8 μA Logic Low Input Voltage VL 0.8 V Logic Low Input Current IL −8 μA SUPPLY CURRENT No load 45 μA Sleep Mode No load 15 μA 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. Rev. L | Page 8 of 28

Data Sheet REF19x Series ELECTRICAL CHARACTERISTICS—REF193 @ T ≤ −40°C ≤ +125°C A @ V = 3.3 V, –40°C ≤ T ≤ +125°C, unless otherwise noted. S A Table 10. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O G Grade3 I = 0 mA 10 ppm/°C OUT LINE REGULATION4 ΔV /ΔV O IN G Grade 3.3 V ≤ V ≤ 15 V, I = 0 mA 20 ppm/V S OUT LOAD REGULATION4 ΔV /ΔV O LOAD G Grade V = 5.0 V, 0 mA ≤ I ≤ 20 mA 10 ppm/mA S OUT DROPOUT VOLTAGE V − V V = 3.8 V, I = 10 mA 0.80 V S O S LOAD V = 4.1 V, I = 20 mA 1.10 V S LOAD 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. ELECTRICAL CHARACTERISTICS—REF194 @ T = 25°C A @ V = 5.0 V, T = 25°C, unless otherwise noted. S A Table 11. Parameter Symbol Condition Min Typ Max Unit INITIAL ACCURACY1 V O E Grade I = 0 mA 4.498 4.5 4.502 V OUT G Grade 4.490 4.510 V LINE REGULATION2 ∆V /∆V O IN E Grade 4.75 V ≤ V ≤ 15 V, I = 0 mA 2 4 ppm/V S OUT G Grade 4 8 ppm/V LOAD REGULATION2 ∆V /∆V O LOAD E Grade V = 5.8 V, 0 mA ≤ I ≤ 30 mA 2 4 ppm/mA S OUT G Grade 4 8 ppm/mA DROPOUT VOLTAGE V − V V = 5.00 V, I = 10 mA 0.50 V S O S LOAD V = 5.8 V, I = 30 mA 1.30 V S LOAD LONG-TERM STABILITY3 DV 1000 hours @ 125°C 2 mV O NOISE VOLTAGE e 0.1 Hz to 10 Hz 45 μV p-p N 1 Initial accuracy does not include shift due to solder heat effect (see the Applications Information section). 2 Line and load regulation specifications include the effect of self-heating. 3 Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period. Rev. L | Page 9 of 28

REF19x Series Data Sheet ELECTRICAL CHARACTERISTICS—REF194 @ −40°C ≤ T ≤ +85°C A @ V = 5.0 V, T = −40°C ≤ T ≤ +85°C, unless otherwise noted. S A A Table 12. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O E Grade I = 0 mA 2 5 ppm/°C OUT G Grade3 10 25 ppm/°C LINE REGULATION4 ∆V /∆V O IN E Grade 4.75 V ≤ V ≤ 15 V, I = 0 mA 5 10 ppm/V S OUT G Grade 10 20 ppm/V LOAD REGULATION4 ∆V /∆V O LOAD E Grade V = 5.80 V, 0 mA ≤ I ≤ 25 mA 5 15 ppm/mA S OUT G Grade 10 20 ppm/mA DROPOUT VOLTAGE V − V V = 5.00 V, I = 10 mA 0.5 V S O S LOAD V = 5.80 V, I = 25 mA 1.30 V S LOAD SLEEP PIN Logic High Input Voltage V 2.4 V H Logic High Input Current I −8 μA H Logic Low Input Voltage V 0.8 V L Logic Low Input Current I −8 μA L SUPPLY CURRENT No load 45 μA Sleep Mode No load 15 μA 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. ELECTRICAL CHARACTERISTICS—REF194 @ −40°C ≤ T ≤ +125°C A @ V = 5.0 V, −40°C ≤ T ≤ +125°C, unless otherwise noted. S A Table 13. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O E Grade I = 0 mA 2 ppm/°C OUT G Grade3 10 ppm/°C LINE REGULATION4 ΔV /ΔV O IN E Grade 4.75 V ≤ V ≤ 15 V, I = 0 mA 5 ppm/V S OUT G Grade 10 ppm/V LOAD REGULATION ΔV /ΔV O LOAD E Grade V = 5.80 V, 0 mA ≤ I ≤ 20 mA 5 ppm/mA S OUT Grade 10 ppm/mA DROPOUT VOLTAGE V − V V = 5.10 V, I = 10 mA 0.60 V S O S LOAD V = 5.95 V, I = 20 mA 1.45 V S LOAD 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. Rev. L | Page 10 of 28

Data Sheet REF19x Series ELECTRICAL CHARACTERISTICS—REF195 @ T = 25°C A @ V = 5.10 V, T = 25°C, unless otherwise noted. S A Table 14. Parameter Symbol Condition Min Typ Max Unit INITIAL ACCURACY1 V O E Grade I = 0 mA 4.998 5.0 5.002 V OUT F Grade 4.995 5.005 V G Grade 4.990 5.010 V LINE REGULATION2 ΔV /ΔV O IN E Grade 5.10 V ≤ V ≤ 15 V, I = 0 mA 2 4 ppm/V S OUT F and G Grades 4 8 ppm/V LOAD REGULATION2 ΔV /ΔV O LOAD E Grade V = 6.30 V, 0 mA ≤ I ≤ 30 mA 2 4 ppm/mA S OUT F and G Grades 4 8 ppm/mA DROPOUT VOLTAGE V − V V = 5.50 V, I = 10 mA 0.50 V S O S LOAD V = 6.30 V, I = 30 mA 1.30 V S LOAD LONG-TERM STABILITY3 DV 1000 hours @ 125°C 1.2 mV O NOISE VOLTAGE e 0.1 Hz to 10 Hz 50 μV p-p N 1 Initial accuracy does not include shift due to solder heat effect (see the Applications Information section). 2 Line and load regulation specifications include the effect of self-heating. 3 Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period. ELECTRICAL CHARACTERISTICS—REF195 @ −40°C ≤ T ≤ +85°C A @ V = 5.15 V, T = −40°C ≤ T ≤ +85°C, unless otherwise noted. S A A Table 15. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O E Grade I = 0 mA 2 5 ppm/°C OUT F Grade 5 10 ppm/°C G Grade3 10 25 ppm/°C LINE REGULATION4 ΔV /ΔV O IN E Grade 5.15 V ≤ V ≤ 15 V, I = 0 mA 5 10 ppm/V S OUT F and G Grades 10 20 ppm/V LOAD REGULATION4 ΔV /ΔV O LOAD E Grade V = 6.30 V, 0 mA ≤ I ≤ 25 mA 5 10 ppm/mA S OUT F and G Grades 10 20 ppm/mA DROPOUT VOLTAGE V − V V = 5.50 V, I = 10 mA 0.50 V S O S LOAD V = 6.30 V, I = 25 mA 1.30 V S LOAD SLEEP PIN Logic High Input Voltage V 2.4 V H Logic High Input Current I −8 μA H Logic Low Input Voltage V 0.8 V L Logic Low Input Current I −8 μA L SUPPLY CURRENT No load 45 μA Sleep Mode No load 15 μA 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. Rev. L | Page 11 of 28

REF19x Series Data Sheet ELECTRICAL CHARACTERISTICS—REF195 @ −40°C ≤ T ≤ +125°C A @ V = 5.20 V, −40°C ≤ T ≤ +125°C, unless otherwise noted. S A Table 16. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O E Grade I = 0 mA 2 ppm/°C OUT F Grade 5 ppm/°C G Grade3 10 ppm/°C LINE REGULATION4 ΔV /ΔV O IN E Grade 5.20 V ≤ V ≤ 15 V, I = 0 mA 5 ppm/V S OUT F and G Grades 10 ppm/V LOAD REGULATION4 ΔV /ΔV O LOAD E Grade V = 6.45 V, 0 mA ≤ I ≤ 20 mA 5 ppm/mA S OUT F and G Grades 10 ppm/mA DROPOUT VOLTAGE VS − VO VS = 5.60 V, ILOAD = 10 mA 0.60 V V = 6.45 V, I = 20 mA 1.45 V S LOAD 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. ELECTRICAL CHARACTERISTICS—REF196 @ T = 25°C A @ V = 3.5 V, T = 25°C, unless otherwise noted. S A Table 17. Parameter Symbol Condition Min Typ Max Unit INITIAL ACCURACY1 V O G Grade I = 0 mA 3.290 3.3 3.310 V OUT LINE REGULATION2 ΔV /ΔV O IN G Grade 3.50 V ≤ V ≤ 15 V, I = 0 mA 4 8 ppm/V S OUT LOAD REGULATION2 ΔV /ΔV O LOAD G Grade V = 5.0 V, 0 mA ≤ I ≤ 30 mA 6 15 ppm/mA S OUT DROPOUT VOLTAGE V − V V = 4.1 V, I = 10 mA 0.80 V S O S LOAD V = 4.3 V, I = 30 mA 1.00 V S LOAD LONG-TERM STABILITY3 DV 1000 hours @ 125°C 1.2 mV O NOISE VOLTAGE e 0.1 Hz to 10 Hz 33 μV p-p N 1 Initial accuracy does not include shift due to solder heat effect (see the Applications Information section). 2 Line and load regulation specifications include the effect of self-heating. 3 Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period. Rev. L | Page 12 of 28

Data Sheet REF19x Series ELECTRICAL CHARACTERISTICS—REF196 @ −40°C ≤ T ≤ +85°C A @ V = 3.5 V, T = –40°C ≤ T ≤ +85°C, unless otherwise noted. S A A Table 18. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O G Grade3 I = 0 mA 10 25 ppm/°C OUT LINE REGULATION4 ΔV /ΔV O IN G Grade 3.5 V ≤ V ≤ 15 V, I = 0 mA 10 20 ppm/V S OUT LOAD REGULATION4 ΔV /ΔV O LOAD G Grade V = 5.0 V, 0 mA ≤ I ≤ 25 mA 10 20 ppm/mA S OUT DROPOUT VOLTAGE V − V V = 4.1 V, I = 10 mA 0.80 V S O S LOAD V = 4.3 V, I = 25 mA 1.00 V S LOAD SLEEP PIN Logic High Input Voltage VH 2.4 V Logic High Input Current I −8 μA H Logic Low Input Voltage V 0.8 V L Logic Low Input Current I −8 μA L SUPPLY CURRENT No load 45 μA Sleep Mode No load 15 μA 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/V0(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. ELECTRICAL CHARACTERISTICS—REF196 @ −40°C ≤ T ≤ +125°C A @ V = 3.50 V, −40°C ≤ T ≤ +125°C, unless otherwise noted. S A Table 19. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O G Grade3 I = 0 mA 10 ppm/°C OUT LINE REGULATION4 ΔV /ΔV O IN G Grade 3.50 V ≤ V ≤ 15 V, I = 0 mA 20 ppm/V S OUT LOAD REGULATION4 ΔV /ΔV O LOAD G Grade V = 5.0 V, 0 mA ≤ I ≤ 20 mA 20 ppm/mA S OUT DROPOUT VOLTAGE V − V V = 4.1 V, I = 10 mA 0.80 V S O S LOAD V = 4.4 V, I = 20 mA 1.10 V S LOAD 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. Rev. L | Page 13 of 28

REF19x Series Data Sheet ELECTRICAL CHARACTERISTICS—REF198 @ T = 25°C A @ V = 5.0 V, T = 25°C, unless otherwise noted. S A Table 20. Parameter Symbol Condition Min Typ Max Unit INITIAL ACCURACY1 V O E Grade I = 0 mA 4.094 4.096 4.098 V OUT F Grade 4.091 4.101 V G Grade 4.086 4.106 V LINE REGULATION2 ΔV /ΔV O IN E Grade 4.5 V ≤ V ≤ 15 V, I = 0 mA 2 4 ppm/V S OUT F and G Grades 4 8 ppm/V LOAD REGULATION2 ΔV /ΔV O LOAD E Grade V = 5.4 V, 0 mA ≤ I ≤ 30 mA 2 4 ppm/mA S OUT F and G Grades 4 8 ppm/mA DROPOUT VOLTAGE V − V V = 4.6 V, I = 10 mA 0.502 V S O S LOAD V = 5.4 V, I = 30 mA 1.30 V S LOAD LONG-TERM STABILITY3 DV 1000 hours @ 125°C 1.2 mV O NOISE VOLTAGE e 0.1 Hz to 10 Hz 40 μV p-p N 1 Initial accuracy does not include shift due to solder heat effect (see the Applications Information section). 2 Line and load regulation specifications include the effect of self-heating. 3 Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period. ELECTRICAL CHARACTERISTICS—REF198 @ −40°C ≤ T ≤ +85°C A @ V = 5.0 V, −40°C ≤ T ≤ +85°C, unless otherwise noted. S A Table 21. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O E Grade I = 0 mA 2 5 ppm/°C OUT F Grade 5 10 ppm/°C G Grade3 10 25 ppm/°C LINE REGULATION4 ΔV /ΔV O IN E Grade 4.5 V ≤ V ≤ 15 V, I = 0 mA 5 10 ppm/V S OUT F and G Grades 10 20 ppm/V LOAD REGULATION4 ΔV /ΔV O LOAD E Grade V = 5.4 V, 0 mA ≤ I ≤ 25 mA 5 10 ppm/mA S OUT F and G Grades 10 20 ppm/mA DROPOUT VOLTAGE V − V V = 4.6 V, I = 10 mA 0.502 V S O S LOAD V = 5.4 V, I = 25 mA 1.30 V S LOAD SLEEP PIN Logic High Input Voltage V 2.4 V H Logic High Input Current I −8 μA H Logic Low Input Voltage V 0.8 V L Logic Low Input Current I −8 μA L SUPPLY CURRENT No load 45 μA Sleep Mode No load 15 μA 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. Rev. L | Page 14 of 28

Data Sheet REF19x Series ELECTRICAL CHARACTERISTICS—REF198 @ −40°C ≤ TA ≤ +125°C @ V = 5.0 V, −40°C ≤ T ≤ +125°C, unless otherwise noted. S A Table 22. Parameter Symbol Condition Min Typ Max Unit TEMPERATURE COEFFICIENT1, 2 TCV /°C O E Grade I = 0 mA 2 ppm/°C OUT F Grade 5 ppm/°C G Grade3 10 ppm/°C LINE REGULATION4 ΔV /ΔV O IN E Grade 4.5 V ≤ V ≤ 15 V, I = 0 mA 5 ppm/V S OUT F and G Grades 10 ppm/V LOAD REGULATION4 ΔV /ΔV O LOAD E Grade V = 5.6 V, 0 mA ≤ I ≤ 20 mA 5 ppm/mA S OUT F and G Grades 10 ppm/mA DROPOUT VOLTAGE V − V V = 4.7 V, I = 10 mA 0.60 V S O S LOAD V = 5.6 V, I = 20 mA 1.50 V S LOAD 1 For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device. 2 TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C. TCVO = (VMAX − VMIN)/VO(TMAX − TMIN) 3 Guaranteed by characterization. 4 Line and load regulation specifications include the effect of self-heating. Rev. L | Page 15 of 28

REF19x Series Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 23. Parameter Rating θ is specified for worst-case conditions; that is, θ is specified JA JA Supply Voltage −0.3 V to +18 V for the device in socket for PDIP and is specified for the device Output to GND −0.3 V to V + 0.3 V soldered in the circuit board for the SOIC and TSSOP packages. S Output to GND Short-Circuit Duration Indefinite Table 24. Storage Temperature Range Package Type θ θ Unit PDIP, SOIC Package −65°C to +150°C JA JC 8-Lead PDIP (N) 103 43 °C/W Operating Temperature Range 8-Lead SOIC (R) 158 43 °C/W REF19x −40°C to +125°C 8-Lead TSSOP (RU) 240 43 °C/W Junction Temperature Range PDIP, SOIC Package −65°C to +150°C Lead Temperature (Soldering 60 sec) 300°C ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. L | Page 16 of 28

Data Sheet REF19x Series TYPICAL PERFORMANCE CHARACTERISTICS 5.004 50 3 TYPICAL PARTS BASED ON 600 5.003 5.15V< VIN< 15V 45 UNITS, 4 RUNS –40°C ≤ TA ≤ +85°C 40 5.002 GE (V)5.001 PARTS 3305 OLTA5.000 GE OF 25 T V TA 20 U4.999 N P E UT RC 15 O4.998 PE 10 4.997 5 4.996–50 –25 0TEMPERA25TURE (°C5)0 75 100 00371-003 0–20 –15 –10 –T5CVOUT 0(ppm/°C5) 10 15 20 00371-006 Figure 3. REF195 Output Voltage vs. Temperature Figure 6. TCVOUT Distribution 32 40 5.15V≤ VS≤ 15V 28 35 NORMAL MODE V) 24 30 N (ppm/ 20 –40°C NT (A)μ 25 D REGULATIO 1162 +85°C +25°C UPPLY CURRE 2105 A 8 S 10 O L 4 5 SLEEP MODE 00 5 10 ILOA1D5 (mA) 20 25 30 00371-004 0–50 –25 0TEMPERA25TURE (°C5)0 75 100 00371-007 Figure 4. REF195 Load Regulator vs. ILOAD Figure 7. Supply Current vs. Temperature 20 –6 0mA ≤ IOUT ≤ 25mA +85°C –5 16 A) m A) ppm/ 12 +25°C NT (µ –4 TION ( –40°C URRE –3 A C GUL 8 PIN E P –2 R E LINE 4 SLE VL –1 VH 04 6 8 VIN1 0(V) 12 14 16 00371-005 0–50 –25 0TEMPERA25TURE (°C5)0 75 100 00371-008 Figure 5. REF195 Line Regulator vs. VIN Figure 8. SLEEP Pin Current vs. Temperature Rev. L | Page 17 of 28

REF19x Series Data Sheet 0 5V OFF100% –20 ON 90% B) d N ( –40 O TI C –60 E J E R E –80 L P P RI –100 10% –120 0% 10 100 FR1kEQUENCY 1(H0kz) 100k 1M 00371-009 20mV 100µs 00371-012 Figure 9. Ripple Rejection vs. Frequency Figure 12. Load Transient Response 10μF REF19x VIN = 15V 2 VIN = 15V REF110kμΩF 2REF419x6 1μF 11k0ΩμF OUTPUT 00371-010 4 6 1μF 010mA 00371-013 Figure 10. Ripple Rejection vs. Frequency Measurement Circuit Figure 13. Load Transient Response Measurement Circuit REF19x VIN = 7V 200V 2V 2 6 100% 4 VG = 2V p-p 90% 1μF 1μF Z VS = 4V )Ω (O Z 4 1mA 3 LOAD 30mA 2 10% LOAD 1 0% 0 10 100 1FkREQUEN10CkY (Hz)100k 1M 10M 00371-011 2V 100µs 00371-014 Figure 11. Output Impedance vs. Frequency Figure 14. Power-On Response Time REF19x 2 6 VIN = 7V 4 1μF 00371-015 Figure 15. Power-On Response Time Measurement Circuit Rev. L | Page 18 of 28

Data Sheet REF19x Series 5V 5V ON100% 100% 90% 90% OFF IL = 1mA VOUT IL = 10mA 10% 10% 0% 0% 1V 2ms 00371-016 200mV 200µs 00371-018 Figure 16. SLEEP Response Time Figure 18. Line Transient Response REF19x 35 VIN = 15V 2 VOUT 6 30 3 4 1μF 00371-017 A) 25 m Figure 17. SLEEP Response Time Measurement Circuit NT ( 20 E R R U 15 C D A O 10 L 5 00 0.1 0.2REF109.35 DRO0.P4OUT0 V.5OLTA0G.6E (V)0.7 0.8 0.9 00371-019 Figure 19. Load Current vs. REF195 Dropout Voltage Rev. L | Page 19 of 28

REF19x Series Data Sheet APPLICATIONS INFORMATION OUTPUT SHORT-CIRCUIT BEHAVIOR SLEEP MODE OPERATION The REF19x family of devices is totally protected from damage All REF19x devices include a sleep capability that is TTL/CMOS- due to accidental output shorts to GND or to V. In the event of level compatible. Internally, a pull-up current source to V is S S an accidental short-circuit condition, the reference device shuts connected at the SLEEP pin. This permits the SLEEP pin to be down and limits its supply current to 40 mA. driven from an open collector/drain driver. A logic low or a 0 V VS condition on the SLEEP pin is required to turn off the output stage. During sleep, the output of the references becomes a high impedance state where its potential would then be determined by external circuitry. If the sleep feature is not used, it is OUTPUT recommended that the SLEEP pin be connected to V (Pin 2). S BASIC VOLTAGE REFERENCE CONNECTIONS SLEEP (SHUTDOWN) The circuit in Figure 21 illustrates the basic configuration for the REF19x family of references. Note the 10 μF/0.1 μF bypass network on the input and the 1 μF/0.1 μF bypass network on the output. It is recommended that no connections be made to GND 00371-020 PPiinn 31 ,s Phionu 5ld, Pbien c 7o,n annedc tPeidn t8o. VIf t. he sleep feature is not required, Figure 20. Simplified Schematic S DEVICE POWER DISSIPATION CONSIDERATIONS REF19x NC 1 8 NC The REF19x family of references is capable of delivering load VS 2 7 NC currents to 30 mA with an input voltage that ranges from 3.3 V 10µF 0.1µF OUTPUT SLEEP 3 6 to 15 V. When these devices are used in applications with large +1µF 0.1µF iinntpeurtn vaol lptaogweesr, edxisesricpisaeti ocanr eo ft oth aevsoei dd eevxicceeesd. Einxgc ethede imnga xthime um NC 4= NO CONNE5CTNC TANT 00371-021 Figure 21. Basic Voltage Reference Connections published specifications for maximum power dissipation or MEMBRANE SWITCH-CONTROLLED POWER SUPPLY junction temperature can result in premature device failure. The following formula should be used to calculate the maximum With output load currents in the tens of mA, the REF19x family of junction temperature or dissipation of the device: references can operate as a low dropout power supply in hand-held instrument applications. In the circuit shown in Figure 22, a T −T P = J A membrane on/off switch is used to control the operation of the D θ JA reference. During an initial power-on condition, the SLEEP pin is where T and T are the junction and ambient temperatures, held to GND by the 10 kΩ resistor. Recall that this condition (read: J A respectively; P is the device power dissipation; and θ is the three-state) disables the REF19x output. When the membrane on D JA device package thermal resistance. switch is pressed, the SLEEP pin is momentarily pulled to V, S OUTPUT VOLTAGE BYPASSING enabling the REF19x output. At this point, current through the 10 kΩ resistor is reduced and the internal current source connected to the For stable operation, low dropout voltage regulators and references SLEEP pin takes control. Pin 3 assumes and remains at the same generally require a bypass capacitor connected from their V OUT potential as V. When the membrane off switch is pressed, the pins to their GND pins. Although the REF19x family of references is S SLEEP pin is momentarily connected to GND, which once capable of stable operation with capacitive loads exceeding 100 μF, again disables the REF19x output. a 1 μF capacitor is sufficient to guarantee rated performance. The addition of a 0.1 μF ceramic capacitor in parallel with the REF19x bypass capacitor improves load current transient performance. NC 1 8 NC VS For best line voltage transient performance, it is recommended 2 7 NC 1kΩ OUTPUT that the voltage inputs of these devices be bypassed with a 10 μF 5% 3 6 +1µF electrolytic capacitor in parallel with a 0.1 μF ceramic capacitor. ON 4 5 NC TANT 10kΩ OFF NC = NO CONNECT 00371-022 Figure 22. Membrane Switch Controlled Power Supply Rev. L | Page 20 of 28

Data Sheet REF19x Series SUPPLIER USER TP ≥ TC TP ≤ TC TC TC = –5°C SUPPLIERtP USERtP TP MAXIMUM RAMP UP RATE = 3°C/s tP TC = –5°C MAXIMUM RAMP DOWN RATE = 6°C/s RE TL U t AT TSMAX PREHEAT AREA L R E P M TE TSMIN t S 25 TIME 25°C TO PEAK TIME 00371-123 Figure 23. Classification Profile (Not to Scale) SOLDER HEAT EFFECT CURRENT-BOOSTED REFERENCES WITH CURRENT LIMITING The mechanical stress and heat effect of soldering a part to a PCB can cause output voltage of a reference to shift in value. Whereas the 30 mA rated output current of the REF19x series is The output voltage of REF195 shifts after the part undergoes the higher than is typical of other reference ICs, it can be boosted to extreme heat of a lead-free soldering profile, like the one shown higher levels, if desired, with the addition of a simple external in Figure 23. The materials that make up a semiconductor device PNP transistor, as shown in Figure 25. Full-time current limiting is and its package have different rates of expansion and contraction. used to protect the pass transistor against shorts. The stress on the dice has changed position, causing shift on the +VS= 6V Q1 OUTPUTTABLE output voltage, after exposed to extreme soldering temperatures. TO 9V R4 TIP32A (SEE TEXT) 2Ω (SEE TEXT) U1 VOUT (V) This shift is similar but more severe than thermal hysteresis. REF192 2.5 R1 REF193 3.0 Typical result of soldering temperature effect on REF19x output Q2 1kΩ REF196 3.3 value shift is shown in Figure 24. It shows the output shift due 100CµF2 +2N3906 R1.25kΩ RREEFF119945 45..50 to soldering and does not include mechanical stress. 25V 2 C3 F 6 VC D1 3 REUF1196 6 0.1µF S +3.V3OVUT 5 1(OSNNE4 E1S4 LT8EEEXPT) (SEET4ABL1E.)82kRΩ3 (TAN10TµAFL/U2C5MV1) + R@1 150mA TS 4 S ER OF UNI 3 COMVMSONFigure 25. Boosted 3.3 V Referenced witFh CurrenVCt OOLUiMmTMitOinNg 00371-023 B M NU 2 In this circuit, the power supply current of reference U1 flowing through R1 to R2 develops a base drive for Q1, whose collector 1 provides the bulk of the output current. With a typical gain of 100 in Q1 for 100 mA to 200 mA loads, U1 is never required to furnish 0 more than a few mA, so this factor minimizes temperature-related 6 4 2 0 8 6 4 2 0 2 4 6 8 0 2 4 6 –0.1 –0.1 –0.1S–0.1HIF–0.0T DU–0.0E T–0.0O S–0.0OLDER0.0 HE0.0AT 0.0EFF0.0ECT0.1 (%0.1) 0.1 0.1 00371-124 dthreif td. rSivheo rtot- cQir1c auti ta pbrooutte c3t0i0o nm iAs p orfo lvoiadde dc ubryr eQn2t,, wwhitihc hv aclluaems pass Figure 24. Output Shift due to Solder Heat Effect shown in Figure 25. With this separation of control and power functions, dc stability is optimum, allowing most advantageous use of premium grade REF19x devices for U1. Of course, load Rev. L | Page 21 of 28

REF19x Series Data Sheet management should still be exercised. A short, heavy, low dc integrator adjusts its output to establish the proper relationship resistance (DCR) conductor should be used from U1 to 6 to the V between the V and GND references. Thus, any desired negative OUT OUT Sense Point S, where the collector of Q1 connects to the load, Point F. output voltage can be selected by substituting for the appropriate reference IC. The sleep feature is maintained in the circuit with Because of the current limiting configuration, the dropout voltage the simple addition of a PNP transistor and a 10 kΩ resistor. circuit is raised about 1.1 V over that of the REF19x devices, due to the V of Q1 and the drop across Current Sense Resistor R4. VS BE However, overall dropout is typically still low enough to allow 10kΩ 2N3906 operation of a 5 V to 3.3 V regulator/reference using the REF196 for SLEEP U1 as noted, with a V as low as 4.5 V and a load current of 150 mA. TTL/CMOS 2 S VS 1µF The requirement for a heat sink on Q1 depends on the maximum 1kΩ 3 SLEEPOUTPUT 6 input voltage and short-circuit current. With VS = 5 V and a REF19x +5V 300 mA current limit, the worst-case dissipation of Q1 is 1.5 W, GND 100Ω 4 1µF A1 –VREF less than the TO-220 package 2 W limit. However, if smaller TO-39 10kΩ 100kΩ or TO-5 package devices, such as the 2N4033, are used, the current –5V ltihme ipt aschkoaugled rbaet irnegd. uTcheids tios akceceopm mpalixsihmedu mby d siismsipplayt iroanis bineglo Rw4 . Figure 26. Negative Precision Voltage Reference UsesA N1 o= P11r//22e cOOisPPi22o99n51 ,Resistors00371-024 A tantalum output capacitor is used at C1 for its low equivalent One caveat to this approach is that although rail-to-rail output series resistance (ESR), and the higher value is required for stability. amplifiers work best in the application, these operational amplifiers Capacitor C2 provides input bypassing and can be an ordinary require a finite amount (mV) of headroom when required to provide electrolytic. any load current; consider this issue when choosing the negative supply for the circuit. Shutdown control of the booster stage is an option, and when used, some cautions are needed. Due to the additional active devices STACKING REFERENCE ICs FOR ARBITRARY in the V line to U1, a direct drive to Pin 3 does not work as with an OUTPUTS S unbuffered REF19x device. To enable shutdown control, the Some applications may require two reference voltage sources that connection from U1 to Q2 is broken at the X, and Diode D1 are a combined sum of standard outputs. The circuit in Figure 27 then allows a CMOS control source, VC, to drive U1 to 3 for on/off shows how this stacked output reference can be implemented. operation. Startup from shutdown is not as clean under heavy Two reference ICs are used, fed from a common unregulated input, load as it is in basic REF19x series, and can require several V. The outputs of the individual ICs are connected in series, as S milliseconds under load. Nevertheless, it is still effective and shown in Figure 27, which provide two output voltages, V and OUT1 can fully control 150 mA loads. When shutdown control is V . V is the terminal voltage of U1, whereas V is the OUT2 OUT1 OUT2 used, heavy capacitive loads should be minimized. sum of this voltage and the terminal voltage of U2. U1 and U2 NEGATIVE PRECISION REFERENCE WITHOUT are chosen for the two voltages that supply the required outputs PRECISION RESISTORS (see Table 1). If, for example, both U1 and U2 are REF192s, the two outputs are 2.5 V and 5.0 V. In many current-output CMOS DAC applications where the output signal voltage must be the same polarity as the reference voltage, it OUTPUT TABLE is often necessary to reconfigure a current-switching DAC into U1/U2 VOUT1 (V) VOUT2(V) +VS REF192/REF192 2.5 5.0 a voltage-switching DAC using a 1.25 V reference, an op amp, VS > VOUT2 + 0.15V REF192/REF194 2.5 7.0 REF192/REF195 2.5 7.5 and a pair of resistors. Using a current-switching DAC directly 2 requires an additional operational amplifier at the output to U2 reinvert the signal. A negative voltage reference is then desirable 0.1CµF1 3 (RSEEE FTA1B9LxE) 6 + +VOUT2 because an additional operational amplifier is not required for 4 VO (U2) C2 1µF either reinversion (current-switching mode) or amplification (voltage-switching mode) of the DAC output voltage. In general, 2 any positive voltage reference can be converted into a negative U1 voltage reference using an operational amplifier and a pair of 0.1CµF3 3 (RSEEE FTA1B9LxE) 6 +C4 R1 +VOUT1 matched resistors in an inverting configuration. The disadvantage 4 VO (U1) 1µF 3.9kΩ (SEE TEXT) to this approach is that the largest single source of error in the VIN circuit is the relative matching of the resistors used. COMMON CVOOUMTMON 00371-025 The circuit illustrated in Figure 26 avoids the need for tightly Figure 27. Stacking Voltage References with the REF19x matched resistors by using an active integrator circuit. In this circuit, the output of the voltage reference provides the input drive for the integrator. To maintain circuit equilibrium, the Rev. L | Page 22 of 28

Data Sheet REF19x Series Although this concept is simple, some cautions are needed. Because VS the lower reference circuit must sink a small bias current from U2 (50 μA to 100 μA), plus the base current from the series PNP output 2 transistor in U2, either the external load of U1 or R1 must provide VS a path for this current. If the U1 minimum load is not well defined, REF19x Resistor R1 should be used, set to a value that conservatively passes 3 SLEEP OUTPUT 6 600 μA of current with the applicable VOUT1 across it. Note that the GND 1µF R1 two U1 and U2 reference circuits are locally treated as macrocells, 4 ISY RSET ADJUST P1 each having its own bypasses at input and output for best stability. Both U1 and U2 in this circuit can source dc currents up to VIN ≥ IOUT × RL (MAX) + VSY (MIN) IOUT tthheei rs ufumll oraf ttinhge . oTuhtep umtsin, Vimum, ipnlpuust t vhoel tdargoep, VouS,t i sv odlettaegrem oinf eUd2 b. y IOUT =VROSEUTT + ISY (REF19x) RL Ain rFeilgatuerde v2a8r,i awtihoenr eo nU s1ta, cak ORiUnETg2F t1w9o2 ,3 i-st esrtmacikneadl rwefietrhe na c2e-st eisr mshionwanl VROSEUTT >> ISY FOR EXAMPLE, REF195:IVRPO1O1U U=T=T =19 = 055 035mΩΩVA, 10-TURN 00371-027 reference diode, such as the AD589. Like the 3-terminal stacked Figure 29. A Low Dropout, Precision Current Source reference shown in Figure 27, this circuit provides two outputs, SWITCHED OUTPUT 5 V/3.3 V REFERENCE V and V , which are the individual terminal voltages of D1 OUT1 OUT2 Applications often require digital control of reference voltages, and U1, respectively. Here this is 1.235 V and 2.5 V, which provides a selecting between one stable voltage and a second. With the V of 3.735 V. When using 2-terminal reference diodes, such as OUT2 sleep feature inherent to the REF19x series, switched output D1, the rated minimum and maximum device currents must be reference configurations are easily implemented with little observed, and the maximum load current from V can be no OUT1 additional hardware. greater than the current setup by R1 and V (U1). When V O O (U1) is equal to 2.5 V, R1 provides a 500 μA bias to D1, so the The circuit in Figure 30 shows the general technique, which takes maximum load current available at V is 450 μA or less. advantage of the output wire-OR capability of the REF19x device OUT1 +VS family. When off, a REF19x device is effectively an open circuit VS> VOUT2 + 0.15V at the output node with respect to the power supply. When on, a 2 REF19x device can source current up to its current rating, but C1 U1 sink only a few μA (essentially, just the relatively low current of the 0.1μF 3 REF192 6 + R1 +3.V7O3U5TV2 internal output scaling divider). Consequently, when two devices 4 VO (U1) C1μ2F 4(S.E9E9 kTΩEXT) are wired together at their common outputs, the output voltage is the same as the output voltage for the on device. The off state +VOUT1 AD5D819 VO (D1) +C1μ3F 1.235V dotehveircwe idsrea dwose as snmota ilnl stetarnfedrbe yw ciuthr roepnet roaft i1o5n μ oAf t(hme aoxni mdeuvmic)e,, bwuht ich VIN COMMOFNigure 28. Stacking Voltage References with the REFVC1OO9UM2TM ON 00371-026 cthaen coiprceuraitt ec oton vitesn fiuelnl tclyu rsrheanrte r baotitnhg i.n Npoutte a tnhda to tuhtep utwt oca dpeavciictoesr si,n and with CMOS logic drive, it is power efficient. PRECISION CURRENT SOURCE OUTPUTTABLE In low power applications, the need often arises for a precision U1/U2 VC* VOUT (V) current source that can operate on low supply voltages. As REF195/ HIGH 5.0 REF196 LOW 3.3 shown in Figure 29, any one of the devices in the REF19x family REF194/ HIGH 4.5 of references can be configured as a precision current source. +VS = 6V REF195 LOW 5.0 The circuit configuration illustrated is a floating current source 2 *CMOS LOGIC LEVELS U1 with a grounded load. The output voltage of the reference is VC 1 2 3 4 3 REF19x 6 (SEETABLE) bootstrapped across R , which sets the output current into the U3A U3B SET 74HC04 74HC04 4 load. With this configuration, circuit precision is maintained for +VOUT load currents in the range from the reference’s supply current (typically 30 μA) to approximately 30 mA. The low dropout 2 U2 +C2 voltage of these devices maximizes the current source’s output 3 REF19x 6 1µF (SEETABLE) voltage compliance without excess headroom. C1 4 0.1µF COMMVOINN VCOOUMTMON 00371-028 Figure 30. Switched Output Reference Rev. L | Page 23 of 28

REF19x Series Data Sheet Using dissimilar REF19x series devices with this configuration VS VS allows logic selection between the U1/U2-specified terminal 2 RLW +VOUT vaso lntoagteeds .i nF othr ee xtaabmlep ilne ,F wigiuthre U 310 ,( cah RanEgFi1n9g5 t)h ea nCdM UO2S (-ac oRmEpFa1t9ib6l)e, VS 2 A1 1 RLW +SVEONUSTE SLEEP 3 OUTPUT 6 3 FORCE VC logic control voltage from high to low selects between a nominal REF19x output of 5.0 V and 3.3 V, and vice versa. Other REF19x family GND A1 =1/2 OP295 units can also be used for U1/U2, with similar operation in a 4 1µF 100kΩ 1O/P2 1O8P3292 RL 00371-029 logic sense, but with outputs as per the individual paired devices Figure 31. Low Dropout, Kelvin-Connected Voltage Reference (see the table in Figure 30). Of course, the exact output voltage FAIL-SAFE 5 V REFERENCE tolerance, drift, and overall quality of the reference voltage is Some critical applications require a reference voltage to be consistent with the grade of individual U1 and U2 devices. maintained at a constant voltage, even with a loss of primary Due to the nature of the wire-OR, one application caveat should power. The low standby power of the REF19x series and the be understood about this circuit. Because U1 and U2 can only switched output capability allow a fail-safe reference con- source current effectively, negative going output voltage changes, figuration to be implemented rather easily. This reference which require the sinking of current, necessarily take longer than maintains a tight output voltage tolerance for either a primary positive going changes. In practice, this means that the circuit is power source (ac line derived) or a standby (battery derived) quite fast when undergoing a transition from 3.3 V to 5 V, but the power source, automatically switching between the two as the transition from 5 V to 3.3 V takes longer. Exactly how much power conditions change. longer is a function of the load resistance, R, seen at the output and L The circuit in Figure 32 illustrates this concept, which borrows the typical 1 μF value of C2. In general, a conservative transition from the switched output idea of Figure 30, again using the time is approximately several milliseconds for load resistances REF19x device family output wire-OR capability. In this case, in the range of 100 Ω to 1 kΩ. Note that for highest accuracy at because a constant 5 V reference voltage is desired for all condi- the new output voltage, several time constants should be allowed tions, two REF195 devices are used for U1 and U2, with their (for example, >7.6 time constants for <1/2 LSB error @ 10 bits). on/off switching controlled by the presence or absence of the KELVIN CONNECTIONS primary dc supply source, V. V is a 6 V battery backup S BAT In many portable applications where the PCB cost and area go source that supplies power to the load only when V fails. For S hand-in-hand, circuit interconnects are very often narrow. These normal (V present) power conditions, V sees only the 15 μA S BAT narrow lines can cause large voltage drops if the voltage reference is (maximum) standby current drain of U1 in its off state. required to provide load currents to various functions. The inter- In operation, it is assumed that for all conditions, either U1 or connections of a circuit can exhibit a typical line resistance of U2 is on, and a 5 V reference output is available. With this 0.45 mΩ/square (for example, 1 oz. Cu). voltage constant, a scaled down version is applied to the In applications where these devices are configured as low dropout Comparator IC U3, providing a fixed 0.5 V input to the negative voltage regulators, these wiring voltage drops can become a large input for all power conditions. The R1 to R2 divider provides a source of error. To circumvent this problem, force and sense signal to the U3 positive input proportionally to V, which S connections can be made to the reference through the use of an switches U3 and U1/U2, dependent upon the absolute level of operational amplifier, as shown in Figure 31. This method provides V. In Figure 32, Op Amp U3 is configured as a comparator S a means by which the effects of wiring resistance voltage drops can with hysteresis, which provides clean, noise-free output be eliminated. Load currents flowing through wiring resistance switching. This hysteresis is important to eliminate rapid produce an I-R error (I × R ) at the load. However, the switching at the threshold due to V ripple. Furthermore, the LOAD WIRE S Kelvin connection overcomes the problem by including the device chosen is the AD820, a rail-to-rail output device. This wiring resistance within the forcing loop of the op amp. Because device provides high and low output states within a few mV of the op amp senses the load voltage, op amp loop control forces V, ground for accurate thresholds, and compatible drive for U2 S the output to compensate for the wiring error and to produce for all V conditions. R3 provides positive feedback for circuit S the correct voltage at the load. Depending on the reference hysteresis, changing the threshold at the positive input as a device chosen, operational amplifiers that can be used in this function of the output of U3. application are the OP295, OP292, and OP183. Rev. L | Page 24 of 28

Data Sheet REF19x Series +VBAT +VS R1 0.C12µF U21 1.1MΩ R3 R6 3 REF195 6 10MΩ 100Ω Q1 (SEETABLE) 2N3904 4 5.000V C1 3 + 7 0.1µF 6 2 – 4 U3 2 AD820 U2 +C3 R2 3 REF195 6 1µF 100kΩ (SEETABLE) R4 4 900kΩ C4 R5 CVOSM, MVBOANT 0.1µF 100kΩ CVOOUMTMON 00371-030 Figure 32. Fail-Safe 5 V Reference For V levels lower than the lower threshold, the output of U3 is 100Ω S low, thus U2 and Q1 are off and U1 is on. For V levels higher S REF195 10μF than the upper threshold, the situation reverses, with U1 off and 2 6 both U2 and Q1 on. In the interest of battery power conserva- + + 10μF 4 1μF tion, all of the comparison switching circuitry is powered from VS and is arranged so that when VS fails, the default output 517%kΩ 0.1μF comes from U1. For the R1 to R3 values, as shown in Figure 32, lower/upper V S 3 + 4 switching thresholds are approximately 5.5 V and 6 V, respec- 1/4 1 2N2222 OP492 tively. These can be changed to suit other VS supplies, as can the 0.1μF 10kΩ 2 – 11 REF19x devices used for U1 and U2, over a range of 2.5 V to 1% 5 V of output. U3 can operate down to a V of 3.3 V, which is S 500Ω generally compatible with all REF19x family devices. 0.1% LOW POWER, STRAIN GAGE CIRCUIT 10kΩ As shown in Figure 33, the REF19x family of references can be 1% 0.01μF used in conjunction with low supply voltage operational ampli- 20kΩ 1% fiers, such as the OP492 or the OP747, in a self-contained strain 13– 20kΩ gage circuit in which the REF195 is used as the core. Other 1/4 1% references can be easily accommodated by changing circuit OP492 14 6 –1/4 12+ OP492 7 OUTPUT element values. The references play a dual role, first as the 2.21kΩ 10kΩ 5 + 1% voltage regulator to provide the supply voltage requirements of the strain gage and the operational amplifiers, and second as a precision voltage reference for the current source used to 9 – 20kΩ 1/4 1% sctainm buela rteem thoet eblyri dcogne.t rAo ldleidst ionnc to fre oatfuf rbey odfi gthitea lc imrceuaint si sv tiha at it 10O+P492 8 210%kΩ 00371-031 the SLEEP pin. Figure 33. Low Power, Strain Gage Circuit Rev. L | Page 25 of 28

REF19x Series Data Sheet OUTLINE DIMENSIONS 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 8 5 0.280 (7.11) 0.250 (6.35) 1 4 0.240 (6.10) 0.325 (8.26) 0.310 (7.87) 0.100 (2.54) 0.300 (7.62) BSC 0.060 (1.52) 0.195 (4.95) 0.210 (5.33) MAX 0.130 (3.30) MAX 0.115 (2.92) 0.015 0.150 (3.81) (0.38) 0.015 (0.38) 0.130 (3.30) MIN GAUGE 0.115 (2.92) SEATING PLANE 0.014 (0.36) PLANE 0.010 (0.25) 0.022 (0.56) 0.008 (0.20) 0.005 (0.13) 0.430 (10.92) 0.018 (0.46) MIN MAX 0.014 (0.36) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) COMPLIANTTO JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONSARE IN INCHES; MILLIMETER DIMENSIONS (RCINEOFRPEANRERERENN LCTEEHA EODSNSEL MSY)AAAYNR BDEE AR CROOEU NNNFODIGETUDAR-POEPFDRFOA INSPC RWHIAH ETOEQL UFEIO VORAR LU EHSNAETL ISFN FLDOEEARSDIGSN.. 070606-A Figure 34. 8-Lead Plastic Dual In-Line Package [PDIP] P-Suffix (N-8) Dimensions shown in inches and (millimeters) 3.10 5.00(0.1968) 3.00 4.80(0.1890) 2.90 8 5 4.00(0.1574) 6.20(0.2441) 8 5 3.80(0.1497) 1 4 5.80(0.2284) 4.50 4.40 6.40 BSC 4.30 1.27(0.0500) 0.50(0.0196) 1 4 BSC 1.75(0.0688) 0.25(0.0099) 45° 0.25(0.0098) 1.35(0.0532) 8° PIN 1 0.10(0.0040) 0° 0.65 BSC COPLANARITY 0.51(0.0201) 0.15 1.20 0.10 SEATING 0.31(0.0122) 0.25(0.0098) 10..2470((00..00510507)) 0.05 MAX PLANE 0.17(0.0067) 8° COPLANARITY 0.30 SEATING 0.20 0° 0.75 COMPLIANTTOJEDECSTANDARDSMS-012-AA 0.10 0.19 PLANE 0.09 0.60 CONTROLLINGDIMENSIONSAREINMILLIMETERS;INCHDIMENSIONS 0.45 (INPARENTHESES)AREROUNDED-OFFMILLIMETEREQUIVALENTSFOR COMPLIANT TO JEDEC STANDARDS MO-153-AA REFERENCEONLYANDARENOTAPPROPRIATEFORUSEINDESIGN. Figure 35. 8-Lead Thin Shrink Small Outline Package [TSSOP] Figure 36. 8-Lead Standard Small Outline Package [SOIC_N] (RU-8) Narrow Body Dimensions shown in millimeters S-Suffix (R-8) Dimensions shown in millimeters and (inches) Rev. L | Page 26 of 28

Data Sheet REF19x Series ORDERING GUIDE Model1 Temperature Range Package Description Package Option Ordering Quantity REF191ES −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF191ES-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF191ESZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF191ESZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF191GS −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF191GS-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF191GSZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF191GSZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF192ES −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF192ES-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF192ES-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 1,000 REF192ESZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF192ESZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF192ESZ-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 1,000 REF192FS −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF192FS-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF192FS-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 1,000 REF192FSZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF192FSZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF192FSZ-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 1,000 REF192GPZ −40°C to +85°C 8-Lead PDIP P-Suffix (N-8) REF192GRUZ −40°C to +85°C 8-Lead TSSOP RU-8 REF192GRUZ-REEL7 −40°C to +85°C 8-Lead TSSOP RU-8 1,000 REF192GS −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF192GS-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF192GS-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 1,000 REF192GSZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF192GSZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF192GSZ-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 1,000 REF193GSZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF193GSZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF194ES −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF194ESZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF194ESZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF194GS-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF194GS-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 1,000 REF194GSZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF194GSZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF194GSZ-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 1,000 REF195ES −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF195ES-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF195ESZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF195ESZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF195FS −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF195FS-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF195FSZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF195FSZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF195GPZ −40°C to +85°C 8-Lead PDIP P-Suffix (N-8) REF195GRU-REEL7 −40°C to +85°C 8-Lead TSSOP RU-8 1,000 REF195GRUZ −40°C to +85°C 8-Lead TSSOP RU-8 REF195GRUZ-REEL7 −40°C to +85°C 8-Lead TSSOP RU-8 1,000 Rev. L | Page 27 of 28

REF19x Series Data Sheet Model1 Temperature Range Package Description Package Option Ordering Quantity REF195GS −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF195GS-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF195GS-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 1,000 REF195GSZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF195GSZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF195GSZ-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 1,000 REF196GRUZ-REEL7 −40°C to +85°C 8-Lead TSSOP RU-8 1,000 REF196GSZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF196GSZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF196GSZ-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 1,000 REF198ES −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF198ES-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF198ESZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF198ESZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF198ESZ-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 1,000 REF198FS-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF198FSZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF198FSZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF198GRUZ −40°C to +85°C 8-Lead TSSOP RU-8 REF198GRUZ-REEL7 −40°C to +85°C 8-Lead TSSOP RU-8 2,500 REF198GS −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF198GS-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 REF198GSZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) REF198GSZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) 2,500 1 Z = RoHS Compliant Part. ©1996–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00371-0-9/11(L) Rev. L | Page 28 of 28

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: REF192GPZ REF198ESZ-REEL REF195GRUZ REF195FSZ REF192GSZ REF198FSZ-REEL REF194GSZ REF196GRUZ-REEL7 REF194ESZ REF192ESZ-REEL REF191GSZ-REEL REF192ESZ REF192FSZ REF196GSZ-REEL REF194GSZ-REEL7 REF192GRUZ REF195ESZ REF192FSZ-REEL REF198ESZ-REEL7 REF196GSZ-REEL7 REF195FSZ-REEL REF191ESZ-REEL REF193GSZ REF194ESZ-REEL REF192ES-REEL REF198GSZ REF195GSZ-REEL REF191GSZ REF195GRUZ-REEL7 REF192GSZ-REEL REF193GSZ-REEL REF198GSZ-REEL REF198GRUZ REF195GSZ-REEL7 REF198ESZ REF192ESZ-REEL7 REF196GSZ REF195ESZ-REEL REF194GSZ-REEL REF192FSZ-REEL7 REF198GRUZ-REEL7 REF195GSZ REF198FSZ REF195GPZ REF192GSZ-REEL7 REF191ESZ REF192GRUZ-REEL7