Not Recommended for New Designs Please use RE46C191 RE46C190 CMOS Low Voltage Photoelectric Smoke Detector ASIC with Interconnect and Timer Mode Features Description The RE46C190 is a low-power, low-voltage CMOS • Two AA Battery Operation photoelectric-type smoke detector IC. With minimal • Internal Power-on Reset external components, this circuit will provide all the • Low Quiescent Current Consumption required features for a photoelectric-type smoke • Available in 16L N SOIC detector. • Local Alarm Memory The design incorporates a gain-selectable photo • Interconnect up to 40 Detectors amplifier for use with an infrared emitter/detector pair. • 9-Minute Timer for Sensitivity Control An internal oscillator strobes power to the smoke • Temporal or Continuous Horn Pattern detection circuitry every 10 seconds, to keep the standby current to a minimum. If smoke is sensed, the • Internal Low Battery and Chamber Test detection rate is increased to verify an Alarm condition. • All Internal Oscillator A high gain mode is available for push-button chamber • Internal Infrared Emitter Diode (IRED) Driver testing. • Adjustable IRED Drive Current A check for a low battery condition is performed every • Adjustable Hush Sensitivity 86seconds and chamber integrity is tested once every • 2% Low Battery Set Point 43seconds when in Standby. The temporal horn pattern supports the NFPA72 emergency evacuation signal. An interconnect pin allows multiple detectors to be connected such that, when one unit alarms, all units will sound. An internal nine-minute timer can be used for a Reduced Sensitivity mode. Utilizing low-power CMOS technology, the RE46C190 was designed for use in smoke detectors that comply with Underwriters Laboratory Specification UL217 and UL268. PIN CONFIGURATION Note: The RE46C191 is an improved version of RE46C190 the RE46C190 that is recommended for SOIC new designs. Please contact Microchip V 1 16 LX marketing for information on the SS RE46C191. IRED 2 15 V BST V 3 14 HS DD TEST 4 13 HB TEST2 5 12 IO IRP 6 11 IRCAP IRN 7 10 FEED RLED 8 9 GLED  2010-2018 Microchip Technology Inc. DS20002271C-page 1

RE46C190 TYPICAL BLOCK DIAGRAM TEST2 (5) LX (16) TEST (4) Boost Control Precision Reference Current Sense VDD (3) Low Battery R3 + Comparator - Boost Comparator R4 + Smoke - V (15) Comparator BST + Control RLED (8) - Logic and Timing Level IRP (6) Photo Shift IRN (7) Integrator Horn Driver Trimmed + HB (13) Oscilator - IRCAP (11) POR and HS (14) BIAS High Programmable Normal FEED (10) Limits Hysteresis Interconnect IO (12) Programming GLED (9) Control IRED (2) Programmable V (1) IRED Current SS DS20002271C-page 2  2010-2018 Microchip Technology Inc.

RE46C190 TYPICAL BATTERY APPLICATION V DD R1 Battery 100 C1 C2 L1 3V 10 µF 1 µF 10 µH VBST Push-to-Test/ RE46C190 Hush D1 1 V LX16 SS VBST 2 IRED VBST15 C3 R7 C4 100 100 µF 3 VDD HS14 R4 C5 R3 4.7 µF R6 4 TEST HB13 1.5M 1 nF 200K Smoke 330 TP1 TP2 Chamber 5 TEST2 IO12 D2 D4 6 IRP IRCAP11 D3 7 IRN FEED10 RED R5 To other Units 8 RLED GLED99 D5 C6 330 33 µF GREEN Note1: C2 should be located as close as possible to the device power pins and C1 should be located as close as possible to V . SS 2: R3, R4 and C5 are typical values and may be adjusted to maximize sound pressure. 3: DC-DC converter in High Boost mode (nominal V = 9.6V) can draw current pulses of greater than 1A, BST and is therefore very sensitive to series resistance. Critical components of this resistance are the inductor DC resistance, the internal resistance of the battery and the resistance in the connections from the inductor to the battery, from the inductor to the LX pin and from the V pin to the battery. In order to SS function properly under full load at V = 2V, the total of the inductor and interconnect resistances should DD not exceed 0.3. The internal battery resistance should be no more than 0.5 and a low ESR capacitor of 10µF or more should be connected in parallel with the battery, to average the current draw over the boost converter cycle. 4: Schottky diode D1 must have a maximum peak current rating of at least 1.5A. For best results it should have forward voltage specification of less than 0.5V at 1A, and low reverse leakage. 5: Inductor L1 must have a maximum peak current rating of at least 1.5A.  2010-2018 Microchip Technology Inc. DS20002271C-page 3

RE46C190 NOTES: DS20002271C-page 4  2010-2018 Microchip Technology Inc.

RE46C190 1.0 ELECTRICAL † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the CHARACTERISTICS device. This is a stress rating only and functional operation of the device at these or any other conditions above those Absolute Maximum Ratings† indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended Supply Voltage...................................VDD= 5.5V; VBST = 13V periods may affect device reliability. Input Voltage Range Except FEED, TEST.....V = -.3V to V +.3V IN DD FEED Input Voltage Range.................... V =- 10 to +22V INFD TEST Input Voltage Range........ V =- .3V to V +.3V INTEST BST Input Current except FEED...................................I = 10mA IN Continuous Operating Current (HS, HB, V )......I = 40mA BST O Continuous Operating Current (IRED)...............I = 300mA OIR Operating Temperature..............................T = –10 to +60°C A Storage Temperature...........................T = –55 to +125°C STG ESD Human Body Model..................................VHBM = 750V ESD Machine Model.............................................VMM = 75V DC ELECTRICAL CHARACTERISTICS DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at T = –10 to +60°C, V = 3V, A DD V = 4.2V, Typical Application (unless otherwise noted) (Note1, Note2, Note3) BST Test Parameter Symbol Min. Typ. Max. Units Conditions Pin Supply Voltage V 3 2 — 5.0 V Operating DD Supply Current I 3 — 1 2 µA Standby, Inputs low, DD1 No loads, Boost off, No smoke check Standby Boost I 15 — 100 — nA Standby, Inputs low, BST1 Current No loads, Boost off, No smoke check IRCAP Supply I 11 — 500 — µA During smoke check IRCAP Current Boost Voltage V 15 3.0 3.6 4.2 V IRCAP charging for Smoke BST1 Check, GLED operation I =40mA OUT V 15 8.5 9.6 10.7 V No local alarm, BST2 RLED Operation, I =40mA, IO as an OUT input Input Leakage I 6 –200 — 200 pA IRP = V or V INOP DD SS 7 –200 — 200 pA IRN = V or V DD SS I 10 — 20 50 µA FEED = 22V; V = 9V IHF BST I 10 –50 –15 — µA FEED = –10V; ILF V =10.7V BST Input Voltage Low V 10 — — 2.7 V FEED, V = 9V IL1 BST V 12 — — 800 mV No local alarm, IL2 IO as an input Note 1: Wherever a specific V value is listed under test conditions, the V is forced externally with the BST BST inductor disconnected and the DC-DC converter NOT running. 2: Typical values are for design information only. 3: Limits over the specified temperature range are not production tested and are based on characterization data. Unless otherwise stated, production test is at room temperature with guardbanded limits. 4: Not production tested.  2010-2018 Microchip Technology Inc. DS20002271C-page 5

RE46C190 DC ELECTRICAL CHARACTERISTICS (CONTINUED) DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at T = –10 to +60°C, V = 3V, A DD V = 4.2V, Typical Application (unless otherwise noted) (Note1, Note2, Note3) BST Test Parameter Symbol Min. Typ. Max. Units Conditions Pin Input Voltage High V 10 6.2 — — V FEED; V = 9V IH1 BST V 12 2.0 — — V No local alarm, IH2 IO as an input IO Hysteresis V 12 — 150 — mV HYST1 Input Pull-Down I 4, 5 0.25 — 10 µA V = V PD1 IN DD Current I 12 20 — 80 µA V = V PDIO1 IN DD I 12 — — 140 µA V = 15V PDIO2 IN Output Low Voltage V 13, 14 — — 1 V I = 16mA, V = 9V OL1 OL BST V 8 — — 300 mV I = 10mA, V = 9V OL2 OL BST V 9 — — 300 mV I = 10mA, V = 3.6V OL3 OL BST Output High Voltage V 13, 14 8.5 — — V I = 16mA, V = 9V OH1 OL BST Output Current I 12 -4 -5 — mA Alarm, V = 3V or IOH1 IO V = 0V, V = 9V IO BST I 12 5 30 — mA At Conclusion of Local IODMP Alarm or Test, V =1V IO I 2 45 50 55 mA IRED on, V = 1V, IRED50 IRED V =5V, IRCAP=5V, BST (50mA option selected; T =27°C) A I 2 90 100 110 mA IRED on, V = 1V, IRED100 IRED V =5V, IRCAP=5V, BST (100mA option selected; T =27°C) A I 2 135 150 165 mA IRED on, V = 1V, IRED150 IRED V =5V, IRCAP=5V, BST (150mA option selected; T =27°C) A I 2 180 200 220 mA IRED on, V = 1V, IRED2050 IRED V =5V, IRCAP=5V, BST (200mA option selected; T =27°C) A IRED Current TC — 0.5 — %/°C V = 5V, IRCAP=5V; IRED BST Temperature Note4 Coefficient Note 1: Wherever a specific V value is listed under test conditions, the V is forced externally with the BST BST inductor disconnected and the DC-DC converter NOT running. 2: Typical values are for design information only. 3: Limits over the specified temperature range are not production tested and are based on characterization data. Unless otherwise stated, production test is at room temperature with guardbanded limits. 4: Not production tested. DS20002271C-page 6  2010-2018 Microchip Technology Inc.

RE46C190 DC ELECTRICAL CHARACTERISTICS (CONTINUED) DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at T = –10 to +60°C, V = 3V, A DD V = 4.2V, Typical Application (unless otherwise noted) (Note1, Note2, Note3) BST Test Parameter Symbol Min. Typ. Max. Units Conditions Pin Low Battery Alarm V 3 2.05 2.1 2.15 V Falling Edge; LB1 Voltage 2.1V nominal selected V 3 2.15 2.2 2.25 V Falling Edge; LB2 2.2V nominal selected V 3 2.25 2.3 2.35 V Falling Edge; LB3 2.3V nominal selected V 3 2.35 2.4 2.45 V Falling Edge; LB4 2.4V nominal selected V 3 2.45 2.5 2.55 V Falling Edge; LB5 2.5V nominal selected V 3 2.55 2.6 2.65 V Falling Edge; LB6 2.6V nominal selected V 3 2.65 2.7 2.75 V Falling Edge; LB7 2.7V nominal selected V 3 2.75 2.8 2.85 V Falling Edge; LB8 2.8V nominal selected Low Battery V 3 — 100 — mV LBHYST Hysteresis IRCAP Turn On V 11 3.6 4.0 4.4 V Falling edge; TIR1 Voltage V = 5V; I = 20mA BST OUT IRCAP Turn Off V 11 4.0 4.4 4.8 V Rising edge; TIR2 Voltage V = 5V; I = 20mA BST OUT Note 1: Wherever a specific V value is listed under test conditions, the V is forced externally with the BST BST inductor disconnected and the DC-DC converter NOT running. 2: Typical values are for design information only. 3: Limits over the specified temperature range are not production tested and are based on characterization data. Unless otherwise stated, production test is at room temperature with guardbanded limits. 4: Not production tested.  2010-2018 Microchip Technology Inc. DS20002271C-page 7

RE46C190 AC ELECTRICAL CHARACTERISTICS AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at T = –10° to +60°C, V = 3V, A DD V = 4.2V, Typical Application (unless otherwise noted) (Note1 to Note4). BST Parameter Symbol Test Pin Min. Typ. Max. Units Condition Time Base Internal Clock Period T 9.80 10.4 11.0 ms PROGSET, PCLK IO = high RLED Indicator On Time T 8 9.80 10.4 11.0 ms Operating ON1 Standby Period T 8 320 344 368 s Standby, no alarm PLED1 Local Alarm Period T 8 470 500 530 ms Local alarm condition PLED2A with temporal horn pattern T 8 625 667 710 ms Local alarm condition PLED2B with continuous horn pattern Hush Timer Period T 8 10 10.7 11.4 s Timer mode, no local PLED4 alarm External Alarm T 8 LED IS NOT ON s Remote alarm only PLED0 Period GLED Indicator Latched Alarm Period T 9 40 43 46 s Latched Alarm Condition, PLED3 LED enabled Latched Alarm Pulse T 9 1.25 1.33 1.41 s Latched Alarm Condition, OFLED Train (3x) Off Time LED enabled Latched Alarm LED T 9 22.4 23.9 25.3 Hours Latched Alarm Condition, LALED Enabled Duration LED enabled Smoke Check Smoke Test Period T 2 10 10.7 11.4 s Standby, no alarm PER0A with Temporal Horn T 2 1.88 2.0 2.12 s Standby, after one valid PER1A Pattern smoke sample T 2 0.94 1.0 1.06 s Standby, PER2A after two consecutive valid smoke samples T 2 0.94 1.0 1.06 s Local Alarm PER3A (three consecutive valid smoke samples) T 2 235 250 265 ms Push button test, PER4A >1 chamber detections 313 333 353 ms Push button test, no chamber detections T 2 7.5 8.0 8.5 s In remote alarm PER5A Note 1: See timing diagram for Horn Pattern (Figure5-2). 2: T and T are 100% production tested. All other AC parameters are verified by functional testing. PCLK IRON 3: Typical values are for design information only. 4: Limits over the specified temperature range are not production tested, and are based on characterization data. DS20002271C-page 8  2010-2018 Microchip Technology Inc.

RE46C190 AC ELECTRICAL CHARACTERISTICS (CONTINUED) AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at T = –10° to +60°C, V = 3V, A DD V = 4.2V, Typical Application (unless otherwise noted) (Note1 to Note4). BST Parameter Symbol Test Pin Min. Typ. Max. Units Condition Smoke Test Period T 2 10 10.7 11.4 s Standby, no alarm PER0B with Continuous Horn T 2 2.5 2.7 2.9 s Standby, after one valid PER1B Pattern smoke sample T 2 1.25 1.33 1.41 s Standby, PER2B after two consecutive valid smoke samples T 2 1.25 1.33 1.41 s Local Alarm PER3B (three consecutive valid smoke samples) T 2 313 333 353 ms Push button test PER4B T 2 10 10.7 11.4 s In remote alarm PER5B Chamber Test Period T 2 40 43 46 s Standby, no alarm PCT1 Low Battery Low Battery Sample T 3 320 344 368 s RLED on PLB1 Period T 3 80 86 92 s RLED on PLB2 Horn Operation Low Battery Horn T 13 40 43 46 s Low battery, no alarm HPER1 Period Chamber Fail Horn T 13 40 43 46 s Chamber failure HPER2 Period Low Battery Horn T 13 9.8 10.4 11.0 ms Low battery, no alarm HON1 On Time Chamber Fail Horn T 13 9.8 10.4 11.0 ms Chamber failure HON2 On Time Chamber Fail T 13 305 325 345 ms Failed chamber, HOF1 Off Time no alarm, 3x chirp option Alarm On Time T 13 470 500 530 ms Local or remote alarm HON2A with Temporal Horn (Note1) Pattern Alarm Off Time T 13 470 500 530 ms Local or remote alarm HOF2A with Temporal Horn (Note1) Pattern T 13 1.4 1.5 1.6 s Local or remote alarm HOF3A (Note1) Alarm On Time T 13 235 250 265 ms Local or remote alarm HON2B with Continuous (Note1) Horn Pattern Alarm Off Time T 13 78 83 88 ms Local or remote alarm HOF2B with Continuous (Note1) Horn Pattern Push-to-Test Alarm T 13 9.8 10.4 11.0 ms Alarm memory active, HON4 Memory On Time push-to-test Note 1: See timing diagram for Horn Pattern (Figure5-2). 2: T and T are 100% production tested. All other AC parameters are verified by functional testing. PCLK IRON 3: Typical values are for design information only. 4: Limits over the specified temperature range are not production tested, and are based on characterization data.  2010-2018 Microchip Technology Inc. DS20002271C-page 9

RE46C190 AC ELECTRICAL CHARACTERISTICS (CONTINUED) AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at T = –10° to +60°C, V = 3V, A DD V = 4.2V, Typical Application (unless otherwise noted) (Note1 to Note4). BST Parameter Symbol Test Pin Min. Typ. Max. Units Condition Push-to-Test Alarm T 13 235 250 265 ms Alarm memory active, HPER4 Memory Horn Period push-to-test Interconnect Signal Operation (IO) IO Active Delay T 12 — 0 — s From start of local alarm IODLY1 to IO active Remote Alarm Delay T 12 0.780 1.00 1.25 s No local alarm, IODLY2A with Temporal Horn from IO active to alarm Pattern Remote Alarm Delay T 12 380 572 785 ms No local alarm, IODLY2B with Continuous Horn from IO active to alarm Pattern IO Charge T 12 1.23 1.31 1.39 s At conclusion of local IODMP Dump Duration alarm or test IO Filter T 12 — — 313 ms Standby, no alarm IOFILT Hush Timer Operation Hush Timer Period T 8.0 8.6 9.1 Min No alarm TPER EOL End-of-Life T 314 334 354 Hours EOL Enabled; Standby EOL Age Sample Detection IRED On Time TIRON 2 — 100 — µs Prog Bits 3,4 = 1,1 2 — 200 — µs Prog Bits 3,4 = 0,1 2 — 300 — µs Prog Bits 3,4 = 1,0 2 — 400 — µs Prog Bits 3,4 = 0,0 Note 1: See timing diagram for Horn Pattern (Figure5-2). 2: T and T are 100% production tested. All other AC parameters are verified by functional testing. PCLK IRON 3: Typical values are for design information only. 4: Limits over the specified temperature range are not production tested, and are based on characterization data. TEMPERATURE CHARACTERISTICS Electrical Specifications: All limits specified for V =3V, V =4.2V and V =0V, Except where noted in the DD BST SS Electrical Characteristics. Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges Operating Temperature Range T -10 — +60 °C A Storage Temperature Range T -55 — +125 °C STG Thermal Package Resistances Thermal Resistance, 16L-SOIC (150mil.) θ — 86.1 — °C/W JA DS20002271C-page 10  2010-2018 Microchip Technology Inc.

RE46C190 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table2-1. TABLE 2-1: PIN FUNCTION TABLE RE46C190 Symbol Function SOIC 1 V Connects to the negative supply voltage. SS 2 IRED Provides a regulated and programmable pulsed current for the infrared emitter diode. 3 V Connects to the positive supply or battery voltage. DD 4 TEST This input is used to invoke Test modes and the Timer mode. This input has an internal pull-down. 5 TEST2 Tests input for test and programming modes. This input has an internal pull-down. 6 IRP Connects to the anode of the photo diode. 7 IRN Connects to the cathode of the photo diode. 8 RLED Open drain NMOS output, used to drive a visible LED. This pin provides load current for the low battery test and is a visual indicator for Alarm and Hush modes. 9 GLED Open drain NMOS output used to drive a visible LED to provide visual indication of an Alarm Memory condition. 10 FEED Usually connected to the feedback electrode through a current limiting resistor. If not used, this pin must be connected to V or V . DD SS 11 IRCAP Used to charge and monitor the IRED capacitor. 12 IO This bidirectional pin provides the capability to interconnect many detectors in a single system. This pin has an internal pull-down device and a charge dump device. 13 HB This pin is connected to the metal electrode of a piezoelectric transducer. 14 HS This pin is a complementary output to HB, connected to the ceramic electrode of the piezoelectric transducer. 15 V Boosted voltage produced by DC-DC converter. BST 16 LX Open drain NMOS output, used to drive the boost converter inductor. The inductor should be connected from this pin to the positive supply through a low resistance path.  2010-2018 Microchip Technology Inc. DS20002271C-page 11

RE46C190 NOTES: DS20002271C-page 12  2010-2018 Microchip Technology Inc.

RE46C190 3.0 DEVICE DESCRIPTION 3.3 Supervisory Tests Once every 86seconds, the status of the battery 3.1 Standby Internal Timing voltage is checked by enabling the boost converter for 10ms and comparing a fraction of the V voltage to The internal oscillator is trimmed to ±6% tolerance. DD an internal reference. In each period of 344seconds, Once every 10seconds, the boost converter is the battery voltage is checked four times. Three checks powered up, the IRcap is charged from V and then BST are unloaded and one check is performed with the the detection circuitry is active for 10ms. Prior to RLED enabled, which provides a battery load. The completion of the 10mS period, the IRED pulse is High Boost mode is active only for the loaded low active for a user-programmable duration of 100 to battery test. In addition, once every 43seconds the 400µs. During this IRED pulse, the photo diode current chamber is activated and a High Gain mode and is integrated and then digitized. The result is compared chamber test limits are internally selected. A check of to a limit value stored in EEPROM during calibration to the chamber is made by amplifying background determine the photo chamber status. If a smoke reflections. The Low Boost mode is used for the condition is present, the period to the next detection chamber test. decreases and additional checks are made. If either the low battery test or the chamber test fails, 3.2 Smoke Detection Circuitry the horn will pulse on for 10ms every 43seconds, and will continue to pulse until the failing condition passes. The digitized photo amplifier integrator output is If two consecutive chamber tests fail, the horn will pulse compared to the stored limit value at the conclusion of on three times for 10ms, separated by 330ms every the IRED pulse period. The IRED drive is all internal, 43seconds. Each of the two supervisory test audible and both the period and current are user indicators is separated by approximately 20seconds. programmable. Three consecutive smoke detections As an option, a Low Battery Silence mode can be will cause the device to go into Alarm and activate the invoked. If a low battery condition exists and the TEST horn and interconnect circuits. In Alarm, the horn is input is driven high, the RLED will turn on. If the TEST driven at the high-boost voltage level, which is input is held for more than 0.5second, the unit will regulated based on an internal voltage reference and enter the Push-to-test operation described in therefore results in consistent audibility over battery Section3.4 “Push-to-Test Operation (PTT)”. After life. RLED will turn on for 10ms at a 2Hz rate. In Local the TEST input is driven low, the unit enters in Low Alarm, the integration limit is internally decreased to Battery Hush mode and the 10ms horn pulse is provide alarm hysteresis. The integrator has three silenced for 8hours. The activation of the test button separate gain settings: will also initiate the 9minute Reduced Sensitivity mode • Normal and Hysteresis described in Section3.6 “Reduced Sensitivity • Reduced Sensitivity (HUSH) Mode”. At the end of the 8hours, the audible indication • High Gain for Chamber Test and Push-to-Test will resume if the low battery condition still exists. There are four separate sets of integration limits (all user programmable): 3.4 Push-to-Test Operation (PTT) • Normal Detection If the TEST input pin is activated (V ), the smoke IH • Hysteresis detection rate increases to once every 250ms after • HUSH one internal clock cycle. In Push-to-Test, the photo amplifier High Gain mode is selected and background • Chamber Test and Push-to-Test modes reflections are used to simulate a smoke condition. In addition, there are user selectable integrator gain After the required three consecutive detections, the settings to optimize detection levels (see Table4-1). device will go into a Local Alarm condition. When the TEST input is driven low (V ), the photo amplifier IL Normal Gain is selected, after one clock cycle. The detection rate continues at once every 250ms until three consecutive No Smoke conditions are detected. At this point, the device returns to standby timing. In addition, after the TEST input goes low, the device enters the HUSH mode (see Section3.6 “Reduced Sensitivity Mode”).  2010-2018 Microchip Technology Inc. DS20002271C-page 13

RE46C190 3.5 Interconnect Operation 3.7 Local Alarm Memory The bidirectional IO pin allows the interconnection of An Alarm Memory feature allows easy identification of multiple detectors. In a Local Alarm condition, this pin any unit that had previously been in a Local Alarm is driven high (High Boost) immediately through a condition. If a detector has entered a Local Alarm, constant current source. Shorting this output to ground when it exits that Local Alarm, the Alarm Memory latch will not cause excessive current. The IO is ignored as is set. Initially the GLED can be used to visually identify input during a Local Alarm. any unit that had previously been in a Local Alarm condition. The GLED flashes three times spaced The IO pin also has an NMOS discharge device that is 1.3seconds apart. This pattern will repeat every active for 1.3 seconds after the conclusion of any type 43seconds. The duration of the flash is 10ms. In order of Local Alarm. This device helps to quickly discharge to preserve battery power, this visual indication will stop any capacitance associated with the interconnect line. after a period of 24hours. The user will still be able to If a remote, active high signal is detected, the device identify a unit with an active alarm memory by pressing goes into Remote Alarm and the horn will be active. the Push-to-Test button. When this button is active, the RLED will be off, indicating a Remote Alarm condition. horn will chirp for 10ms every 250ms. Internal protection circuitry allows the signaling unit to If the Alarm Memory condition is set, then any time the have a higher supply voltage than the signaled unit, Push-to-Test button is pressed and released, the Alarm without excessive current draw. Memory latch is reset. The interconnect input has a 336ms nominal digital The initial 24-hour visual indication is not displayed if a filter. This allows the interconnection to other types of low battery condition exists. alarms (carbon monoxide, for example) that may have a pulsed interconnect signal. 3.8 End of Life Indicator 3.6 Reduced Sensitivity Mode As an option, after every 14days of continuous operation, the device will read a stored age count from A Reduced Sensitivity or Hush mode is initiated by the EEPROM and increment this count. After 10years activating the TEST input (V ). If the TEST input is IH of powered operation, an audible warning will occur activated during a Local Alarm, the unit is immediately indicating that the unit should be replaced. This reset out of the alarm condition and the horn is indicator will be similar to the chamber test failure silenced. When the TEST input is deactivated (V ), the IL warning in that the horn will pulse on three times for device enters into a 9-minute nominal Hush mode. 10ms separated by 330ms every 43seconds. This During this period, the HUSH integration limit is indicator will be separated from the low battery selected. The hush gain is user programmable. In indicator by approximately 20 seconds. Reduced Sensitivity mode, the RLED flashes for 10ms every 10seconds to indicate that the mode is active. As an option, the Hush mode will be canceled if any of the following conditions exist: • Reduced sensitivity threshold is exceeded (high smoke level) • An interconnect alarm occurs • TEST input is activated again DS20002271C-page 14  2010-2018 Microchip Technology Inc.

RE46C190 4.0 USER PROGRAMMING MODES TABLE 4-1: PARAMETRIC PROGRAMMING Parametric Programming Range Resolution IRED Period 100-400µs 100µs IRED Current Sink 50-200mA 50mA Low Battery Detection Voltage 2.1-2.8V 100mV Photo Detection Limits Typical Maximum Input Current (nA) 100µs 200µs 300µs 400µs Normal/Hysteresis GF = 1 58 29 19.4 14.5 GF = 2 29 14.5 9.6 7.2 GF = 3 14.5 7.2 4.8 3.6 GF = 4 7.2 3.6 2.4 1.8 Hush GF = 1 116 58 38.8 29 GF = 2 58 29 19.4 14.5 GF = 3 29 14.5 9.6 7.2 GF = 4 14.5 7.2 4.8 3.6 Chamber Test GF = 1 29 14.5 9.6 7.2 GF = 2 14.5 7.2 4.8 3.6 GF = 3 7.2 3.6 2.4 1.8 GF = 4 3.6 1.8 1.2 0.9 Note 1: GF is the user selectable Photo Integration Gain Factor. Once selected, it applies to all modes of operation. For example, if GF=1 and integration time is selected to be 100µs, the ranges will be as follows: Normal/Hysteresis=58nA, Hush=116nA, Chamber Test=29nA. 2: Nominal measurement resolution in each case will be 1/31 of the maximum input range. 3: The same current resolution and ranges applies to the limits. TABLE 4-2: FEATURES PROGRAMMING Features Options Tone Select Continuous or NFPA Tone 10-Year End-of-life Indicator Enable/Disable Photo Chamber Long-Term Drift Adjustment Disable. The RE46C190 is not recommended for LTD applications. The RE46C191 should be used for LTD applications. Low Battery Hush Enable/Disable Hush Options Option1: Hush mode is not canceled for any reason. If the test button is pushed during Hush, the unit reverts to Normal Sensitivity to test the unit, but when it comes out of test, resumes in Hush where it left off. Option2: The Hush mode is canceled if the Reduced Sensitivity threshold is exceeded (high smoke level), and if an external (interconnect alarm) is signaled. If the test button is pushed during Hush, after the test is executed, the Hush mode is terminated.  2010-2018 Microchip Technology Inc. DS20002271C-page 15

RE46C190 4.1 Calibration and Programming When TEST2 is held at V , TEST becomes a tri-state DD Procedures input with nominal input levels at VSS, VDD and VBST. A TEST clock occurs whenever the TEST input switches Eleven separate programming and test modes are from V to V . The TEST Data column represents SS BST available for user customization. To enter these modes, the state of TEST when used as a data input, which after power-up, TEST2 must be driven to VDD and held would be either VSS or VDD. The TEST pin can at that level. The TEST input is then clocked to step therefore be used as both a clock, to change modes, through the modes. FEED and IO are reconfigured to and a data input, once a mode is set. Other pin become test mode inputs, while RLED, GLED and HB functions are described in Section4.2 “User become test mode outputs. The test mode functions for Selections”. each pin are outlined in Table4-3. TABLE 4-3: TEST MODE FUNCTIONS Mode Description CTEloScTk TDEaStaT TEST2 FEED IO RLED GLED HB V V V V V V — — — IH BST DD DD BST DD V V V V V V — — — IL SS SS SS SS SS T0 Photo Gain Factor 0 ProgData V ProgCLK ProgEn 14 bits RLED GLED HB DD (2bits) Integ Time (2bits) 0 ProgData V ProgCLK ProgEn 14 bits RLED GLED HB DD IRED Current (2bits) 0 ProgData V ProgCLK ProgEn 14 bits RLED GLED HB DD Low Battery Trip 0 ProgData V ProgCLK ProgEn 14 bits RLED GLED HB DD (3bits) LTD Enable (1bit)(5) 0 ProgData V ProgCLK ProgEn 14 bits RLED GLED HB DD Hush Option (1bit) 0 ProgData V ProgCLK ProgEn 14 bits RLED GLED HB DD LB Hush Enable 0 ProgData V ProgCLK ProgEn 14 bits RLED GLED HB DD (1bit) EOL Enable (1bit) 0 ProgData V ProgCLK ProgEn 14 bits RLED GLED HB DD Tone Select (1bit) 0 ProgData V ProgCLK ProgEn 14 bits RLED GLED HB DD T1 Norm Lim Set 1 not used V CalCLK LatchLim(3) Gamp IntegOut SmkComp(1) DD (5bits)(4) T2 Hyst Lim Set 2 not used V CalCLK LatchLim(3) Gamp IntegOut SmkComp(1) DD (5bits)(4) T3 Hush Lim Set 3 not used V CalCLK LatchLim(3) Gamp IntegOut SmkComp(1) DD (5bits)(4) T4 Ch Test Lim Set 4 not used V CalCLK LatchLim(3) Gamp IntegOut SmkComp(1) DD (5bits)(4) T5 LTD Baseline (5bits) 5 not used V MeasEn ProgEn 25 bits Gamp IntegOut SmkComp(1) DD T6 Serial Read/Write 6 ProgData V ProgCLK ProgEn RLED GLED Serial Out DD T7 Norm Lim Check 7 not used V MeasEn not used Gamp IntegOut SCMP(2) DD T8 Hyst Lim Check 8 not used V MeasEn not used Gamp IntegOut SCMP(2) DD T9 Hush Lim Check 9 not used V MeasEn not used Gamp IntegOut SCMP(2) DD T10 Ch Test Lim Check 10 not used V MeasEn not used Gamp IntegOut SCMP(2) DD T11 Horn Test 11 not used V FEED HornEn RLED GLED HB DD Note 1: SmkComp (HB) – digital comparator output (high if Gamp < IntegOut; low if Gamp > IntegOut). 2: SCMP (HB) – digital output representing comparison of measurement value and associated limit. Signal is valid only after MeasEn has been asserted and measurement has been made. (SCMP high if measured value > limit; low if mea- sured value < limit). 3: LatchLim (IO) – digital input used to latch present state of limits (Gamp level) for later storage. T1-T4 limits are latched, but not stored until ProgEn is asserted in T5 mode. 4: Operating the circuit in this manner with nearly continuous IRED current for an extended period of time may result in undesired or excessive heating of the part. The duration of this step should be minimized. 5: The RE46C190 is not recommended for LTD applications. The RE46C191 should be used for LTD applications. DS20002271C-page 16  2010-2018 Microchip Technology Inc.

RE46C190 4.2 User Selections Prior to smoke calibration, the user must program the functional options and parametric selections. This requires that 14bits, representing selected values, be clocked in serially using TEST as a data input and FEED as a clock input and then be stored in the internal EEPROM. The detailed steps are as follows: 1. Power up with bias conditions as shown in Figure4-1. At power-up TEST=TEST2=FEED=IO=V . SS RE46C190 1 V LX 16 SS V1 2 IRED VBST15 V2 3V 5V 3 V HS 14 DD 4 TEST HB 13 5 TEST2 IO 12 6 IRP IRCAP 11 V3 5V D2 7 IRN FEED 10 D3 8 RLED GLED 9 Smoke Chamber Monitor RLED, GLED, and HB V4 V5 V6 V7 FIGURE 4-1: Nominal Application Circuit for Programming.  2010-2018 Microchip Technology Inc. DS20002271C-page 17

RE46C190 2. Drive TEST2 input from V to V and hold at SS DD V through Step5 below. Note: For test mode T0 only 14 bits (bits 25-38) DD will be loaded. For test mode T6 all 39 bits 3. Using TEST as data and FEED as clock, shift in (bits 0-38), will be loaded. values as selected from Register4-1. REGISTER 4-1: CONFIGURATION AND CALIBRATION SETTINGS REGISTER W-x W-x W-x W-x W-x W-x W-x TS EOL LBH HUSH LTD LB0 LB1 bit 38 bit 32 W-x W-x W-x W-x W-x W-x W-x W-x LB2 IRC1 IRC0 IT1 IT0 PAGF1 PAGF0 NL4 bit 31 bit 24 W-x W-x W-x W-x W-x W-x W-x W-x NL3 NL2 NL1 NL0 HYL4 HYL3 HYL2 HYL1 bit 23 bit 16 W-x W-x W-x W-x W-x W-x W-x W-x HYL0 HUL4 HUL3 HUL2 HUL1 HUL0 CTL4 CTL3 bit 15 bit 8 W-x W-x W-x W-x W-x W-x W-x W-x CTL2 CTL1 CTL0 LTD4 LTD3 LTD2 LTD1 LTD0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 38 TS: Tone Select bit 1 = Temporal Horn Pattern 0 = Continuous Horn Pattern bit 37 EOL: End of Life Enable bit 1 = Enable 0 = Disable bit 36 LBH: Low Battery Hush Enable bit 1 = Enable 0 = Disable bit 35 HUSH: Hush Option bit 1 = Canceled for high smoke level, interconnect alarm or second push of TEST button (as described above) 0 = Never Cancel bit 34 LTD: Long-Term Drift Enable bit 1 = The RE46C190 is not recommended for LTD applications. The RE46C191 should be used for LTD applications. This bit must be set to 0. 0 = Disable DS20002271C-page 18  2010-2018 Microchip Technology Inc.

RE46C190 REGISTER 4-1: CONFIGURATION AND CALIBRATION SETTINGS REGISTER (CONTINUED) bit 33-31 LB<0:2>: Low Battery Trip Point bits 000 = 2.1V 001 = 2.5V 010 = 2.3V 011 = 2.7V 100 = 2.2V 101 = 2.6V 110 = 2.4V 111 = 2.8V bit 30-29 IRC<1:0>: IRED Current bits 00 = 50mA 01 = 100mA 10 = 150mA 11 = 200mA bit 28-27 IT<1:0>: Integration Time bits 00 = 400µs 01 = 300µs 10 = 200µs 11 = 100µs bit 26-25 PAGF<1:0>: Photo Amplifier Gain Factor bits 00 = 1 01 = 2 10 = 3 11 = 4 bit 24-20 NL<4:0>: Normal Limits bits (Section3.2 “Smoke Detection Circuitry”) 00000 = 0 00001 = 1 • • • 11110 = 30 11111 = 31 bit 19-15 HYL<4:0>: Hysteresis Limits bits (Section3.2 “Smoke Detection Circuitry”) 00000 = 0 00001 = 1 • • • 11110 = 30 11111 = 31 bit 14-10 HUL<4:0>: Hush Limits bits (Section3.6 “Reduced Sensitivity Mode”) 00000 = 0 00001 = 1 • • • 11110 = 30 11111 = 31  2010-2018 Microchip Technology Inc. DS20002271C-page 19

RE46C190 REGISTER 4-1: CONFIGURATION AND CALIBRATION SETTINGS REGISTER (CONTINUED) bit 9-5 CTL<4:0>: Chamber Test Limits bits (Section3.3 “Supervisory Tests”) 00000 = 0 00001 = 1 • • • 11110 = 30 11111 = 31 bit 4-0 LTD<4:0>: Long Term Drift Sample bits 00000 = 0 00001 = 1 • • • 11110 = 30 11111 = 31 The minimum pulse width for FEED is 10µs, while the 4. After shifting in data, pull IO input to V , then DD minimum pulse width for TEST is 100µs. For example, V (minimum pulse width of 10ms) to store SS the sequence for the following options would be: shift register contents into the memory. 5. If any changes are required, power down the data - 0 0 0 1 1 0 0 0 1 0 0 0 0 1 part and return to Step1. All bit values must be bit - 25 26 27 28 29 30 31 32 33 34 35 36 37 38 reentered. Photo Amp Gain Factor = 1 Integration Time = 200µs IRED Current = 100mA Low Battery Trip = 2.2V Long Term Drift, Low Battery Hush and EOL are all disabled Hush Option = Never Cancel Tone Select = Temporal VDD TEST2 VSS VDD TEST bit 25 bit 26 bit 27 bit 28 bit 29 bit 30 bit 31 bit 32 bit 33 bit 34 bit 35 bit 36 bit 37 bit 38 VSS VBST FEED VSS Min Tsetup2 = 2 µs Min Tsetup1 = 1 µs Min Thold1 = 1 µs Min PW1 = 10us Min T1 = 20 µs Min Td1 = 2 µs VDD IO … VSS Min PW2 = 10 ms FIGURE 4-2: Timing Diagram for Mode T0. DS20002271C-page 20  2010-2018 Microchip Technology Inc.

RE46C190 As an alternative to Figure4-1, Figure4-3 can be used to program while in the application circuit. Note that in addition to the five programming supplies, connections to V are needed at TP1 and TP2. SS VDD Monitor RLED, R1 GLED and HB L1 V1 100 10 µH V C1 BST 3V 10 µF Push-To-Test/ RE46C190 Hush C2 D1 1 µF V 1 VSS LX 16 V2 BST C3 2 IRED V 15 BST 5V 3R360 1R007 100 µF 3 VDD HS 14 R4 C5 R3 TP1 TP2 1 nF C4 4 TEST HB 13 1.5M 200K Smoke 4.7 µF Chamber 5 TEST2 IO 12 D2 D4 D5 6 IRP IRCAP 11 D3 7 IRN FEED 10 RED GREEN R5 330 To other Units 8 RLED GLED 99 C6 V3 33 µF 5V V4 V5 V6 V7 FIGURE 4-3: Circuit for Programming in the Typical Application.  2010-2018 Microchip Technology Inc. DS20002271C-page 21

RE46C190 4.3 Smoke Calibration 5. Apply a clock pulse to the TEST input again to enter in T3 mode and initiate calibration for Hush A separate calibration mode is entered for each Limits. Clock FEED as in the previous steps and measurement mode (Normal, Hysteresis, Hush and apply a pulse to IO once the desired level is Chamber Test) so that independent limits can be set for reached. Operating the circuit in this manner, each. In all calibration modes, the integrator output can with nearly continuous IRED current for an be accessed at the GLED output. extended period of time, may result in undesired The Gamp output voltage, which represents the smoke or excessive heating of the part. The duration of detection level, can be accessed at the RLED output. this step should be minimized. The SmkComp output voltage is the result of the 6. Apply a clock pulse to the TEST input a fourth comparison of Gamp with the integrator output and can time to enter in T4 mode and initiate the be accessed at HB. The FEED input can be clocked to calibration for Chamber Test Limits. Clock step up the smoke detection level at RLED. Once the FEED and apply pulse to IO once desired level desired smoke threshold is reached, the TEST input is is reached. Operating the circuit in this manner, pulsed low to high to store the result. with nearly continuous IRED current for an The procedure is described in the following steps: extended period of time, may result in undesired or excessive heating of the part. The duration of 1. Power-up with the bias conditions shown in this step should be minimized. Figure4-1. 7. Apply a clock pulse to the TEST input a fifth time 2. Drive TEST2 input from V to V to enter the SS DD to enter in T5 mode. After limits have been set, Programming mode. TEST2 should remain at pulse IO to store all results in memory. Before V through Step7. DD this step, no limits are stored in memory. With 3. Apply a clock pulse to the TEST input to enter in LTD disabled, the LTD baseline measurement T1 mode. This initiates the calibration mode for does not have to be made before pulsing IO high Normal Limits setting. The Integrator output to store test limits in memory. sawtooth should appear at GLED and the smoke detection level at RLED. Clock FEED to increase the smoke detection level as needed. Once the desired smoke threshold is reached, the IO input is pulsed low to high to enter the result. See typical waveforms in Figure4-4. Operating the circuit in this manner, with nearly continuous IRED current for an extended period of time, may result in undesired or excessive heating of the part. The duration of this step should be minimized. 4. Apply a second clock pulse to the TEST input to enter in T2 mode. This initiates the calibration mode for Hysteresis Limits. Clock FEED as in Step3 and apply pulse to IO, once the desired level is reached. Operating the circuit in this manner, with nearly continuous IRED current for an extended period of time, may result in unde- sired or excessive heating of the part. The dura- tion of this step should be minimized. DS20002271C-page 22  2010-2018 Microchip Technology Inc.

RE46C190 VDD TEST2 VSS Min Tsetup2 = 2 µs VBST TEST VSS Min PW3 = 100 µs VBST FEED VSS Min Td2 = 10 µs Min PW1 = 10 µs Min T1 = 20 µs Min PW5 = 2 ms VDD IO VSS Min PW2 = 10 ms GLED … … … … IRED … … … … RLED HB FIGURE 4-4: Timing Diagram for Modes T1 to T5.  2010-2018 Microchip Technology Inc. DS20002271C-page 23

RE46C190 4.4 Serial Read/Write The data sequence follows the pattern described in Register4-1: As an alternative to the steps in Section4.3 “Smoke Calibration”, if the system has been well- 2 bit Photo Amp Gain Factor characterized, the limits and baseline can be entered 2 bit Integration Time directly from a serial read/write calibration mode. 2 bit IRED current To enter this mode, follow these steps: 3 bit Low Battery Trip Point 1. Set up the application as shown in Figure4-1. 1 bit Long-Term Drift Enable (set to 0) 2. Drive TEST2 input from V to V to enter in SS DD Programming mode. TEST2 should remain at 1 bit Hush Option VDD until all data has been entered. 1 bit Low Battery Hush Enable 3. Clock the TEST input to mode T6 (High = VBST, 1 bit EOL enable Low = V , 6clocks). This enables the serial SS 1 bit Tone Select read/write mode. 4. TEST now acts as a data input (High = V , A serial data output is available at HB. DD Low=VSS). FEED acts as the clock input 5. After all 39 bits have been entered, pulse IO to (High=VBST, Low=VSS). Clock in the limits, store into the EEPROM memory. LTD baseline, functional and parametric options. The data sequence should be as follows: 5 bit LTD sample (LSB first) 5 bit Chamber Test Limits (LSB first) 5 bit Hush Limits (LSB first) 5 bit Hysteresis Limits (LSB first), 5 bit Normal Limits (LSB first) VDD TEST2 VSS VBST TEST D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 … D39 VSS VSS Min Tsetup2 = 2 µs Min PW3 = 100 µs Min T2 = 120 µs VBST FEED … VSS Min Tsetup1 = 1 µs Min Thold1 = 1 µs Min PW1 = 10 µs Min T1 = 20 µs VDD IO … VSS Min PW2 = 10 ms FIGURE 4-5: Timing Diagram for Mode T6. DS20002271C-page 24  2010-2018 Microchip Technology Inc.

RE46C190 4.5 Limits Verification After all limits have been entered and stored into the memory, additional test modes are available to verify if the limits are functioning as expected. Table4-4 describes several verification tests. TABLE 4-4: LIMITS VERIFICATION DESCRIPTION Limit Test Description Normal Limits Clock TEST to Mode T7 (7 clocks). With appropriate smoke level in chamber, pull FEED to V and hold for at least 1ms. The HB output will indicate the detection status DD (High=smoke detected). Hysteresis Limits Clock TEST to Mode T8 (8 clocks). Pulse FEED and monitor HB as in Normal Limits case. Hush Limits Clock TEST to Mode T9 (9 clocks). Pulse FEED and monitor HB. Chamber Test Limits Clock TEST to Mode T10 (10 clocks). Pulse FEED and monitor HB. VDD TEST2 VSS VBST TEST VSS Min Tsetup2 = 2 µs Min PW3 = 100 µs Min T2 = 120 µs Vbst FEED VSS Min Td2 = 10 µs Min PW5 = 2 ms VDD IO VSS GLED … … … IRED … … … RLED HB FIGURE 4-6: Timing Diagram for Modes T7-T10.  2010-2018 Microchip Technology Inc. DS20002271C-page 25

RE46C190 4.6 Horn Test The last test mode allows the horn to be enabled indefinitely for audibility testing. To enter this mode, clock TEST to Mode T11 (11 clocks). The IO pin is configured as horn enable. V DD TEST2 V SS V BST TEST V SS Min Tsetup2 = 2 µs Min PW3 = 100 µs Min T2 = 120 µs V DD IO V SS Horn Enabled FIGURE 4-7: Timing Diagram for Mode T11. DS20002271C-page 26  2010-2018 Microchip Technology Inc.

RE46C190 5.0 APPLICATION NOTES A calculation of the standby current for the battery life is shown in Table5-1, based on the following parameters: 5.1 Standby Current Calculation and Battery Life V = 3 BAT V = 3.6 The supply current shown in the DC Electrical BST1 Characteristics table is only one component of the VBST2 = 9 average standby current and, in most cases, can be a Boost capacitor size = 4.70E-06 small fraction of the total, because power consumption Boost Efficiency = 8.50E-01 generally occurs in relatively infrequent bursts and IRED on time = 2.000E-04 depends on many external factors. These include the values selected for IRED current and integration time, IRED Current = 1.000E-01 the V and IR capacitor sizes and leakages, the V BST BAT level, and the magnitude of any external resistances that will adversely affect the boost converter efficiency. TABLE 5-1: STANDBY CURRENT CALCULATION Average I Voltage Current Duration Energy Period BAT I I Component Power Contribution BAT DD (V) (A) (s) (J) (s) (µA) (W) (A) Fixed I 3 1.00E-06 — — — 3.00E-06 1.00E-06 1.0 DD Photo Detection Current Chamber test 3.6 1.00E-03 1.00E-02 3.60E-05 43 9.85E-07 3.28E-07 0.3 (excluding IR drive) IR drive during 3.6 0.10 2.00E-04 7.20E-05 43 1.97E-06 6.57E-07 0.7 Chamber Test Smoke Detection 3.6 1.00E-03 1.00E-02 3.60E-05 10.75 3.94E-06 1.31E-06 1.3 (excluding IR drive) IR drive during 3.6 0.10 2.00E-04 7.20E-05 10.75 7.88E-06 2.63E-06 2.6 Smoke Detection Low Battery Check Current Loaded Test Load 9 2.00E-02 1.00E-02 1.80E-03 344 6.16E-06 2.05E-06 2.1 Boost V — — 6.85E-05 344 2.34E-07 7.81E-08 0.1 BST1 to V BST2 Unloaded Test Load 3.6 1.00E-04 1.00E-02 3.60E-06 43 9.85E-08 3.28E-08 0.0 Total 8.09E-06 8.1 The following paragraphs explain the components in The contribution to I is determined by first BAT Table5-1 and the calculations in the example. calculating the energy consumed by each component, given its duration. An average power is then calculated 5.1.1 FIXED IDD based on the period of the event and the boost The I is the Supply Current shown in the DC converter efficiency (assumed to be 85% in this case). DD Electrical Characteristics table. An IBAT contribution is then calculated based on this average power and the given V . For example, the IR BAT 5.1.2 PHOTO DETECTION CURRENT drive contribution during chamber test is detailed in Equation5-1: Photo Detection Current is the current draw due to the smoke test every 10.75seconds and the chamber test EQUATION 5-1: every 43seconds. The current for both the IR diode and the internal measurement circuitry comes primarily 3.6V0.1A200s --------------------------------------------------- = 0.657A from V , so the average current must be scaled for 43s0.853V BST both on-time and boost voltage.  2010-2018 Microchip Technology Inc. DS20002271C-page 27

RE46C190 5.1.3 LOW BATTERY CHECK CURRENT The Low Battery Check Current is the current required for the low battery test. It includes both the loaded (RLED on) and unloaded (RLED off) tests. The boost component of the loaded test represents the cost of charging the boost capacitor to the higher voltage level. This has a fixed cost for every loaded check, because the capacitor is gradually discharged during subsequent operations and the energy is generally not recovered. The other calculations are similar to those shown in Equation5-1. The unloaded test has a minimal contribution because it involves only some internal reference and comparator circuitry. 5.1.4 BATTERY LIFE When estimating the battery life, several additional factors must be considered. These include battery resistance, battery self discharge rate, capacitor leakages and the effect of the operating temperature on all of these characteristics. Some number of false alarms and user tests should also be included in any calculation. For 10-year applications, a 3V spiral wound lithium manganese dioxide battery with a laser seal is recommended. These can be found with capacities of 1400 to 1600mAh. DS20002271C-page 28  2010-2018 Microchip Technology Inc.

RE46C190 5.1.5 FUNCTIONAL TIMING DIAGRAMS Standby, No Alarm (not to Scale) TIRON TPER0 IRED Chamber Test (Internal Signal) TPCT1 Low Battery Test (Internal signal) TPLB2 TON1 RLED TPLB1 LTD Sample TLTD EOL TEOL Low Supply Test Failure Low Battery Test (Internal signal) RLED THON1 HORN THPER1 Chamber Test Failure Chamber Test (Internal Signal) THON2 HORN THOF2 THPER2 FIGURE 5-1: RE46C190 Timing Diagram – Standby, No Alarm, Low Supply Test Failure and Chamber Test Failure.  2010-2018 Microchip Technology Inc. DS20002271C-page 29

RE46C190 Local Alarm with Temporal Horn Pattern (not to Scale) No Alarm Local Alarm TIRON IRED TPER3A TON1 RLED TPLED2A THON2A THOF2A THOF3A HORN TIODLY1 IO as Output Local Alarm with International Horn Pattern (not to Scale) No Alarm Local Alarm TIRON IRED TPER3B TON1 RLED TPLED2B THON2B THOF2B HORN TIODLY1 IO as Output Interconnect as Input with Temporal Horn pattern (not to Scale) TIOFILT IO as Input TIODLYA HORN Interconnect as Input with International Horn Pattern (not to Scale) TIOFILT IO as Input TIODLYB FIGURE 5-2: RE46C190 Timing Diagram – Local Alarm with Temporal Horn Pattern, Local Alarm with International Horn Pattern, Interconnect as Input with Temporal Horn Pattern and Interconnect as Input with International Horn Pattern. DS20002271C-page 30  2010-2018 Microchip Technology Inc.

RE46C190 Alarm Memory (not to Scale) Alarm Memory Alarm, No Low Battery Alarm Memory; No Alarm; No Low Battery Alarm Memory After 24 Hour Timer Indication RLED TPLED1 TPLED1 TON1 TPLED2 GLED TON1 TOFLED TPLED1 TLALED THON4 HB THPER4 TEST Hush Timer (not to Scale) Alarm, No Low Battery Timer Mode; No Alarm; No Low Battery Standby, No Alarm RLED TPLED4 TPLED1 TON1 TPLED2 TTPER HB TEST FIGURE 5-3: RE46C190 Timing Diagram – Alarm Memory and Hush Timer.  2010-2018 Microchip Technology Inc. DS20002271C-page 31

RE46C190 NOTES: DS20002271C-page 32  2010-2018 Microchip Technology Inc.

RE46C190 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 16-Lead SOIC (.150”) Example RE46C190 V/SLe3 1830256 Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e3 Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.  2010-2018 Microchip Technology Inc. DS20002271C-page 33

RE46C190 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20002271C-page 34  2010-2018 Microchip Technology Inc.

RE46C190 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2010-2018 Microchip Technology Inc. DS20002271C-page 35

RE46C190 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20002271C-page 36  2010-2018 Microchip Technology Inc.

RE46C190 APPENDIX A: REVISION HISTORY Revision C (July 2018) The following is the list of modifications: • Updated the AC Electrical Characteristics table. • Updated Table4-2. • Added Note 5 in Table4-3. • Updated Register4-1. • Updated Section4.3 “Smoke Calibration”. • Updated Section4.4 “Serial Read/Write”. Revision B (December 2016) The following is the list of modifications: • Updated Section3.0 “Device Description”. • Updated Section6.1 “Package Marking Information”. • Minor typographical corrections. Revision A (December 2010) • Original Release of this Document.  2010-2018 Microchip Technology Inc. DS20002271C-page 37

RE46C190 NOTES: DS20002271C-page 38  2010-2018 Microchip Technology Inc.

RE46C190 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X XX T X Examples: Device Package Number Tape Lead a) RE46C190S16F: 16LD SOIC Package, of Pins and Reel Free Lead Free b) RE46C190S16TF: 16LD SOIC Package, Tape and Reel, Device: RE46C190: CMOS Photoelectric Smoke Detector ASIC Lead Free RE46C190T: CMOS Photoelectric Smoke Detector ASIC (Tape and Reel) Package: S = Small Plastic Outline - Narrow, 3.90mm Body, 16-Lead (SOIC)  2010-2018 Microchip Technology Inc. DS20002271C-page 39

RE46C190 NOTES: DS20002271C-page 40  2010-2018 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, AnyRate, AVR, and may be superseded by updates. It is your responsibility to AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo, ensure that your application meets with your specifications. CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, MICROCHIP MAKES NO REPRESENTATIONS OR JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus, WARRANTIES OF ANY KIND WHETHER EXPRESS OR maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, IMPLIED, WRITTEN OR ORAL, STATUTORY OR OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip OTHERWISE, RELATED TO THE INFORMATION, Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo, INCLUDING BUT NOT LIMITED TO ITS CONDITION, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered QUALITY, PERFORMANCE, MERCHANTABILITY OR trademarks of Microchip Technology Incorporated in the U.S.A. FITNESS FOR PURPOSE. Microchip disclaims all liability and other countries. arising from this information and its use. Use of Microchip ClockWorks, The Embedded Control Solutions Company, devices in life support and/or safety applications is entirely at EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, the buyer’s risk, and the buyer agrees to defend, indemnify and mTouch, Precision Edge, and Quiet-Wire are registered hold harmless Microchip from any and all damages, claims, trademarks of Microchip Technology Incorporated in the U.S.A. suits, or expenses resulting from such use. No licenses are Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any conveyed, implicitly or otherwise, under any Microchip Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard, intellectual property rights unless otherwise stated. CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Microchip received ISO/TS-16949:2009 certification for its worldwide SQTP is a service mark of Microchip Technology Incorporated in headquarters, design and wafer fabrication facilities in Chandler and the U.S.A. Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures Silicon Storage Technology is a registered trademark of Microchip are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping Technology Inc. in other countries. devices, Serial EEPROMs, microperipherals, nonvolatile memory and GestIC is a registered trademark of Microchip Technology analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their QUALITY MANAGEMENT SYSTEM respective companies. © 2018, Microchip Technology Incorporated, All Rights Reserved. CERTIFIED BY DNV ISBN: 978-1-5224-3323-1 == ISO/TS 16949 ==  2010-2018 Microchip Technology Inc. DS20002271C-page 41

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