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  • 型号: PRTR5V0U2F,115
  • 制造商: NXP Semiconductors
  • 库位|库存: xxxx|xxxx
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PRTR5V0U2F,115产品简介:

ICGOO电子元器件商城为您提供PRTR5V0U2F,115由NXP Semiconductors设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 PRTR5V0U2F,115价格参考¥0.87-¥0.87。NXP SemiconductorsPRTR5V0U2F,115封装/规格:TVS - 二极管, Clamp Ipp Tvs Diode Surface Mount 6-XSON, SOT886 (1.45x1)。您可以下载PRTR5V0U2F,115参考资料、Datasheet数据手册功能说明书,资料中有PRTR5V0U2F,115 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

电路保护

描述

TVS DIODE 5.5VWM SOT886ESD 抑制器 R-T-R PROT DIODE 2L ULTRA LOW

产品分类

TVS - 二极管

品牌

NXP Semiconductors

产品手册

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产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

NXP Semiconductors PRTR5V0U2F,115-

数据手册

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产品型号

PRTR5V0U2F,115

PCN封装

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不同频率时的电容

1pF @ 1MHz

产品目录页面

点击此处下载产品Datasheet

产品种类

ESD 抑制器

供应商器件封装

6-XSON,SOT886(1.45x1)

其它名称

568-4677-6

击穿电压

9 V

功率-峰值脉冲

-

包装

Digi-Reel®

单向通道

-

双向通道

2

商标

NXP Semiconductors

安装类型

表面贴装

封装

Reel

封装/外壳

6-XFDFN

封装/箱体

SOT-886

工作温度

-40°C ~ 85°C (TA)

工作温度范围

- 40 C to + 85 C

工厂包装数量

5000

应用

通用

标准包装

1

特色产品

http://www.digikey.com/cn/zh/ph/NXP/prtr5v.html

电压-击穿(最小值)

6V

电压-反向关态(典型值)

5.5V(最小值)

电压-箝位(最大值)@Ipp

-

电流-峰值脉冲(10/1000µs)

-

电源线路保护

类型

转向装置(轨至轨)

零件号别名

PRTR5V0U2F T/R

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PDF Datasheet 数据手册内容提取

Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia

PRTR5V0U2F; PRTR5V0U2K Ultra low capacitance double rail-to-rail ESD protection Rev. 02 — 19 February 2009 Product data sheet 1. Product profile 1.1 General description Ultra low capacitance double rail-to-rail ElectroStatic Discharge(ESD) protection devices in leadless ultra small Surface-Mounted Device(SMD) plastic packages. The devices are designed to protect two Hi-Speed data lines or high-frequency signal lines from the damage caused by ESD and other transients. PRTR5V0U2F and PRTR5V0U2K integrate two ultra low capacitance rail-to-rail ESDprotection channels and one additional ESD protection diode each to ensure signalline protection even if no supply voltage is available. Table 1. Product overview Type number Package Package configuration NXP JEDEC PRTR5V0U2F SOT886 MO-252 leadless ultra small PRTR5V0U2K SOT891 - leadless ultra small 1.2 Features n ESDprotection of two Hi-Speed data lines or high-frequency signal lines n Ultra low input/output to ground capacitance: C =1pF (I/O-GND) n ESDprotection up to 8kV n IEC61000-4-2, level4(ESD) n Very low clamping voltage due to an integrated additional ESDprotection diode n Very low reverse current n AEC-Q101 qualified n Leadless ultra small SMD plastic packages 1.3 Applications n USB2.0interfaces n Digital Video Interface(DVI) / High Definition Multimedia Interface(HDMI) interfaces n Mobile and cordless phones n Personal Digital Assistants(PDA) n Digital cameras n Wide Area Network(WAN) / Local Area Network(LAN) systems n PCs, notebooks, printers and other PCperipherals

PRTR5V0U2F; PRTR5V0U2K NXP Semiconductors Ultra low capacitance double rail-to-rail ESD protection 1.4 Quick reference data Table 2. Quick reference data T =25(cid:176) C unless otherwise specified. amb Symbol Parameter Conditions Min Typ Max Unit Per channel C input/output to ground f=1MHz; [1] - 1.0 1.5 pF (I/O-GND) capacitance V =0V (I/O-GND) C input/output to input/output f=1MHz; [2] - 0.6 - pF (I/O-I/O) capacitance V =0V (I/O-I/O) Zener diode V reverse standoff voltage [3] - - 5.5 V RWM C supply pin to ground f=1MHz; [3] - 16 - pF sup capacitance V =0V CC [1] Measured from pin1, 3, 4 or 6 to ground. [2] Measured from pin1or6 to pin3or4. [3] Measured from pin5 to ground. 2. Pinning information Table 3. Pinning Pin Symbol Description Simplified outline Graphic symbol PRTR5V0U2F (SOT886) 1 I/O1 input/output1 1 2 3 2 GND ground 1 6 3 I/O2 input/output2 4 I/O2 input/output2 2 5 5 V supply voltage CC 6 5 4 6 I/O1 input/output1 bottom view 3 4 006aab349 PRTR5V0U2K (SOT891) 1 I/O1 input/output1 1 2 3 2 GND ground 1 6 3 I/O2 input/output2 4 I/O2 input/output2 2 5 5 V supply voltage CC 6 5 4 6 I/O1 input/output1 bottom view 3 4 006aab349 PRTR5V0U2F_PRTR5V0U2K_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 19 February 2009 2 of 12

PRTR5V0U2F; PRTR5V0U2K NXP Semiconductors Ultra low capacitance double rail-to-rail ESD protection 3. Ordering information Table 4. Ordering information Type number Package Name Description Version PRTR5V0U2F XSON6 plastic extremely thin small outline package; SOT886 noleads; 6terminals; body1· 1.45· 0.5mm PRTR5V0U2K XSON6 plastic extremely thin small outline package; SOT891 noleads; 6terminals; body1· 1· 0.5mm 4. Marking Table 5. Marking codes Type number Marking code PRTR5V0U2F PF PRTR5V0U2K PK 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit Per device T ambient temperature - 40 +85 (cid:176) C amb T storage temperature - 55 +125 (cid:176) C stg Table 7. ESD maximum ratings T =25(cid:176) C unless otherwise specified. amb Symbol Parameter Conditions Min Max Unit Per channel V electrostatic discharge voltage IEC61000-4-2 [1][2] - 8 kV ESD (contact discharge) MIL-STD-883(human [2] - 10 kV body model) [1] Device stressed with ten non-repetitive ESDpulses. [2] Measured from pin1, 3, 4 or6 to pin2 or5. PRTR5V0U2F_PRTR5V0U2K_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 19 February 2009 3 of 12

PRTR5V0U2F; PRTR5V0U2K NXP Semiconductors Ultra low capacitance double rail-to-rail ESD protection Table 8. ESD standards compliance Standard Conditions Per channel IEC61000-4-2; level4 (ESD) >8kV(contact) MIL-STD-883; class3 (human body model) >4kV 001aaa631 IPP 100 % 90 % 10 % tr = 0.7 ns to 1 ns t 30 ns 60 ns Fig 1. ESD pulse waveform according to IEC61000-4-2 PRTR5V0U2F_PRTR5V0U2K_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 19 February 2009 4 of 12

PRTR5V0U2F; PRTR5V0U2K NXP Semiconductors Ultra low capacitance double rail-to-rail ESD protection 6. Characteristics Table 9. Characteristics T =25(cid:176) C unless otherwise specified. amb Symbol Parameter Conditions Min Typ Max Unit Per channel I reverse current V =5V [1] - <1 100 nA R R C input/output to ground f=1MHz; [1] - 1.0 1.5 pF (I/O-GND) capacitance V =0V (I/O-GND) C input/output to input/output f=1MHz; [2] - 0.6 - pF (I/O-I/O) capacitance V =0V (I/O-I/O) V forward voltage I =1mA [3] - 0.7 - V F F Zener diode V reverse standoff voltage [4] - - 5.5 V RWM V breakdown voltage [4] 6 - 9 V BR C supply pin to ground f=1MHz; [4] - 16 - pF sup capacitance V =0V CC [1] Measured from pin1, 3, 4 or 6 to ground. [2] Measured from pin1or6 to pin3or4. [3] Measured from pin1, 3, 4 or 6 to pin5. [4] Measured from pin5 to ground. 006aaa483 006aaa484 2.0 1.0 C(I/O-GND) C(I/O-I/O) (pF) (pF) 1.6 0.8 1.2 0.6 0.8 0.4 0.4 0.2 0 0 0 1 2 3 4 5 0 1 2 3 4 5 V(I/O-GND) (V) V(I/O-I/O) (V) f=1MHz; T =25(cid:176) C f=1MHz; T =25(cid:176) C amb amb Fig 2. Input/output to ground capacitance as a Fig 3. Input/output to ground capacitance as a function of input/output to ground voltage; function of input/output to input/output typical values voltage; typical values PRTR5V0U2F_PRTR5V0U2K_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 19 February 2009 5 of 12

PRTR5V0U2F; PRTR5V0U2K NXP Semiconductors Ultra low capacitance double rail-to-rail ESD protection ESD TESTER 4 GHz DIGITAL RG 223/U OSCILLOSCOPE RZ 450 W 50 W coax 10· ATTENUATOR CZ 50 W DUT Device Under Test IEC 61000-4-2 network CZ = 150 pF; RZ = 330 W vertical scale = 200 V/div vertical scale = 10 V/div horizontal scale = 50 ns/div horizontal scale = 50 ns/div GND GND unclamped +1 kV ESD voltage waveform clamped +1 kV ESD voltage waveform (IEC 61000-4-2 network) (IEC 61000-4-2 network) vertical scale = 10 V/div horizontal scale = 50 ns/div GND GND vertical scale = 200 V/div horizontal scale = 50 ns/div unclamped - 1 kV ESD voltage waveform clamped - 1 kV ESD voltage waveform (IEC 61000-4-2 network) (IEC 61000-4-2 network) 006aab112 Fig 4. ESDclamping test setup and waveforms PRTR5V0U2F_PRTR5V0U2K_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 19 February 2009 6 of 12

PRTR5V0U2F; PRTR5V0U2K NXP Semiconductors Ultra low capacitance double rail-to-rail ESD protection 7. Application information Handling data rates up to 480Mbit/s, USB2.0 interfaces require ESDprotection devices with an extremely low line capacitance in order to avoid signal distortion. With a capacitance of only 1pF, the PRTR5V0U2F and the PRTR5V0U2K offer IEC61000-4-2, level4 compliant ESDprotection. PRTR5V0U2F and PRTR5V0U2K integrate two pairs of ultra low capacitance rail-to-rail ESDprotection channels and one additional ESDprotection diode each. The additional ESDprotection diode connected between ground and V prevents CC charging of the supply. USB controller protected IC/device common mode VBUS D+ choke D+ D- D- GND VBUS 006aaa485 Fig 5. Application diagram: USB2.0 Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient(EFT) and surge transients. The following guidelines are recommended: 1. Place the PRTR5V0U2F and the PRTR5V0U2K as close to the input terminal or connector as possible. 2. The path length between the PRTR5V0U2F or the PRTR5V0U2K and the protected line should be minimized. 3. Keep parallel signal paths to a minimum. 4. Avoid running protected conductors in parallel with unprotected conductors. 5. Minimize all Printed-Circuit Board(PCB) conductive loops including power and ground loops. 6. Minimize the length of the transient return path to ground. 7. Avoid using shared transient return paths to a common ground point. 8. Ground planes should be used whenever possible. For multilayer PCBs, use ground vias. PRTR5V0U2F_PRTR5V0U2K_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 19 February 2009 7 of 12

PRTR5V0U2F; PRTR5V0U2K NXP Semiconductors Ultra low capacitance double rail-to-rail ESD protection 8. Package outline 1.05 0.50 1.05 0.5 0.95 max 0.95 max 0.6 0m.a0x4 0.55 0m.0a4x 0.25 3 4 0.17 3 4 0.5 0.35 0.20 11..54 2 5 10..0955 2 5 0.12 0.5 0.35 1 6 1 6 0.40 0.35 0.40 0.35 0.32 0.27 0.32 0.27 Dimensions in mm 04-07-22 Dimensions in mm 07-05-15 Fig 6. Package outline PRTR5V0U2F(SOT886) Fig 7. Package outline PRTR5V0U2K(SOT891) 9. Packing information Table 10. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number Package Description Packing quantity 5000 PRTR5V0U2F SOT886 4mm pitch, 8mm tape and reel; T1 [2] -115 4mm pitch, 8mm tape and reel; T4 [3] -132 PRTR5V0U2K SOT891 4mm pitch, 8mm tape and reel -132 [1] For further information and the availability of packing methods, seeSection13. [2] T1: normal taping [3] T4: 90(cid:176) rotated reverse taping PRTR5V0U2F_PRTR5V0U2K_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 19 February 2009 8 of 12

PRTR5V0U2F; PRTR5V0U2K NXP Semiconductors Ultra low capacitance double rail-to-rail ESD protection 10. Soldering 1.250 0.675 0.370 (6· ) 0.500 1.700 solder resist 0.500 solder paste = solderland 0.270 (6· ) occupied area Dimensions in mm 0.325 0.425 (6· ) (6·) sot886_fr Reflow soldering is the only recommended soldering method. Fig 8. Reflow soldering footprint PRTR5V0U2F(SOT886) 1.05 0.5 0.6 (6· ) (6· ) solder resist 1.4 0.7 solder land plus solder paste occupied area Dimensions in mm 0.15 (6· ) 0.35 0.25 (6· ) sot891_fr Reflow soldering is the only recommended soldering method. Fig 9. Reflow soldering footprint PRTR5V0U2K(SOT891) PRTR5V0U2F_PRTR5V0U2K_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 19 February 2009 9 of 12

PRTR5V0U2F; PRTR5V0U2K NXP Semiconductors Ultra low capacitance double rail-to-rail ESD protection 11. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes PRTR5V0U2F_PRTR5V0U2K_2 20090219 Product data sheet - PRTR5V0U2F_PRTR5V0U2K_1 Modifications: • Table 3 “Pinning”: graphic symbol amended PRTR5V0U2F_PRTR5V0U2K_1 20081106 Product data sheet - - PRTR5V0U2F_PRTR5V0U2K_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 19 February 2009 10 of 12

PRTR5V0U2F; PRTR5V0U2K NXP Semiconductors Ultra low capacitance double rail-to-rail ESD protection 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] Theproductstatusofdevice(s)describedinthisdocumentmayhavechangedsincethisdocumentwaspublishedandmaydifferincaseofmultipledevices.Thelatestproductstatus information is available on the Internet at URLhttp://www.nxp.com. 12.2 Definitions Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the Draft —The document is a draft version only. The content is still under specified use without further testing or modification. internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any Limiting values —Stress above one or more limiting values (as defined in representations or warranties as to the accuracy or completeness of theAbsoluteMaximumRatingsSystemofIEC60134)maycausepermanent informationincludedhereinandshallhavenoliabilityfortheconsequencesof damagetothedevice.Limitingvaluesarestressratingsonlyandoperationof use of such information. the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting Short data sheet —A short data sheet is an extract from a full data sheet values for extended periods may affect device reliability. withthesameproducttypenumber(s)andtitle.Ashortdatasheetisintended forquickreferenceonlyandshouldnotbereliedupontocontaindetailedand Terms and conditions of sale —NXP Semiconductors products are sold full information. For detailed and full information see the relevant full data subjecttothegeneraltermsandconditionsofcommercialsale,aspublished sheet, which is available on request via the local NXP Semiconductors sales athttp://www.nxp.com/profile/terms, including those pertaining to warranty, office. In case of any inconsistency or conflict with the short data sheet, the intellectual property rights infringement and limitation of liability, unless full data sheet shall prevail. explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. 12.3 Disclaimers No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the General —Information in this document is believed to be accurate and grant,conveyanceorimplicationofanylicenseunderanycopyrights,patents reliable.However,NXPSemiconductorsdoesnotgiveanyrepresentationsor or other industrial or intellectual property rights. warranties,expressedorimplied,astotheaccuracyorcompletenessofsuch Quick reference data —The Quick reference data is an extract of the information and shall have no liability for the consequences of use of such product data given in the Limiting values and Characteristics sections of this information. document, and as such is not complete, exhaustive or legally binding. Right to make changes —NXPSemiconductorsreservestherighttomake ESD protection devices —These products are only intended for protection changes to information published in this document, including without against ElectroStatic Discharge (ESD) pulses and are not intended for any limitation specifications and product descriptions, at any time and without otherusageincluding,withoutlimitation,voltageregulationapplications.NXP notice.Thisdocumentsupersedesandreplacesallinformationsuppliedprior Semiconductorsacceptsnoliabilityforuseinsuchapplicationsandtherefore to the publication hereof. such use is at the customer’s own risk. Suitability for use —NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 12.4 Trademarks malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental Notice:Allreferencedbrands,productnames,servicenamesandtrademarks damage. NXP Semiconductors accepts no liability for inclusion and/or use of are the property of their respective owners. NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. 13. Contact information For more information, please visit:http://www.nxp.com For sales office addresses, please send an email to:salesaddresses@nxp.com PRTR5V0U2F_PRTR5V0U2K_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 19 February 2009 11 of 12

PRTR5V0U2F; PRTR5V0U2K NXP Semiconductors Ultra low capacitance double rail-to-rail ESD protection 14. Contents 1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 2 2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information. . . . . . . . . . . . . . . . . . . . . 3 4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Application information. . . . . . . . . . . . . . . . . . . 7 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 9 Packing information. . . . . . . . . . . . . . . . . . . . . . 8 10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11 12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 11 12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11 13 Contact information. . . . . . . . . . . . . . . . . . . . . 11 14 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Pleasebeawarethatimportantnoticesconcerningthisdocumentandtheproduct(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 19 February 2009 Document identifier: PRTR5V0U2F_PRTR5V0U2K_2