PIC18(L)F2X/45K50 PIC18(L)F2X/45K50 USB Flash MCU Product Brief Universal Serial Bus Features: • High/Low-Voltage Detect module • USB V2.0 Compliant • Charge Time Measurement Unit (CTMU): • Crystal-less Full Speed (12 Mb/s) and Low-Speed - Supports capacitive touch sensing for touch Operation (1.5 Mb/s) screens and capacitive switches • Supports Control, Interrupt, Isochronous and Bulk • Enhanced USART module: Transfers - Supports RS-485, RS-232 and LIN/J2602 • Supports up to 32 Endpoints (16 Bidirectional) - Auto-wake-up on Start bit • 1 Kbyte Dual Access RAM for USB - Auto-Baud Detect • On-Chip USB Transceiver Extreme Low-Power Management with Flexible Oscillator Structure: XLP: • 3x and 4x PLL Clock Multipliers • Sleep mode: 20 nA, typical • Two External Clock modes, Up to 48 MHz (12 • Watchdog Timer: 300 nA, typical MIPS) • Timer1 Oscillator: 800 nA @ 32 kHz • Internal 31 kHz Oscillator • Peripheral Module Disable • Internal Oscillator, 31 kHz to 16 MHz Special Microcontroller Features: - Factory calibrated to ± 1% • Low-Power, High-Speed CMOS Flash Technology - Self-tune to ± 0.20% max. from USB or • C Compiler Optimized Architecture for Re-Entrant secondary oscillator Code • Secondary Oscillator using Timer1 @ 32 kHz • Power Management Features: • Fail-Safe Clock Monitor: - Run: CPU on, peripherals on, SRAM on - Allows for safe shutdown if any clock stops - Idle: CPU off, peripherals on, SRAM on Peripheral Highlights: - Sleep: CPU off, peripherals off, SRAM on • Up to 33 I/O Pins plus 3 Input-Only Pins: • Priority Levels for Interrupts - High-current Sink/Source 25 mA/25 mA • Self-Programmable under Software Control - Three programmable external interrupts • 8 x 8 Single-Cycle Hardware Multiplier - 11 programmable Interrupt-on-Change • Extended Watchdog Timer (WDT): - 9 programmable weak pull-ups - Programmable period from 4 ms to 131s - Programmable slew rate • Single-Supply In-Circuit Serial Programming™ • SR Latch (ICSP™) via Two Pins • Enhanced Capture/Compare/PWM (ECCP) • In-Circuit Debug (ICD) with Three Breakpoints via module: Two Pins - One, two or four PWM outputs • Optional dedicated ICD/ICSP Port (44-Pin TQFP - Selectable polarity Package Only) - Programmable dead time • Wide Operating Voltage Range: - Auto-shutdown and auto-restart - F devices: 2.3V to 5.5V - Pulse steering control - LF devices: 1.8V to 3.6V • Capture/Compare/PWM (CCP) module • Flash Program Memory of 10,000 Erase/Write • Master Synchronous Serial Port (MSSP) module Cycles Minimum and 20-year Data Retention Supporting 3-Wire SPI (all 4 modes) and I2C™ Master and Slave modes • Two Analog Comparators with Input Multiplexing • 10-Bit Analog-to-Digital (A/D) Converter module: - Up to 25 input channels - Auto-acquisition capability - Conversion available during Sleep • Digital-to-Analog Converter (DAC) module: - Fixed Voltage Reference (FVR) with 1.024V, 2.048V and 4.096V output levels - 5-bit rail-to-rail resistive DAC with positive and negative reference selection Advance Information  2012 Microchip Technology Inc. DS30025A-page 1

PIC18(L)F2X/45K50 PIC18(L)F2X/45K50 Family Types Device (PFblyraotseghsr )amSIn iMsntgerlumec Wtoioroynrds (SbRyDtAaeMtsa) MEe(EmbDPyoaRtretayOs )M Pins I/O 10-bit A/Dchannels omparators CCP/ECCP BOR/LVD CTMU MSSP EUSART Timers8-bit/16-bit USB 2.0 C PIC18(L)F45K50 32K 16384 2048 256 40/44 36 25-ch 2 1/1 Yes Yes 1 1 2/2 Yes PIC18(L)F25K50 32K 16384 2048 256 28 25 14-ch 2 1/1 Yes Yes 1 1 2/2 Yes PIC18(L)F24K50 16K 8192 2048 256 28 25 14-ch 2 1/1 Yes Yes 1 1 2/2 Yes FIGURE 1: 28-PIN PDIP, SOIC, SSOP DIAGRAM FOR PIC18(L)F2XK50 28-PIN PDIP (300 MIL), SOIC, SSOP MCLR/VPP/RE3 1 28 RB7 RA0 2 27 RB6 RA1 3 26 RB5 RA2 4 0 25 RB4 RA3 5 K5 24 RB3 RA4 6 X 23 RB2 2 RA5 7 F 22 RB1 VSS 8 L) 21 RB0 ( RA7 9 8 20 VDD 1 RA6 10 C 19 VSS RC0 11 PI 18 RC7 RC1 12 17 RC6 RC2 13 16 RC5/D+ VUSB3V3 14 15 RC4/D- FIGURE 2: 28-PIN QFN DIAGRAM FOR PIC18(L)F2XK50 3 E 28-PIN QFN R /P P V R/ A1A0CLB7B6B5B4 RRMRRRR 8765432 2222222 RA2 1 21 RB3 RA3 2 20 RB2 RA4 3 19 RB1 RA5 4 PIC18(L)F2XK50 18 RB0 VSS 5 17 VDD RA7 6 16 VSS RA6 7 15 RC7 891011121314 0123456 CCCVCCC RRR3BRRR VUSD-/D+/ Advance Information DS30025A-page 2  2012 Microchip Technology Inc.

PIC18(L)F2X/45K50 FIGURE 3: 40-PIN PDIP DIAGRAM FOR PIC18(L)F45K50 40-PIN PDIP (600 MIL) MCLR/VPP/RE3 1 40 RB7 RA0 2 39 RB6 RA1 3 38 RB5 RA2 4 37 RB4 RA3 5 36 RB3 RA4 6 35 RB2 RA5 7 0 34 RB1 RE0 8 K5 33 RB0 RE1 9 5 32 VDD 4 RE2 10 F 31 VSS VDD 11 L) 30 RD7 VSS 12 8( 29 RD6 1 RA7 13 C 28 RD5 RA6 14 PI 27 RD4 RC0 15 26 RC7 RC1 16 25 RC6 RC2 17 24 RC5/D+ VUSB3V3 18 23 RC4/D- RD0 19 22 RD3 RD1 20 21 RD2 FIGURE 4: 40-PIN UQFN DIAGRAM FOR PIC18(L)F45K50 40-PIN UQFN D+D- 33V RC6RC5/RC4/RD3RD2RD1RD0VUSBRC2RC1 0987654321 4333333333 RC7 1 30 RC0 RD4 2 29 RA6 RD5 3 28 RA7 RD6 4 27 VSS RD7 5 PIC18(L)F45K50 26 VDD VSS 6 25 RE2 VDD 7 24 RE1 RB0 8 23 RE0 RB1 9 22 RA5 RB2 10 21 RA4 1234567890 1111111112 3456730123 BBBBBEAAAA RRRRRRRRRR /P P V R/ L C M Advance Information  2012 Microchip Technology Inc. DS30025A-page 3

PIC18(L)F2X/45K50 FIGURE 5: 44-PIN TQFP DIAGRAM FOR PIC18(L)F45K50 44-PIN TQFP D+D- 33V C6C5/C4/D3D2D1D0USBC2C1C RRRRRRRVRRN 43210987654 RC7 14444433333333 NC/ICRST(1)/ICVPP(1) RD4 2 32 RC0 RD5 3 31 RA6 RD6 4 30 RA7 RD7 5 29 VSS PIC18(L)F45K50 VSS 6 28 VDD VDD 7 27 RE2 RB0 8 26 RE1 RB1 9 25 RE0 RB2 10 24 RA5 RB3 11 23 RA4 23456789012 11111111222 (1)CPGC(1)CPGDRB4RB5RB6RB7V/RE3PPRA0RA1RA2RA3 (1)K/I(1)T/I /CLR CD M CC C/IC/I NN Note 1: Special ICPORT programming/debug port features available when ICPRT=1 Advance Information DS30025A-page 4  2012 Microchip Technology Inc.

 2 0 TABLE 1: PIC18(L)F2X/45K50 PIN SUMMARY 1 2 M P ic O rochip Technolog I/O n PDIP/SOIC/SS 28-Pin QFN 40-Pin PDIP 40-Pin UQFN 44-Pin TQFP Analog Comparator CTMU SR Latch Reference USB (E)CCP EUSART MSSP Timers Interrupts Pull-up Basic ICD y In 8-PI c. 2 RA0 2 27 2 17 19 AN0 C12IN0- RA1 3 28 3 18 20 AN1 C12IN1- CTCMP RA2 4 1 4 19 21 AN2 C2IN+ VREF- DACOUT A RA3 5 2 5 20 22 AN3 C1IN+ VREF+ d v RA4 6 3 6 21 23 C1OUT SRQ T0CKI a n RA5 7 4 7 22 24 AN4 C2OUT SRNQ LVDIN SS c e RA6 10 7 14 29 31 OSC2 In CLKO fo RA7 9 6 13 28 30 OSC1 r CLKI m a RB0 21 18 33 8 8 AN12 SRI FLT0 SDI INT0 Y P ti SDA o n RB1 22 19 34 9 9 AN10 C12IN3- P1C(5) SCK INT1 Y IC SCL 1 RB2 23 20 35 10 10 AN8 CTED1 P1B(5) INT2 Y 8 RB3 24 21 36 11 11 AN9 C12IN2- CTED2 CCP2(1) SDO Y ( RB4 25 22 37 12 14 AN11 P1D(5) IOCB4 Y L RB5 26 23 38 13 15 AN13 T1G IOCB5 Y ) T3CKI(2) F RB6 27 24 39 14 16 IOCB6 Y PGC 2 RB7 28 25 40 15 17 IOCB7 Y PGD X Note 1: Alternate CCP2 pin location based on Configuration bit. / D 4 S 2: Alternate T3CKI pin location based on Configuration bits. 300 3: Pins are enabled when ICPRT =1, otherwise, they are disabled. 5 25 4: Location on 40/44-Pin parts (PIC18(L)F45K50). Function not on this pin on 28-Pin parts (PIC18(L)F2XK50). K A -p 5: Location on 28-Pin parts (PIC18(L)F2XK50). Function not on this pin on 40/44-Pin parts (PIC18(L)F45K50). 5 a 6: Alternate SDO pin location based on Configuration bits. g e 5 7: RE3, RC4 and RC5 can be used for digital input only (no output functionality). 0

D TABLE 1: PIC18(L)F2X/45K50 PIN SUMMARY P S 3 0 P I 0 O C 25A-page 6 I/O n PDIP/SOIC/SS 28-Pin QFN 40-Pin PDIP 40-Pin UQFN 44-Pin TQFP Analog Comparator CTMU SR Latch Reference USB (E)CCP EUSART MSSP Timers Interrupts Pull-up Basic ICD 18(L) PI F 8- 2 2 RC0 11 8 15 30 32 SOSCO IOCC0 X T1CKI T3CKI / 4 T3G 5 RC1 12 9 16 31 35 CCP2 SOSCI IOCC1 K RC2 13 10 17 32 36 AN14 CTPLS CCP1 IOCC2 A P1A 5 d v — 14 11 18 33 37 — VUSB3V3 VDDCORE 0 a n RC4(7) 15 12 23 38 42 — D- IOCC4 c e RC5(7) 16 13 24 39 43 — D+ IOCC5 In RC6 17 14 25 40 44 AN18 TX IOCC6 fo CK rm RC7 18 15 26 1 1 AN19 RX SDO(6) IOCC7 a DT t io RD0 — — 19 34 38 AN20 n RD1 — — 20 35 39 AN21 RD2 — — 21 36 40 AN22 RD3 — — 22 37 41 AN23 RD4 — — 27 2 2 AN24 RD5 — — 28 3 3 AN25 P1B(4)  2 RD6 — — 29 4 4 AN26 P1C(4) 0 12 RD7 — — 30 5 5 AN27 P1D(4) M ic RE0 — — 8 23 25 AN5 ro c Note 1: Alternate CCP2 pin location based on Configuration bit. h ip 2: Alternate T3CKI pin location based on Configuration bits. T e 3: Pins are enabled when ICPRT =1, otherwise, they are disabled. c h 4: Location on 40/44-Pin parts (PIC18(L)F45K50). Function not on this pin on 28-Pin parts (PIC18(L)F2XK50). n o 5: Location on 28-Pin parts (PIC18(L)F2XK50). Function not on this pin on 40/44-Pin parts (PIC18(L)F45K50). lo g 6: Alternate SDO pin location based on Configuration bits. y In 7: RE3, RC4 and RC5 can be used for digital input only (no output functionality). c .

D TABLE 1: PIC18(L)F2X/45K50 PIN SUMMARY P S 3 0 P I 0 O C 25A-page 7 I/O n PDIP/SOIC/SS 28-Pin QFN 40-Pin PDIP 40-Pin UQFN 44-Pin TQFP Analog Comparator CTMU SR Latch Reference USB (E)CCP EUSART MSSP Timers Interrupts Pull-up Basic ICD 18(L) PI F 8- 2 2 RE1 — — 9 24 26 AN6 X RE2 — — 10 25 27 AN7 / 4 RE3(7) 1 26 1 16 18 — Y MCLR 5 VPP K 20 17 11, 7, 7, VDD A 32 26 28 5 d v 8, 5, 12, 6, 6, VSS 0 a 19 16 31 27 29 n c – –- 12(3) ICPGC(3) ICCK(3) e I – –- 13(3) ICPGD(3) ICDT(3) n fo –- –- 33(3) ICVPP(3) ICRST(3) r m Note 1: Alternate CCP2 pin location based on Configuration bit. a 2: Alternate T3CKI pin location based on Configuration bits. ti 3: Pins are enabled when ICPRT =1, otherwise, they are disabled. o n 4: Location on 40/44-Pin parts (PIC18(L)F45K50). Function not on this pin on 28-Pin parts (PIC18(L)F2XK50). 5: Location on 28-Pin parts (PIC18(L)F2XK50). Function not on this pin on 40/44-Pin parts (PIC18(L)F45K50). 6: Alternate SDO pin location based on Configuration bits. 7: RE3, RC4 and RC5 can be used for digital input only (no output functionality).  2 0 1 2 M ic ro c h ip T e c h n o lo g y In c .

PIC18(L)F2X/45K50 NOTES: Advance Information DS30025A-page 8  2012 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC, and may be superseded by updates. It is your responsibility to KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PIC32 logo, rfPIC and UNI/O are registered trademarks of MICROCHIP MAKES NO REPRESENTATIONS OR Microchip Technology Incorporated in the U.S.A. and other WARRANTIES OF ANY KIND WHETHER EXPRESS OR countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, INCLUDING BUT NOT LIMITED TO ITS CONDITION, MXDEV, MXLAB, SEEVAL and The Embedded Control QUALITY, PERFORMANCE, MERCHANTABILITY OR Solutions Company are registered trademarks of Microchip FITNESS FOR PURPOSE. Microchip disclaims all liability Technology Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, chipKIT, devices in life support and/or safety applications is entirely at chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, the buyer’s risk, and the buyer agrees to defend, indemnify and dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, hold harmless Microchip from any and all damages, claims, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, suits, or expenses resulting from such use. No licenses are Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, conveyed, implicitly or otherwise, under any Microchip MPLINK, mTouch, Omniscient Code Generation, PICC, intellectual property rights. PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2012, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 9781620762592 QUALITY MANAGEMENT SYSTEM Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and CERTIFIED BY DNV Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures == ISO/TS 16949 == are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. Advance Information  2012 Microchip Technology Inc. DS30025A-page 9

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