PEMD3; PIMD3; PUMD3 NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k Rev. 11 — 25 September 2013 Product data sheet 1. Product profile 1.1 General description NPN/PNP Resistor-Equipped Transistors (RET) in Surface-Mounted Device(SMD) plastic packages. Table 1. Product overview Type number Package PNP/PNP NPN/NPN Package complement complement configuration Nexperia JEITA PEMD3 SOT666 - PEMB11 PEMH11 ultra small and flat lead PIMD3 SOT457 SC-74 - - small PUMD3 SOT363 SC-88 PUMB11 PUMH11 very small 1.2 Features and benefits  100mA output current capability  Reduces component count  Built-in bias resistors  Reduces pick and place costs  Simplifies circuit design  AEC-Q101 qualified 1.3 Applications  Low current peripheral driver  Control of IC inputs  Replaces general-purpose transistors in digital applications 1.4 Quick reference data Table 2. Quick reference data Symbol Parameter Conditions Min Typ Max Unit Per transistor; for the PNP transistor (TR2) with negative polarity V collector-emitter voltage open base - - 50 V CEO I output current - - 100 mA O R1 bias resistor 1 (input) 7 10 13 k R2/R1 bias resistor ratio 0.8 1 1.2

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 2. Pinning information Table 3. Pinning Pin Description Simplified outline Graphic symbol 1 GND (emitter) TR1 6 5 4 6 5 4 2 input (base) TR1 3 output (collector) TR2 4 GND (emitter) TR2 R1 R2 5 input (base) TR2 TR2 1 2 3 TR1 6 output (collector) TR1 001aab555 R2 R1 1 2 3 006aaa143 3. Ordering information Table 4. Ordering information Type number Package Name Description Version PEMD3 - plastic surface-mounted package; 6leads SOT666 PIMD3 SC-74 plastic surface-mounted package(TSOP6); 6leads SOT457 PUMD3 SC-88 plastic surface-mounted package; 6leads SOT363 4. Marking Table 5. Marking codes Type number Marking code[1] PEMD3 D3 PIMD3 M7 PUMD3 D*3 [1] * = placeholder for manufacturing site code. PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 2 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit Per transistor; for the PNP transistor (TR2) with negative polarity V collector-base voltage open emitter - 50 V CBO V collector-emitter voltage open base - 50 V CEO V emitter-base voltage open collector - 10 V EBO V input voltage TR1 I positive - +40 V negative - 10 V input voltage TR2 positive - +10 V negative - 40 V I output current - 100 mA O I peak collector current - 100 mA CM P total power dissipation T 25C [1] tot amb PEMD3(SOT666) - 200 mW PIMD3(SOT457) - 250 mW PUMD3(SOT363) - 200 mW Per device P total power dissipation T 25C [1] tot amb PEMD3(SOT666) - 300 mW PIMD3(SOT457) - 400 mW PUMD3(SOT363) - 300 mW T junction temperature - 150 C j T ambient temperature 65 +150 C amb T storage temperature 65 +150 C stg [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 3 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 006aac766 500 Ptot (mW) (1) 400 (2) 300 200 100 0 -75 -25 25 75 125 175 Tamb (°C) (1) SOT457; FR4 PCB, standard footprint (2) SOT363 and SOT666; FR4 PCB, standard footprint Fig 1. Per device: Power derating curves 6. Thermal characteristics Table 7. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Per transistor R thermal resistance from in free air [1] th(j-a) junction to ambient PEMD3(SOT666) - - 625 K/W PIMD3(SOT457) - - 500 K/W PUMD3(SOT363) - - 625 K/W Per device R thermal resistance from in free air [1] th(j-a) junction to ambient PEMD3(SOT666) - - 417 K/W PIMD3(SOT457) - - 313 K/W PUMD3(SOT363) - - 417 K/W [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 4 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 103 006aac751 duty cycle = 1 Zth(j-a) 0.75 (K/W) 0.5 0.33 102 0.2 0.1 0.05 0.02 0.01 10 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration for PEMD3(SOT666); typical values 103 006aac767 duty cycle = 1 Zth(j-a) 0.75 (K/W) 0.5 0.33 102 0.2 0.1 0.05 0.02 0.01 10 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration for PIMD3(SOT457); typical values PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 5 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 103 006aac750 duty cycle = 1 Zth(j-a) 0.75 (K/W) 0.5 0.33 102 0.2 0.1 0.05 0.02 0.01 10 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration for PUMD3(SOT363); typical values PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 6 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 7. Characteristics Table 8. Characteristics T = 25 C unless otherwise specified. amb Symbol Parameter Conditions Min Typ Max Unit Per transistor; for the PNP transistor (TR2) with negative polarity I collector-base V =50V; I =0A - - 100 nA CBO CB E cut-offcurrent I collector-emitter V =30V; I =0A - - 1 A CEO CE B cut-off current V =30V; I =0A; - - 5 A CE B T =150C j I emitter-base V =5V; I =0A - - 400 A EBO EB C cut-offcurrent h DCcurrent gain V =5V; I =5mA 30 - - FE CE C V collector-emitter I =10mA; I =0.5mA - - 150 mV CEsat C B saturation voltage V off-state input V =5V; I =100A - 1.1 0.8 V I(off) CE C voltage V on-state input V =0.3V; I =10mA 2.5 1.8 - V I(on) CE C voltage R1 bias resistor 1 (input) 7 10 13 k R2/R1 bias resistor ratio 0.8 1 1.2 C collector capacitance V =10V; I =i =0A; c CB E e f=1MHz TR1 (NPN) - - 2.5 pF TR2 (PNP) - - 3 pF f transition frequency V =5V; I =10mA; [1] T CB C f=100MHz TR1 (NPN) - 230 - MHz TR2 (PNP) - 180 - MHz [1] Characteristics of built-in transistor. PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 7 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 103 006aac768 1 006aac769 hFE (1) VCEsat (V) 102 (2) (3) 10-1 (1) 10 (2) (3) 1 10-2 10-1 1 10 102 1 10 102 IC (mA) IC (mA) V =5V I /I =20 CE C B (1) Tamb=100C (1) Tamb=100C (2) Tamb=25C (2) Tamb=25C (3) Tamb=40C (3) Tamb=40C Fig 5. TR1 (NPN): DC current gain as a function of Fig 6. TR1 (NPN): Collector-emitter saturation collector current; typical values voltage as a function of collector current; typical values 006aac770 006aac771 10 10 VI(on) VI(off) (V) (V) (1) (1) (2) (2) 1 1 (3) (3) 10-1 10-1 10-1 1 10 102 10-1 1 10 IC (mA) IC (mA) V =0.3V V =5V CE CE (1) Tamb=40C (1) Tamb=40C (2) Tamb=25C (2) Tamb=25C (3) Tamb=100C (3) Tamb=100C Fig 7. TR1 (NPN): On-state input voltage as a Fig 8. TR1 (NPN): Off-state input voltage as a function of collector current; typical values function of collector current; typical values PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 8 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 3 006aac772 103 006aac757 Cc (pF) fT (MHz) 2 102 1 0 10 0 10 20 30 40 50 10-1 1 10 102 VCB (V) IC (mA) f= 1MHz; Tamb=25C VCE=5V; Tamb=25C Fig 9. TR1 (NPN): Collector capacitance as a function Fig 10. TR1 (NPN): Transition frequency as a function of collector-base voltage; typical values of collector current; typical values of built-in transistor 103 006aac773 -1 006aac774 hFE (1) VCEsat (V) 102 (2) (3) -10-1 (1) 10 (2) (3) 1 -10-2 -10-1 -1 -10 -102 -1 -10 -102 IC (mA) IC (mA) VCE=5V IC/IB=20 (1) Tamb=100C (1) Tamb=100C (2) Tamb=25C (2) Tamb=25C (3) Tamb=40C (3) Tamb=40C Fig 11. TR2 (PNP): DC current gain as a function of Fig 12. TR2 (PNP): Collector-emitter saturation collector current; typical values voltage as a function of collector current; typical values PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 9 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 006aac775 006aac776 -10 -10 VI(on) VI(off) (V) (V) (1) (1) (2) (2) -1 -1 (3) (3) -10-1 -10-1 -10-1 -1 -10 -102 -10-1 -1 -10 IC (mA) IC (mA) VCE=0.3V VCE=5V (1) Tamb=40C (1) Tamb=40C (2) Tamb=25C (2) Tamb=25C (3) Tamb=100C (3) Tamb=100C Fig 13. TR2 (PNP): On-state input voltage as a Fig 14. TR2 (PNP): Off-state input voltage as a function of collector current; typical values function of collector current; typical values 6 006aac777 103 006aac763 Cc (pF) fT (MHz) 4 102 2 0 10 0 -10 -20 -30 -40 -50 -10-1 -1 -10 -102 VCB (V) IC (mA) f= 1MHz; Tamb=25C VCE=5V; Tamb=25C Fig 15. TR2 (PNP): Collector capacitance as a function Fig 16. TR2 (PNP): Transition frequency as a function of collector-base voltage; typical values of collector current; typical values of built-in transistor PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 10 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. 9. Package outline 1.7 0.6 3.1 1.1 1.5 0.5 2.7 0.9 6 5 4 6 5 4 0.6 0.2 0.3 0.1 1.7 1.3 3.0 1.7 1.5 1.1 2.5 1.3 pin 1 index pin 1 index 1 2 3 1 2 3 0.27 0.18 0.40 0.26 0.5 0.17 0.08 0.95 0.25 0.10 1 1.9 Dimensions in mm 04-11-08 Dimensions in mm 04-11-08 Fig 17. Package outline PEMD3(SOT666) Fig 18. Package outline PIMD3 (SOT457/SC-74) 2.2 1.1 1.8 0.8 6 5 4 0.45 0.15 2.2 1.35 2.0 1.15 pin 1 index 1 2 3 0.3 0.25 0.65 0.2 0.10 1.3 Dimensions in mm 06-03-16 Fig 19. Package outline PUMD3(SOT363/SC-88) PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 11 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 10. Soldering 3.45 1.95 0.45 0.55 solder lands 0.95 (6×) (6×) 3.3 2.825 solder resist 0.95 solder paste occupied area 0.7 Dimensions in mm (6×) 0.8 (6×) 2.4 sot457_fr Fig 20. Reflow soldering footprint PIMD3 (SOT457/SC-74) 5.3 1.5 (4×) solder lands 1.475 solder resist 0.45 5.05 (2×) occupied area 1.475 Dimensions in mm preferred transport direction during soldering 1.45 (6×) 2.85 sot457_fw Fig 21. Wave soldering footprint PIMD3 (SOT457/SC-74) PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 12 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 2.65 solder lands 2.35 1.5 0.6 0.5 0.4 (2×) (4×) (4×) solder resist solder paste 0.5 0.6 occupied area (4×) (2×) 0.6 Dimensions in mm (4×) 1.8 sot363_fr Fig 22. Reflow soldering footprint PUMD3(SOT363/SC-88) 1.5 solder lands 4.5 0.3 2.5 solder resist occupied area 1.5 Dimensions in mm preferred transport 1.3 1.3 direction during soldering 2.45 5.3 sot363_fw Fig 23. Wave soldering footprint PUMD3(SOT363/SC-88) PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 13 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 2.75 2.45 2.1 1.6 solder lands 0.4 (6×) 0.25 0.3 0.538 (2×) (2×) placement area 0.55 2 1.7 1.075 (2×) solder paste occupied area 0.325 0.375 (4×) (4×) Dimensions in mm 1.7 0.45 0.6 (4×) (2×) 0.5 0.65 (4×) (2×) sot666_fr Fig 24. Reflow soldering footprint PEMD3(SOT666) PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 14 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 11. Revision history Table 9. Revision history Document ID Release date Data sheet status Change notice Supersedes PEMD3_PIMD3_ 20130925 Product data sheet - PEMD3_PIMD3_ PUMD3v.11 PUMD3v.10 Modifications: • Section 1 “Product profile”: updated • Section 4 “Marking”: updated • Table 6 “Limiting values”: P updated according to the latest measurements tot • Table 7 “Thermal characteristics”: updated according to the latest measurements • Table 8 “Characteristics”: I updated according to the latest measurements, f added CEO T • Figure1 to 3, 9, 10, 15 and 16: added • Figure5 to 8 and Figure11 to 14: updated • Section 8 “Test information”: added • Section 10 “Soldering”: added • Section 12 “Legal information”: updated PEMD3_PIMD3_ 20091115 Product data sheet - PEMD3_PIMD3_ PUMD3v.10 PUMD3v.9 PEMD3_PIMD3_ PUMD3v.9 20050518 Product data sheet - PEMD3_PIMD3_ PUMD3v.8 PEMD3_PIMD3_ PUMD3v.8 20041206 Product data sheet - PEMD3_PUMD3v.7 PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 15 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 12.2 Definitions Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, Draft — The document is a draft version only. The content is still under authorized or warranted to be suitable for use in life support, life-critical or internal review and subject to formal approval, which may result in safety-critical systems or equipment, nor in applications where failure or modifications or additions. Nexperia does not give any malfunction of a Nexperia product can reasonably be expected representations or warranties as to the accuracy or completeness of to result in personal injury, death or severe property or environmental information included herein and shall have no liability for the consequences of damage. Nexperia and its suppliers accept no liability for use of such information. inclusion and/or use of Nexperia products in such equipment or Short data sheet — A short data sheet is an extract from a full data sheet applications and therefore such inclusion and/or use is at the customer's own with the same product type number(s) and title. A short data sheet is intended risk. for quick reference only and should not be relied upon to contain detailed and Applications — Applications that are described herein for any of these full information. For detailed and full information see the relevant full data products are for illustrative purposes only. Nexperia makes no sheet, which is available on request via the local Nexperia sales representation or warranty that such applications will be suitable for the office. In case of any inconsistency or conflict with the short data sheet, the specified use without further testing or modification. full data sheet shall prevail. Customers are responsible for the design and operation of their applications Product specification — The information and data provided in a Product and products using Nexperia products, and Nexperia data sheet shall define the specification of the product as agreed between accepts no liability for any assistance with applications or customer product Nexperia and its customer, unless Nexperia and design. It is customer’s sole responsibility to determine whether the Nexperia customer have explicitly agreed otherwise in writing. In no event however, product is suitable and fit for the customer’s applications and shall an agreement be valid in which the Nexperia product is products planned, as well as for the planned application and use of deemed to offer functions and qualities beyond those described in the customer’s third party customer(s). Customers should provide appropriate Product data sheet. design and operating safeguards to minimize the risks associated with their applications and products. 12.3 Disclaimers Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s Limited warranty and liability — Information in this document is believed to third party customer(s). Customer is responsible for doing all necessary be accurate and reliable. However, Nexperia does not give any testing for the customer’s applications and products using Nexperia representations or warranties, expressed or implied, as to the accuracy or products in order to avoid a default of the applications and completeness of such information and shall have no liability for the the products or of the application or use by customer’s third party consequences of use of such information. Nexperia takes no customer(s). Nexperia does not accept any liability in this respect. responsibility for the content in this document if provided by an information source outside of Nexperia. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC60134) will cause permanent In no event shall Nexperia be liable for any indirect, incidental, damage to the device. Limiting values are stress ratings only and (proper) punitive, special or consequential damages (including - without limitation - lost operation of the device at these or any other conditions above those given in profits, lost savings, business interruption, costs related to the removal or the Recommended operating conditions section (if present) or the replacement of any products or rework charges) whether or not such Characteristics sections of this document is not warranted. Constant or damages are based on tort (including negligence), warranty, breach of repeated exposure to limiting values will permanently and irreversibly affect contract or any other legal theory. the quality and reliability of the device. Notwithstanding any damages that customer might incur for any reason Terms and conditions of commercial sale — Nexperia whatsoever, Nexperia’s aggregate and cumulative liability towards products are sold subject to the general terms and conditions of commercial customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual Right to make changes — Nexperia reserves the right to make agreement is concluded only the terms and conditions of the respective changes to information published in this document, including without agreement shall apply. Nexperia hereby expressly objects to limitation specifications and product descriptions, at any time and without applying the customer’s general terms and conditions with regard to the notice. This document supersedes and replaces all information supplied prior purchase of Nexperia products by customer. to the publication hereof. PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 16 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors No offer to sell or license — Nothing in this document may be interpreted or Translations — A non-English (translated) version of a document is for construed as an offer to sell products that is open for acceptance or the grant, reference only. The English version shall prevail in case of any discrepancy conveyance or implication of any license under any copyrights, patents or between the translated and English versions. other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein 12.4 Trademarks may be subject to export control regulations. Export might require a prior authorization from competent authorities. Notice: All referenced brands, product names, service names and trademarks Quick reference data — The Quick reference data is an extract of the are the property of their respective owners. product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 13. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 — 25 September 2013 17 of 18

PEMD3; PIMD3; PUMD3 Nexperia NPN/PNP resistor-equipped transistors 14. Contents 1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 General description . . . . . . . . . . . . . . . . . . . . . 1 1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2 4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4 7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 7 8 Test information. . . . . . . . . . . . . . . . . . . . . . . . 11 8.1 Quality information . . . . . . . . . . . . . . . . . . . . . 11 9 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 11 10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16 12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17 13 Contact information. . . . . . . . . . . . . . . . . . . . . 17 14 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 © Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 25 September 2013