PCA9635 16-bit Fm+ I2C-bus LED driver Rev. 07 — 16 July 2009 Product data sheet 1. General description The PCA9635 is an I2C-bus controlled 16-bit LED driver optimized for Red/Green/Blue/Amber (RGBA) color mixing applications. Each LED output has its own 8-bit resolution (256 steps) fixed frequency individualPWM controller that operates at 97kHz with a duty cycle that is adjustable from 0% to 99.6% to allow the LED to be set to a specific brightness value. An additional 8-bit resolution (256 steps) groupPWM controller has both a fixed frequency of 190Hz and an adjustable frequency between 24Hztoonceevery10.73secondswithadutycyclethatisadjustablefrom0%to99.6% that is used to either dim or blink all LEDs with the same value. Each LED output can be off, on (no PWM control), set at its individualPWM controller value or at both individual and group PWM controller values. The LED output driver is programmed to be either open-drain with a 25mA current sink capability at 5V or totem-polewitha25mAsink,10mAsourcecapabilityat5V.ThePCA9635operateswith a supply voltage range of 2.3V to 5.5V and the outputs are 5.5V tolerant. LEDs can be directly connected to the LED output (up to 25mA, 5.5V) or controlled with external driversandaminimumamountofdiscretecomponentsforlargercurrentorhighervoltage LEDs. The PCA9635 is one of the first LED controller devices in a new Fast-mode Plus (Fm+) family.Fm+devicesofferhigherfrequency(upto1MHz)andmoredenselypopulatedbus operation (up to 4000pF). The activeLOW Output Enable input pin (OE) allows asynchronous control of the LED outputs and can be used to set all the outputs to a defined I2C-bus programmable logic state. TheOE can also be used to externally PWM the outputs, which is useful when multiple devices need to be dimmed or blinked together using software control. Software programmable LED Group and three Sub Call I2C-bus addresses allow all or defined groups of PCA9635 devices to respond to a common I2C-bus address, allowing for example, all red LEDs to be turned on or off at the same time or marquee chasing effect, thus minimizing I2C-bus commands. Seven hardware address pins allow up to 126devices on the same bus. The Software Reset (SWRST) Call allows the master to perform a reset of the PCA9635 throughtheI2C-bus,identicaltothePower-OnReset(POR)thatinitializestheregistersto their default state causing the outputs to be set HIGH (LED off). This allows an easy and quick way to reconfigure all device registers to the same condition.

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 2. Features n 16 LED drivers. Each output programmable at: u Off u On u Programmable LED brightness u Programmable group dimming/blinking mixed with individual LED brightness n 1MHz Fast-mode Plus compatible I2C-bus interface with 30mA high drive capability on SDA output for driving high capacitive buses n 256-step (8-bit) linear programmable brightness per LED output varying from fully off (default) to maximum brightness using a 97kHz PWM signal n 256-step group brightness control allows general dimming (using a 190Hz PWM signal) from fully off to maximum brightness (default) n 256-stepgroupblinkingwithfrequencyprogrammablefrom24Hzto10.73sandduty cycle from 0% to 99.6% n Sixteen totem-pole outputs (sink 25mA and source 10mA at 5V) with software programmable open-drain LED outputs selection (default at totem-pole). No input function. n Output state change programmable on the Acknowledge or the STOP Command to update outputs byte-by-byte or all at the same time (default to ‘Change on STOP’). n Active LOW Output Enable (OE) input pin. LED outputs programmable to logic1, logic0 or ‘high-impedance’ (default at power-up) whenOE is HIGH, thus allowing hardware blinking and dimming of the LEDs. n 7 hardware address pins allow 126 devices to be connected to the same I2C-bus n 4 software programmable I2C-bus addresses (one LED Group Call address and three LEDSubCalladdresses)allowgroupsofdevicestobeaddressedatthesametimein anycombination(forexample,oneregisterusedfor‘AllCall’sothatallthePCA9635s on the I2C-bus can be addressed at the same time and the second register used for three different addresses so that1⁄ of all devices on the bus can be addressed at the 3 same time in a group). Software enable and disable for I2C-bus address. n Software Reset feature (SWRSTCall) allows the device to be reset through the I2C-bus n 25MHz internal oscillator requires no external components n Internal power-on reset n Noise filter on SDA/SCL inputs n Edge rate control on outputs n No glitch on power-up n Supports hot insertion n Low standby current n Operating power supply voltage range of 2.3V to 5.5V n 5.5V tolerant inputs n - 40(cid:176) C to +85(cid:176) C operation n ESD protection exceeds 2000V HBM per JESD22-A114, 200V MM per JESD22-A115 and 1000V CDM per JESD22-C101 n Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100mA n Packages offered: TSSOP28 PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 2 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 3. Applications n RGB or RGBA LED drivers n LED status information n LED displays n LCD backlights n Keypad backlights for cellular phones or handheld devices 4. Ordering information Table 1. Ordering information Type number Topside Package mark Name Description Version PCA9635PW PCA9635PW TSSOP28 plastic thin shrink small outline package; 28leads; SOT361-1 bodywidth4.4mm PCA9635PW/Q900[1] PCA9635PW TSSOP28 plastic thin shrink small outline package; 28leads; SOT361-1 bodywidth4.4mm [1] PCA9635PW/Q900 is AEC-Q100 compliant. Contacti2c.support@nxp.com for PPAP. 5. Block diagram A0 A1 A2 A3 A4 A5 A6 SCL INPUT FILTER SDA PCA9635 I2C-BUS CONTROL VDD PORWEESRE-TON VDD VSS LED STATE SELECT REGISTER PWM REGISTER X BRIGHTNESS LEDn CONTROL 97 kHz 24.3 kHz GRPFREQ MUX/ CONTROL REGISTER GRPPWM 25 MHz REGISTER OSCILLATOR 190 Hz '0' – permanently OFF '1' – permanently ON OE 002aac136 Remark:Only one LED output shown for clarity. Fig 1. Block diagram of PCA9635 PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 3 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 6. Pinning information 6.1 Pinning A0 1 28 VDD A1 2 27 SDA A2 3 26 SCL A3 4 25 A6 A4 5 24 A5 LED0 6 23 OE LED1 7 PCA9635PW 22 LED15 LED2 8 PCA9635PW/Q900 21 LED14 LED3 9 20 LED13 LED4 10 19 LED12 LED5 11 18 LED11 LED6 12 17 LED10 LED7 13 16 LED9 VSS 14 15 LED8 002aac134 Fig 2. Pin configuration for TSSOP28 6.2 Pin description Table 2. Pin description Symbol Pin Type Description A0 1 I address input 0 A1 2 I address input 1 A2 3 I address input 2 A3 4 I address input 3 A4 5 I address input 4 LED0 6 O LED driver 0 LED1 7 O LED driver 1 LED2 8 O LED driver 2 LED3 9 O LED driver 3 LED4 10 O LED driver 4 LED5 11 O LED driver 5 LED6 12 O LED driver 6 LED7 13 O LED driver 7 V 14 power supply supply ground SS LED8 15 O LED driver 8 LED9 16 O LED driver 9 LED10 17 O LED driver 10 LED11 18 O LED driver 11 LED12 19 O LED driver 12 PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 4 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver Table 2. Pin description …continued Symbol Pin Type Description LED13 20 O LED driver 13 LED14 21 O LED driver 14 LED15 22 O LED driver 15 OE 23 I activeLOW output enable A5 24 I address input 5 A6 25 I address input 6 SCL 26 I serial clock line SDA 27 I/O serial data line V 28 power supply supply voltage DD 7. Functional description Refer toFigure 1 “Block diagram of PCA9635”. 7.1 Device addresses Following a START condition, the bus master must output the address of the slave it is accessing. There are a maximum of 128 possible programmable addresses using the 7 hardware address pins. Two of these addresses, Software Reset and LED All Call, cannot be used because their default power-up state is ON, leaving a maximum of 126 addresses. Using other reserved addresses, as well as any other SubCall address, will reduce the total number of possible addresses even further. 7.1.1 Regular I2C-bus slave address The I2C-bus slave address of the PCA9635 is shown inFigure3. To conserve power, no internal pull-up resistors are incorporated on the hardware selectable address pins and they must be pulled HIGH or LOW. Remark:UsingreservedI2C-busaddresseswillinterferewithotherdevices,butonlyifthe devicesareonthebusand/orthebuswillbeopentootherI2C-bussystemsatsomelater date. In a closed system where the designer controls the address assignment these addresses can be used since the PCA9635 treats them like any other address. The LEDAllCall, Software Rest and PCA9564 or PCA9665 slave address (if on the bus) can never be used for individual device addresses. • PCA9635 LED All Call address (1110000) and Software Reset (00000110) which are active on start-up • PCA9564 (0000000) or PCA9665 (1110000) slave address which is active on start-up • ‘reserved for future use’ I2C-bus addresses (0000011, 11111XX) • slave devices that use the 10-bit addressing scheme (11110XX) • slave devices that are designed to respond to the General Call address (0000000) • High-speed mode (Hs-mode) master code (00001XX) PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 5 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver slave address A6 A5 A4 A3 A2 A1 A0 R/W hardware selectable 002aab319 Fig 3. Slave address Thelastbitoftheaddressbytedefinestheoperationtobeperformed.Whensettologic1 a read is selected, while a logic0 selects a write operation. 7.1.2 LED all call I2C-bus address • Default power-up value (ALLCALLADR register): E0h or 1110000X • Programmable through I2C-bus (volatile programming) • Atpower-up,LEDAllCallI2C-busaddressisenabled.PCA9635sendsanACKwhen E0h (R/W=0) or E1h (R/W=1) is sent by the master. SeeSection 7.3.8 “ALLCALLADR, LED All Call I2C-bus address” for more detail. Remark:ThedefaultLEDAllCallI2C-busaddress(E0hor1110000X)mustnotbeused as a regular I2C-bus slave address since this address is enabled at power-up. All the PCA9635s on the I2C-bus will acknowledge the address if sent by the I2C-bus master. 7.1.3 LED sub call I2C-bus addresses • 3 different I2C-bus addresses can be used • Default power-up values: – SUBADR1 register: E2h or 1110001X – SUBADR2 register: E4h or 1110010X – SUBADR3 register: E8h or 1110100X • Programmable through I2C-bus (volatile programming) • At power-up, Sub Call I2C-bus addresses are disabled. PCA9635 does not send an ACK when E2h (R/W=0) or E3h (R/W=1), E4h (R/W=0) or E5h (R/W=1), or E8h(R/W=0) or E9h (R/W=1) is sent by the master. SeeSection 7.3.7 “SUBADR1 to SUBADR3, I2C-bus subaddress 1to3” for more detail. Remark:The default LED Sub Call I2C-bus addresses may be used as regular I2C-bus slave addresses as long as they are disabled. PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 6 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 7.1.4 Software reset I2C-bus address The address shown inFigure4 is used when a reset of the PCA9635 needs to be performed by the master. The Software Reset address (SWRST Call) must be used with R/W=logic0. If R/W=logic1, the PCA9635 does not acknowledge the SWRST. See Section 7.6 “Software reset” for more detail. R/W 0 0 0 0 0 1 1 0 002aab416 Fig 4. Software Reset address Remark:TheSoftwareResetI2C-busaddressisareservedaddressandcannotbeused as a regular I2C-bus slave address or as an LED AllCall or LED Sub Call address. 7.2 Control register Following the successful acknowledgement of the slave address, LED All Call address or LED Sub Call address, the bus master will send a byte to the PCA9635, which will be stored in the Control register. The lowest 5bits are used as a pointer to determine which register will be accessed (D[4:0]). The highest 3bits are used as Auto-Increment flag and Auto-Increment options (AI[2:0]). register address AI2 AI1 AI0 D4 D3 D2 D1 D0 002aac147 Auto-Increment options Auto-Increment flag reset state = 80h Remark:The Control register does not apply to the Software Reset I2C-bus address. Fig 5. Control register When the Auto-Increment flag is set (AI2=logic1), the five low order bits of the Control register are automatically incremented after a read or write. This allows the user to program the registers sequentially. Four different types of Auto-Increment are possible, depending on AI1 and AI0 values. PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 7 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver Table 3. Auto-Increment options AI2 AI1 AI0 Function 0 0 0 no Auto-Increment 1 0 0 Auto-Increment for all registers. D[4:0] roll over to ‘00000’ after the last register (11011) is accessed. 1 0 1 Auto-Increment for individual brightness registers only. D[4:0] roll over to ‘00010’ after the last register (10001) is accessed. 1 1 0 Auto-Increment for global control registers only. D[4:0] roll over to ‘10010’ after the last register (10011) is accessed. 1 1 1 Auto-Increment for individual and global control registers only. D[4:0] roll over to ‘00010’ after the last register (10011) is accessed. Remark:Other combinations not shown inTable3 (AI[2:0] = 001, 010, and 011) are reserved and must not be used for proper device operation. AI[2:0]=000 is used when the same register must be accessed several times during a singleI2C-buscommunication,forexample,changesthebrightnessofasingleLED.Data is overwritten each time the register is accessed during a write operation. AI[2:0]=100 is used when all the registers must be sequentially accessed, for example, power-up programming. AI[2:0]=101 is used when the four LED drivers must be individually programmed with different values during the same I2C-bus communication, for example, changing color setting to another color setting. AI[2:0]=110 is used when the LED drivers must be globally programmed with different settings during the same I2C-bus communication, for example, global brightness or blinking change. AI[2:0]=111 is used when individual and global changes must be performed during the sameI2C-buscommunication,forexample,changingacolorandglobalbrightnessatthe same time. Only the 5 least significant bits D[4:0] are affected by the AI[2:0] bits. When the Control register is written, the register entry point determined by D[4:0] is the first register that will be addressed (read or write operation), and can be anywhere between 00000 and 11011 (as defined inTable4). When AI[2]=1, the Auto-Increment flagissetandtherollovervalueatwhichtheregisterincrementstopsandgoestothenext one is determined by AI[2:0]. SeeTable3 for rollover values. For example, if the Control register = 11110100 (F4h), then the register addressing sequence will be (in hex): 14fi …fi 1Bfi 00fi …fi 13fi 02fi …fi 13fi 02fi …fi 13fi 02fi … as long as the master keeps sending or reading data. PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 8 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 7.3 Register definitions Table 4. Register summary[1][2] Register number (hex) D4 D3 D2 D1 D0 Name Type Function 00 0 0 0 0 0 MODE1 read/write Mode register 1 01 0 0 0 0 1 MODE2 read/write Mode register 2 02 0 0 0 1 0 PWM0 read/write brightness control LED0 03 0 0 0 1 1 PWM1 read/write brightness control LED1 04 0 0 1 0 0 PWM2 read/write brightness control LED2 05 0 0 1 0 1 PWM3 read/write brightness control LED3 06 0 0 1 1 0 PWM4 read/write brightness control LED4 07 0 0 1 1 1 PWM5 read/write brightness control LED5 08 0 1 0 0 0 PWM6 read/write brightness control LED6 09 0 1 0 0 1 PWM7 read/write brightness control LED7 0A 0 1 0 1 0 PWM8 read/write brightness control LED8 0B 0 1 0 1 1 PWM9 read/write brightness control LED9 0C 0 1 1 0 0 PWM10 read/write brightness control LED10 0D 0 1 1 0 1 PWM11 read/write brightness control LED11 0E 0 1 1 1 0 PWM12 read/write brightness control LED12 0F 0 1 1 1 1 PWM13 read/write brightness control LED13 10 1 0 0 0 0 PWM14 read/write brightness control LED14 11 1 0 0 0 1 PWM15 read/write brightness control LED15 12 1 0 0 1 0 GRPPWM read/write group duty cycle control 13 1 0 0 1 1 GRPFREQ read/write group frequency 14 1 0 1 0 0 LEDOUT0 read/write LED output state 0 15 1 0 1 0 1 LEDOUT1 read/write LED output state 1 16 1 0 1 1 0 LEDOUT2 read/write LED output state 2 17 1 0 1 1 1 LEDOUT3 read/write LED output state 3 18 1 1 0 0 0 SUBADR1 read/write I2C-bus subaddress 1 19 1 1 0 0 1 SUBADR2 read/write I2C-bus subaddress 2 1A 1 1 0 1 0 SUBADR3 read/write I2C-bus subaddress 3 1B 1 1 0 1 1 ALLCALLADR read/write LEDAllCallI2C-busaddress [1] Only D[4:0]=00000to11011 are allowed and will be acknowledged. D[4:0]=11100 to 11111 are reserved and will not be acknowledged. [2] When writing to the Control register, bit4 must be programmed with logic0 for proper device operation. PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 9 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 7.3.1 Mode register 1, MODE1 Table 5. MODE1 - Mode register 1 (address 00h) bit description Legend: * default value. Bit Symbol Access Value Description 7 AI2 read only 0 Register Auto-Increment disabled. 1* Register Auto-Increment enabled. 6 AI1 read only 0* Auto-Increment bit1=0. 1 Auto-Increment bit1=1. 5 AI0 read only 0* Auto-Increment bit0=0. 1 Auto-Increment bit0=1. 4 SLEEP R/W 0 Normal mode[1]. 1* Low power mode. Oscillator off[2]. 3 SUB1 R/W 0* PCA9635 does not respond to I2C-bus subaddress 1. 1 PCA9635 responds to I2C-bus subaddress 1. 2 SUB2 R/W 0* PCA9635 does not respond to I2C-bus subaddress 2. 1 PCA9635 responds to I2C-bus subaddress 2. 1 SUB3 R/W 0* PCA9635 does not respond to I2C-bus subaddress 3. 1 PCA9635 responds to I2C-bus subaddress 3. 0 ALLCALL R/W 0 PCA9635 does not respond to LED All Call I2C-bus address. 1* PCA9635 responds to LED All Call I2C-bus address. [1] It takes 500m s max. for the oscillator to be up and running once SLEEP bit has been set to logic0. Timings on LEDn outputs are not guaranteed if PWMx, GRPPWM or GRPFREQ registers are accessed within the 500m s window. [2] When the oscillator is off (Sleep mode) the LED outputs cannot be turned on, off or dimmed/blinked. 7.3.2 Mode register 2, MODE2 Table 6. MODE2 - Mode register 2 (address 01h) bit description Legend: * default value. Bit Symbol Access Value Description 7 - read only 0* reserved 6 - read only 0* reserved 5 DMBLNK R/W 0* group control = dimming. 1 group control = blinking. 4 INVRT[1] R/W 0* Output logic state not inverted. Value to use when no external driver used. Applicable whenOE=0. 1 Output logic state inverted. Value to use when external driver used. Applicable whenOE=0. 3 OCH R/W 0* Outputs change on STOP command.[2] 1 Outputs change on ACK. 2 OUTDRV[1] R/W 0 The 16 LED outputs are configured with an open-drain structure. 1* The 16 LED outputs are configured with a totem-pole structure. PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 10 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver Table 6. MODE2 - Mode register 2 (address 01h) bit description …continued Legend: * default value. Bit Symbol Access Value Description 1to0 OUTNE[1:0][3] R/W 00 WhenOE = 1 (output drivers not enabled), LEDn = 0. 01* WhenOE = 1 (output drivers not enabled): LEDn = 1 when OUTDRV=1 LEDn=high-impedance when OUTDRV=0 (same as OUTNE[1:0]=10) 10 WhenOE = 1 (output drivers not enabled), LEDn = high-impedance. 11 reserved [1] SeeSection 7.7 “Using the PCA9635 with and without external drivers” for more details. Normal LEDs can be driven directly in either mode.SomenewerLEDsincludeintegratedZenerdiodestolimitvoltagetransients,reduceEMIandprotecttheLEDs,andthesemust be driven only in the open-drain mode to prevent overheating the IC. [2] Change of the outputs at the STOP command allows synchronizing outputs of more than one PCA9635. Applicable to registers from 02h (PWM0) to 17h (LEDOUT) only. [3] SeeSection 7.4 “Active LOW output enable input” for more details. 7.3.3 PWM0 to PWM15, individual brightness control Table 7. PWM0toPWM15 - PWM registers 0to15 (address 02h to 11h) bit description Legend: * default value. Address Register Bit Symbol Access Value Description 02h PWM0 7:0 IDC0[7:0] R/W 00000000* PWM0 Individual Duty Cycle 03h PWM1 7:0 IDC1[7:0] R/W 00000000* PWM1 Individual Duty Cycle 04h PWM2 7:0 IDC2[7:0] R/W 00000000* PWM2 Individual Duty Cycle 05h PWM3 7:0 IDC3[7:0] R/W 00000000* PWM3 Individual Duty Cycle 06h PWM4 7:0 IDC4[7:0] R/W 00000000* PWM4 Individual Duty Cycle 07h PWM5 7:0 IDC5[7:0] R/W 00000000* PWM5 Individual Duty Cycle 08h PWM6 7:0 IDC6[7:0] R/W 00000000* PWM6 Individual Duty Cycle 09h PWM7 7:0 IDC7[7:0] R/W 00000000* PWM7 Individual Duty Cycle 0Ah PWM8 7:0 IDC8[7:0] R/W 00000000* PWM8 Individual Duty Cycle 0Bh PWM9 7:0 IDC9[7:0] R/W 00000000* PWM9 Individual Duty Cycle 0Ch PWM10 7:0 IDC10[7:0] R/W 00000000* PWM10 Individual Duty Cycle 0Dh PWM11 7:0 IDC11[7:0] R/W 00000000* PWM11 Individual Duty Cycle 0Eh PWM12 7:0 IDC12[7:0] R/W 00000000* PWM12 Individual Duty Cycle 0Fh PWM13 7:0 IDC13[7:0] R/W 00000000* PWM13 Individual Duty Cycle 10h PWM14 7:0 IDC14[7:0] R/W 00000000* PWM14 Individual Duty Cycle 11h PWM15 7:0 IDC15[7:0] R/W 00000000* PWM15 Individual Duty Cycle A 97kHz fixed frequency signal is used for each output. Duty cycle is controlled through 256 linear steps from 00h (0% duty cycle = LED output off) to FFh (99.6%dutycycle=LED output at maximum brightness). Applicable to LED outputs programmed with LDRx=10 or 11 (LEDOUT0 to LEDOUT3 registers). IDCx[7:0] duty cycle = --------------------------- (1) 256 PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 11 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 7.3.4 GRPPWM, group duty cycle control Table 8. GRPPWM - Group brightness control register (address 12h) bit description Legend: * default value Address Register Bit Symbol Access Value Description 12h GRPPWM 7:0 GDC[7:0] R/W 11111111 GRPPWM register When DMBLNK bit (MODE2 register) is programmed with logic0, a 190Hz fixed frequency signal is superimposed with the 97kHz individual brightness control signal. GRPPWM is then used as a global brightness control allowing the LED outputs to be dimmed with the same value. The value in GRPFREQ is then a ‘Don’t care’. General brightness for the 16 outputs is controlled through 256 linear steps from 00h (0%duty cycle=LED output off) to FFh (99.6% duty cycle=maximum brightness). Applicable to LED outputs programmed with LDRx=11 (LEDOUT0 to LEDOUT3 registers). When DMBLNK bit is programmed with logic1, GRPPWM and GRPFREQ registers define a global blinking pattern, where GRPFREQ contains the blinking period (from 24Hz to 10.73s) and GRPPWM the duty cycle (ON/OFF ratio in%). GDC[7:0] duty cycle = --------------------------- (2) 256 7.3.5 GRPFREQ, group frequency Table 9. GRPFREQ - Group Frequency register (address 13h) bit description Legend: * default value. Address Register Bit Symbol Access Value Description 13h GRPFREQ 7:0 GFRQ[7:0] R/W 00000000* GRPFREQ register GRPFREQ is used to program the global blinking period when DMBLNK bit (MODE2 register) is equal to 1. Value in this register is a ‘Don’t care’ when DMBLNK=0. Applicable to LED outputs programmed with LDRx=11 (LEDOUT0 to LEDOUT3 registers). Blinking period is controlled through 256 linear steps from 00h (41ms, frequency 24Hz) to FFh (10.73s). GFRQ[7:0]+1 global blinking period = ---------------------------------------- (s) (3) 24 PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 12 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 7.3.6 LEDOUT0 to LEDOUT3, LED driver output state Table 10. LEDOUT0 to LEDOUT3 - LED driver output state register (address 14h to 17h) bit description Legend: * default value. Address Register Bit Symbol Access Value Description 14h LEDOUT0 7:6 LDR3 R/W 00* LED3 output state control 5:4 LDR2 R/W 00* LED2 output state control 3:2 LDR1 R/W 00* LED1 output state control 1:0 LDR0 R/W 00* LED0 output state control 15h LEDOUT1 7:6 LDR7 R/W 00* LED7 output state control 5:4 LDR6 R/W 00* LED6 output state control 3:2 LDR5 R/W 00* LED5 output state control 1:0 LDR4 R/W 00* LED4 output state control 16h LEDOUT2 7:6 LDR11 R/W 00* LED11 output state control 5:4 LDR10 R/W 00* LED10 output state control 3:2 LDR9 R/W 00* LED9 output state control 1:0 LDR8 R/W 00* LED8 output state control 17h LEDOUT3 7:6 LDR15 R/W 00* LED15 output state control 5:4 LDR14 R/W 00* LED14 output state control 3:2 LDR13 R/W 00* LED13 output state control 1:0 LDR12 R/W 00* LED12 output state control LDRx=00 —LED driver x is off (default power-up state). LDRx=01 —LED driver x is fully on (individual brightness and group dimming/blinking not controlled). LDRx=10 —LED driver x individual brightness can be controlled through its PWMx register. LDRx=11 —LED driver x individual brightness and group dimming/blinking can be controlled through its PWMx register and the GRPPWM registers. PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 13 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 7.3.7 SUBADR1 to SUBADR3, I2C-bus subaddress 1 to 3 Table 11. SUBADR1toSUBADR3 - I2C-bus subaddress registers 1to3 (address 18h to 1Ah) bit description Legend: * default value. Address Register Bit Symbol Access Value Description 18h SUBADR1 7:1 A1[7:1] R/W 1110001* I2C-bus subaddress 1 0 A1[0] R only 0* reserved 19h SUBADR2 7:1 A2[7:1] R/W 1110010* I2C-bus subaddress 2 0 A2[0] R only 0* reserved 1Ah SUBADR3 7:1 A3[7:1] R/W 1110100* I2C-bus subaddress 3 0 A3[0] R only 0* reserved Subaddresses are programmable through the I2C-bus. Default power-up values are E2h, E4h, E8h, and the device(s) will not acknowledge these addresses right after power-up (the corresponding SUBx bit in MODE1 register is equal to 0). Once subaddresses have been programmed to their right values, SUBx bits need to be set to logic1 in order to have the device acknowledging these addresses (MODE1 register). Only the 7MSBs representing the I2C-bus subaddress are valid. The LSB in SUBADRx register is a read-only bit (0). When SUBx is set to logic1, the corresponding I2C-bus subaddress can be used during either an I2C-bus read or write sequence. 7.3.8 ALLCALLADR, LED All Call I2C-bus address Table 12. ALLCALLADR - LED All Call I2C-bus address register (address 1Bh) bit description Legend: * default value. Address Register Bit Symbol Access Value Description 1Bh ALLCALLADR 7:1 AC[7:1] R/W 1110000* ALLCALL I2C-bus address register 0 AC[0] R only 0* reserved The LED All Call I2C-bus address allows all the PCA9635s in the bus to be programmed at the same time (ALLCALL bit in register MODE1 must be equal to 1 (power-up default state)).ThisaddressisprogrammablethroughtheI2C-busandcanbeusedduringeither an I2C-bus read or write sequence. The register address can also be programmed as a SubCall. Only the 7MSBs representing the All Call I2C-bus address are valid. The LSB in ALLCALLADR register is a read-only bit (0). IfALLCALLbit=0,thedevicedoesnotacknowledgetheaddressprogrammedinregister ALLCALLADR. PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 14 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 7.4 Active LOW output enable input TheactiveLOWoutputenable(OE)pin,allowstoenableordisablealltheLEDoutputsat the same time. • WhenaLOWlevelisappliedtoOEpin,alltheLEDoutputsareenabledandfollowthe output state defined in the LEDOUT register with the polarity defined by INVRT bit (MODE2 register). • When a HIGH level is applied toOE pin, all the LED outputs are programmed to the value that is defined by OUTNE[1:0] in the MODE2 register. Table 13. LED outputs whenOE=1 OUTNE1 OUTNE0 LED outputs 0 0 0 0 1 1 if OUTDRV=1, high-impedance if OUTDRV=0 1 0 high-impedance 1 1 reserved TheOE pin can be used as a synchronization signal to switch on/off several PCA9635 devices at the same time. This requires an external clock reference that provides blinking period and the duty cycle. TheOEpincanalsobeusedasanexternaldimmingcontrolsignal.Thefrequencyofthe external clock must be high enough not to be seen by the human eye, and the duty cycle value determines the brightness of the LEDs. Remark:Do not useOE as an external blinking control signal when internal global blinking is selected (DMBLNK=1, MODE2 register) since it will result in an undefined blinkingpattern.DonotuseOEasanexternaldimmingcontrolsignalwheninternalglobal dimming is selected (DMBLNK=0, MODE2 register) since it will result in an undefined dimming pattern. 7.5 Power-on reset When power is applied to V , an internal power-on reset holds the PCA9635 in a reset DD conditionuntilV hasreachedV .Atthispoint,theresetconditionisreleasedandthe DD POR PCA9635 registers and I2C-bus state machine are initialized to their default states (all zeroes)causingallthechannelstobedeselected.Thereafter,V mustbeloweredbelow DD 0.2V to reset the device. PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 15 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 7.6 Software reset TheSoftwareResetCall(SWRSTCall)allowsallthedevicesintheI2C-bustoberesetto thepower-upstatevaluethroughaspecificformattedI2C-buscommand.Tobeperformed correctly, it implies that the I2C-bus is functional and that there is no device hanging the bus. The SWRST Call function is defined as the following: 1. A START command is sent by the I2C-bus master. 2. ThereservedSWRSTI2C-busaddress‘0000011’withtheR/Wbitsetto‘0’(write)is sent by the I2C-bus master. 3. The PCA9635 device(s) acknowledge(s) after seeing the SWRST Call address ‘00000110’(06h)only.IftheR/Wbitissetto‘1’(read),noacknowledgeisreturnedto the I2C-bus master. 4. Once the SWRST Call address has been sent and acknowledged, the master sends 2bytes with 2 specific values (SWRST data byte1 and byte2): a. Byte 1=A5h: the PCA9635 acknowledges this value only. If byte1 is not equal to A5h, the PCA9635 does not acknowledge it. b. Byte 2=5Ah: the PCA9635 acknowledges this value only. If byte2 is not equal to 5Ah, then the PCA9635 does not acknowledge it. If more than 2bytes of data are sent, the PCA9635 does not acknowledge any more. 5. Once the right 2bytes (SWRST data byte1 and byte2 only) have been sent and correctlyacknowledged,themastersendsaSTOPcommandtoendtheSWRSTCall: the PCA9635 then resets to the default value (power-up value) and is ready to be addressed again within the specified bus free time (t ). BUF TheI2C-busmastermustinterpretanon-acknowledgefromthePCA9635(atanytime)as a ‘SWRST Call Abort’. The PCA9635 does not initiate a reset of its registers. This happens only when the format of the SWRST Call sequence is not correct. 7.7 Using the PCA9635 with and without external drivers The PCA9635 LED output drivers are 5.5V only tolerant and can sink up to 25mA at 5V. If the device needs to drive LEDs to a higher voltage and/or higher current, use of an external driver is required. • INVRT bit (MODE2 register) can be used to keep the LED PWM control firmware the same(PWMxandGRPPWMvaluesdirectlycalculatedfromtheirrespectiveformulas andtheLEDoutputstatedeterminedbyLEDOUTregistervalue)independentlyofthe typeofexternaldriver.ThisbitallowsLEDoutputpolarityinversion/non-inversiononly whenOE=0. • OUTDRVbit(MODE2register)allowsminimizingtheamountofexternalcomponents required to control the external driver (N-type or P-type device). PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 16 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver Table 14. Use of INVRT and OUTDRV based on connection to the LEDn outputs whenOE=0[1] INVRT OUTDRV Direct connection to LEDn External N-type driver External P-type driver Firmware External Firmware External Firmware External pull-up pull-up pull-up resistor resistor resistor 0 0 formulas and LED LEDcurrent formulasandLED required formulas and LED required output state values limiting R[2] output state outputstatevalues apply[2] values inverted apply 0 1 formulas and LED LEDcurrent formulasandLED not required formulas and LED not output state values limiting R[2] output state outputstatevalues required[4] apply[2] values inverted apply[4] 1 0 formulas and LED LEDcurrent formulasandLED required formulas and LED required output state values limiting R output state outputstatevalues inverted values apply inverted 1 1 formulas and LED LEDcurrent formulasandLED not formulas and LED not required output state values limiting R output state required[3] outputstatevalues inverted values apply[3] inverted [1] WhenOE=1, LED output state is controlled only by OUTNE[1:0] bits (MODE2 register). [2] Correct configuration when LEDs directly connected to the LEDn outputs (connection to V through current limiting resistor). DD [3] Optimum configuration when external N-type (NPN, NMOS) driver used. [4] Optimum configuration when external P-type (PNP, PMOS) driver used. Table 15. Output transistors based on LEDOUT registers, INVRT and OUTDRV bits whenOE=0[1] LEDOUT INVRT OUTDRV Upper transistor Lower transistor LEDn state (V to LEDn) (LEDn to V ) DD SS 00 0 0 off off high-Z[2] LED driver off 0 1 on off V DD 1 0 off on V SS 1 1 off on V SS 01 0 0 off on V SS LED driver on 0 1 off on V SS 1 0 off off high-Z[2] 1 1 on off V DD 10 0 0 off individual PWM V or high-Z[2] = PWMx value SS Individual (non-inverted) brightness 0 1 individual PWM individual PWM V or V = PWMx value SS DD control (non-inverted) (non-inverted) 1 0 off individual PWM high-Z[2] or V = 1- PWMx value SS (inverted) 1 1 individual PWM individual PWM V or V = 1- PWMx value DD SS (inverted) (inverted) PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 17 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver Table 15. Output transistors based on LEDOUT registers, INVRT and OUTDRV bits whenOE=0[1] …continued LEDOUT INVRT OUTDRV Upper transistor Lower transistor LEDn state (V to LEDn) (LEDn to V ) DD SS 11 0 0 off individual + group V or high-Z[2] = PWMx or GRPPWM SS individual + PWM values group (non-inverted) dimming/blinking 0 1 individual PWM individual PWM V or V = PWMx or GRPPWM values SS DD (non-inverted) (non-inverted) 1 0 off individual + group high-Z[2] or V = (1- PWMx) or SS PWM (inverted) (1- GRPPWM) values 1 1 individual PWM individual PWM V or V =(1- PWMx) or DD SS (inverted) (inverted) (1- GRPPWM) values [1] WhenOE=1, LED output state is controlled only by OUTNE[1:0] bits (MODE2 register). [2] External pull-up or LED current limiting resistor connects LEDn to V . DD 7.8 Individual brightness control with group dimming/blinking A 97kHz fixed frequency signal with programmable duty cycle (8 bits, 256 steps) is used to control individually the brightness for each LED. Ontopofthissignal,oneofthefollowingsignalscanbesuperimposed(thissignalcanbe applied to the 4 LED outputs): • A lower 190Hz fixed frequency signal with programmable duty cycle (8 bits, 256steps) is used to provide a global brightness control. • A programmable frequency signal from 24Hz to1⁄ Hz (8 bits, 256 steps) with 10.73 programmable duty cycle (8 bits, 256 steps) is used to provide a global blinking control. 508 510 512 1 2 3 4 5 6 7 8 9 10 11 12 507 509 511 1 2 3 4 5 6 7 8 9 10 11 Brightness Control signal (LEDn) N · 40 ns with N = (0 to 255) M · 256 · 2 · 40 ns (PWMx Register) with M = (0 to 255) (GRPPWM Register) 256 · 40 ns = 10.24 m s (97.6 kHz) Group Dimming signal 256 · 2 · 256 · 40 ns = 5.24 ms (190.7 Hz) 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 resulting Brightness + Group Dimming signal 002aab417 Minimum pulse width for LEDn Brightness Control is 40ns. Minimum pulse width for Group Dimming is 20.48m s. When M=1 (GRPPWM register value), the resulting LEDn Brightness Control + GroupDimming signal will have 2 pulses of the LED Brightness Control signal (pulse width=N· 40ns, with ‘N’ defined in PWMx register). This resulting Brightness+GroupDimming signal above shows a resulting Control signal with M=4 (8 pulses). Fig 6. Brightness + Group Dimming signals PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 18 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 8. Characteristics of the I2C-bus TheI2C-busisfor2-way,2-linecommunicationbetweendifferentICsormodules.Thetwo lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. 8.1 Bit transfer Onedatabitistransferredduringeachclockpulse.ThedataontheSDAlinemustremain stable during the HIGH period of the clock pulse as changes in the data line at this time will be interpreted as control signals (seeFigure7). SDA SCL data line change stable; of data data valid allowed mba607 Fig 7. Bit transfer 8.1.1 START and STOP conditions Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transitionofthedatalinewhiletheclockisHIGHisdefinedastheSTARTcondition(S).A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP condition (P) (seeFigure8). SDA SCL S P START condition STOP condition mba608 Fig 8. Definition of START and STOP conditions 8.2 System configuration A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The device that controls the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’ (seeFigure9). PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 19 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver SDA SCL MASTER SLAVE SLAVE MASTER MASTER I2C-BUS TRANSMITTER/ RECEIVER TRANSMITTER/ TRANSMITTER TRANSMITTER/ MULTIPLEXER RECEIVER RECEIVER RECEIVER SLAVE 002aaa966 Fig 9. System configuration 8.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eightbits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse. Aslavereceiverwhichisaddressedmustgenerateanacknowledgeafterthereceptionof each byte. Also a master must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pulldowntheSDAlineduringtheacknowledgeclockpulse,sothattheSDAlineisstable LOWduringtheHIGHperiodoftheacknowledgerelatedclockpulse;set-uptimeandhold time must be taken into account. A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a STOP condition. data output by transmitter not acknowledge data output by receiver acknowledge SCL from master 1 2 8 9 S clock pulse for START acknowledgement condition 002aaa987 Fig 10. Acknowledgement on the I2C-bus PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 20 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 9. Bus transactions slave address control register data for register D[4:0](1) S A6 A5 A4 A3 A2 A1 A0 0 A X X X D4 D3 D2 D1 D0 A A P Auto-Increment options START condition R/W acknowledge acknowledge Auto-Increment flag from slave from slave acknowledge STOP from slave condition 002aac148 (1) SeeTable4 for register definition. Fig 11. Write to a specific register slave address control register MODE1 register MODE2 register S A6 A5 A4 A3 A2 A1 A0 0 A 1 0 0 0 0 0 0 0 A A A (cont.) Auto-Increment MODE1 START condition R/W on all registers register acknowledge acknowledge acknowledge acknowledge selection from slave from slave from slave from slave Auto-Increment on SUBADR3 register ALLCALLADR register (cont.) A A P acknowledge acknowledge from slave from slave STOP condition 002aac149 Fig 12. Write to all registers using the Auto-Increment feature slave address control register PWM0 register PWM1 register S A6 A5 A4 A3 A2 A1 A0 0 A 1 0 1 0 0 0 1 0 A A A (cont.) increment PWM0 START condition R/W on Individual register acknowledge acknowledge acknowledge acknowledge brightness selection from slave from slave from slave from slave registers only Auto-Increment on PWM14 register PWM15 register PWM0 register PWMx register (cont.) A A A A P acknowledge acknowledge acknowledge acknowledge from slave from slave from slave from slave STOP condition 002aac150 Fig 13. Multiple writes to Individual Brightness registers only using the Auto-Increment feature PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 21 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver ReSTART slave address control register condition slave address data from MODE1 register S A6 A5 A4 A3 A2 A1 A0 0 A 1 0 0 0 0 0 0 0 A Sr A6 A5 A4 A3 A2 A1 A0 1 A A (cont.) Auto-Increment MODE1 START condition R/W on all registers register acknowledge R/W acknowledge acknowledge selection from slave acknowledge from master from slave Auto-Increment on from slave data from data from data from MODE2 register data from PWM0 ALLCALLADR register MODE1 register (cont.) A A A A (cont.) acknowledge acknowledge acknowledge acknowledge from master from master from master from master data from last read byte (cont.) A P not acknowledge STOP from master condition 002aac151 Fig 14. Read all registers using the Auto-Increment feature slave address(1) control register new LED All Call I2C address(2) sequence (A) S A6 A5 A4 A3 A2 A1 A0 0 A X X X 1 1 0 1 1 A 1 0 1 0 1 0 1 X A P ALLCALLADR START condition R/W register selection acknowledge acknowledge from slave from slave acknowledge from slave Auto-Increment on STOP condition the 16 LEDs are on at the acknowledge(3) LED All Call I2C address control register LEDOUT register (LED fully ON) sequence (B) S 1 0 1 0 1 0 1 0 A X X X 0 1 0 0 0 A 0 1 0 1 0 1 0 1 A P LEDOUT START condition R/W register selection acknowledge acknowledge from the from the acknowledge 4 devices 4 devices from the 4 devices STOP condition 002aac152 (1) In this example, several PCA9635s are used and the same sequence (A) (above) is sent to each of them. (2) ALLCALL bit in MODE1 register is equal to 1 for this example. (3) OCH bit in MODE2 register is equal to 1 for this example. Fig 15. LED All Call I2C-bus address programming and LED All Call sequence example PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 22 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 10. Application design-in information 5 V 12 V VDD = 2.5 V, 3.3 V or 5.0 V R(1) R(1) 10 kW (2) I2C-BUS/SMBus MASTER VDD SDA SDA LED0 SCL SCL LED1 LED2 OE OE LED3 5 V 12 V PCA9635 LED4 LED5 LED6 LED7 5 V 12 V LED8 LED9 LED10 LED11 5 V 12 V A0 A1 A2 A3 LED12 A4 LED13 A5 LED14 A6 VSS LED15 002aac138 (1) R = 10kW (typical) for SMBus, Standard-mode or Fast-mode I2C-bus. R = 1kW (typical) for Fast-mode Plus I2C-bus. (2) OE requires pull-up resistor if control signal from the master is open-drain. I2C-bus address = 0010101x. Fig 16. Typical application PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 23 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver Question 1:What kind of edge rate control is there on the outputs? • The typical edge rates depend on the output configuration, supply voltage, and the applied load. The outputs can be configured as either open-drain NMOS or totem-pole outputs. If the customer is using the part to directly drive LEDs, they shouldbeusingitinanopen-drainNMOS,iftheyareconcernedaboutthemaximum I and ground bounce. The edge rate control was designed primarily to slow down SS the turn-on of the output device; it turns off rather quickly (~1.5ns). In simulation, the typical turn-on time for the open-drain NMOS was ~14ns (V =3.6V; C =50pF; DD L R =500W ). PU Question 2:Is ground bounce possible? • Ground bounce is a possibility, especially if all 16 outputs are changed at full current (25mA each). There is a fair amount of decoupling capacitance on chip (~50pF), whichisintendedtosuppresssomeofthegroundbounce.Thecustomerwillneedto determine if additional decoupling capacitance externally placed as close as physically possible to the device is required. Question 3:Can I really sink 400mA through the single ground pin on the package and will this cause any ground bounce problem due to the PWM of the LEDs? • Yes, you can sink 400mA through a single ground pin on thepackage. Although the package only has one ground pin, there are two ground pads on the die itself connectedtothisonepin.Althoughsomegroundbounceislikely,itwillnotdisruptthe operation of the part and would be reduced by the external decoupling capacitance. Question 4:I can’t turn the LEDs on or off, but their registers are set properly. Why? • Check the ModeRegister1 bit4 SLEEP setting. The value needs to be 0 so that the OSCisturnon.IftheOSCisturnedoff,theLEDscannotbeturnedonoroffandalso can’t be dimmed or blinked. Question 5:I’m using LEDs with integrated Zener diodes and the IC is getting very hot. Why? • The IC outputs can be set to either open-drain or push-pull and default to push-pull outputs. In this application with the Zener diodes, they need to be set to open-drain since in the push-pull architecture there is a low resistance path to GND through the ZenerandthisiscausingtheICtooverheat.ThePCA9632/33/34/35ICsallpower-up in the push-pull output mode and with the logic state HIGH, so one of the first things that need to be done is to set the outputs to open-drain. PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 24 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 11. Limiting values Table 16. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V supply voltage - 0.5 +6.0 V DD V voltage on an input/output pin V - 0.5 5.5 V I/O SS I output current on pin LEDn - 25 mA O(LEDn) I ground supply current - 400 mA SS P total power dissipation - 400 mW tot T storage temperature - 65 +150 (cid:176) C stg T ambient temperature operating - 40 +85 (cid:176) C amb 12. Static characteristics Table 17. Static characteristics V =2.3V to 5.5V; V =0V; T =- 40(cid:176) Cto+85(cid:176) C; unless otherwise specified. DD SS amb Symbol Parameter Conditions Min Typ Max Unit Supply V supply voltage 2.3 - 5.5 V DD I supply current operating mode; noload; DD f =1MHz SCL V =2.3V - 2.5 10 mA DD V =3.3V - 2.5 10 mA DD V =5.5V - 2.5 10 mA DD I standby current noload;f =0Hz;I/O=inputs; stb SCL V =V I DD V =2.3V - 2.3 11 m A DD V =3.3V - 2.9 12 m A DD V =5.5V - 3.8 15.5 m A DD V power-on reset voltage no load; V =V or V [1] - 1.70 2.0 V POR I DD SS Input SCL; input/output SDA V LOW-level input voltage - 0.5 - +0.3V V IL DD V HIGH-level input voltage 0.7V - 5.5 V IH DD I LOW-level output current V =0.4V; V =2.3V 20 - - mA OL OL DD V =0.4V; V =5.0V 30 - - mA OL DD I leakage current V =V or V - 1 - +1 m A L I DD SS C input capacitance V =V - 6 10 pF i I SS PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 25 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver Table 17. Static characteristics …continued V =2.3V to 5.5V; V =0V; T =- 40(cid:176) Cto+85(cid:176) C; unless otherwise specified. DD SS amb Symbol Parameter Conditions Min Typ Max Unit LED driver outputs I LOW-level output current V =0.5V; V =2.3V [2] 12 - - mA OL OL DD V =0.5V; V =3.0V [2] 17 - - mA OL DD V =0.5V; V =4.5V [2] 25 - - mA OL DD I total LOW-level output current V =0.5V;V =4.5V [2] - - 400 mA OL(tot) OL DD I HIGH-level output current open-drain; V =V - 50 - +50 m A OH OH DD V HIGH-level output voltage I =- 10mA; V =2.3V 1.6 - - V OH OH DD I =- 10mA; V =3.0V 2.3 - - V OH DD I =- 10mA; V =4.5V 4.0 - - V OH DD C output capacitance - 2.5 5 pF o OE input V LOW-level input voltage - 0.5 - +0.8 V IL V HIGH-level input voltage 2 - 5.5 V IH I input leakage current - 1 - +1 m A LI C input capacitance - 3.7 5 pF i Address inputs V LOW-level input voltage - 0.5 - +0.3V V IL DD V HIGH-level input voltage 0.7V - 5.5 V IH DD I input leakage current - 1 - +1 m A LI C input capacitance - 3.7 5 pF i [1] V must be lowered to 0.2V for at least 5ns in order to reset part. DD [2] Each bit must be limited to a maximum of 25mA and the total package limited to 400mA due to internal busing limits. PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 26 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 13. Dynamic characteristics Table 18. Dynamic characteristics Symbol Parameter Conditions Standard-mode Fast-mode Fast-mode Unit I2C-bus I2C-bus Plus I2C-bus Min Max Min Max Min Max f SCL clock frequency [1] 0 100 0 400 0 1000 kHz SCL t bus free time between a 4.7 - 1.3 - 0.5 - m s BUF STOP and START condition t hold time (repeated) START 4.0 - 0.6 - 0.26 - m s HD;STA condition t set-up time for a repeated 4.7 - 0.6 - 0.26 - m s SU;STA START condition t set-up time for STOP 4.0 - 0.6 - 0.26 - m s SU;STO condition t data hold time 0 - 0 - 0 - ns HD;DAT t data valid acknowledge time [2] 0.3 3.45 0.1 0.9 0.05 0.45 m s VD;ACK t data valid time [3] 0.3 3.45 0.1 0.9 0.05 0.45 m s VD;DAT t data set-up time 250 - 100 - 50 - ns SU;DAT t LOW period of the SCL clock 4.7 - 1.3 - 0.5 - m s LOW t HIGHperiodoftheSCLclock 4.0 - 0.6 - 0.26 - m s HIGH t fall time of both SDA and [4][5] - 300 20+0.1C [6] 300 - 120 ns f b SCL signals t rise time of both SDA and - 1000 20+0.1C [6] 300 - 120 ns r b SCL signals t pulse width of spikes that [7] - 50 - 50 - 50 ns SP must be suppressed by the input filter [1] Minimum SCL clock frequency is limited by the bus time-out feature, which resets the serial bus interface if either SDA or SCL is held LOW for a minimum of 25ms. Disable bus time-out feature for DC operation. [2] t =time for Acknowledgement signal from SCL LOW to SDA (out) LOW. VD;ACK [3] t =minimum time for SDA data out to be valid following SCL LOW. VD;DAT [4] A master device must internally provide a hold time of at least 300ns for the SDA signal (refer to the V of the SCL signal) in order to IL bridge the undefined region of SCL’s falling edge. [5] Themaximumt fortheSDAandSCLbuslinesisspecifiedat300ns.Themaximumfalltime(t)fortheSDAoutputstageisspecifiedat f f 250ns. This allows series protection resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without exceeding the maximum specified t. f [6] C =total capacitance of one bus line in pF. b [7] Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns. PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 27 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver SDA tBUF tr tf tHD;STA tSP tLOW SCL tHD;STA tSU;STA tSU;STO P S tHD;DAT tHIGH tSU;DAT Sr P 002aaa986 Fig 17. Definition of timing START bit 7 STOP bit 6 bit 1 bit 0 acknowledge protocol condition MSB condition (A6) (D1) (D0) (A) (S) (A7) (P) tSU;STA tLOW tHIGH 1 / fSCL SCL tBUF tf tr SDA tHD;STA tSU;DAT tHD;DAT tVD;DAT tVD;ACK tSU;STO 002aab285 Rise and fall times refer to V and V . IL IH Fig 18. I2C-bus timing diagram 14. Test information VDD open GND VDD RL 500 W VI VO PULSE DUT GENERATOR RT C50L pF 002aab284 R = Load resistor for LEDn. R for SDA and SCL > 1kW (3mA or less current). L L C = Load capacitance includes jig and probe capacitance. L R = Termination resistance should be equal to the output impedance Z of the pulse generators. T o Fig 19. Test circuitry for switching times PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 28 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 15. Package outline TSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm SOT361-1 D E A X c y HE v M A Z 28 15 Q A2 (A 3 ) A pin 1 index A1 q Lp L 1 14 detail X w M e bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mAax. A1 A2 A3 bp c D(1) E(2) e HE L Lp Q v w y Z(1) q mm 1.1 00..1055 00..9850 0.25 00..3109 00..21 99..86 44..53 0.65 66..62 1 00..7550 00..43 0.2 0.13 0.1 00..85 80oo Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT361-1 MO-153 03-02-19 Fig 20. Package outline SOT361-1 (TSSOP28) PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 29 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 16. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described inJESD625-A or equivalent standards. 17. Soldering of SMD packages Thistextprovidesaverybriefinsightintoacomplextechnology.Amorein-depthaccount of soldering ICs can be found in Application NoteAN10365 “Surface mount reflow soldering description”. 17.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to PrintedCircuitBoards(PCBs),toformelectricalcircuits.Thesolderedjointprovidesboth the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 17.2 Wave and reflow soldering Wavesolderingisajoiningtechnologyinwhichthejointsaremadebysoldercomingfrom a standing wave of liquid solder. The wave soldering process is suitable for the following: • Through-hole components • Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are: • Board specifications, including the board finish, solder masks and vias • Package footprints, including solder thieves and orientation • The moisture sensitivity level of the packages • Package placement • Inspection and repair • Lead-free soldering versus SnPb soldering 17.3 Wave soldering Key characteristics in wave soldering are: PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 30 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 17.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-freeversusSnPbsoldering;notethatalead-freereflowprocessusuallyleadsto higher minimum peak temperatures (seeFigure21) than a SnPb process, thus reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperatureishighenoughforthesoldertomakereliablesolderjoints(asolderpaste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table19 and20 Table 19. SnPb eutectic process (from J-STD-020C) Package thickness (mm) Package reflow temperature ((cid:176) C) Volume (mm3) < 350 ‡ 350 < 2.5 235 220 ‡ 2.5 220 220 Table 20. Lead-free process (from J-STD-020C) Package thickness (mm) Package reflow temperature ((cid:176) C) Volume (mm3) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245 Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, seeFigure21. PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 31 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 21. Temperature profiles for large and small components For further information on temperature profiles, refer to Application NoteAN10365 “Surface mount reflow soldering description”. 18. Abbreviations Table 21. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test EMI ElectroMagnetic Interference ESD ElectroStatic Discharge HBM Human Body Model I2C-bus Inter-Integrated Circuit bus LED Light Emitting Diode LSB Least Significant Bit MM Machine Model MSB Most Significant Bit NMOS Negative-channel Metal Oxide Semiconductor NPN bipolar transistor with N-type emitter and collector and a P-type base PCB Printed-Circuit Board PMOS Positive-channel Metal Oxide Semiconductor PNP bipolar transistor with P-type emitter and collector and an N-type base PWM Pulse Width Modulation RGB Red/Green/Blue RGBA Red/Green/Blue/Amber SMBus System Management Bus PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 32 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 19. Revision history Table 22. Revision history Document ID Release date Data sheet status Change notice Supersedes PCA9635_7 20090716 Product data sheet - PCA9635_6 Modifications: • Added type number PCA9635PW/Q900 (affectsTable 1 “Ordering information” andFigure 2 “Pin configuration for TSSOP28”) PCA9635_6 20080911 Product data sheet - PCA9635_5 PCA9635_5 20070322 Product data sheet - PCA9635_4 PCA9635_4 20061220 Product data sheet - PCA9635_3 PCA9635_3 20061116 Product data sheet - PCA9635_2 PCA9635_2 20060807 Objective data sheet - PCA9635_1 PCA9635_1 20060419 Objective data sheet - - PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 33 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 20. Legal information 20.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] Theproductstatusofdevice(s)describedinthisdocumentmayhavechangedsincethisdocumentwaspublishedandmaydifferincaseofmultipledevices.Thelatestproductstatus information is available on the Internet at URLhttp://www.nxp.com. 20.2 Definitions damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in Applications —Applications that are described herein for any of these modifications or additions. NXP Semiconductors does not give any products are for illustrative purposes only. NXP Semiconductors makes no representations or warranties as to the accuracy or completeness of representation or warranty that such applications will be suitable for the informationincludedhereinandshallhavenoliabilityfortheconsequencesof specified use without further testing or modification. use of such information. Limiting values —Stress above one or more limiting values (as defined in Short data sheet —A short data sheet is an extract from a full data sheet theAbsoluteMaximumRatingsSystemofIEC60134)maycausepermanent withthesameproducttypenumber(s)andtitle.Ashortdatasheetisintended damagetothedevice.Limitingvaluesarestressratingsonlyandoperationof forquickreferenceonlyandshouldnotbereliedupontocontaindetailedand the device at these or any other conditions above those given in the full information. For detailed and full information see the relevant full data Characteristics sections of this document is not implied. Exposure to limiting sheet, which is available on request via the local NXP Semiconductors sales values for extended periods may affect device reliability. office. In case of any inconsistency or conflict with the short data sheet, the Terms and conditions of sale —NXP Semiconductors products are sold full data sheet shall prevail. subjecttothegeneraltermsandconditionsofcommercialsale,aspublished athttp://www.nxp.com/profile/terms, including those pertaining to warranty, 20.3 Disclaimers intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such General —Information in this document is believed to be accurate and terms and conditions, the latter will prevail. reliable.However,NXPSemiconductorsdoesnotgiveanyrepresentationsor No offer to sell or license —Nothing in this document may be interpreted warranties,expressedorimplied,astotheaccuracyorcompletenessofsuch or construed as an offer to sell products that is open for acceptance or the information and shall have no liability for the consequences of use of such grant,conveyanceorimplicationofanylicenseunderanycopyrights,patents information. or other industrial or intellectual property rights. Right to make changes —NXPSemiconductorsreservestherighttomake Export control —This document as well as the item(s) described herein changes to information published in this document, including without may be subject to export control regulations. Export might require a prior limitation specifications and product descriptions, at any time and without authorization from national authorities. notice.Thisdocumentsupersedesandreplacesallinformationsuppliedprior to the publication hereof. Suitability for use —NXP Semiconductors products are not designed, 20.4 Trademarks authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or Notice:Allreferencedbrands,productnames,servicenamesandtrademarks malfunction of an NXP Semiconductors product can reasonably be expected are the property of their respective owners. to result in personal injury, death or severe property or environmental I2C-bus —logois a trademark of NXP B.V. 21. Contact information For more information, please visit:http://www.nxp.com For sales office addresses, please send an email to:salesaddresses@nxp.com PCA9635_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 16 July 2009 34 of 35

PCA9635 NXP Semiconductors 16-bit Fm+ I2C-bus LED driver 22. Contents 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 15 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 29 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 16 Handling information . . . . . . . . . . . . . . . . . . . 30 3 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 17 Soldering of SMD packages. . . . . . . . . . . . . . 30 4 Ordering information. . . . . . . . . . . . . . . . . . . . . 3 17.1 Introduction to soldering. . . . . . . . . . . . . . . . . 30 17.2 Wave and reflow soldering. . . . . . . . . . . . . . . 30 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 17.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 30 6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4 17.4 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 31 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 18 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 32 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 19 Revision history . . . . . . . . . . . . . . . . . . . . . . . 33 7 Functional description . . . . . . . . . . . . . . . . . . . 5 20 Legal information . . . . . . . . . . . . . . . . . . . . . . 34 7.1 Device addresses. . . . . . . . . . . . . . . . . . . . . . . 5 7.1.1 Regular I2C-bus slave address. . . . . . . . . . . . . 5 20.1 Data sheet status. . . . . . . . . . . . . . . . . . . . . . 34 7.1.2 LED all call I2C-bus address. . . . . . . . . . . . . . . 6 20.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 7.1.3 LED sub call I2C-bus addresses. . . . . . . . . . . . 6 20.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 34 7.1.4 Software reset I2C-bus address . . . . . . . . . . . . 7 20.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 34 7.2 Control register. . . . . . . . . . . . . . . . . . . . . . . . . 7 21 Contact information . . . . . . . . . . . . . . . . . . . . 34 7.3 Register definitions. . . . . . . . . . . . . . . . . . . . . . 9 22 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 7.3.1 Mode register 1, MODE1 . . . . . . . . . . . . . . . . 10 7.3.2 Mode register 2, MODE2 . . . . . . . . . . . . . . . . 10 7.3.3 PWM0 to PWM15, individual brightness control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.3.4 GRPPWM, group duty cycle control. . . . . . . . 12 7.3.5 GRPFREQ, group frequency . . . . . . . . . . . . . 12 7.3.6 LEDOUT0 to LEDOUT3, LED driver output state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.3.7 SUBADR1 to SUBADR3, I2C-bus subaddress 1to3. . . . . . . . . . . . . . . . . . . . . . 14 7.3.8 ALLCALLADR, LED All Call I2C-bus address. 14 7.4 Active LOW output enable input. . . . . . . . . . . 15 7.5 Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 15 7.6 Software reset. . . . . . . . . . . . . . . . . . . . . . . . . 16 7.7 Using the PCA9635 with and without external drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.8 Individual brightness control with group dimming/blinking. . . . . . . . . . . . . . . . . . . . . . . 18 8 Characteristics of the I2C-bus. . . . . . . . . . . . . 19 8.1 Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8.1.1 START and STOP conditions . . . . . . . . . . . . . 19 8.2 System configuration . . . . . . . . . . . . . . . . . . . 19 8.3 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 20 9 Bus transactions . . . . . . . . . . . . . . . . . . . . . . . 21 10 Application design-in information . . . . . . . . . 23 11 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 25 12 Static characteristics. . . . . . . . . . . . . . . . . . . . 25 13 Dynamic characteristics . . . . . . . . . . . . . . . . . 27 14 Test information. . . . . . . . . . . . . . . . . . . . . . . . 28 Pleasebeawarethatimportantnoticesconcerningthisdocumentandtheproduct(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 16 July 2009 Document identifier: PCA9635_7

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: N XP: PCA9635PW,112 PCA9635PW,118 PCA9635PW/Q900,118