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DISCRETE SEMICONDUCTORS DATA SHEET book, halfpage M3D109 PBSS4480X 80 V, 4 A NPN low V (BISS) transistor CEsat Product data sheet 2004 Oct 25 Supersedes data of 2004 Aug 5

NXP Semiconductors Product data sheet 80 V, 4 A PBSS4480X NPN low V (BISS) transistor CEsat FEATURES QUICK REFERENCE DATA • High hFE and low VCEsat at high current operation SYMBOL PARAMETER MAX. UNIT • High collector current capability: I maximum 4 A C V collector-emitter voltage 80 V CEO • High efficiency leading to less heat generation. I collector current (DC) 4 A C I peak collector current 10 A CM APPLICATIONS R equivalent 54 mΩ CEsat on-resistance • Medium power peripheral drivers; e.g. fan, motor • Strobe flash units for DSC and mobile phones PINNING • Inverter applications; e.g. TFT displays • Power switch for LAN and ADSL systems PIN DESCRIPTION • Medium power DC-to-DC conversion 1 emitter • Battery chargers. 2 collector 3 base DESCRIPTION NPN low V transistor in a SOT89 (SC-62) plastic CEsat package. PNP complement: PBSS5480X. 2 MARKING 3 TYPE NUMBER MARKING CODE(1) 1 PBSS4480X *1Y sym042 3 2 1 Note 1. * = p: made in Hong Kong. * = t: made in Malaysia. * = W: made in China. Fig.1 Simplified outline (SOT89) and symbol. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION PBSS4480X − plastic surface mounted package; collector pad for good heat SOT89 transfer; 3 leads 2004 Oct 25 2

NXP Semiconductors Product data sheet 80 V, 4 A PBSS4480X NPN low V (BISS) transistor CEsat LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V collector-base voltage open emitter − 80 V CBO V collector-emitter voltage open base − 80 V CEO V emitter-base voltage open collector − 5 V EBO I collector current (DC) note 4 − 4 A C I repetitive peak collector current t ≤ 10 ms; δ ≤ 0.1 − 6 A CRM p I peak collector current t = 1 ms or limited by T − 10 A CM j(max) I base current (DC) − 1 A B I peak base current t ≤ 300 μs − 2 A BM P total power dissipation T ≤ 25 °C tot amb notes 1 and 2 − 2.5 W note 2 − 550 mW note 3 − 1 W note 4 − 1.4 W note 5 − 1.6 W T junction temperature − 150 °C j T ambient temperature −65 +150 °C amb T storage temperature −65 +150 °C stg Notes 1. Operated under pulsed conditions; pulse width t ≤ 10 ms; duty cycle δ ≤ 0.2. p 2. Device mounted on a printed-circuit board, single-sided copper, tin-plated and standard footprint. 3. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 1 cm2. 4. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 6 cm2. 5. Device mounted on a 7 cm2 ceramic printed-circuit board, 1 cm2 single-sided copper and tin-plated. For other mounting conditions, see “Thermal considerations for SOT89 in the General Part of associated Handbook”. 2004 Oct 25 3

NXP Semiconductors Product data sheet 80 V, 4 A PBSS4480X NPN low V (BISS) transistor CEsat 001aaa229 1600 Ptot (1) (mW) 1200 (2) 800 (3) 400 0 −50 0 50 100 150 200 Tamb (°C) (1) FR4 PCB; 6 cm2 mounting pad for collector. (2) FR4 PCB; 1 cm2 mounting pad for collector. (3) FR4; standard footprint. Fig.2 Power derating curves. 2004 Oct 25 4

NXP Semiconductors Product data sheet 80 V, 4 A PBSS4480X NPN low V (BISS) transistor CEsat THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS VALUE UNIT R thermal resistance from junction in free air th(j-a) to ambient notes 1 and 2 50 K/W note 2 225 K/W note 3 125 K/W note 4 90 K/W note 5 80 K/W R thermal resistance from junction 16 K/W th(j-s) to soldering point Notes 1. Operated under pulsed conditions; pulse width t ≤ 10 ms; duty cycle δ ≤ 0.2. p 2. Device mounted on a printed-circuit board, single-sided copper, tin-plated and standard footprint. 3. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 1 cm2. 4. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 6 cm2. 5. Device mounted on a 7 cm2 ceramic printed-circuit board, 1 cm2 single-sided copper and tin-plated. For other mounting conditions, see “Thermal considerations for SOT89 in the General Part of associated Handbook”. 103 006aaa232 Zth (K/W) (1) (2) 102 (3) (4) (5) (6) 10 (7) (8) (9) (10) 1 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 103 tp (s) Mounted on FR4 printed-circuit board; standard footprint. (1) δ = 1. (3) δ = 0.5. (5) δ = 0.2. (7) δ = 0.05. (9) δ = 0.01. (2) δ = 0.75. (4) δ = 0.33. (6) δ = 0.1. (8) δ = 0.02. (10)δ = 0. Fig.3 Transient thermal impedance as a function of pulse time; typical values. 2004 Oct 25 5

NXP Semiconductors Product data sheet 80 V, 4 A PBSS4480X NPN low V (BISS) transistor CEsat 103 006aaa233 Zth (K/W) (1) 102 (2) (3) (4) (5) (6) 10 (7) (8) (9) 1 (10) 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 103 tp (s) Mounted on FR4 printed-circuit board; mounting pad for collector 1 cm2. (1) δ = 1. (3) δ = 0.5. (5) δ = 0.2. (7) δ = 0.05. (9) δ = 0.01. (2) δ = 0.75. (4) δ = 0.33. (6) δ = 0.1. (8) δ = 0.02. (10)δ = 0. Fig.4 Transient thermal impedance as a function of pulse time; typical values. 103 006aaa234 Zth (K/W) 102 (1) (2) (3) (4) (5) 10 (6) (7) (8) (9) 1 (10) 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 103 tp (s) Mounted on FR4 printed-circuit board; mounting pad for collector 6 cm2. (1) δ = 1. (3) δ = 0.5. (5) δ = 0.2. (7) δ = 0.05. (9) δ = 0.01. (2) δ = 0.75. (4) δ = 0.33. (6) δ = 0.1. (8) δ = 0.02. (10)δ = 0. Fig.5 Transient thermal impedance as a function of pulse time; typical values. 2004 Oct 25 6

NXP Semiconductors Product data sheet 80 V, 4 A PBSS4480X NPN low V (BISS) transistor CEsat CHARACTERISTICS T = 25 °C unless otherwise specified. amb SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT I collector-base cut-off current V = 80 V; I = 0 A − − 100 nA CBO CB E V = 80 V; I = 0 A; − − 50 μA CB E T = 150 °C j I collector-emitter cut-off current V = 80 V; V = 0 V − − 100 nA CES CE BE I emitter-base cut-off current V = 5 V; I = 0 A − − 100 nA EBO EB C h DC current gain V = 2 V; I = 0.5 A 250 400 − − FE CE C V = 2 V; I = 1 A; note 1 250 400 − − CE C V = 2 V; I = 2 A; note 1 175 270 − − CE C V = 2 V; I = 4 A; note 1 80 140 − − CE C V collector-emitter saturation I = 0.5 A; I = 50 mA − 25 40 mV CEsat C B voltage I = 1 A; I = 50 mA − 55 80 mV C B I = 2 A; I = 40 mA − 110 160 mV C B I = 4 A; I = 200 mA; − 170 230 mV C B note 1 I = 5 A; I = 500 mA; − 200 270 mV C B note 1 R equivalent on-resistance I = 5 A; I = 500 mA; − 40 54 mΩ CEsat C B note 1 V base-emitter saturation voltage I = 0.5 A; I = 50 mA − 0.78 0.85 V BEsat C B I = 1 A; I = 50 mA − 0.79 0.9 V C B I = 1 A; I = 100 mA; − 0.82 0.95 V C B note 1 I = 4 A; I = 400 mA; − 0.95 1.05 V C B note 1 V base-emitter turn-on voltage I = 2 A; V = 2 V − 0.78 0.85 V BEon C CE f transition frequency I = 100 mA; V = 10 V; 120 150 − MHz T C CE f = 100 MHz C collector capacitance I = i = 0 A; V = 10 V; − 35 50 pF c E e CB f = 1 MHz Note 1. Pulse test: t ≤ 300 μs; δ ≤ 0.02. p 2004 Oct 25 7

NXP Semiconductors Product data sheet 80 V, 4 A PBSS4480X NPN low V (BISS) transistor CEsat 001aaa734 001aab057 1000 1.2 hFE (1) VBE 800 (V) (2) 0.8 (1) 600 (2) 400 (3) (3) 0.4 200 0 0 10−1 1 10 102 103 104 10-1 1 10 102 103 104 IC (mA) IC (mA) VCE = 2 V. VCE = 2 V. (1) Tamb = 100 °C. (1) Tamb = −55 °C. (2) Tamb = 25 °C. (2) Tamb = 25 °C. (3) Tamb = −55 °C. (3) Tamb = 100 °C. Fig.6 DC current gain as a function of collector Fig.7 Base-emitter voltage as a function of current; typical values. collector current; typical values. 103 001aaa737 1 001aaab059 VCEsat VCEsat (mV) (V) 102 10-1 (1) (1) (2) (3) (2) 10 10-2 (3) 1 10-3 10−1 1 10 102 103 104 10-1 1 10 102 103 104 IC (mA) IC (mA) IC/IB = 20. (1) IC/IB = 100. (1) Tamb = 100 °C. (2) IC/IB = 50. (2) Tamb = 25 °C. (3) IC/IB = 10. (3) Tamb = −55 °C. Fig.8 Collector-emitter saturation voltage as a Fig.9 Collector-emitter saturation voltage as a function of collector current; typical values. function of collector current; typical values. 2004 Oct 25 8

NXP Semiconductors Product data sheet 80 V, 4 A PBSS4480X NPN low V (BISS) transistor CEsat 1.2 001aaa736 103 001aaa738 RCEsat VBEsat (Ω) (V) 102 0.8 (1) 10 (2) (3) 1 0.4 10−1 (1) (2) (3) 0 10−2 10−1 1 10 102 103 104 10−1 1 10 102 103 104 IC (mA) IC (mA) IC/IB = 20. IC/IB = 20. (1) Tamb = −55 °C. (1) Tamb = 100 °C. (2) Tamb = 25 °C. (2) Tamb = 25 °C. (3) Tamb = 100 °C. (3) Tamb = −55 °C. Fig.10 Base-emitter saturation voltage as a Fig.11 Equivalent on-resistance as a function of function of collector current; typical values. collector current; typical values. 001aaa733 001aab321 10 1.2 (4) (3) (2) (1) IC (A) VBEon 8 (V) (5) (6) (7) 0.8 6 (8) (9) 4 (10) 0.4 2 0 0 0 0.4 0.8 1.2 1.6 2 10−1 1 10 102 103 104 VCE (V) IC (mA) (1) IB = 190 mA. (5) IB = 114 mA. (9) IB = 38 mA. (2) IB = 171 mA. (6) IB = 95 mA. (10)IB = 19 mA. (3) IB = 152 mA. (7) IB = 76 mA. (4) IB = 133 mA. (8) IB = 57 mA. Tamb = 25 °C. Fig.12 Collector current as a function of Fig.13 Base-emitter turn-on voltage as a function collector-emitter voltage; typical values. of collector current; typical values. 2004 Oct 25 9

NXP Semiconductors Product data sheet 80 V, 4 A PBSS4480X NPN low V (BISS) transistor CEsat Reference mounting conditions 32 mm handbook, halfpage 32 mm 10 mm 2.5 mm 40 mm 1 mm 40 mm 10 mm 3 mm 2.5 mm 2.5 mm 1 mm 1 mm 0.5 mm 0.5 mm 5 mm 5 mm 3.96 mm 3.96 mm 1.6 mm 1.6 mm 001aaa234 MLE322 Fig.14 FR4, standard footprint. Fig.15 FR4, mounting pad for collector 1 cm2. 32 mm 30 mm 20 mm 40 mm 2.5 mm 1 mm 0.5 mm 5 mm 3.96 mm 1.6 mm 001aaa235 Fig.16 FR4, mounting pad for collector 6 cm2. 2004 Oct 25 10

NXP Semiconductors Product data sheet 80 V, 4 A PBSS4480X NPN low V (BISS) transistor CEsat PACKAGE OUTLINE Plastic surface-mounted package; collector pad for good heat transfer; 3 leads SOT89 D B A bp3 E HE Lp 1 2 3 bp2 c w M bp1 e1 e 0 2 4 mm scale DIMENSIONS (mm are the original dimensions) UNIT A bp1 bp2 bp3 c D E e e1 HE Lp w 1.6 0.48 0.53 1.8 0.44 4.6 2.6 4.25 1.2 mm 3.0 1.5 0.13 1.4 0.35 0.40 1.4 0.23 4.4 2.4 3.75 0.8 OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 04-08-03 SOT89 TO-243 SC-62 06-03-16 2004 Oct 25 11

NXP Semiconductors Product data sheet 80 V, 4 A PBSS4480X NPN low V (BISS) transistor CEsat DATA SHEET STATUS DOCUMENT PRODUCT DEFINITION STATUS(1) STATUS(2) Objective data sheet Development This document contains data from the objective specification for product development. Preliminary data sheet Qualification This document contains data from the preliminary specification. Product data sheet Production This document contains the product specification. Notes 1. Please consult the most recently issued document before initiating or completing a design. 2. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. DISCLAIMERS above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for General ⎯ Information in this document is believed to be extended periods may affect device reliability. accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, Terms and conditions of sale ⎯ NXP Semiconductors expressed or implied, as to the accuracy or completeness products are sold subject to the general terms and of such information and shall have no liability for the conditions of commercial sale, as published at consequences of use of such information. http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights Right to make changes ⎯ NXP Semiconductors infringement and limitation of liability, unless explicitly reserves the right to make changes to information otherwise agreed to in writing by NXP Semiconductors. In published in this document, including without limitation case of any inconsistency or conflict between information specifications and product descriptions, at any time and in this document and such terms and conditions, the latter without notice. This document supersedes and replaces all will prevail. information supplied prior to the publication hereof. No offer to sell or license ⎯ Nothing in this document Suitability for use ⎯ NXP Semiconductors products are may be interpreted or construed as an offer to sell products not designed, authorized or warranted to be suitable for that is open for acceptance or the grant, conveyance or use in medical, military, aircraft, space or life support implication of any license under any copyrights, patents or equipment, nor in applications where failure or malfunction other industrial or intellectual property rights. of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe Export control ⎯ This document as well as the item(s) property or environmental damage. NXP Semiconductors described herein may be subject to export control accepts no liability for inclusion and/or use of NXP regulations. Export might require a prior authorization from Semiconductors products in such equipment or national authorities. applications and therefore such inclusion and/or use is at Quick reference data ⎯ The Quick reference data is an the customer’s own risk. extract of the product data given in the Limiting values and Applications ⎯ Applications that are described herein for Characteristics sections of this document, and as such is any of these products are for illustrative purposes only. not complete, exhaustive or legally binding. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values ⎯ Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions 2004 Oct 25 12

NXP Semiconductors Customer notification This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content, except for package outline drawings which were updated to the latest version. Contact information For additional information please visit: http://www.nxp.com For sales offices addresses send e-mail to: salesaddresses@nxp.com © NXP B.V. 2009 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R75/02/pp13 Date of release: 2004 Oct 25 Document order number: 9397 750 13924