PA75 RoHS Dual Power Operational Amplifiers COMPLIANT FEATURES • RoHS Compliant • Low Cost • Wide Bandwidth - 1.1 MHz • High Output Current - 2.5A (Combined) • Wide Common Mode Range Includes Negative Supply • Wide Supply Voltage Range Single supply: 5V to 40V Split Supplies: ± 2.5V to ± 20V • Low Quiescent Current • Very Low Distortion APPLICATIONS • Half And Full Bridge Motor Drivers • Audio Power Amplifier • Ideal for Single Supply Systems 5V Peripherals, 12V Automotive, 28V Avionic PACKAGING OPTIONS • 7 TO-220 Plastic Package (PA75CD) • 7 TO-220 with Staggered Lead Form (PA75CX) • 7 DDPAK Surface Mount Package (PA75CC) DESCRIPTION The amplifier design consists of a dual power op amp on a single monolithic die. Side B of the dual mono- lithic is configured as a unity gain buffer to increase the current capability of the primary side A. The use of two PA75 amplifiers provides a cost-effective solution to applications where multiple amplifiers are required or a bridge configuration is needed. Very low harmonic distortion of 0.02% THD and low I makes the PA75 a Q good solution for power audio applications. The PA75 is available in three standard package designs. The surface mount version of the PA75, the PA75CC, is an industry standard non-hermetic plastic 7-pin DDPAK. The through hole versions of the PA75, the PA75CD and PA75CX, are industry standard non-hermetic plastic 7-pin TO-220 packages. The PA75CX is staggered lead formed and offers standard 100 mil spacing. This allows for easier PC board layout. (Please refer to the CX lead form package drawing for dimension of the PA75CX). The monolithic amplifier is directly attached to the metal tabs of the PA75CC, PA75CD, and PA75CX. The metal tabs of the packages are directly tied to -Vs. © Apex Microtechnology Inc. Aug 2020 www.apexanalog.com All rights reserved PA75U Rev I

PA75 Figure 1: Equivalent Schematic +Vs I BIAS MONITOR -IN +IN OUT THERMAL PROTECT CHANNEL A CHANNEL B -Vs TYPICAL CONNECTION Figure 2: Typical Connection (Parallel Mode Operation) * *Bulk bypass capacitors. Use * 10 μF per amp of output current. 2 PA75U Rev I

PA75 PINOUT AND DESCRIPTION TABLE Figure 3: External Connections Pin Number Name Description 1 OUT_A The output for channel A. Connect this pin to load and to the feedback resistors. 2 -IN_A The inverting input for channel A. 3 +IN_A The non-inverting input for channel A. 4 -Vs The negative supply rail for both channels. 5 +IN_B The non-inverting input for channel B. 6 +Vs The positive supply rail for both channels. 7 OUT_B The output for channel B. Connect this pin to load. PA75U Rev I 3

PA75 SPECIFICATIONS Unless otherwise noted, the following conditions apply: ±V = ±15V, T = 25°C. S C ABSOLUTE MAXIMUM RATINGS Parameter Symbol Min Max Units Supply Voltage, total +Vs to -Vs 5 40 V Output Current, IO SOA Power Dissipation, internal (per amplifier) PD 19.5 W Power Dissipation, internal (both amplifiers) PD 28.6 W Input Voltage, differential VIN (Diff) ±VS V Input Voltage, common mode Vcm +VS, -VS – 0.5V V Temperature, pin solder, 10s max. 220 °C Temperature, junction 1 TJ 150 °C Temperature Range, storage -55 150 °C Operating Temperature Range, case TC -40 125 °C 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dis- sipation to achieve high MTTF. INPUT Parameter Test Conditions Min Typ Max Units Offset Voltage, initial 1 15 mV Offset Voltage vs. Temperature Full temp range 20 µV/°C Bias Current, initial 100 500 nA Common Mode Range Full temp range –VS +VS – 1.3 V Common Mode Rejection, DC Full temp range 60 90 dB Power Supply Rejection Full temp range 60 90 dB Channel Separation IOUT = 500mA, ƒ = 1 kHz 50 68 dB Input Noise Voltage RS = 100 Ω, ƒ = 1 to 100 kHz 22 nV/√Hz GAIN Parameter Test Conditions Min Typ Max Units Open Loop Gain Full temp range 89 100 dB Gain Bandwidth Product AV = 40dB 0.9 1.4 MHz Power Bandwidth VO(P-P)= 28V 13.6 kHz Full temp range, R = 2 kΩ, L Phase Margin 65 ° C = 100pF L 4 PA75U Rev I

PA75 OUTPUT Parameter Test Conditions Min Typ Max Units Current, peak 1.5 A Slew Rate 1 1.4 V/µs Voltage Swing Full Temp Range, IO = 100mA |VS| - 1.1 |VS| - 0.8 V Voltage Swing Full Temp Range, IO = 1A |VS| - 1.8 |VS| - 1.4 V A = 1, R =50 Ω, V = 0.5V , V 2 O RMS Harmonic Distortion 0.02 % ƒ = 1 kHz POWER SUPPLY Parameter Test Conditions Min Typ Max Units Voltage, V 1 5 30 40 V SS Current, quiescent, total 8 10 mA 1. +V and –V denote the positive and negative supply rail respectively. V denotes the total rail-to-rail supply voltage. S S SS THERMAL Parameter Test Conditions Min Typ Max Units Resistance, DC, junction to case 5.84 6.42 °C/W (single) Resistance, AC, junction to case 4.38 4.81 °C/W (single) Resistance, DC, junction to case 3.97 4.36 °C/W (both) Resistance, AC, junction to case 2.98 3.27 °C/W (both) Resistance, junction to air (CD, CX) 60 °C/W Resistance, junction to air (CC) 1 27 °C/W Temperature Range, case Meets full range specs -25 +85 °C 1. Heat tab attached to 3/32” FR-4 board with 2oz. copper. Topside copper area (heat tab directly attached) = 1000 sq. mm, backside copper area = 2500 sq. mm, board area = 2500 sq. mm. PA75U Rev I 5

PA75 TYPICAL PERFORMANCE GRAPHS Figure 4: Quiescent Current Figure 5: Bias Current 48 160 2.5 ) 40 120 X 2 VS C) B( ge (V)32 T 80 e, T (°C rent, I 1.5 ta C ur ur pply Vol24 40mperat d Bias C 1 tal Su16 0 ase Te malize 0.5 To 8 -40C or 0 N 0 -80 -0.5 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 -100 -50 0 50 100 150 Normalized Quiescent Current, I Case Temperature, T (°C) Q C Figure 6: Offset Voltage Figure 7: Phase Margin vs. Output Load Capacitance 3 +V = +15V ) 65 -VS = -15V X (S 2.5 R S= 2 k(cid:591) (cid:115)O AL = -100 (cid:258)(cid:336)(cid:286)(cid:853)(cid:3) 2 (cid:711)(cid:3)(cid:894)(cid:931)(cid:895) 55 V (cid:381)(cid:367)(cid:410) n, (cid:115) gi (cid:286)(cid:410)(cid:3) 1.5 ar (cid:400) M 45 (cid:75)(cid:299) e s (cid:282)(cid:3) 1 a (cid:286) h (cid:460) P (cid:258)(cid:367)(cid:349) 35 (cid:373) 0.5 (cid:396) (cid:381) (cid:69) 25 0 0.0 0.4 0.8 1.2 1.6 2.0 -100 -50 0 50 100 150 Output Load Capacitance C (nF) Temperature, T (°C) L C 6 PA75U Rev I

PA75 Figure 8: Voltage Gain & Phase vs. Figure 9: Output Voltage Swing Frequency 2 60 Phase 90 1.8 ) V ( 1.6 y pl p 1.4 40 Gain 100 u B) (cid:894)(cid:931)(cid:895) m S 1.2 d (cid:711)(cid:3) ( o A e, Fr 1 n, 20 110as p Gai Ph Dro 0.8 e 0.6 g 0 +VS = +15V 120 olta 0.4 -V = -15V V S R = 2K 0.2 L -20 130 0 1k 10k 100k 1M 10M 0.1 0.3 0.5 0.7 0.9 Frequency, F (Hz) Output Current, I (A) o Figure 10: Pulse Response Figure 11: Pulse Response 10 10 8 8 +V = +15V S +V = +15V A = +1 6 S 6 V A = +1 V = 10Vp V) V V) IN ( 4 V = 10Vp ( 4 O IN O V V e, 2 e, 2 g g a a t 0 t 0 ol ol V V t -2 t -2 u u p -V = -15V p t -4 S t -4 u R = 20 u O L O -6 f = 20 kHz -6 -V = -15V IN S f = 1 kHz -8 -8 IN -10 -10 0 10 20 30 40 50 60 70 0 200 400 600 800 1000 1200 1400 Time, t (μs) Time, t (μs) PA75U Rev I 7

PA75 SAFE OPERATING AREA (SOA) The SOA curves combine the effect of all limits for this power op amp. For a given application, the direc- tion and magnitude of the output current should be calculated or measured and checked against the SOA curves. This is simple for resistive loads but more complex for reactive and EMF generating loads. Figure 12: S0A 10.0 ) A ( S V (cid:100)(cid:449)(cid:381)(cid:3)(cid:4)(cid:373)(cid:393)(cid:367)(cid:349)(cid:302)(cid:286)(cid:396)(cid:400) (cid:882) (cid:3) (cid:381)(cid:396) (cid:62)(cid:381)(cid:258)(cid:282)(cid:286)(cid:282) (cid:24)(cid:18)(cid:853)(cid:3)(cid:100) = 25°C (cid:3) C S V (cid:75)(cid:374)(cid:286)(cid:3)(cid:4)(cid:373)(cid:393)(cid:367)(cid:349)(cid:302)(cid:286)(cid:396) (cid:1085) (cid:373)(cid:3) (cid:62)(cid:381)(cid:258)(cid:282)(cid:286)(cid:282) (cid:381) (cid:396) 1.0 (cid:38) (cid:3) (cid:410) (cid:374) (cid:286) (cid:396) (cid:396) (cid:437) (cid:18) (cid:3) (cid:410) (cid:437) (cid:24)(cid:18)(cid:853)(cid:3)(cid:100) = 85°C (cid:393) C (cid:410) (cid:437) (cid:75) 0.1 1 10 100 (cid:94)(cid:437)(cid:393)(cid:393)(cid:367)(cid:455)(cid:3)(cid:410)(cid:381)(cid:3)(cid:75)(cid:437)(cid:410)(cid:393)(cid:437)(cid:410)(cid:3)(cid:24)(cid:349)(cid:299)(cid:286)(cid:396)(cid:286)(cid:374)(cid:415)(cid:258)(cid:367)(cid:853)(cid:3)V -V (V) S OUT 8 PA75U Rev I

PA75 GENERAL Please read Application Note 1 “General Operating Considerations” which covers stability, supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexana- log.com for Apex Microtechnology’s complete Application Notes library, Technical Seminar Workbook, and Evaluation Kits. TYPICAL APPLICATION Combining the power op amp (primary channel A) and the unity gain buffer (follower channel B) in a par- allel connection yields a single 2.5A amplifier. RI and RF can set up channel A for the required gain for the overall circuit. Small values of R (sense resistors) are used on the outputs to improve current sharing charac- S teristics. The primary amplifier can be configured in inverting or non-inverting gain configurations. Figure 13: Typical Application STABILITY CONSIDERATIONS All monolithic power op amps use output stage topologies that present special stability problems. This is primarily due to non-complementary (both devices are NPN) output stages with a mismatch in gain and phase response for different polarities of output current. It is difficult for the op amp manufacturer to opti- mize compensation for all operating conditions. For applications with load current exceeding 300mA, oscilla- tion may appear. The oscillation may occur only with the output voltage swing at the negative or positive half cycle. Under most operating and load conditions acceptable stability can be achieved by providing a series RC snubber network connected from the output to ground. The recommended component values of the net- work are, R = 10 Ω and C = 0.01µF. Please refer to Application Note 1 for further details. SN SN PA75U Rev I 9

PA75 Figure 14: Stability THERMAL CONSIDERATIONS The PA75CD and CX have a large exposed copper heat tab to which the monolithic is directly attached. The PA75CD and CX may require an electrically insulating thermal washer, since the tab is directly tied to -V . S This can result in a thermal impedance R of up to 1°C/W or greater. CS The PA75CC has a large exposed integrated copper heatslug to which the monolithic is directly attached. The solder connection of the heatslug to a minimum of 1 square inch foil area of the printed circuit board will result in thermal performance of 25°C/W junction to air rating of the PA75CC. Solder connection to an area of 1 to 2 square inches of foil is required for minimal power applications. Where the PA75CC is used in higher power applications, it is necessary to use surface mount techniques of heatsinking. Surface mount techniques include the use of a surface mount fan in combination with a sur- face mount heatsink on the backside of the FR4/ PC board with through hole thermal vias. Other highly ther- mal conductive substrate board materials are available for maximum heat sinking. 10 PA75U Rev I

PA75 Figure 15: Power Derating 35 (cid:100)(cid:449)(cid:381)(cid:3)(cid:4)(cid:373)(cid:393)(cid:367)(cid:349)(cid:302)(cid:286)(cid:396)(cid:400) (cid:895) (cid:116) 30 Loaded (cid:894) (cid:87)(cid:3) (cid:374)(cid:853)(cid:3) 25 (cid:381) (cid:415) (cid:75)(cid:374)(cid:286)(cid:3)(cid:4)(cid:373)(cid:393)(cid:367)(cid:349)(cid:302)(cid:286)(cid:396) (cid:258) (cid:393) Loaded (cid:400)(cid:349) 20 (cid:400) (cid:24)(cid:349) (cid:286)(cid:396)(cid:3) 15 (cid:449) (cid:381) (cid:87) (cid:258)(cid:367)(cid:3) 10 (cid:374) (cid:396) (cid:286) 5 (cid:410) (cid:374) (cid:47) 0 0 25 50 75 100 125 Case Temperature, T (°C) C MOUNTING PRECAUTIONS 1. Always use a heat sink. Even unloaded the PA75 can dissipate up to 0.4 Watts. 2. Avoid bending the leads. Such action can lead to internal damage. 3. Always fasten the tab of the CD and CX package to the heat sink before the leads are soldered to fixed ter- minals. 4. Strain relief must be provided if there is any probability of axial stress to the leads. PA75U Rev I 11

PA75 PACKAGE OPTIONS Part Number Apex Package Style Description PA75CD CD 7-pin TO-220 PA75CX CX 7-pin TO-220 w/ staggered leads PA75CC CC 7-pin surface mount DDPAK PACKAGE STYLE CD 12 PA75U Rev I

PA75 PACKAGE STYLE CX PA75U Rev I 13

PA75 PACKAGE STYLE CC NEED TECHNICAL HELP? CONTACT APEX SUPPORT! For all Apex Microtechnology product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact apex.support@apexanalog.com. International customers can also request support by contacting their local Apex Microtechnology Sales Representative. To find the one nearest to you, go to www.apexanalog.com IMPORTANT NOTICE Apex Microtechnology, Inc. has made every effort to insure the accuracy of the content contained in this document. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (expressed or implied). Apex Microtechnology reserves the right to make changes without further notice to any specifications or products mentioned herein to improve reliability. This document is the property of Apex Microtechnology and by furnishing this information, Apex Microtechnology grants no license, expressed or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Apex Microtechnology owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Apex Microtechnology integrated circuits or other products of Apex Microtechnology. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. APEX MICROTECHNOLOGY PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN PRODUCTS USED FOR LIFE SUPPORT, AUTOMOTIVE SAFETY, SECURITY DEVICES, OR OTHER CRITICAL APPLICATIONS. PRODUCTS IN SUCH APPLICATIONS ARE UNDERSTOOD TO BE FULLY AT THE CUSTOMER OR THE CUSTOMER’S RISK. Apex Microtechnology, Apex and Apex Precision Power are trademarks of Apex Microtechnology, Inc. All other corporate names noted herein may be trademarks of their respective holders. 14 PA75U Rev I