PA10 • PA10A RoHS Power Operational Amplifier COMPLIANT FEATURES • Gain Bandwidth Product — 4 MHz • Temperature Range — –55 to +125°C (PA10A) • Excellent Linearity — Class A/B Output • Wide Supply Range — ±10V to ±50V • High Output Current — ±5A Peak APPLICATIONS • Motor, Valve and Actuator Control • Magnetic Deflection Circuits up to 4A • Power Transducers up to 100 kHz • Temperature Control up to 180W • Programmable Power Supplies up to 90V • Audio Amplifiers up to 60W RMS DESCRIPTION The PA10 and PA10A are high voltage, high output current operational amplifiers designed to drive resis- tive, inductive and capacitive loads. For optimum linearity, the output stage is biased for class A/B operation. The safe operating area (SOA) can be observed for all operating conditions by selection of user programma- ble current limiting resistors. Both amplifiers are internally compensated for all gain settings. For continuous operation under load, a heatsink of proper rating is recommended. This hybrid integrated circuit utilizes thick film (cermet) resistors, ceramic capacitors and semiconductor chips to maximize reliability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 8-pin TO-3 package is hermetically sealed and electrically isolated. The use of compressible isolation washers voids the warranty. © Apex Microtechnology Inc. July 2019 www.apexanalog.com All rights reserved PA10U Rev Y

PA10 • PA10A Figure 1: Equivalent Schematic (cid:22) (cid:52)(cid:21)(cid:36) (cid:39)(cid:20) (cid:52)(cid:21)(cid:37) (cid:52)(cid:20) (cid:21) (cid:52)(cid:22) (cid:52)(cid:23) (cid:20) (cid:26) (cid:52)(cid:24) (cid:27) (cid:23) (cid:52)(cid:25)(cid:37) (cid:36)(cid:20) (cid:52)(cid:25)(cid:36) (cid:24) (cid:38)(cid:20) (cid:25) TYPICAL CONNECTION Figure 2: Typical Connection M M M M 2 PA10U Rev Y

PA10 • PA10A PINOUT AND DESCRIPTION TABLE Figure 3: External Connections M M Pin Number Name Description 1 OUT The output. Connect this pin to load and to the feedback resistors. Connect to the current limit resistor. Output current flows into/out of these pins 2 +LIM through R . The output pin and the load are connected to the other side of R . LIM LIM+ 3 +V The positive supply rail. S 4 +IN The non-inverting input. 5 -IN The inverting input. 6 -V The negative supply rail. S The foldover current limit. Connect to ground if desired. See “Current Limiting” sec- 7 FO tion. Connect to the current limit resistor. Output current flows into/out of these pins 8 -LIM through R . The output pin and the load are connected to the other side of R . LIM LIM- PA10U Rev Y 3

PA10 • PA10A SPECIFICATIONS The power supply voltage for all tests is ±40V, unless otherwise noted as a test condition. Full temperature range specifications are guaranteed but not tested. ABSOLUTE MAXIMUM RATINGS Parameter Symbol Min Max Units Supply Voltage, total +Vs to -Vs 100 V Output Current, within SOA IOUT 5 A Power Dissipation, internal PD 67 W Input Voltage, differential VIN (Diff) ±37 V Input Voltage, common mode VCM ±VS VS Temperature, pin solder, 10s max. 350 °C Temperature, junction 1 TJ 200 °C Temperature Range, storage -65 +150 °C Operating Temperature Range, case TC -55 +125 °C 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dis- sipation to achieve high MTTF. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do CAUTION not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes. 4 PA10U Rev Y

PA10 • PA10A INPUT PA10 PA10A Test Parameter Units Conditions Min Typ Max Min Typ Max Offset Voltage, initial TC = 25°C ±2 ±6 ±1 ±4 mV Offset Voltage vs. temperature Full temp range ±10 ±65 * ±40 µV/°C Offset Voltage vs. supply TC = 25°C ±30 ±200 * * µV/V Offset Voltage vs. power TC = 25°C ±20 * µV/W Bias Current, initial TC = 25°C 12 30 10 20 nA Bias Current vs. temperature Full temp range ±50 ±500 * * pA/°C Bias Current vs. supply TC = 25°C ±0.10 * pA/V Offset Current, initial TC = 25°C ±12 ±30 ±5 ±10 nA Offset Current vs. temperature Full temp range ±50 * pA/°C Input Impedance, DC TC = 25°C 200 * MΩ Input Capacitance TC = 25°C 3 * pF Common Mode Voltage Range 1 Full temp range ±VS–5 ±VS–3 * * V Full temp range, Common Mode Rejection, DC 1 74 100 * * dB V = ±V –6V CM S 1. +V and –V denote the positive and negative supply rail respectively. Total V is measured from +V to –V . S S S S S GAIN PA10 PA10A Test Parameter Units Conditions Min Typ Max Min Typ Max T = 25°C, C Open Loop Gain @ 10 Hz 110 * dB 1 kΩ load Full temp range, Open Loop Gain @ 10 Hz 96 108 * * dB 15 Ω load T = 25°C, C Gain Bandwidth Product @ 1 MHz 4 * MHz 15 Ω load T = 25°C, C Power Bandwidth 10 15 * * kHz 15 Ω load Full temp range, Phase Margin 35 * ° 15 Ω load PA10U Rev Y 5

PA10 • PA10A OUTPUT PA10 PA10A Test Parameter Units Conditions Min Typ Max Min Typ Max T =25°C, Voltage Swing 1 C ±VS – 8 ±VS – 5 ±VS – 6 * V I =5A OUT Full temp range, Voltage Swing 1 I = 2A ±VS – 6 * V OUT Full temp range, Voltage Swing 1 I = 80mA ±VS – 5 * V OUT Current, peak TC = 25°C 5 * A Settling Time to 0.1% TC=25°C, 2V step 2 * µs Slew Rate TC = 25°C 2 3 * * V/µs Full temp range, Capacitive Load 0.68 * nF A = 1 V Full temp range, Capacitive Load 10 * nF A = 2.5 V Full temp range, Capacitive Load SOA * A > 10 V 1. +V and –V denote the positive and negative supply rail respectively. Total V is measured from +V to –V . S S S S S POWER SUPPLY PA10 PA10A Test Parameter Units Conditions Min Typ Max Min Typ Max Voltage Full temp range ±10 ±40 ±45 * * ±50 V Current, quiescent TC = 25°C 8 15 30 * * * mA THERMAL PA10 PA10A Test Parameter Units Conditions Min Typ Max Min Typ Max T =-55 to 125°C, Resistance, AC, junction to case 1 C 1.9 2.1 * * °C/W F > 60 Hz Resistance, DC, junction to case TC = -55 to 125°C 2.4 2.6 * * °C/W Resistance, junction to air TC= -55 to 125°C 30 * °C/W Meets full range Temperature Range, case -25 +85 -55 +125 °C specs 1. Rating applies if the output current alternates between both output transistors at a rate faster than 60 Hz. Note: *The specification of PA10A is identical to the specification for PA10 in applicable column to the left. 6 PA10U Rev Y

PA10 • PA10A TYPICAL PERFORMANCE GRAPHS Figure 4: Power Derating Figure 5: Bias Current 70 2.5 (cid:895) (cid:116) 60 ) 2.2 (cid:894) X (cid:87)(cid:3) T = T (B (cid:374)(cid:853)(cid:3) 50 C t, I 1.9 (cid:381) n (cid:415) e (cid:258) r (cid:400)(cid:349)(cid:393) 40 Cur 1.6 (cid:24)(cid:349)(cid:400) as (cid:396)(cid:3) 30 Bi 1.3 (cid:449)(cid:286) d (cid:381) PA10 PA10A ze (cid:258)(cid:367)(cid:3)(cid:87) 20 mali 1.0 (cid:374) (cid:410)(cid:286)(cid:396) 10 T = T Nor 0.7 (cid:374) A (cid:47) 0 0.4 0 20 40 60 80 100 120 140 -50 -25 0 25 50 75 100 125 Temperature, T (°C) Case Temperature, T (°C) C Figure 6: Small Signal Response Figure 7: Phase Response 120 0 -20 100 B) -40 d ( 80 OL -60 ain, A 60 ) (cid:711)(cid:3)(cid:894)(cid:931) -80 G e op 40 has -100 o P n L -120 e 20 p O -140 0 -160 -20 -180 1 10 100 1K 10K 0.1M 1M 10M 1 10 100 1K 10K 0.1M 1M 10M Frequency, F (Hz) Frequency, F (Hz) PA10U Rev Y 7

PA10 • PA10A Figure 8: Current Limit Figure 9: Power Response 3.5 100 |+V | + |–V | = 100V S S 68 3.0 )P |+V | + |–V | = 80V P- S S V 46 t, I(A)LIM 22..50 RLIM(cid:3)(cid:1089)(cid:3)(cid:1004)(cid:856)(cid:1007)(cid:3)(cid:591) e, V(OUT 32 mi ag 22 rent Li 1.5 RLIM(cid:3)(cid:1089)(cid:3)(cid:1004)(cid:856)(cid:1010)(cid:3)(cid:591) ut Volt 15 |+VS | + |–VS | = 30V ur 1.0 p C ut 10 O 0.5 6.8 0 4.6 -50 -25 0 25 50 75 100 125 10k 20k 30k 50k 70k 0.1M Case Temperature, T (°C) Frequency, F (Hz) C Figure 10: Common Mode Rejection Figure 11: Pulse Response 120 8 (cid:895) (cid:17) V = ±5V, t = 100ns (cid:282) 6 IN r (cid:90)(cid:3)(cid:894) 100 ) (cid:68) V ( 4 (cid:18) T (cid:374)(cid:853)(cid:3) 80 VOU (cid:415)(cid:381) e, 2 (cid:272) g (cid:286) a (cid:286)(cid:361) 60 tl 0 (cid:90) o (cid:282)(cid:286)(cid:3) t V -2 (cid:68)(cid:381) 40 pu t (cid:374)(cid:3) Ou -4 (cid:381) (cid:373) 20 (cid:373) -6 (cid:381) (cid:18) 0 -8 0 10 100 1k 10k 0.1M 1M 0 2 4 6 8 10 12 Frequency, F (Hz) Time, t (μs) 8 PA10U Rev Y

PA10 • PA10A Figure 12: Input Noise Figure 13: Harmonic Distortion 100 3 A = 10 ) V (cid:115)(cid:876)(cid:3)(cid:1103)(cid:44)(cid:460) 70 1 RVLS(cid:3) (cid:1089) (cid:3)=(cid:1012) ±(cid:3)(cid:591)38V (cid:374) 50 ( 0.3 VN (cid:1081)(cid:895) W e, 40 (cid:374)(cid:3)(cid:894) 0 m ag (cid:415)(cid:381) 0.1 = 5 W otl 30 (cid:381)(cid:396) P O = 2 oise V 20 (cid:24)(cid:349)(cid:400)(cid:410) 0.03 P O = 60 W N P O t u 0.01 p n I 10 0.003 10 100 1k 10k 100k 100 300 1k 3k 10k 30k 0.1M Frequency, F (Hz) Frequency, F (Hz) Figure 14: Quiescent Current Figure 15: Output Voltage Swing 1.6 6 ) X ( ent, IQ 1.4 TC = -25°C ply (V) 5 T C = 2 5 ° C t Curr 1.2 m Sup 4 –V OUT T = 2 5 ° t o 8 5 ° C malized Quiescen 100...086 TTTCCC === 821552°°5CC°C oltage Drop Fro 32 +V OUT T TC C=C =2 52°5 t°oC 8 5 ° C V r o N 0.4 1 40 50 60 70 80 90 100 0 1 2 3 4 5 Total Supply Voltage, V (V) Output Current, I (A) S OUT PA10U Rev Y 9

PA10 • PA10A SAFE OPERATING AREA (SOA) The output stage of most power amplifiers has three distinct limitations: 1. The current handling capability of the transistor geometry and the wire bonds. 2. The second breakdown effect which occurs whenever the simultaneous collector current and collector- emitter voltage exceeds specified limits. 3. The junction temperature of the output transistors. The SOA curves combine the effect of these limits. For a given application, the direction and magnitude of the output current should be calculated or measured and checked against the SOA curves. This is simple for resistive loads but more complex for reactive and EMF generating loads. 1. For DC outputs, especially those resulting from fault conditions, check worst case stress levels against the SOA graph. Make sure the load line does not cross the 0.5ms limit and that excursions beyond any other second breakdown line do not exceed the time label, and have a duty cycle of no more than 10%. A Spice type analysis can be very useful in that a hardware setup often calls for instruments or amplifiers with wide common mode rejection ranges. Please refer to Application Notes, AN01 and AN22 for detailed information regarding SOA considerations. 2. The amplifier can handle any EMF generating or reactive load and short circuits to the supply rail or shorts to common if the current limits are set as follows at T = 85°C: C Short to ±V ±V S Short to Common S C, L, or EMF Load 50V 0.21A 0.61A 40V 0.3A 0.87A 35V 0.36A 1.0A 30V 0.46A 1.4A 25V 0.61A 1.7A 20V 0.87A 2.2A 15V 1.4A 2.9A 10 PA10U Rev Y

PA10 • PA10A Figure 16: SOA 5.0 T ) 4.0 C = (cid:410)(cid:3) (AS 3.0 85°C(cid:400)(cid:410) (cid:1089)(cid:3)(cid:1009)(cid:373)(cid:410)(cid:3)(cid:1089)(cid:3)(cid:410)(cid:3)(cid:1089)(cid:3) V(cid:3)(cid:381)(cid:396)(cid:3)(cid:882)S 2.0 (cid:100)(cid:44)(cid:28)TC(cid:90) = 125°C(cid:286)(cid:258)(cid:282)(cid:455)(cid:3)(cid:400)(cid:410)(cid:258)(cid:410)(cid:400) (cid:1005)(cid:373)(cid:400)(cid:1004)(cid:856)(cid:1009)(cid:373)(cid:400) V(cid:1085) 1.5 (cid:68)(cid:4)(cid:62) (cid:286)(cid:3)(cid:94) (cid:28) (cid:373)(cid:3) (cid:18) (cid:75) (cid:381) (cid:69) (cid:396) 1.0 (cid:24)(cid:3) (cid:38) (cid:17) (cid:410)(cid:3) 0.8 (cid:90)(cid:28) (cid:374) (cid:4) (cid:286) (cid:60) (cid:396) 0.6 (cid:24) (cid:396) (cid:75) (cid:437) (cid:116) (cid:18) (cid:69) (cid:410)(cid:3) 0.4 (cid:437) (cid:393) (cid:410) (cid:437) 0.3 (cid:75) 0.2 10 15 20 25 30 40 50 60 80 100 (cid:94)(cid:437)(cid:393)(cid:393)(cid:367)(cid:455)(cid:3)(cid:410)(cid:381)(cid:3)(cid:75)(cid:437)(cid:410)(cid:393)(cid:437)(cid:410)(cid:3)(cid:24)(cid:349)(cid:299)(cid:286)(cid:396)(cid:286)(cid:374)(cid:415)(cid:258)(cid:367)(cid:3)V -V (V) S OUT GENERAL Please read Application Note 1 “General Operating Considerations” which covers stability, supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexana- log.com for Apex Microtechnology’s complete Application Notes library, Technical Seminar Workbook, and Evaluation Kits. TYPICAL APPLICATION DC and low distortion AC current waveforms are delivered to a grounded load by using matched resistors (A and B sections) and taking advantage of the high common mode rejection of the PA10. Foldover current limit is used to modify current limits based on output voltage. When load resistance drops to 0, the current is limited based on output voltage. When load resistance drops to 0, the current limit is 0.79A resulting in an internal dissipation of 33.3W. When output voltage increases to 36V, the current limit is 1.69A. Refer to Application Note 9 on foldover limiting for details. PA10U Rev Y 11

PA10 • PA10A Figure 17: Typical Application (Voltage-to-Current Conversion) CURRENT LIMITING Refer to Application Note 9, “Current Limiting”, for details of both fixed and foldover current limit opera- tion. Beware that current limit should be thought of as a +/–20% function initially and varies about 2:1 over the range of –55°C to 125°C. For fixed current limit, leave pin 7 open and use equations 1 and 2. 1. 0.65V R  = ------------------- LIM I A LIM 2. 0.65V I A = ---------------------- LIM R  LIM Where: I is the current limit in amperes. LIM R is the current limit resistor in ohms. LIM For certain applications, foldover current limit adds a slope to the current limit which allows more power to be delivered to the load without violating the SOA. For maximum foldover slope, ground pin 7 and use equations 3 and 4. 3. 0.65V+V 0.014 I A = ----------------------------O----U---T---------------------- LIM R  LIM 4. 0.65V+Vo0.014 R  = -------------------------------------------------- LIM I A LIM Where: V is the output voltage in volts. OUT 12 PA10U Rev Y

PA10 • PA10A Most designers start with either equation 1 to set R for the desired current at 0V out, or with equation LIM 4 to set R at the maximum output voltage. Equation 3 should then be used to plot the resulting foldover LIM limits on the SOA graph. If equation 3 results in a negative current limit, foldover slope must be reduced. This can happen when the output voltage is the opposite polarity of the supply conducting the current. In applications where a reduced foldover slope is desired, this can be achieved by adding a resistor (R ) FO between pin 7 and ground. Use equations 4 and 5 with this new resistor in the circuit. 5. V 0.14 0.65V+-----O----U----T----------------- 10.14+R I A = ---------------------------------------------F----O-- LIM R  LIM 6. V 0.14 0.65V+-----O----U----T----------------- 10.14+R R  = ---------------------------------------------F----O-- LIM I A LIM Where: R is in K ohms. FO PA10U Rev Y 13

PA10 • PA10A PACKAGE OPTIONS PACKAGE STYLE CE NEED TECHNICAL HELP? CONTACT APEX SUPPORT! For all Apex Microtechnology product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact apex.support@apexanalog.com. International customers can also request support by contacting their local Apex Microtechnology Sales Representative. To find the one nearest to you, go to www.apexanalog.com IMPORTANT NOTICE Apex Microtechnology, Inc. has made every effort to insure the accuracy of the content contained in this document. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (expressed or implied). Apex Microtechnology reserves the right to make changes without further notice to any specifications or products mentioned herein to improve reliability. This document is the property of Apex Microtechnology and by furnishing this information, Apex Microtechnology grants no license, expressed or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Apex Microtechnology owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Apex Microtechnology integrated circuits or other products of Apex Microtechnology. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. APEX MICROTECHNOLOGY PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN PRODUCTS USED FOR LIFE SUPPORT, AUTOMOTIVE SAFETY, SECURITY DEVICES, OR OTHER CRITICAL APPLICATIONS. PRODUCTS IN SUCH APPLICATIONS ARE UNDERSTOOD TO BE FULLY AT THE CUSTOMER OR THE CUSTOMER’S RISK. Apex Microtechnology, Apex and Apex Precision Power are trademarks of Apex Microtechnology, Inc. All other corporate names noted herein may be trademarks of their respective holders. 14 PA10U Rev Y