PA07 • PA07A RoHS FET Input Operational Amplifier COMPLIANT FEATURES • Low Bias Current — FET Input • Protected Output Stage — Thermal Shutoff • Excellent Linearity — Class A/B Output • Wide Supply Range — ±12V to ±50V • High Output Current — ±5A Peak APPLICATIONS • Motor, Valve, and Actuator Control • Magnetic Deflection Circuits up to 4A • Power Transducers up to 100 kHz • Temperature Control up to 180W • Programmable Power Supplies up to 90V • Audio Amplifiers up to 60W RMS DESCRIPTION The PA07 is a high voltage, high output current operational amplifier designed to drive resistive, inductive and capacitive loads. For optimum linearity, especially at low levels, the output stage is biased for class A/B operation using a thermistor compensated base-emitter voltage multiplier circuit. A thermal shutoff circuit protects against overheating and minimizes heatsink requirements for abnormal operating conditions. The safe operating area (SOA) can be observed for all operating conditions by selection of user programmable current limiting resistors. Both amplifiers are internally compensated for all gain settings. For continuous operation under load, a heatsink of proper rating is recommended. This hybrid circuit utilizes thick film (cermet) resistors, ceramic capacitors and semiconductor chips to maximize reliability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 8-pin TO-3 package is hermetically sealed and electrically isolated. The use of compressible washers and/or improper mounting torque will void the product warranty. Please see Application Note 1, “General Operating Considerations.” © Apex Microtechnology Inc. Aug 2015 www.apexanalog.com All rights reserved PA07U Rev U

PA07 • PA07A TYPICAL CONNECTION Figure 1: Typical Connection Note: Input offset voltage trim optional. R = 10 kΩ MAX T 2 PA07U Rev U

PA07 • PA07A PINOUT AND DESCRIPTION TABLE Figure 2: External Connections Pin Number Name Description 1 OUT The output. Connect this pin to load and to the feedback resistors. Connect to the current limit resistor. Output current flows into/out of these pins 2 +CL through R . The output pin and the load are connected to the other side of R . CL CL+ 3 +Vs The positive supply rail. 4 +IN The non-inverting input. 5 -IN The inverting input. 6 -Vs The negative supply rail. 7 BAL Balance Control pin. Adjusts voltage offset. See applicable section. Connect to the current limit resistor. Output current flows into/out of these pins 8 -CL through R . The output pin and the load are connected to the other side of R . CL CL- PA07U Rev U 3

PA07 • PA07A SPECIFICATIONS The power supply voltage for all specifications is the TYP rating unless otherwise noted as a test condition. ABSOLUTE MAXIMUM RATINGS Parameter Symbol Min Max Units Supply Voltage, total +V to -V 100 V s s Output Current, within SOA I 5 A O Power Dissipation, internal 1 PD 67 W Input Voltage, differential V ±50 V IN (Diff) Input Voltage, common mode V ±V V cm S Temperature, pin solder, 10s max. 350 °C Temperature, junction 1 TJ 200 °C Temperature Range, storage -65 +150 °C Operating Temperature Range, case T -55 +125 °C C 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dis- sipation to achieve high MTTF. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do CAUTION not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes. INPUT PA07 PA07A Test Parameter Units Conditions Min Typ Max Min Typ Max Offset Voltage, initial T = 25°C 0.5 ±2 ±0.25 ±0.5 mV C Offset Voltage vs. Temperature Full temp range 10 30 5 10 µV/°C Offset Voltage vs. Supply T = 25°C 8 * µV/V C Offset Voltage vs. Power Full temp range 20 10 µV/W Bias Current, initial 1 TC = 25°C 5 50 3 10 pA Bias Current vs. Supply T = 25°C 0.01 * pA/V C Offset Current, initial 1 TC = 25°C 2.5 50 1.5 10 pA Input Impedance, DC TC = 25°C 1011 * Ω Input Capacitance T = 25°C 4 * pF C Common Mode Voltage Range 2 Full temp range ±VS–10 * V Full temp range, Common Mode Rejection, DC 120 * dB V = ±20V CM 1. Doubles for every 10°C of temperature increase. 2. +V and –V denote the positive and negative supply rail respectively. Total V is measured from +V to –V . S S S S S 4 PA07U Rev U

PA07 • PA07A GAIN PA07 PA07A Test Parameter Units Conditions Min Typ Max Min Typ Max T = 25°C, C Open Loop @ 15 Hz 89 95 * * dB R = 15 Ω L T = 25°C, C Gain Bandwidth Product @ 1 MHz 1.3 * MHz R = 15 Ω L T = 25°C, C Power Bandwidth 18 * kHz R = 15 Ω L Full temp range, Phase Margin 70 * ° R = 15 Ω L OUTPUT PA07 PA07A Test Parameter Units Conditions Min Typ Max Min Typ Max Full temp range, Voltage Swing 1 I = 5A ±VS–5 * V O Full temp range, Voltage Swing 1 I = 2A ±VS–5 * V O Full temp range, Voltage Swing 1 I = 90mA ±VS–5 * V O Current, peak T = 25°C 5 * A C T = 25°C, 2V Settling Time to 0.1% C 1.5 * µs step Slew Rate T = 25°C 5 * V/µs C Capacitive Load, unity gain Full temp range, 1 * nF Capacitive Load, gain>4 Full temp range, SOA * 1. +V and –V denote the positive and negative supply rail respectively. Total V is measured from +V to –V . S S S S S POWER SUPPLY PA07 PA07A Test Parameter Units Conditions Min Typ Max Min Typ Max Voltage Full temp range ±12 ±35 ±50 * * * V Current, quiescent T = 25°C 18 30 * * mA C PA07U Rev U 5

PA07 • PA07A THERMAL PA07 PA07A Test Parameter Units Conditions Min Typ Max Min Typ Max Resistance, AC, junction to case 1 F>60 Hz 1.9 2.1 * * °C/W Resistance, DC, junction to case F<60 Hz 2.4 2.6 * * °C/W Resistance, junction to air 30 * °C/W Meets full range Temperature Range, case -25 25 +85 * * * °C specs 1. Rating applies if the output current alternates between both output transistors at a rate faster than 60 Hz. Note: *The specification of PA07A is identical to the specification for PA07 in applicable column to the left. 6 PA07U Rev U

PA07 • PA07A TYPICAL PERFORMANCE GRAPHS Figure 3: Power Derating Figure 4: Bias Current 70 256 (cid:895) (cid:116) (cid:87)(cid:3)(cid:894) 60 T = T (X)B 64 (cid:374)(cid:853)(cid:3) 50 C t, I (cid:381) n (cid:415) e 16 (cid:258) r (cid:400)(cid:349)(cid:393) 40 Cur (cid:24)(cid:349)(cid:400) as 4 (cid:396)(cid:3) 30 Bi (cid:449)(cid:286) d (cid:381) ze 1 (cid:258)(cid:367)(cid:3)(cid:87) 20 mali (cid:374) (cid:410)(cid:286)(cid:396) 10 T = T Nor 0.25 (cid:374) (cid:47) A 0 0.06 0 20 40 60 80 100 120 140 -15 5 25 45 65 85 105 Temperature, T (°C) Temperature, T (°C) C C Figure 5: Small Signal Response Figure 6: Phase Response 120 0 100 -30 ) B (d 80 -60 OL A (cid:895) n, 60 (cid:711)(cid:3)(cid:894)(cid:931) -90 Gai e, (cid:3) op 40 as -120 o h L P en 20 -150 p O 0 -180 -20 -210 1 10 100 1k 10k .1M 1M 10M 1 10 100 1k 10k .1M 1M 10M Frequency, F (Hz) (cid:38)(cid:396)(cid:286)(cid:395)(cid:437)(cid:286)(cid:374)(cid:272)(cid:455)(cid:853)(cid:3)(cid:38)(cid:3)(cid:894)(cid:44)(cid:460)(cid:895) PA07U Rev U 7

PA07 • PA07A Figure 7: Current Limit Figure 8: Power Response 3.0 100 |+V| + |-V| = 100V 68 S S 2.5 |+V| + |-V| = 70V S S A) RCL(cid:3)(cid:1089)(cid:3)(cid:1004)(cid:856)(cid:1007)(cid:3)(cid:591) V) 46 (M 2.0 V(O mit, ILI 1.5 tage, 3222 rrent Li 1.0 RCL(cid:3)(cid:1089)(cid:3)(cid:1004)(cid:856)(cid:1010)(cid:3)(cid:591) put Vol 15 u t C Ou 10 0.5 6.8 0 4.6 -50 -25 0 25 50 75 100 10k 20k 30k 50k 70k .1M Case Temperature, T (°C) Frequency, F (Hz) C Figure 9: Common Mode Rejection Figure 10: Pulse Response 120 8 (cid:895) (cid:282)(cid:17) 6 V = 5V, t = 100ns (cid:90)(cid:3)(cid:894) 100 IN r (cid:18)(cid:68) V)P-P 4 (cid:374)(cid:853)(cid:3) 80 (O (cid:381) V 2 (cid:272)(cid:415) e, (cid:286) g (cid:286)(cid:361) 60 ta 0 (cid:286)(cid:3)(cid:90) Vol (cid:381)(cid:282) 40 ut -2 (cid:68) p (cid:374)(cid:3) ut -4 (cid:381) O (cid:373) 20 (cid:373) -6 (cid:381) (cid:18) 0 -8 1 10 100 1k 10k .1M 1M 0 2 4 6 8 10 12 Frequency, F (Hz) Time, t (μs) 8 PA07U Rev U

PA07 • PA07A Figure 11: Input Noise Figure 12: Harmonic Distortion 20 10 ) G =10 (cid:460) (cid:44) 3 (cid:1103) (cid:876) (cid:115) Voltage, V((cid:374)N 106 (cid:415)(cid:381)(cid:374)(cid:853)(cid:3)(cid:100)(cid:44)(cid:24)(cid:3)(cid:894)(cid:1081)(cid:895) 0.13 P O= 500mW, W, VR S=(cid:3) L(cid:1089)2(cid:3)5(cid:1012)(cid:3)V,(cid:591) =R (cid:3)3L(cid:1089)6(cid:3)V(cid:1008)(cid:3), (cid:591)R(cid:3)L(cid:1089)(cid:3)(cid:1012)(cid:3)(cid:591) Noise 4 (cid:24)(cid:349)(cid:400)(cid:410)(cid:381)(cid:396) 0.1 P O= 5 = 60W, V S t P O u p 0.03 n I 2 0.01 10 100 1k 10k .1M 100 300 1k 3k 10k 30k .1M Frequency, F (Hz) Frequency, F (Hz) Figure 13: Quiescent Current Figure 14: Output Voltage Swing 1.6 6 ) X ) ( V rent, IQ 1.4 TC = –25C y, V(SAT 5 T C = – 2 5 ° C nt Cur 1.2 T = 25C Suppl 4 T C = 2 5 ° C esce 1.0 C rom 3 T = 85°C d Qui 0.8 TC = 85C rop F 2 C e D maliz 0.6 TC = 125C tage 1 r ol o V N 0.4 0 40 50 60 70 80 90 100 0 1 2 3 4 5 6 Total Supply Voltage, V (V) Output Current, I (A) S O PA07U Rev U 9

PA07 • PA07A SAFE OPERATING AREA (SOA) The output stage of most power amplifiers has three distinct limitations: 1. The current handling capability of the wire bonds. 2. The second breakdown effect which occurs whenever the simultaneous collector current and collector- emitter voltage exceed specified limits. 3. The junction temperature of the output transistors. The SOA curves combine the effect of these limits. For a given application, the direction and magnitude of the output current should be calculated or measured and checked against the SOA curves. This is simple for resistive loads but more complex for reactive and EMF generating loads. However, the following guidelines may save extensive analytical efforts. 1. For DC outputs, especially those resulting from fault conditions, check worst case stress levels against the SOA graph. Make sure the load line does not cross the 0.5ms limit and that excursions beyond any other second breakdown line do not exceed the time label, and have a duty cycle of no more than 10%. A Spice type analysis can be very useful in that a hardware setup often calls for instruments or amplifiers with wide common mode rejection ranges. Please refer to Application Notes, AN01 and AN22 for detailed information regarding SOA considerations. 2. The amplifier can handle any reactive or EMF generating load and short circuits to the supply rail or com- mon if the current limits are set as follows at T = 85°C: C Short to ±V ±V S Short to Common S C, L, or EMF Load 50V 0.21A 0.61A 40V 0.3A 0.87A 30V 0.46A 1.4A 20V 0.87A 2.5A 15V 1.4A 4.0A These simplified limits may be exceeded with further analysis using the operating conditions for a specific application. 3. The output stage is protected against transient flyback. However, for protection against sustained, high energy flyback, external fast-recovery diodes should be used. 10 PA07U Rev U

PA07 • PA07A Figure 15: SOA 5.0 T 4.0 c A) = 8 t V (S 3.0 5°C s = 5mt = - Tc te s 1 t or S 2.0 THE=R 125°C ady st ms = 0.5 V a m + 1.5 MAL te s S m E C o O r 1.0 N F D t 0.8 B n R E e A r 0.6 K r D u O C W t 0.4 N u p t 0.3 u O 0.2 10 15 20 25 30 40 50 60 80 100 (cid:94)(cid:437)(cid:393)(cid:393)(cid:367)(cid:455)(cid:3)(cid:410)(cid:381)(cid:3)(cid:75)(cid:437)(cid:410)(cid:393)(cid:437)(cid:410)(cid:3)(cid:24)(cid:349)(cid:299)(cid:286)(cid:396)(cid:286)(cid:374)(cid:415)(cid:258)(cid:367)(cid:853)(cid:3)V -V (V) S O PA07U Rev U 11

PA07 • PA07A GENERAL Please read Application Note 1 “General Operating Considerations” which covers stability, supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexana- log.com for Apex Microtechnology’s complete Application Notes library, Technical Seminar Workbook, and Evaluation Kits. TYPICAL APPLICATION Position is sensed by the differentially connected photo diodes, a method that negates the time and tem- perature variations of the optical components. Off center positions produce an error current which is inte- grated by the op amp circuit, driving the system back to center position. A momentary switch contact forces the system out of lock and then the integrating capacitor holds drive level while both diodes are in a dark state. When the next index point arrives, the lead network of C and R optimize system response by reducing L L overshoot. The very low bias current of the PA07 augments performance of the integrator circuit. Figure 16: Typical Application Note: Negates optoelectronic instabilities; Lead network minimizes overshoot; Sequential Position Control THERMAL SHUTDOWN PROTECTION The thermal protection circuit shuts off the amplifier when the substrate temperature exceeds approxi- mately 150°C. This allows heatsink selection to be based on normal operating conditions while protecting the amplifier against excessive junction temperature during temporary fault conditions. Thermal protection is a fairly slow-acting circuit and therefore does not protect the amplifier against transient SOA violations (areas outside of the T = 25°C boundary). It is designed to protect against short- C term fault conditions that result in high power dissipation within the amplifier. If the conditions that cause thermal shutdown are not removed, the amplifier will oscillate in and out of shutdown. This will result in high peak power stresses, will destroy signal integrity and reduce the reliability of the device. 12 PA07U Rev U

PA07 • PA07A CURRENT LIMIT Proper operation requires the use of two current limit resistors, connected as shown in the external con- nections diagram. The minimum value for R is 0.12 Ω; however, for optimum reliability it should be set as CL high as possible. Refer to Application Note 1 and 9 for current limit adjust details. 0.65V R  = ------------------- CL I A LIM PA07U Rev U 13

PA07 • PA07A PACKAGE OPTIONS Part Number Apex Package Style Description PA07 CE 8-pin TO-3 PA07A CE 8-pin TO-3 PACKAGE STYLE CE 14 PA07U Rev U

PA07 • PA07A NEED TECHNICAL HELP? CONTACT APEX SUPPORT! For all Apex Microtechnology product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact apex.support@apexanalog.com. International customers can also request support by contacting their local Apex Microtechnology Sales Representative. To find the one nearest to you, go to www.apexanalog.com IMPORTANT NOTICE Apex Microtechnology, Inc. has made every effort to insure the accuracy of the content contained in this document. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (expressed or implied). Apex Microtechnology reserves the right to make changes without further notice to any specifications or products mentioned herein to improve reliability. This document is the property of Apex Microtechnology and by furnishing this information, Apex Microtechnology grants no license, expressed or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Apex Microtechnology owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Apex Microtechnology integrated circuits or other products of Apex Microtechnology. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. APEX MICROTECHNOLOGY PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN PRODUCTS USED FOR LIFE SUPPORT, AUTOMOTIVE SAFETY, SECURITY DEVICES, OR OTHER CRITICAL APPLICATIONS. PRODUCTS IN SUCH APPLICATIONS ARE UNDERSTOOD TO BE FULLY AT THE CUSTOMER OR THE CUSTOMER’S RISK. Apex Microtechnology, Apex and Apex Precision Power are trademarks of Apex Microtechnology, Inc. All other corporate names noted herein may be trademarks of their respective holders. PA07U Rev U 15