Product Sample & Technical Tools & Support & Folder Buy Documents Software Community OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 OPAx835 Ultra-Low-Power, Rail-to-Rail Out, Negative Rail In, VFB Op Amp 1 Features For battery-powered, portable applications where power is of key importance, the low power • Ultra-LowPower 1 consumption and high-frequency performance of the – SupplyVoltage:2.5Vto5.5V OPA835 and OPA2835 devices offers performance – QuiescentCurrent:250 µA/ch(Typical) versus power that is not attainable in other devices. Coupled with a power-savings mode to reduce – PowerDownMode:0.5 µA(Typical) current to < 1.5 μA, these devices offer an attractive • Bandwidth:56MHz(AV=1V/V) solution for high-frequency amplifiers in battery- • SlewRate:160V/µs poweredapplications. • RiseTime:10ns(2VSTEP) The OPA835 RUN package option includes • SettlingTime(0.1%):55ns(2V ) integrated gain-setting resistors for the smallest STEP possible footprint on a printed-circuit-board • OverdriveRecoveryTime:200ns (approximately 2.00 mm × 2.00 mm). By adding • SNR:0.00015%(–116.4dBc)at1kHz(1V ) RMS circuit traces on the PCB, gains of +1, –1, –1.33, +2, • THD:0.00003%(–130dBc)at1kHz(1V ) +2.33, –3, +4, –4, +5, –5.33, +6.33, –7, +8 and RMS inverting attenuations of –0.1429, –0.1875, –0.25, • HD /HD :–70dBc/–73dBcat1MHz(2V ) 2 3 PP –0.33, –0.75 can be achieved. See Table 3 and • InputVoltageNoise:9.3nV/√Hz(f=100kHz) Table4fordetails. • InputOffsetVoltage:100µV(±500-µVMaximum) The OPA835 and OPA2835 devices are • CMRR:113dB characterized for operation over the extended • OutputCurrentDrive:40mA industrialtemperaturerangeof –40°Cto+125°C. • RRO:Rail-to-RailOutput DeviceInformation(1) • InputVoltageRange:–0.2Vto3.9V (5-VSupply) PARTNUMBER PACKAGE BODYSIZE(NOM) SOT-23(6) 2.90mm×1.60mm • OperatingTemperatureRange: OPA835 –40°Cto+125°C QFN(10) 2.00mm×2.00mm SOIC(8) 4.90mm×3.91mm 2 Applications VSSOP(10) 3.00mm×3.00mm OPA2835 UQFN(10) 2.00mm×2.00mm • Low-PowerSignalConditioning QFN(10) 2.00mm×2.00mm • AudioADCInputBuffer • Low-PowerSARandΔΣ ADCDriver (1) Forallavailablepackages,seethepackageoptionaddendum attheendofthedatasheet. • PortableSystems • Low-PowerSystems HarmonicDistortionvsFrequency • High-DensitySystems -30 • UltrasonicFlowMeter -40 VGS == 1 5, V, -50 VOUT= 2 Vpp, 3 Description RF= 0W, Bc -60 RL= 2 kW TsihnegleOPaAn8d35duaanlduOltPraA-l2o8w3-5podweevri,cersai(l-OtoP-rAaxil83o5u)tpaurte, on - d -70 negative-rail input, voltage-feedback (VFB) orti -80 operational amplifiers designed to operate over a Dist -90 HD2 c power supply range of 2.5-V to 5.5-V with a single ni -100 o sCuopnpsluy,mionrg±o1n.l2y52-V50tµoA±p2e.7r5c-hVanwniethl aanddwuaitlhsauupnpiltyy. Harm -110 HD3 -120 gain bandwidth of 56 MHz, these amplifiers set an -130 industry-leading performance-to-power ratio for rail- to-railamplifiers. -140 10k 100k 1M 10M f - Frequency - Hz 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Table of Contents 1 Features.................................................................. 1 8.2 FunctionalBlockDiagram.......................................25 2 Applications........................................................... 1 8.3 FeatureDescription.................................................25 3 Description............................................................. 1 8.4 DeviceFunctionalModes........................................28 4 RevisionHistory..................................................... 2 9 ApplicationandImplementation........................ 31 9.1 ApplicationInformation............................................31 5 OPA835-RelatedDevices...................................... 5 9.2 TypicalApplication..................................................37 6 PinConfigurationandFunctions......................... 5 10 PowerSupplyRecommendations..................... 41 7 Specifications......................................................... 7 11 Layout................................................................... 41 7.1 AbsoluteMaximumRatings......................................7 11.1 LayoutGuidelines.................................................41 7.2 ESDRatings..............................................................7 11.2 LayoutExample....................................................42 7.3 RecommendedOperatingConditions.......................7 12 DeviceandDocumentationSupport................. 43 7.4 ThermalInformation:OPA835 .................................7 7.5 ThermalInformation:OPA2835................................7 12.1 DeviceSupport ....................................................43 7.6 ElectricalCharacteristics:V =2.7V........................8 12.2 DocumentationSupport........................................43 S 7.7 ElectricalCharacteristics:V =5V.........................10 12.3 Trademarks...........................................................43 S 7.8 TypicalCharacteristics:V =2.7V.........................13 12.4 ElectrostaticDischargeCaution............................43 S 7.9 TypicalCharacteristics:V =5V............................19 12.5 Glossary................................................................43 S 8 DetailedDescription............................................ 25 13 Mechanical,Packaging,andOrderable Information........................................................... 44 8.1 Overview.................................................................25 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionH(November2015)toRevisionI Page • ReformattedtablenoteonThermalInformation:OPA835andThermalInformation:OPA2835tables ............................... 7 • Deletedtheword"linear"fromoutputvoltagelow,outputvoltagehigh,andoutputcurrentdriveparametersin ElectricalCharacteristics:V =2.7Vtable............................................................................................................................ 9 S • ChangedCurrentnoise1/fcornerfrequencyparameterunitsfromHztokHzinElectricalCharacteristics:V =5V S table ..................................................................................................................................................................................... 11 • Deletedtheword"linear"fromoutputvoltagelow,outputvoltagehigh,andoutputcurrentdriveparametersin ElectricalCharacteristics:V =5Vtable............................................................................................................................. 12 S • ReformattedDevelopmentSupportsection......................................................................................................................... 43 • ReformattedRelatedDocumentationsection ...................................................................................................................... 43 ChangesfromRevisionF(June2015)toRevisionG Page • MovedallswitchingparametersfromtheSwitchingCharacteristics:V =2.7VbackintotheElectrical S Characteristics:V =2.7Vtable ........................................................................................................................................... 8 S • MovedallswitchingparametersfromtheSwitchingCharacteristics:V =5VtablebackintotheElectrical S Characteristics:V =5Vtable ............................................................................................................................................ 10 S ChangesfromRevisionE(July2013)toRevisionF Page • AddedPinConfigurationandFunctionssection,ESDRatingstable,SwitchingCharacteristicstables,Feature Descriptionsection,DeviceFunctionalModes,ApplicationandImplementationsection,PowerSupply Recommendationssection,Layoutsection,DeviceandDocumentationSupportsection,andMechanical, Packaging,andOrderableInformationsection ..................................................................................................................... 1 • MovedtheswitchingparametersfromtheElectricalCharacteristicstablesintoSwitchingCharacteristicstables.............11 2 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 ChangesfromRevisionD(October2011)toRevisionE Page • AddedRMCpackagetodocument......................................................................................................................................... 1 • AddedRMCtoThermalInformationtable.............................................................................................................................. 7 Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com ChangesfromRevisionC(September2011)toRevisionD Page • RemovedProductPreviewfromOPA835IRUNTandOPA835IRUNR.................................................................................. 5 • ChangedResistortemperaturecoefficienttypicalvaluefromTBDto<10......................................................................... 10 • "ChangedQuiescentoperatingcurrent"parameterto"Quiescentoperatingcurrentperamplifier".................................... 10 • ChangedResistortemperaturecoefficientparameterunitsfromTBDto<10.................................................................... 12 • ChangedQuiescentoperatingcurrentparametertoQuiescentoperatingcurrentperamplifer.......................................... 12 ChangesfromRevisionB(May2011)toRevisionC Page • RemovedProductPreviewfromalldevicesexceptOPA835IRUNTandOPA835IRUNR.................................................... 5 • Changed-Channeltochannelcrosstalk(OPA2835)typicalvaluefromTBDto–120dB.................................................... 9 • ChangedtheCommon-moderejectionratiominimumvaluefrom91dBto88dB................................................................ 9 • AddedGAIN-SETTINGRESISTORS(OPA835IRUNONLY)parameter............................................................................. 10 • ChangedtheQuiescentoperatingcurrentperamplifier(T =25°C)parameterminimumvaluefrom190µAto175µA.....10 A • ChangedthePowersupplyrejection(±PSRR)minimumvaluefrom91dBto88dB......................................................... 10 • ChangedthePower-downpinbiascurrenttestconditionsfromPD=0.7VtoPD=0.5V.................................................. 10 • ChangedthePower-downquiescentcurrenttestconditionsfromPD=0.7VtoPD=0.5V............................................... 10 • ChangedChanneltochannelcrosstalk(OPA2835)typicalvaluefromTBDto-120dB..................................................... 11 • Changedthecommon-moderejectionratiominimumvaluefrom94dBto91dB............................................................... 12 • AddedGAIN-SETTINGRESISTORS(OPA835IRUNONLY)parameter............................................................................. 12 • ChangedtheQuiescentoperatingcurrent(T =25°C)MinvalueFrom:215µATo:200µA............................................. 12 A • ChangedthePowersupplyrejection(±PSRR)minimumvaluefrom93dBto90dB......................................................... 12 • ChangedthePower-downquiescentcurrenttestconditionsfromPD=0.7VtoPD=0.5V............................................. 12 • ChangedthePower-downquiescentcurrenttestconditionsfromPD=0.7VtoPD=0.5V.............................................. 12 • AddedFigureCrosstalkvsFrequency................................................................................................................................. 16 • AddedFigureCrosstalkvsFrequency................................................................................................................................. 22 • AddedSingle-EndedtoDifferentialAmplifiersection .......................................................................................................... 32 ChangesfromRevisionA(March2011)toRevisionB Page • ChangedOPA835fromproductpreviewtoproductiondata.................................................................................................. 1 4 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 5 OPA835-Related Devices PARTNUMBER BW(AV=1) SLEWRATE Iq(+5V) INPUTNOISE RAIL-TO-RAILIN/OUT DUALS MHz V/µsec mA nV/√Hz OPA835 30 110 0.25 9.3 –VS/Out OPA2835 OPA365 50 25 5 4.5 In/Out OPA2365 THS4281 95 35 0.75 12.5 In/Out LMH6618 140 45 1.25 10 In/Out LMH6619 OPA836 205 560 1 4.6 –VS/Out OPA2836 OPA830 310 600 3.9 9.5 –VS/Out OPA2830 ForacompleteselectionofTIHighSpeedAmplifiers,visitti.com. 6 Pin Configuration and Functions OPA835:DBVPackage 6-PinSOT-23 OPA2835:DPackage TopView 8-PinSOIC TopView VOUT 1 6 VS+ VOUT1 1 8 VS+ VS- 2 + - 5 PD VIN1- 2 - 7 VOUT2 V 3 4 V + IN+ IN- V 3 6 V IN1+ - IN2- + V 4 5 V S- IN2+ OPA835:RUNPackage 10-PinQFN TopView OPA2835:DGSPackage V 10-PinVSSOP S+ TopView VOUT 1 10 9 FB1 2.4k VOUT1 1 10 VS+ - + VIN- 2 8 FB2 VIN1- 2 - 9 VOUT2 1.8k + VIN+ 3 7 FB3 VIN1+ 3 - 8 VIN2- 600 VS- 4 + 7 VIN2+ FB PD 4 5 6 4 PD1 5 6 PD2 V S- Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com OPA2835:RMCandRUNPackages 10-PinUQFNand10-PinQFN TopView V S+ VOUT1 1 10 9 VOUT2 - + + - V 2 8 V IN1- IN2- VIN1+ 3 7 VIN2+ PD1 4 6 PD2 5 V S- PinFunctions PIN OPA835 OPA2835 I/O DESCRIPTION NAME QFN, SOT-23 QFN SOIC VSSOP UQFN FB 9 I/O Connectiontotopof2.4-kΩinternalgain-settingresistors 1 Connectiontojunctionof1.8-kΩand2.4-kΩinternalgain- FB 8 I/O 2 settingresistors — Connectiontojunctionof600-Ωand1.8-kΩinternalgain- FB 7 — — I/O 3 settingresistors FB 6 I/O Connectiontobottomof600-Ωinternalgain-settingresistors 4 AmplifierPowerDown,low=low-powermode, PD 5 4 — I high=normaloperation(PINMUSTBEDRIVEN) Amplifier1PowerDown,low=low-powermode, PD1 5 4 I high=normaloperation(PINMUSTBEDRIVEN) — — Amplifier2PowerDown,low=low-powermode, PD2 6 6 I high=normaloperation(PINMUSTBEDRIVEN) V 3 3 I Amplifiernoninvertinginput IN+ — — V 4 2 I Amplifierinvertinginput IN– V 3 3 3 I Amplifier1noninvertinginput IN1+ V 2 2 2 I Amplifier1invertinginput IN1– — — V 5 7 7 I Amplifier2noninvertinginput IN2+ V 6 8 8 I Amplifier2invertinginput IN2– V 1 1 — — — O Amplifieroutput OUT V 1 1 1 O Amplifier1output OUT1 — — V 7 9 9 O Amplifier2output OUT2 V 6 10 8 10 10 POW Positivepowersupplyinput S+ V 2 5 4 4 5 POW Negativepowersupplyinput S– 6 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 7 Specifications 7.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT V toV Supplyvoltage 5.5 V S– S+ V Inputvoltage V –0.7 V +0.7 V I S– S+ V Differentialinputvoltage 1 V ID I Continuousinputcurrent 0.85 mA I I Continuousoutputcurrent 60 mA O SeeThermalInformation: Continuouspowerdissipation OPA835andThermal Information:OPA2835 T Maximumjunctiontemperature 150 °C J T Operatingfree-airtemperature –40 125 °C A T Storagetemperature –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. 7.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±6000 V Electrostaticdischarge Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1000 V (ESD) Machinemodel ±200 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 7.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT V Singlesupplyvoltage 2.5 5 5.5 V S+ T Ambienttemperature –40 25 125 °C A 7.4 Thermal Information: OPA835 OPA835 THERMALMETRIC(1) DBV RUN UNIT (SOT23-6) (QFN) 6PINS 10PINS RθJA Junction-to-ambientthermalresistance 194 145.8 °C/W RθJCtop Junction-to-case(top)thermalresistance 129.2 75.1 °C/W RθJB Junction-to-boardthermalresistance 39.4 38.9 °C/W ψJT Junction-to-topcharacterizationparameter 25.6 13.5 °C/W ψJB Junction-to-boardcharacterizationparameter 38.9 104.5 °C/W (1) Formoreinformationabouttraditionalandnewthermalmetrics,seeSemiconductorandICPackageThermalMetrics(SPRA953). 7.5 Thermal Information: OPA2835 OPA2835 THERMALMETRIC(1) D DGS RUN RMC UNIT (SOIC) (VSSOP) (QFN) (UQFN) 8PINS 10PINS 10PINS 10PINS RθJA Junction-to-ambientthermalresistance 150.1 206 145.8 143.2 °C/W (1) Formoreinformationabouttraditionalandnewthermalmetrics,seeSemiconductorandICPackageThermalMetrics(SPRA953). Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Thermal Information: OPA2835 (continued) OPA2835 THERMALMETRIC(1) D DGS RUN RMC UNIT (SOIC) (VSSOP) (QFN) (UQFN) 8PINS 10PINS 10PINS 10PINS RθJCtop Junction-to-case(top)thermalresistance 83.8 75.3 75.1 49.0 °C/W RθJB Junction-to-boardthermalresistance 68.4 96.2 38.9 61.9 °C/W ψJT Junction-to-topcharacterizationparameter 33.0 12.9 13.5 3.3 °C/W ψJB Junction-to-boardcharacterizationparameter 67.9 94.6 104.5 61.9 °C/W 7.6 Electrical Characteristics: V = 2.7 V S atV =+2.7V,V =0V,V =1V ,R =0Ω,R =2kΩ,G=1V/V,inputandoutputreferencedtomid-supply,V = S+ S– OUT PP F L IN_CM mid-supply–0.5V.T =25°C,unlessotherwisenoted. A TEST PARAMETER TESTCONDITIONS MIN TYP MAX UNIT LEVEL(1) ACPERFORMANCE VOUT=100mVPP,G=1 51 VOUT=100mVPP,G=2 22.5 Small-signalbandwidth MHz C VOUT=100mVPP,G=5 7.2 VOUT=100mVPP,G=10 3 Gain-bandwidthproduct VOUT=100mVPP,G=10 30 MHz C Large-signalbandwidth VOUT=1VPP,G=1 24 MHz C Bandwidthfor0.1-dBflatness VOUT=1VPP,G=2 4 MHz C Slewrate,rise VOUT=1VSTEP,G=2 110 V/µs C Slewrate,fall VOUT=1VSTEP,G=2 130 V/µs C Risetime VOUT=1VSTEP,G=2 9.5 ns C Falltime VOUT=1VSTEP,G=2 9 ns C Settlingtimeto1%,rise VOUT=1VSTEP,G=2 35 ns C Settlingtimeto1%,fall VOUT=1VSTEP,G=2 30 ns C Settlingtimeto0.1%,rise VOUT=1VSTEP,G=2 60 ns C Settlingtimeto0.1%,fall VOUT=1VSTEP,G=2 65 ns C Settlingtimeto0.01%,rise VOUT=1VSTEP,G=2 120 ns C Settlingtimeto0.01%,rise VOUT=1VSTEP,G=2 90 ns C Overshoot/Undershoot VOUT=1VSTEP,G=2 0.5%/0.2% C f=10kHz,VIN_CM=mid-supply–0.5V –133 Second-orderharmonicdistortion f=100kHz,VIN_CM=mid-supply–0.5V –110 dBc C f=1MHz,VIN_CM=mid-supply–0.5V –73 f=10kHz,VIN_CM=mid-supply–0.5V –137 Third-orderharmonicdistortion f=100kHz,VIN_CM=mid-supply–0.5V –125 dBc C f=1MHz,VIN_CM=mid-supply–0.5V –78 f=1MHz,200-kHzToneSpacing, Second-orderintermodulationdistortion VOUTEnvelope=1VPP, –75 dBc C VIN_CM=mid-supply–0.5V f=1MHz,200-kHzToneSpacing, Third-orderintermodulationdistortion VOUTEnvelope=1VPP, –81 dBc C VIN_CM=mid-supply–0.5V Inputvoltagenoise f=100kHz 9.3 nV/√Hz C Voltagenoise1/fcornerfrequency 147 Hz C (1) Testlevels(allvaluessetbycharacterizationandsimulation):(A)100%testedat25°C;overtemperaturelimitsbycharacterizationand simulation.(B)Nottestedinproduction;limitssetbycharacterizationandsimulation.(C)Typicalvalueonlyforinformation. 8 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 Electrical Characteristics: V = 2.7 V (continued) S atV =+2.7V,V =0V,V =1V ,R =0Ω,R =2kΩ,G=1V/V,inputandoutputreferencedtomid-supply,V = S+ S– OUT PP F L IN_CM mid-supply–0.5V.T =25°C,unlessotherwisenoted. A TEST PARAMETER TESTCONDITIONS MIN TYP MAX UNIT LEVEL(1) ACPERFORMANCE(continued) Inputcurrentnoise f=1MHz 0.45 pA/√Hz C Currentnoise1/fcornerfrequency 14.7 kHz C Overdriverecoverytime,over/under Overdrive=0.5V 140/125 ns C Closed-loopoutputimpedance f=100kHz 0.028 Ω C Channel-to-channelcrosstalk f=10kHz –120 dB C (OPA2835) DCPERFORMANCE Open-loopvoltagegain(AOL) 100 120 dB A TA=25°C –500 ±100 500 A TA=0°Cto70°C –880 880 Inputreferredoffsetvoltage µV TA=–40°Cto85°C –1040 1040 B TA=–40°Cto125°C –1850 1850 TA=0°Cto70°C –8.5 ±1.4 8.5 Inputoffsetvoltagedrift(2) TA=–40°Cto85°C –9 ±1.5 9 µV/°C B TA=–40°Cto125°C –13.5 ±2.25 13.5 TA=25°C 50 200 400 A Inputbiascurrent(3) TA=0°Cto70°C 47 410 nA TA=–40°Cto85°C 45 425 B TA=–40°Cto125°C 45 530 TA=0°Cto70°C –1.4 ±0.25 1.4 Inputbiascurrentdrift(2) TA=–40°Cto85°C –1.05 ±0.175 1.05 nA/°C B TA=–40°Cto125°C –1.1 ±0.185 1.1 TA=25°C –100 ±13 100 A TA=0°Cto70°C –100 ±13 100 Inputoffsetcurrent nA TA=–40°Cto85°C –100 ±13 100 B TA=–40°Cto125°C –100 ±13 100 TA=0°Cto70°C –1.230 ±0.205 1.230 Inputoffsetcurrentdrift(2) TA=–40°Cto85°C –0.940 ±0.155 0.940 nA/°C B TA=–40°Cto125°C –0.940 ±0.155 0.940 INPUT TA=25°C,<3dBdegradationinCMRRlimit –0.2 0 V A Common-modeinputrangelow TA=–40°Cto125°C,<3-dBdegradationinCMRRlimit –0.2 0 V B TA=25°C,<3-dBdegradationinCMRRlimit 1.5 1.6 V A Common-modeinputrangehigh TA=–40°Cto125°C,<3-dBdegradationinCMRRlimit 1.5 1.6 V B Common-moderejectionratio 88 110 dB A Inputimpedancecommon-mode 200||1.2 kΩ||pF C Inputimpedancedifferentialmode 200||1 kΩ||pF C OUTPUT TA=25°C,G=5 0.15 0.2 V A Outputvoltagelow TA=–40°Cto125°C,G=5 0.15 0.2 V B TA=25°C,G=5 2.45 2.5 V A Outputvoltagehigh TA=–40°Cto125°C,G=5 2.45 2.5 V B Outputsaturationvoltage,high/low TA=25°C,G=5 45/13 mV C TA=25°C ±25 ±35 mA A Outputcurrentdrive TA=–40°Cto125°C ±20 mA B (2) InputOffsetVoltageDrift,InputBiasCurrentDrift,andInputOffsetCurrentDriftareaveragevaluescalculatedbytakingdataattheend points,computingthedifference,anddividingbythetemperaturerange. (3) Currentisconsideredpositiveoutofthepin. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Electrical Characteristics: V = 2.7 V (continued) S atV =+2.7V,V =0V,V =1V ,R =0Ω,R =2kΩ,G=1V/V,inputandoutputreferencedtomid-supply,V = S+ S– OUT PP F L IN_CM mid-supply–0.5V.T =25°C,unlessotherwisenoted. A TEST PARAMETER TESTCONDITIONS MIN TYP MAX UNIT LEVEL(1) GAIN-SETTINGRESISTORS(OPA835IRUNONLY) ResistorFB1toFB2 DCresistance 2376 2400 2424 Ω A ResistorFB2toFB3 DCresistance 1782 1800 1818 Ω A ResistorFB3toFB4 DCresistance 594 600 606 Ω A Resistortolerance DCresistance –1% 1% A Resistortemperaturecoefficient DCresistance <10 PPM C POWERSUPPLY Specifiedoperatingvoltage 2.5 5.5 V B Quiescentoperatingcurrentper TA=25°C 175 245 340 µA A amplifier TA=–40°Cto125°C 135 345 µA B Powersupplyrejection(±PSRR) 88 105 dB A POWERDOWN(PINMUSTBEDRIVEN) Enablevoltagethreshold SpecifiedonaboveVS–+2.1V 1.4 2.1 V A Disablevoltagethreshold SpecifiedoffbelowVS–+0.7V 0.7 1.4 V A Power-downpinbiascurrent PD=0.5V 20 500 nA A Power-downquiescentcurrent PD=0.5V 0.5 1.5 µA A Turnontimedelay TimefromPD=hightoVOUT=90%offinalvalue 250 ns C Turnofftimedelay TimefromPD=lowtoVOUT=10%oforiginalvalue 50 ns C 7.7 Electrical Characteristics: V = 5 V S atV =+5V,V =0V,V =2V ,R =0Ω,R =2kΩ,G=1V/V,inputandoutputreferencedtomid-supply.T =25°C, S+ S– OUT PP F L A unlessotherwisenoted. TEST PARAMETER CONDITIONS MIN TYP MAX UNIT LEVEL(1) ACPERFORMANCE VOUT=100mVPP,G=1 56 VOUT=100mVPP,G=2 22.5 Small-signalbandwidth MHz C VOUT=100mVPP,G=5 7.4 VOUT=100mVPP,G=10 3.1 Gain-bandwidthproduct VOUT=100mVPP,G=10 31 MHz C Large-signalbandwidth VOUT=2VPP,G=1 31 MHz C Bandwidthfor0.1-dBflatness VOUT=2VPP,G=2 14.5 MHz C Slewrate,rise VOUT=2-VStep,G=2 160 V/µs C Slewrate,fall VOUT=2-VStep,G=2 260 V/µs C Risetime VOUT=2-VStep,G=2 10 ns C Falltime VOUT=2-VStep,G=2 7 ns C Settlingtimeto1%,rise VOUT=2-VStep,G=2 45 ns C Settlingtimeto1%,fall VOUT=2-VStep,G=2 45 ns C Settlingtimeto0.1%,rise VOUT=2-VStep,G=2 50 ns C Settlingtimeto0.1%,fall VOUT=2-VStep,G=2 55 ns C Settlingtimeto0.01%,rise VOUT=2-VStep,G=2 82 ns C Settlingtimeto0.01%,fall VOUT=2-VStep,G=2 85 ns C Overshoot/Undershoot VOUT=2-VStep,G=2 2.5%/1.5% C f=10kHz –135 Second-orderharmonicdistortion f=100kHz –105 dBc C f=1MHz –70 (1) Testlevels(allvaluessetbycharacterizationandsimulation):(A)100%testedat25°C;overtemperaturelimitsbycharacterizationand simulation.(B)Nottestedinproduction;limitssetbycharacterizationandsimulation.(C)Typicalvalueonlyforinformation. 10 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 Electrical Characteristics: V = 5 V (continued) S atV =+5V,V =0V,V =2V ,R =0Ω,R =2kΩ,G=1V/V,inputandoutputreferencedtomid-supply.T =25°C, S+ S– OUT PP F L A unlessotherwisenoted. TEST PARAMETER CONDITIONS MIN TYP MAX UNIT LEVEL(1) ACPERFORMANCE(continued) f=10kHz –139 Third-orderharmonicdistortion f=100kHz –122 dBc C f=1MHz -73 Second-orderintermodulation f=1MHz,200-kHzToneSpacing, –70 dBc C distortion VOUTEnvelope=2VPP f=1MHz,200-kHzToneSpacing, Third-orderintermodulationdistortion –83 dBc C VOUTEnvelope=2VPP 0.00015% Signal-to-noiseratio,SNR f=1kHz,VOUT=1VRMS,22-kHzbandwidth C –116.4 dBc 0.00003% C Totalharmonicdistortion,THD f=1kHz,VOUT=1VRMS –130 dBc C Inputvoltagenoise f=100kHz 9.3 nV/√Hz C Voltagenoise1/fcornerfrequency 147 Hz C Inputcurrentnoise f=1MHz 0.45 pA/√Hz C Currentnoise1/fcornerfrequency 14.7 kHz C Overdriverecoverytime,over/under Overdrive=0.5V 195/135 ns C Closed-loopoutputimpedance f=100kHz 0.028 Ω C Channeltochannelcrosstalk f=10kHz –120 dB C (OPA2835) DCPERFORMANCE Open-loopvoltagegain(AOL) 100 120 dB A TA=25°C –500 ±100 500 A TA=0°Cto70°C –880 880 Inputreferredoffsetvoltage µV TA=–40°Cto85°C –1040 1040 B TA=–40°Cto125°C –1850 1850 TA=0°Cto70°C –8.5 ±1.4 8.5 Inputoffsetvoltagedrift(2) TA=–40°Cto85°C –9 ±1.5 9 µV/°C B TA=–40°Cto125°C –13.5 ±2.25 13.5 TA=25°C 50 200 400 A Inputbiascurrent(3) TA=0°Cto70°C 47 410 nA TA=–40°Cto85°C 45 425 B TA=–40°Cto125°C 45 530 TA=0°Cto70°C –1.4 ±0.25 1.4 Inputbiascurrentdrift(2) TA=–40°Cto85°C –1.05 ±0.175 1.05 nA/°C B TA=–40°Cto125°C –1.1 ±0.185 1.1 TA=25°C –100 ±13 100 A TA=0°Cto70°C –100 ±13 100 Inputoffsetcurrent nA TA=–40°Cto85°C –100 ±13 100 B TA=–40°Cto125°C –100 ±13 100 TA=0°Cto70°C –1.23 ±0.205 1.23 Inputoffsetcurrentdrift(2) TA=–40°Cto85°C –0.94 ±0.155 0.94 nA/°C B TA=–40°Cto125°C –0.94 ±0.155 0.94 (2) InputOffsetVoltageDrift,InputBiasCurrentDrift,andInputOffsetCurrentDriftareaveragevaluescalculatedbytakingdataattheend points,computingthedifference,anddividingbythetemperaturerange. (3) Currentisconsideredpositiveoutofthepin. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Electrical Characteristics: V = 5 V (continued) S atV =+5V,V =0V,V =2V ,R =0Ω,R =2kΩ,G=1V/V,inputandoutputreferencedtomid-supply.T =25°C, S+ S– OUT PP F L A unlessotherwisenoted. TEST PARAMETER CONDITIONS MIN TYP MAX UNIT LEVEL(1) INPUT TA=25°C,<3-dBdegradationinCMRRlimit –0.2 0 V A Common-modeinputrangelow TA=–40°Cto125°C,<3-dBdegradationinCMRRlimit –0.2 0 V B TA=25°C,<3-dBdegradationinCMRRlimit 3.8 3.9 V A Common-modeinputrangehigh TA=–40°Cto125°C,<3-dBdegradationinCMRRlimit 3.8 3.9 V B Common-moderejectionratio 91 113 dB A Inputimpedancecommon-mode 200||1.2 kΩ||pF C Inputimpedancedifferentialmode 200||1 kΩ||pF C OUTPUT TA=25°C,G=5 0.15 0.2 V A Outputvoltagelow TA=–40°Cto125°C,G=5 0.15 0.2 V B TA=25°C,G=5 4.75 4.8 V A Outputvoltagehigh TA=–40°Cto125°C,G=5 4.75 4.8 V B Outputsaturationvoltage,high/low TA=25°C,G=5 70/25 mV C TA=25°C ±30 ±40 mA A Outputcurrentdrive TA=–40°Cto125°C ±25 mA B GAIN-SETTINGRESISTORS(OPA835IRUNONLY) ResistorFB1toFB2 DCresistance 2376 2400 2424 Ω A ResistorFB2toFB3 DCresistance 1782 1800 1818 Ω A ResistorFB3toFB4 DCresistance 594 600 606 Ω A Resistortolerance DCresistance –1% 1% A Resistortemperaturecoefficient DCresistance <10 PPM C POWERSUPPLY Specifiedoperatingvoltage 2.5 5.5 V B Quiescentoperatingcurrentper TA=25°C 200 250 350 µA A amplifier TA=–40°Cto125°C 150 365 µA B Powersupplyrejection(±PSRR) 90 110 dB A POWERDOWN(PINMUSTBEDRIVEN) Enablevoltagethreshold Specified"on"aboveVS–+2.1V 1.4 2.1 V A Disablevoltagethreshold Specified"off"belowVS–+0.7V 0.7 1.4 V A Power-downpinbiascurrent PD=0.5V 20 500 nA A Power-downquiescentcurrent PD=0.5V 0.5 1.5 µA A Turnontimedelay TimefromPD=hightoVOUT=90%offinalvalue 200 ns C Turnofftimedelay TimefromPD=lowtoVOUT=10%oforiginalvalue 60 ns C 12 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 7.8 Typical Characteristics: V = 2.7 V S Table1.TableofGraphs FIGURETITLE FIGURELOCATION Small-SignalFrequencyResponse Figure1 Large-SignalFrequencyResponse Figure2 NoninvertingPulseResponse Figure3 InvertingPulseResponse Figure4 SlewRate vsOutputVoltageStep Figure5 OutputOverdriveRecovery Figure6 HarmonicDistortion vsFrequency Figure7 HarmonicDistortion vsLoadResistance Figure8 HarmonicDistortion vsOutputVoltage Figure9 HarmonicDistortion vsGain Figure10 OutputVoltageSwing vsLoadResistance Figure11 OutputSaturationVoltage vsLoadCurrent Figure12 OutputImpedance vsFrequency Figure13 FrequencyResponseWithCapacitiveLoad Figure14 SeriesOutputResistor vsCapacitiveLoad Figure15 InputReferredNoise vsFrequency Figure16 Open-LoopGain vsFrequency Figure17 Common-Mode/PowerSupplyRejectionRatios vsFrequency Figure18 Crosstalk vsFrequency Figure19 PowerDownResponse Figure20 InputOffsetVoltage Figure21 InputOffsetVoltage vsFree-AirTemperature Figure22 InputOffsetVoltageDrift Figure23 InputOffsetCurrent Figure24 InputOffsetCurrent vsFree-AirTemperature Figure25 InputOffsetCurrentDrift Figure26 Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Testconditionsunlessotherwisenoted:V =+2.7V,V =0V,V =1Vpp,R =0Ω,R =2kΩ,G=1V/V,inputand S+ S– OUT F L outputreferencedtomid-supply,V =mid-supply–0.5V.T =25°C IN_CM A 21 21 G = 10 VS= 2.7 V, G = 10 VS= 2.7 V, 1158 VROLU=T 2= k 1W00 mVpp, 1158 VROLU=T 2= k 1W Vpp, G = 5 G = 5 Gain Magnitude - dB 120369 G = 2 Gain Magnitude - dB 12369 G = 2 G = 1 0 -3 G = 1 -3 G = -1 -6 G = -1 -6 -9 100k 1M 10M 100M -1900k 1M 10M 100M f - Frequency - Hz f - Frequency - Hz Figure1.Small-SignalFrequencyResponse Figure2.Large-SignalFrequencyResponse 2.5 3 VS= 2.7 V, VGS == - 12,.7 V, 2 GRRFL === 1 20, kWW V2.5 RRFL== 22 kkWW VOUT= 2 Vpp e - V ge - 2 V- Output VoltagO1.51 VOUT= 1.5 Vpp V- Output VoltaO1.15 VOUT= 0.5 Vpp 0.5 0.5 VOUT= 0.5 Vpp 0 0 0 500 1000 0 500 1000 t - Time - ns t - Time - ns Figure3.NoninvertingPulseResponse Figure4.InvertingPulseResponse 140 0.75 3.75 VGS == 2 2,.7 V, VGS == 5 2,.7 V, VIN 3.25 120 RRFL== 22 kkWW 0.5 RRFL== 22 kkWW, VOUT 2.75 Slew Rate - V/sm104680000 FallingRising V- Input Voltage - VI0.25 00112.....2727255555 V- Output Voltage - VO 0 -0.25 20 -0.75 0 -0.25 -1.25 0.5 0.6 0.7 0.8 0.9 1 0 500 1000 1500 2000 Output Voltage Step - V t - Time - ns Figure5.SlewRatevsOutputVoltageStep Figure6.OutputOverdriveRecovery 14 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 Testconditionsunlessotherwisenoted:V =+2.7V,V =0V,V =1Vpp,R =0Ω,R =2kΩ,G=1V/V,inputand S+ S– OUT F L outputreferencedtomid-supply,V =mid-supply–0.5V.T =25°C IN_CM A -30 -50 VS= 2.7 V, VS= 2.7 V, -40 G = 1, G = 1, Harmonic Distortion - dBc --11-----01987650000000 VRROFLU==T 20= kW 1W, Vpp, HD2 HD3 Harmonic Distortion - dBc ------877665050505 fRV =OF U1=T M0=HW 1z ,Vpp HD3HD2 -120 -85 -130 -90 -140 10k 100k 1M 10M 100 1k 10k f - Frequency - Hz RLOAD- Load Resistance -W Figure7.HarmonicDistortionvsFrequency Figure8.HarmonicDistortionvsLoadResistance -30 -40 VS= 2.7 V, VS= 2.7 V, G = 1, -45 G = 1, -40 fR =F 1= M0HWz,, -50 fV =O U1T M=H 1z ,Vpp, Harmonic Distortion - dBc ---765000 RL= 2 kW HD2 armonic Distortion - dBc -----7766550505 RL= 2 kW HD3HD2 H -80 -80 HD3 -85 -90 0 1 2 -90 1 2 3 4 5 6 7 8 9 10 VO- Output Voltage - Vpp Gain - V/V Figure9.HarmonicDistortionvsOutputVoltage Figure10.HarmonicDistortionvsGain 3 1 VS= 2.7 V, VS= 2.7 V, G = 5, G = 5, 2.5 RF= 2 kW RF= 2 kW VOUT= High V V- Output Voltage - VO1.152 - Saturation Voltage - AT0.00.11 VOUT= HighVOUT= Low S V 0.5 VOUT= Low 0 0.001 10 100 1k 10k 0.1 1 10 100 RL- Load Resistance -W IL- Load Current - mA Figure11.OutputVoltageSwingvsLoadResistance Figure12.OutputSaturationVoltagevsLoadCurrent Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Testconditionsunlessotherwisenoted:V =+2.7V,V =0V,V =1Vpp,R =0Ω,R =2kΩ,G=1V/V,inputand S+ S– OUT F L outputreferencedtomid-supply,V =mid-supply–0.5V.T =25°C IN_CM A 1000 3 VS= 2.7 V, G = 1 100 W- Output Impedance -O 101 Gain Magnitude - dB --630 RCRCCOLOLLR====O= 1 425=200264 01.00.2 39 pppWFWWFF RCCCORLRLVLO==OS== =17= =12 06 0 0 2 .2pp8 W.WFpF7WF V, Z 0.1 CL= 1000 pF G = 1, RO= 10W RF= 0W RL= 2 kW 0.01 -9 10k 100k 1M 10M 100M 1G 100k 1M 10M 100M 1G f - Frequency - Hz f - Frequency - Hz Figure13.OutputImpedancevsFrequency Figure14.FrequencyResponseWithCapacitiveLoad 100 100 VS= 2.7 V, Voltage Noise G = 1, Current Noise RF= 0W, VS= 2.7 V RL= 2 kW z H W √ sistor - Hz, pA/ 10 put Re 10 √NV/ ut - O N 1 R- O V, IN 1 0.1 10 100 1000 10 100 1k 10k 100k 1M 10M CLOAD- Capacitive Load - pF Frequency(Hz) Figure15.SeriesOutputResistorvsCapacitiveLoad Figure16.InputReferredNoisevsFrequency 140 0 0 120 VS= 2.7 V -45 -10 VS= 2.7 V 100 -90 B) -20 Magnitude (d 468000 ---211283505 - Phase(dB) R/PSRR - dB --4300 PSRR CMRR - OL 20 -270 AOL CMR -50 A 0 -315 -60 -20 Open Loop Gain Phase -360 -70 Open Loop Gain Magnitude -40 -405 1 10 100 1k 10k 100k 1M 10M 100M 1G -80 10k 100k 1M 10M 100M Frequency(Hz) DD000017 f - Frequency - Hz Figure17.OpenLoopGainvsFrequency Figure18.Common-Mode/PowerSupplyRejectionRatiosvs Frequency 16 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 Testconditionsunlessotherwisenoted:V =+2.7V,V =0V,V =1Vpp,R =0Ω,R =2kΩ,G=1V/V,inputand S+ S– OUT F L outputreferencedtomid-supply,V =mid-supply–0.5V.T =25°C IN_CM A 3 OPA2835 only VS= 2.7 V, G = 2, −80 2.5 RF= 2 kW VPD RL= 2 kW −90 2 B) alk (d−100 / VPD1.5 sst−110 OUT VOUT o V Cr 1 −120 −130 0.5 −140 0 20 100 1k 10k 100k 1M 10M 50M 0 500 1000 Frequency (Hz) t - Time - ns Figure19.CrosstalkvsFrequency Figure20.PowerDownResponse 1600 800 1412 4800 units tested 1400 600 1143 1200 400 V 962 m nt 1000 age - 200 Cou 800 582 set Volt 0 600 Off 395 - -200 S 400 VO -400 158 200 112 0 0 0 1 4 1326 5217 2 1 0 0 0 0 -600 0 2 8 64 268 6 42 02 46 862 4 682 2 <-69 <-622. <-553.<-484. <-415.<-34<-276. <-207. <-138.<-69. <<69. <138.<207. <276.<34<415. <484. <553.<622.<69 >69 -800-40 -20 0 20 40 60 80 100 120 VOS- Offset Voltage -mV TA- Free-Air Temperature - °C Figure21.InputOffsetVoltage Figure22.InputOffsetVoltagevsFree-AirTemperature 3.5 1200 4800 units tested 0°C to 70°C 3 --4400°°CC ttoo 8152°5C°C 1000 967 904 2.5 772 800 695 2 nt unt 600 u o o C C 1.5 402 369 400 1 213 174 200 80 81 0.5 36 9 3 131632 372414 4 4 31 0 0 -5-4.5-4-3.5-3-2.5-2-1.5V-O1S-0- .D5ri0ft 0-.m5V/1°C1.5 2 2.5 3 3.5 44.5 5 <-45 <-40.5 <-36 <-31.5<-27<-22.5<-18IO<-13.5S-<-9 Of<-4.5fse<0t Cu<4.5rre<9nt -<13.5 nA<18 <22.5 <27<31.5 <36<40.5 <45 >45 Figure23.InputOffsetVoltageDrift Figure24.InputOffsetCurrent Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Testconditionsunlessotherwisenoted:V =+2.7V,V =0V,V =1Vpp,R =0Ω,R =2kΩ,G=1V/V,inputand S+ S– OUT F L outputreferencedtomid-supply,V =mid-supply–0.5V.T =25°C IN_CM A 100 7 0°C to 70°C 80 -40°C to 85°C 6 -40°C to 125°C 60 5 A 40 n ent - 20 4 Curr 0 unt et Co3 Offs -20 - OS -40 2 I -60 1 -80 -100 0 -40 -20 0 20 40 60 80 100 120 -250-200-150-100-50 0 50 100150200250300350400450500550 TA- Free-Air Temperature - °C IOS- Drift - pA/°C Figure25.InputOffsetCurrentvsFree-AirTemperature Figure26.InputOffsetCurrentDrift 18 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 7.9 Typical Characteristics: V = 5 V S Table2.TableofGraphs FIGURETITLE FIGURELOCATION Small-SignalFrequencyResponse Figure27 Large-SignalFrequencyResponse Figure28 NoninvertingPulseResponse Figure29 InvertingPulseResponse Figure30 SlewRate vsOutputVoltageStep Figure31 OutputOverdriveRecovery Figure32 HarmonicDistortion vsFrequency Figure33 HarmonicDistortion vsLoadResistance Figure34 HarmonicDistortion vsOutputVoltage Figure35 HarmonicDistortion vsGain Figure36 OutputVoltageSwing vsLoadResistance Figure37 OutputSaturationVoltage vsLoadCurrent Figure38 OutputImpedance vsFrequency Figure39 FrequencyResponseWithCapacitiveLoad Figure40 SeriesOutputResistor vsCapacitiveLoad Figure41 InputReferredNoise vsFrequency Figure42 OpenLoopGain vsFrequency Figure43 Common-Mode/PowerSupplyRejectionRatios vsFrequency Figure44 Crosstalk vsFrequency Figure45 PowerDownResponse Figure46 InputOffsetVoltage Figure47 InputOffsetVoltage vsFree-AirTemperature Figure48 InputOffsetVoltageDrift Figure49 InputOffsetCurrent Figure50 InputOffsetCurrent vsFree-AirTemperature Figure51 InputOffsetCurrentDrift Figure52 Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Testconditionsunlessotherwisenoted:V =+5V,V =0V,V =2Vpp,R =0Ω,R =2kΩ,G=1V/V,inputand S+ S– OUT F L outputreferencedtomid-supply.T =25°C A 21 21 G = 10 VS= 5 V, G = 10 VS= 5 V, 18 VOUT= 100 mVpp, 18 VOUT= 2 Vpp, 15 RL= 2 kW 15 RL= 2 kW G = 5 G = 5 B 12 B 12 d d de - 9 de - 9 u u agnit 6 G = 2 agnit 6 G = 2 M M n 3 G = 1 n 3 G = -1 ai ai G G 0 0 -3 -3 G = 1 -6 G = -1 -6 -9 -9 100k 1M 10M 100M 100k 1M 10M 100M f - Frequency - Hz f - Frequency - Hz Figure27.Small-SignalFrequencyResponse Figure28.Large-SignalFrequencyResponse 5 5 VS= 5 V, 4.5 4.5 G = -1, 4 VOUT= 4 Vpp 4 RRFL== 22 kkWW VOUT= 4 Vpp V 3.5 V 3.5 age - 3 VS= 5 V, age - 3 olt G = 1, olt Output V 2.25 RRFL== 20 kWW Output V 2.25 VOUT= 0.5 Vpp - - VO1.5 VO1.5 1 1 0.5 0.5 VOUT= 0.5 Vpp 0 0 0 500 1000 0 500 1000 t - Time - ns t - Time - ns Figure29.NoninvertingPulseResponse Figure30.InvertingPulseResponse 300 1.25 6.25 VS= 5 V, VS= 5 V, VIN 5.75 250 GRRFL === 2 22, kkWW Falling 1 GRRFL === 5 22, kkWW, VOUT 45..7255 4.25 V Slew Rate - V/sm 112050000 Rising V- Input Voltage - VI00..027.555 112233......272727555555 V- Output Voltage - O 0.75 0.25 50 0 -0.25 -0.75 0 -0.25 -1.25 0 1 2 3 4 0 500 1000 1500 2000 Output Voltage Step - V t - Time - ns Figure31.SlewRatevsOutputVoltageStep Figure32.OutputOverdriveRecovery 20 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 Testconditionsunlessotherwisenoted:V =+5V,V =0V,V =2Vpp,R =0Ω,R =2kΩ,G=1V/V,inputand S+ S– OUT F L outputreferencedtomid-supply.T =25°C A -30 -50 VS= 5 V, VS= 5 V, Bc ---654000 GVRROFL =U== T1 20,= kW 2W, Vpp, dBc --6505 GfRV =OF = U1= T1 M0,=HW 2z ,Vpp Distortion - d ---987000 HD2 c Distortion - --7605 HD2 Harmonic --110100 HD3 Harmoni --8705 HD3 -120 -85 -130 -90 -140 100 1k 10k 10k 100k 1M 10M f - Frequency - Hz RLOAD- Load Resistance -W Figure33.HarmonicDistortionvsFrequency Figure34.HarmonicDistortionvsLoadResistance -40 -40 -45 VGS == 1 5, V, -45 VGS == 1 5, V, f = 1 MHz, f = 1 MHz, -50 RF= 0W, -50 VOUT= 2 Vpp, Harmonic Distortion - dBc -----7766550505 RL= 2 kW HD3 HD2 armonic Distortion - dBc -----7766550505 RL= 2 kW HD3 HD2 H -80 -80 -85 -85 -90 0 1 2 3 4 -90 1 2 3 4 5 6 7 8 9 10 VO- Output Voltage - Vpp Gain - V/V Figure35.HarmonicDistortionvsOutputVoltage Figure36.HarmonicDistortionvsGain 5 1 VS= 5 V, VS= 5 V, GRF == 5 2, kW VOUT= High GRF == 5 2, kW 4 V Output Voltage - V 23 uration Voltage - 0.1 VOUT= High - O Sat V - AT 1 VS VOUT= Low VOUT= Low 0 0.01 10 100 1k 10k 0.1 1 10 100 RL- Load Resistance -W IL- Load Current - mA Figure37.OutputVoltageSwingvsLoadResistance Figure38.OutputSaturationVoltagevsLoadCurrent Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Testconditionsunlessotherwisenoted:V =+5V,V =0V,V =2Vpp,R =0Ω,R =2kΩ,G=1V/V,inputand S+ S– OUT F L outputreferencedtomid-supply.T =25°C A 3 100 VS= 5 V, VS= 5 V, G = 1 G = 1, RF= 0W W 0 RL= 2 kW ut Impedance - 101 agnitude - dB -3 RCRCOLOL=== = 14 2020204.20 .p9 WpFWF CCRLRLO=O= =1 =1 0 0 0 ppWFWF - OutpO Gain M CLR=O 5=6 103 pWF RCOL== 7 262.8 pWF Z 0.1 -6 CL= 1000 pF RO= 10W -9 0.0110K 100K 1M 10M 100M 1G 100k 1M 10M 100M 1G f - Frequency - Hz f - Frequency - Hz Figure40.FrequencyResponseWithCapacitiveLoad Figure39.OutputImpedancevsFrequency 100 100 VS= 5 V, Voltage Noise G = 1, Current Noise RF= 0W, VS= 5 V RL= 2 kW z H Wsistor - √Hz, pA/ 10 put Re 10 √NV/ ut - O N 1 R- O ,V IN 1 0.1 10 100 1000 10 100 1k 10k 100k 1M 10M CLOAD- Capacitive Load - pF Frequency(Hz) DD000017 Figure41.SeriesOutputResistorvsCapacitiveLoad Figure42.InputReferredNoisevsFrequency 140 0 0 VS= 5 V VS=5V 120 -45 -10 100 -90 B) -20 PSRR de (d 80 -135 (dB) dB -30 Magnitu 4600 --212850 - Phase R/PSRR - -40 CMRR - OL 20 -270 AOL CMR -50 A 0 -315 -60 -20 Open Loop Gain Phase -360 -70 Open Loop Gain Magnitude -40 -405 1 10 100 1k 10k 100k 1M 10M 100M 1G -8010k 100k 1M 10M 100M Frequency(Hz) DD000027 f - Frequency - Hz Figure43.Open-LoopGainvsFrequency Figure44.Common-Mode/PowerSupplyRejectionRatiosvs Frequency 22 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 Testconditionsunlessotherwisenoted:V =+5V,V =0V,V =2Vpp,R =0Ω,R =2kΩ,G=1V/V,inputand S+ S– OUT F L outputreferencedtomid-supply.T =25°C A 5 OPA2835 only VS= 5 V, 4.5 G = 2, −80 VPD RF= 2 kW 4 RL= 2 kW −90 3.5 osstalk (dB)−−111000 V/ VOUTPD 2.253 VOUT Cr −120 1.5 1 −130 0.5 −140 0 20 100 1k 10k 100k 1M 10M 50M 0 500 1000 Frequency (Hz) t - Time - ns Figure45.CrosstalkvsFrequency Figure46.PowerDownResponse 1600 800 1404 4800 units tested 1400 600 1156 1200 400 V 965 m nt 1000 age - 200 Cou 800 Volt 590 et 0 s 600 Off 377 - S-200 400 O V -400 170 200 108 0 0 0 1 3 1126 5313 2 1 0 0 0 0 -600 0 2 8 64 268 6 42 02 46 862 4 682 2 <-69 <-622. <-553.<-484. <-415.<-34<-276. <-207. <-138.<-69. <<69. <138.<207. <276.<34<415. <484. <553.<622.<69 >69 -800-40 -20 0 20 40 60 80 100 120 VOS- Offset Voltage -mV TA- Free-Air Temperature - °C Figure47.InputOffsetVoltage Figure48.InputOffsetVoltagevsFree-AirTemperature 3.5 1000 948 0°C to 70°C 895 4800 units tested -40°C to 85°C 900 3 -40°C to 125°C 800 754 715 2.5 700 600 nt 2 u nt Co 500 ou 397 C 400 1.5 300 1 188 205 200 94 75 0.5 100 37 7 5 9 2034 362614 5 3 31 0 5 5 6 5758 5 95 0 59 58 5 75 65 5 5 0-5-4.5-4-3.5-3-2.5-2-1.5-1-0.5 00.5 11.5 2 2.5 3 3.5 4 4.5 5 <-4 <-40. <-3 <-31.<-2<-22.<-1 <-13. <-<-4. < <4.< <13.<1 <22. <2<31. <3<40. <4 >4 VOS- Drift -mV/°C IOS- Offset Current - nA Figure50.InputOffsetCurrent Figure49.InputOffsetVoltageDrift Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Testconditionsunlessotherwisenoted:V =+5V,V =0V,V =2Vpp,R =0Ω,R =2kΩ,G=1V/V,inputand S+ S– OUT F L outputreferencedtomid-supply.T =25°C A 100 9 0°C to 70°C 80 8 -40°C to 85°C -40°C to 125°C 60 7 A 40 nt - n 20 6 Curre 0 Count 5 et 4 Offs -20 - 3 S-40 O I -60 2 -80 1 -100 0 -40 -20 0 20 40 60 80 100 120 -250-200-150-100-50 0 50 100150200250300350400450500550 TA- Free-Air Temperature - °C IOS- Drift - pA/°C Figure51.InputOffsetCurrentvsFree-AirTemperature Figure52.InputOffsetCurrentDrift 24 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 8 Detailed Description 8.1 Overview The OPAx835 family of bipolar-input operational amplifiers offers excellent bandwidth of 56 MHz with ultra-low THD of 0.00003% at 1 kHz. The device can swing to within 200 mV of the supply rails while driving a 2-kΩ load. The input common-mode of the amplifier can swing to 200 mV below the negative supply rail. This level of performanceisachievedat250µAofquiescentcurrentperamplifierchannel. 8.2 Functional Block Diagram V SIG VREF VS+ V IN RG OPA835 VOUT GV SIG VREF V VREF S- R F Figure53. NoninvertingAmplifier V S+ V V REF SIG V REF RG OPA835 VOUT VIN GVSIG V REF V S- R F Figure54. InvertingAmplifier 8.3 Feature Description 8.3.1 InputCommon-ModeVoltageRange When the primary design goal is a linear amplifier, with high CMRR, it is important to not violate the input common-modevoltagerange(V )ofanopamp. ICR The common-mode input range specifications in the table data use CMRR to set the limit. The limits are selected to ensure CMRR will not degrade more than 3 dB below the CMRR limit if the input voltage is kept within the specified range. The limits cover all process variations, and most parts will be better than specified. The typical specificationsare0.2Vbelowthenegativerailand1.1Vbelowthepositiverail. Assuming the op amp is in linear operation, the voltage difference between the input pins is small (ideally 0 V); and the input common-mode voltage is analyzed at either input pin with the other input pin assumed to be at the same potential. The voltage at V is simple to evaluate. In noninverting configuration, Figure 53, the input IN+ signal, V , must not violate the V . In inverting configuration, as shown in Figure 54, the reference voltage, IN ICR V ,mustbewithintheV . REF ICR Theinputvoltagelimitshavefixedheadroomtothepowerrailsandtrackthepowersupplyvoltages.Forone5-V supply, the linear input voltage ranges from –0.2 V to 3.9 V and –0.2 V to 1.6 V for a 2.7-V supply. The delta headroomfromeachpowersupplyrailisthesameineithercase: –0.2Vand1.1V. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Feature Description (continued) 8.3.2 OutputVoltageRange The OPA835 and OPA2835 devices are rail-to-rail output (RRO) op amps. Rail-to-rail output typically means that the output voltage swings within a couple hundred millivolts of the supply rails. There are different ways to specify this: one is with the output still in linear operation and another is with the output saturated. Saturated output voltages are closer to the power supply rails than linear outputs, but the signal is not a linear representation of the input. Linear output is a better representation of how well a device performs when used as a linear amplifier. Saturation and linear operation limits are affected by the output current, where higher currents leadtomorelossintheoutputtransistors. The specification tables list linear and saturated output voltage specifications with 2-kΩ load. Figure 11 and Figure 37 show saturated voltage-swing limits versus output load resistance, and Figure 12 and Figure 38 show the output saturation voltage versus load current. Given a light load, the output voltage limits have nearly constant headroom to the power rails and track the power supply voltages. For example, with a 2-kΩ load and a single 5-V supply, the linear output voltage ranges from 0.15 V to 4.8 V and ranges from 0.15 V to 2.5 V for a 2.7-Vsupply.Thedeltafromeachpowersupplyrailisthesameineithercase:0.15Vand0.2V. With devices like the OPA835 and OPA2835 where the input range is lower than the output range, typically the inputwilllimittheavailablesignalswingonlyinnoninvertinggainof1.Signalswinginnoninvertingconfigurations in gains > +1 and inverting configurations in any gain is typically limited by the output voltage limits of the op amp. 8.3.3 Power-DownOperation The OPA835 and OPA2835 devices include a power-down mode. Under logic control, the amplifiers can switch from normal operation to a standby current of < 1.5 µA. When the PD pin is connected high, the amplifier is active. Connecting PD pin low disables the amplifier and places the output in a high-impedance state. When the amplifier is configured as a unity-gain buffer, the output stage is in a high dc-impedance state. To protect the input stage of the amplifier, the devices use internal, back-to-back ESD diodes between the inverting and noninverting input pins. This configuration creates a parallel low-impedance path from the amplifier output to the noninverting pin when the differential voltage between the pins exceeds a diode voltage drop. When the op amp isconfiguredinothergains,thefeedback(RF)andgain(RG)resistornetworkformsaparallelload. ThePDpinmustbeactivelydrivenhighorlowandmustnotbeleftfloating.Ifthepower-downmodeisnotused, PDmustbetiedtothepositivesupplyrail. PD logic states are TTL with reference to the negative supply rail, V . When the op amp is powered from a S– single-supply and ground, driven from logic devices with similar V voltages to the op amp do not require any DD specialconsideration.Whentheopampispoweredfromasplitsupply,withV belowground,anopen-collector S– type of interface with a pullup resistor is more appropriate. Pullup resistor values must be lower than 100 kΩ. Additionally,thedrivelogicmustbenegatedduetotheinvertingactionofanopen-collectorgate. 8.3.4 Low-PowerApplicationsandtheEffectsofResistorValuesonBandwidth The OPA835 and OPA2835 devices are designed for the nominal value of R to be 2 kΩ in gains other than +1. F This gives excellent distortion performance, maximum bandwidth, best flatness, and best pulse response. It also loadstheamplifier.Forexample;ingainof2withR =R =2kΩ,R toground,andV =4V,1mAofcurrent F G G OUT willflowthroughthefeedbackpathtoground.Ingainof+1,R isopenandnocurrentwillflowtoground.Inlow- G power applications, it is desirable to reduce the current in the feedback path by increasing the gain-setting resistors values. Using larger value gain resistors has two primary side effects (other than lower power) due to theirinteractionwithparasiticcircuitcapacitance. • Lowersthebandwidth • Lowersthephasemargin – Thiscausespeakinginthefrequencyresponse – Thiscausesovershootandringinginthepulseresponse Figure 55 shows the small-signal frequency response on OPA835EVM for noninverting gain of 2 with R and R F G equal to 2 kΩ, 10 kΩ, and 100 kΩ. The test was done with R = 2 kΩ. Due to loading effects of R , lower R L L L valuesmayreducethepeaking,buthighervalueswillnothaveasignificanteffect. 26 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 Feature Description (continued) 21 18 VVSOU=T 5= V 1,00 Vpp, RF= 100 kW G = 2, 15 RL= 2 kW RF= 10 kW B12 d e - 9 nitud 6 RF= 2 kW g ain Ma 3 RFC=F 1=0 01 kpWF G 0 RF= 10 kW -3 CF= 1 pF -6 -9 0 1 10 100 f - Frequency - MHz Figure55. FrequencyResponseWithVariousGain-SettingResistorValues As expected, larger value gain resistors cause lower bandwidth and peaking in the response (peaking in frequency response is synonymous with overshoot and ringing in pulse response). Adding 1-pF capacitors in parallel with R helps compensate the phase margin and restores flat frequency response. Figure 56 shows the F testcircuit. V IN R OPA835 V G OUT 2 kW R F C F Figure56. G=2TestCircuitforVariousGain-SettingResistorValues 8.3.5 DrivingCapacitiveLoads The OPA835 and OPA2835 devices drive up to a nominal capacitive load of 10 pF on the output with no special consideration. When driving capacitive loads greater than 10 pF, TI recommends using a small resistor (R ) in O series with the output as close to the device as possible. Without R output capacitance interacts with the output O, impedance of the amplifier causing phase shift in the loop gain of the amplifier that will reduce the phase margin. This will cause peaking in the frequency response and overshoot and ringing in the pulse response. Interaction withotherparasiticelementsmayleadtoinstabilityoroscillation.InsertingR willisolatethephaseshiftfromthe O loopgainpathandrestorethephasemargin;howeverR canlimitthebandwidthslightly. O Figure 57 shows the test circuit and Figure 41 shows the recommended values of R versus capacitive loads, O C .SeeFigure40forthefrequencyresponseswithvariousvalues. L VIN RO OPA835 VOUT C 2 kW L Figure57. R versusC TestCircuit O L Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com 8.4 Device Functional Modes 8.4.1 Split-SupplyOperation(±1.25Vto ±2.75V) To facilitate testing with common lab equipment, the OPA835 EVM ( see OPA835DBV and OPA836DBV EVM User's Guide (SLOU314) ) is built to allow split-supply operation. This configuration eases lab testing because the mid-point between the power rails is ground, and most signal generators, network analyzers, oscilloscopes, spectrumanalyzersandotherlabequipmenthaveinputsandoutputswithagroundreference. Figure 58 shows a simple noninverting configuration analogous to Figure 53 with ±2.5-V supply and V equal REF to ground. The input and output will swing symmetrically around ground. For ease of use, split supplies are preferredinsystemswheresignalsswingaroundground. +2.5 V V RG OPA835 VOUT SIG Load -2.5 V R F Figure58. Split-SupplyOperation 8.4.2 Single-SupplyOperation(2.5Vto5.5V) Often, newer systems use a single power supply to improve efficiency and reduce the cost of the power supply. OPA835 and OPA2835 devices are designed for use with single-supply power operation and can be used with single-supply power with no change in performance from split supply, as long as the input and output are biased withinthelinearoperationofthedevice. To change the circuit from split supply to single-supply, level shift all voltages by ½ the difference between the powersupplyrails.Forexample,changingfrom± 2.5-Vsplitsupplyto5-Vsingle-supplyisshowninFigure59. 5 V V RG OPA835 VOUT SIG Load R F 2.5 V Figure59. Single-SupplyConcept A practical circuit will have an amplifier or other circuit providing the bias voltage for the input, and the output of thisamplifierstageprovidesthebiasforthenextstage. Figure 60 shows a typical noninverting amplifier circuit. With 5-V single-supply, a mid-supply reference generator is needed to bias the negative side through R . To cancel the voltage offset that would otherwise be caused by G the input bias currents, R is selected to be equal to R in parallel with R . For example if gain of 2 is required 1 F G and R = 2 kΩ, select R = 2 kΩ to set the gain, and R = 1 kΩ for bias current cancellation. The value for C is F G 1 dependentonthereference,andTIrecommendsavalueofatleast0.1 µFtolimitnoise. 28 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 Device Functional Modes (continued) Signal and bias from previous stage V SIG 2.5 V 5 V R 1 R O OPA835 VOUT GV R SIG 2.5 V G 5 V 2.5 V REF C Signal and bias to RF next stage Figure60. NoninvertingSingleSupplyWithReference Figure 61 shows a similar noninverting single-supply scenario with the reference generator replaced by the Thevenin equivalent using resistors and the positive supply. R ’ and R ” form a resistor divider from the 5-V G G supply and are used to bias the negative side with the parallel sum equal to the equivalent R to set the gain. To G cancel the voltage offset that would otherwise be caused by the input bias currents, R is selected to be equal to 1 R in parallel with R ’ in parallel with R ” (R = R || R ’ || R ”). For example, if a gain of 2 is required and R = 2 F G G 1 F G G F kΩ, selecting R ’ = R ” = 4 kΩ gives equivalent parallel sum of 2 kΩ, sets the gain to 2, and references the input G G to mid supply (2.5 V). R is set to 1 kΩ for bias current cancellation. The resistor divider costs less than the 2.5V 1 referenceinFigure60butmayincreasethecurrentfromthe5-Vsupply. Signal and bias from previous stage V SIG 2.5 V 5 V R 1 R O RG’ OPA835 VOUT GV SIG 5 V 2.5 V R ” G Signal and bias to RF next stage Figure61. NoninvertingSingleSupplyWithResistors Figure62showsatypicalinverting-amplifiercircuit.Witha5-Vsingle-supply,amid-supplyreferencegeneratoris needed to bias the positive side through R . To cancel the voltage offset that would otherwise be caused by the 1 input bias currents, R is selected to be equal to R in parallel with R . For example, if a gain of –2 is required 1 F G and R = 2 kΩ, select R = 1 kΩ to set the gain and R = 667 Ω for bias current cancellation. The value for C is F G 1 dependentonthereference,butTIrecommendsavalueofatleast0.1 µFtolimitnoiseintotheopamp. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Device Functional Modes (continued) 5 V R 1 2.5 V 5 V REF RO C OPA835 VOUT GV SIG 2.5 V RG RF Sneigxnt aslt aagned bias to V SIG 2.5 V Signal and bias from previous stage Figure62. InvertingSingleSupplyWithReference Figure 63 shows a similar inverting single-supply scenario with the reference generator replaced by the Thevenin equivalent using resistors and the positive supply. R and R form a resistor divider from the 5-V supply and are 1 2 used to bias the positive side. To cancel the voltage offset that would otherwise be caused by the input bias currents, set the parallel sum of R and R equal to the parallel sum of R and R . C must be added to limit 1 2 F G coupling of noise into the positive input. For example, if gain of –2 is required and R = 2 kΩ, select R = 1 kΩ to F G set the gain. R = R = 667 Ω for mid-supply voltage bias and for op-amp input-bias current cancellation. A good 1 2 value for C is 0.1 µF. The resistor divider costs less than the 2.5-V reference in Figure 62 but may increase the currentfromthe5-Vsupply. 5 V 5 V R 1 R O OPA835 V R2 C OUT GV SIG 2.5 V R R Signal and bias to G F next stage V SIG 2.5 V Signal and bias from previous stage Figure63. InvertingSingleSupplyWithResistors 30 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information 9.1.1 NoninvertingAmplifier The OPA835 and OPA2835 devices can be used as noninverting amplifiers with signal input to the noninverting input,V AbasicblockdiagramofthecircuitisshowninFigure53. IN+. IfV =V +V ,theamplifieroutputmaybecalculatedaccordingtoEquation1. IN REF SIG æ R ö VOUT = VSIG ç1 + RF ÷ +VREF è G ø (1) R G= 1 + F R The signal gain of the circuit is set by G, and V provides a reference around which the input and REF outputsignalsswing.Outputsignalsarein-phasewiththeinputsignals. The OPA835 and OPA2835 devices are designed for the nominal value of R to be 2 kΩ in gains other than +1. F This gives excellent distortion performance, maximum bandwidth, best flatness, and best pulse response. R = 2 F kΩ must be used as a default unless other design goals require changing to other values. All test circuits used to collect data for this data sheet had R = 2 kΩ for all gains other than +1. A gain of +1 is a special case where R F F isshortedandR isleftopen. G 9.1.2 InvertingAmplifier The OPA835 and OPA2835 devices can be used as inverting amplifiers with signal input to the inverting input, V ,throughthegain-settingresistorR .AbasicblockdiagramofthecircuitisshowninFigure54. IN– G IfV =V +V ,theoutputoftheamplifiermaybecalculatedaccordingtoEquation2. IN REF SIG æ-R ö VOUT =VSIGç R F ÷+VREF è G ø (2) -R G= F R The signal gain of the circuit G and V provides a reference point around which the input and output REF signalsswing.Outputsignalsare180˚out-of-phasewiththeinputsignals.ThenominalvalueofR mustbe2kΩ F forinvertinggains. 9.1.3 InstrumentationAmplifier Figure 64 is an instrumentation amplifier that combines the high input impedance of the differential-to-differential amplifier circuit and the common-mode rejection of the differential-to-single-ended amplifier circuit. This circuit is often used in applications where high input impedance is required (such as taps from a differential line) or in caseswherethesignalsourceisahighimpedance. If V = V + V and V = V + V , the output of the amplifier may be calculated according to IN+ CM SIG+ IN– CM SIG– Equation3. æ 2R ö æR ö VOUT = (VIN+-VIN-) ´ç1 + R F1÷ çRF2 ÷+VREF è G1 ø è G2 ø (3) Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 31 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Application Information (continued) æ 2R ö æR ö G = ç1 + F1÷ ç F2 ÷ R R Thesignalgainofthecircuitis è G1 ø è G2 ø.V isrejected,andV providesalevelshiftaround CM REF whichtheoutputsignalswings.Thesingle-endedoutputsignalisin-phasewiththedifferentialinputsignal. V IN- ½OPA2835 V SIG- R F2 V CM R G2 R F1 RG1 RG2 OPA835 VOUT R F1 G[(V )-(V )] V SIG+ SIG- V SIG+ RF2 VREF CM ½OPA2835 V V REF IN+ Figure64. InstrumentationAmplifier Integratedsolutionsareavailable,buttheOPA835deviceprovidesamuchlower-power,high-frequencysolution. ForbestCMRRperformance,resistorsmustbematched.AgoodruleofthumbisCMRR ≈ theresistortolerance; so0.1%tolerancewillprovideapproximately60-dBCMRR. 9.1.4 Attenuators ThenoninvertingcircuitshowninFigure53hasaminimumgainof1.Toimplementattenuation,aresistordivider can be placed in series with the positive input, and the amplifier set for a gain of 1 by shorting V to V and OUT IN– removingR Becausetheopampinputishighimpedance,theresistordividersetstheattenuation. G. The inverting circuit of Figure 54 is used as an attenuator by making R larger than R . The attenuation is the G F resistorratio.Forexample,a10:1attenuatorcanbeimplementedwithR =2kΩandR =20kΩ. F G 9.1.5 Single-EndedtoDifferentialAmplifier Figure 65 shows an amplifier circuit that converts single-ended signals to differential signals and provides gain and level shifting. This circuit can convert signals to differential in applications such as driving Cat5 cabling or drivingdifferential-inputSARand ΔΣADCs. BysettingV =V +V thentheoutputoftheamplifiermaybecalculatedaccordingtoEquation4. IN REF SIG, R V =GxV +V andV =-GxV +V Where: G=1+ F OUT+ IN REF OUT- IN REF R G (4) The differential-signal gain of the circuit is 2 × G, and V provides a reference around which the output signal REF swings.Thedifferentialoutputsignalisin-phasewiththesingle-endedinputsignal. R G x V O SIG V V OUT+ REF VSIG R1 ½OPA2835 2R 2R VREF VIN + V REF V R -G x V REF O SIG V V OUT- REF + ½OPA2835 R R G F Figure65. Single-EndedtoDifferentialAmplifier 32 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 Application Information (continued) Line termination on the output can be accomplished with resistors R . The differential impedance seen from the O line will be 2 × R . For example, if 100-Ω Cat5 cable is used with double termination, the amplifier is typically set O for a differential gain of 2 V/V (6 dB) with R = 0 Ω (short) R = ∞Ω (open), 2R = 2 kΩ, R1 = 0 Ω, R = 1 kΩ to F G balance the input bias currents, and R = 49.9 Ω for output line termination. This configuration is shown in O Figure66. For driving a differential-input ADC the situation is similar, but the output resistors, R , are selected with a O capacitoracrosstheADCinputforoptimumfilteringandsettling-timeperformance. R0 G x V 49.9Ω SIG V V OUT+ REF V SIG ½OPA2835 Rf Rf VREF VIN + 2 kΩ 2 kΩ V R0 -G x V REF 49.9Ω SIG V V OUT- REF + ½OPA2835 Figure66. Cat5LineDriverWithGain=2V/V(6dB) 9.1.6 DifferentialtoSingle-EndedAmplifier Figure 67 shows a differential amplifier that converts differential signals to single-ended and provides gain (or attenuation) and level shifting. This circuit can be used in applications like a line receiver for converting a differentialsignalfromaCat5cabletoasingle-endedsignal. If V = V + V and V = V + V , then the output of the amplifier may be calculated according to IN+ CM SIG+ IN– CM SIG– Equation5. æR ö VOUT = (VIN+ - VIN-)´çRF ÷ +VREF è G ø (5) R G= F R Thesignalgainofthecircuitis G ,V isrejected,andV providesalevelshiftaroundwhichtheoutput CM REF signalswings.Thesingle-endedoutputsignalisin-phasewiththedifferentialinputsignal. V SIG- R F V CM R G V IN- RG OPA835 VOUT V IN+ G[(V )-(V )] SIG+ SIG- V SIG+ R V V F REF CM V REF Figure67. DifferentialtoSingle-EndedAmplifier Line termination can be accomplished by adding a shunt resistor across the VIN+ and VIN- inputs. The differential impedance is the shunt resistance in parallel with the input impedance of the amplifier circuit, which is usually much higher. For low gain and low line impedance, the resistor value to add is approximately the impedance of the line. For example, if a 100-Ω Cat5 cable is used with a gain of 1 amplifier and R = R = 2 kΩ, F G adding a 100-Ω shunt across the input will give a differential impedance of 99 Ω, which is adequate for most applications. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 33 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Application Information (continued) For best CMRR performance, resistors must be matched. Assuming CMRR ≈ the resistor tolerance, a 0.1% tolerancewillprovideabout60-dBCMRR. 9.1.7 Differential-to-DifferentialAmplifier Figure 68 shows a differential amplifier that is used to amplify differential signals. This circuit has high input impedance and is used in differential line driver applications where the signal source is a high-impedance driver (forexample,adifferentialDAC)thatmustdrivealine. IftheusersetsV =V +V thentheoutputoftheamplifiermaybecalculatedaccordingtoEquation6. IN± CM SIG±, æ 2R ö VOUT± = VIN± ´ç1 + R F ÷ + VCM è G ø (6) 2R G= 1 + F R The signal gain of the circuit is G , and V passes with unity gain. The amplifier combines two CM noninverting amplifiers into one differential amplifier that shares the R resistor, which makes R effectively ½ its G G valuewhencalculatingthegain.Theoutputsignalsarein-phasewiththeinputsignals. V IN- ½OPA2835 VOUT- V SIG- VCM GVSIG- V CM R F R G RF GVSIG+ VSIG+ VCM V CM ½OPA2835 VOUT+ V IN+ Figure68. Differential-to-DifferentialAmplifier 9.1.8 GainSettingWithOPA835RUNIntegratedResistors The OPA835 RUN package option includes integrated gain-setting resistors for the smallest possible footprint on a printed circuit board (≈ 2.00 mm x 2.00 mm). By adding circuit traces on the PCB, gains of +1, –1, –1.33, +2, +2.33, -3, +4, –4, +5, –5.33, +6.33, –7, +8 and inverting attenuations of –0.1429, –0.1875, –0.25, –0.33, –0.75 canbeachieved. Figure 69 shows a simplified view of how the OPA835IRUN integrated gain-setting network is implemented. Table 3 lists the required pin connections for various noninverting and inverting gains (reference Figure 53 and Figure 54). Table 4 lists the required pin connections for various attenuations using the inverting-amplifier architecture (reference Figure 54). Due to ESD protection devices being used on all pins, the absolute maximum and minimum input voltage range, V – 0.7 V to V + 0.7 V, applies to the gain-setting resistors, and so S– S+ attenuationoflargeinputvoltageswillrequireexternalresistorstoimplement. The gain-setting resistors are laser trimmed to 1% tolerance with nominal values of 2.4 kΩ, 1.8 kΩ, and 600 Ω. The gain-setting resistors have excellent temperature coefficient, and gain tracking is superior to using external gain-setting resistors. The 800-Ω resistor and 1.25-pF capacitor in parallel with the 2.4-kΩ gain-setting resistor providecompensationforbeststabilityandpulseresponse. 34 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 Application Information (continued) FB FB FB FB 1 2 3 4 9 8 7 6 2.4k 1.8k 600 800 1.25 pF Figure69. OPA835IRUNGain-SettingNetwork Table3.GainSettings NONINVERTING INVERTINGGAIN GAIN SHORTPINS SHORTPINS SHORTPINS SHORTPINS (Figure54) (Figure53) 1V/V(0dB) — 1to9 — 2V/V(6.02dB) –1V/V(0dB) 1to9 2to8 6toGND — 2.33V/V(7.36dB) –1.33V/V(2.5dB) 1to9 2to8 7toGND — 4V/V(12.04dB) –3V/V(9.54dB) 1to8 2to7 6toGND — 5V/V(13.98dB) –4V/V(12.04dB) 1to9 2to7or8 7to8 6toGND 6.33V/V(16.03dB) –5.33V/V(14.54dB) 1to9 2to6or8 6to8 7toGND 8V/V(18.06dB) –7V/V(16.90dB) 1to9 2to7 6toGND — Table4.AttenuatorSettings INVERTINGGAIN SHORTPINS SHORTPINS SHORTPINS SHORTPINS (Figure54) –0.75V/V(–2.5dB) 1to7 2to8 9toGND — –0.333V/V(–9.54dB) 1to6 2to7 8toGND — –0.25V/V(–12.04dB) 1to6 2to7or8 7to8 9toGND –0.1875V/V(–14.54dB) 1to7 2to6or8 6to8 9toGND –0.1429V/V(–16.90dB) 1to6 2to7 9toGND — 9.1.9 PulseApplicationWithSingle-Supply For pulsed applications where the signal is at ground and pulses to a positive or negative voltage, the circuit bias-voltage considerations differ from those in an application with a signal that swings symmetrically about a referencepoint.Figure70showsacircuitwherethesignalisatground(0V)andpulsestoapositivevalue. Signal and bias from previous stage V SIG 0 V 5 V R 1 R O OPA835 V OUT GV R SIG G 0 V Signal and bias to RF next stage Figure70. NoninvertingSingleSupplyWithPulse Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 35 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com If the input signal pulses negative from ground, an inverting amplifier is more appropriate, as shown in Figure 71. A key consideration in noninverting and inverting cases is that the input and output voltages are kept within the limits of the amplifier. Because the V of the OPA835 device includes the negative supply rail, the OPA835 op ICR ampiswell-suitedforthisapplication. 5 V R 1 R O OPA835 VOUT GV R SIG G Signal and bias 0 V from previous stage Signal and bias to 0 V R next stage F V SIG Figure71. InvertingSingleSupplyWithPulse 9.1.10 ADCDriverPerformance The OPA835 device provides excellent performance when driving high-performance delta-sigma (ΔΣ) and successive-approximation-register(SAR)ADCsinlow-poweraudioandindustrialapplications. To show achievable performance, the OPA835 device is tested as the drive amplifier for the ADS8326 device. The ADS8326 device is a 16-bit, micro power, SAR ADC with pseudodifferential inputs and sample rates up to 250 kSPS. The device offers excellent noise and distortion performance in a small 8-pin SOIC or VSSOP (MSOP) package. Low power and small size make the ADS8326 and OPA835 devices an ideal solution for portable and battery-operated systems, remote data-acquisition modules, simultaneous multichannel systems, andisolateddataacquisition. With the circuit shown in Figure 72to test the performance, Figure 73 shows the spectral performance with a 10- kHzinputfrequency.ThetabulatedACresultsareinTable5. 2.7V VSIG VSIG 0V 4.02k 2.7V 1.35V 5V 2.5V 2k VS+ VIN 100 OPA835 +InVDD REF 4.02k 2.2nF ADS8326 VS- -In 2k 2k Figure72. OPA835andADS8326TestCircuit 36 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 0 -20 -40 -60 c B d - N AI -80 -100 -120 -140 0 20 40 60 80 100 120 f - Frequency - Hz Figure73. ADS8326andOPA83510-kHzFFT Table5.ACAnalysis TONE(Hz) SIGNAL(dBFS) SNR(dBc) THD(dBc) SINAD(dBc) SFDR(dBc) 10k –0.85 81.9 –87.5 80.8 89.9 9.2 Typical Application 9.2.1 AudioFrequencyPerformance The OPA835 and OPA2835 devices provide excellent audio performance with low quiescent power. To show performance in the audio band, an audio analyzer from Audio Precision (2700 series) tests THD+N and FFT at 1 V outputvoltage. RMS Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 37 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com Typical Application (continued) Figure74showsthetestcircuitusedfortheaudio-frequencyperformanceapplication. V +2.5 V IN V FromAP OUT ToAP 100 pFOPA835 10W -2.5 V The100-pFcapacitortogroundontheinputhelpedtodecouplenoisepickupinthelabandimprovednoise performance. Figure74. OPA835AudioPrecisionAnalyzerTestCircuit 9.2.1.1 DesignRequirements Design a low distortion, single-ended input to single-ended output audio amplifier using the OPA835 device. The 2700seriesaudioanalyzerfromAudioPrecisionisthesignalsourceandthemeasurementsystem. Table6.DesignRequirements INPUT PERFORMANCE CONFIGURATION R EXCITATION TARGET LOAD 300Ωand OPA835UnityGainConfig. 1KHzToneFrequency >110dBcSFDR 100KΩ 9.2.1.2 DetailedDesignProcedure The OPA835 device is tested in this application in a unity-gain buffer configuration. A buffer configuration is selected as the configuration maximizes the loop gain of the amplifier configuration. At higher closed-loop gains, the loop gain of the circuit reduces, which results in degraded harmonic distortion. The relationship between distortion and closed loop gain at a fixed input frequency can be seen in Figure 36 in Typical Characteristics: V S = 5 V. The test was performed under varying output-load conditions using a resistive load of 300 Ω and 100 KΩ. Figure 34 shows the distortion performance of the amplifier versus the output resistive load. Output loading, outputswing,andclosed-loopgainplayakeyroleindeterminingthedistortionperformanceoftheamplifier. NOTE The 100-pF capacitor to ground on the input helped to decouple noise pickup in the lab andimprovednoiseperformance. The Audio Precision was configured as a single-ended output in this application circuit. In applications where a differential output is available, the OPA835 device can be configured as a differential to single-ended amplifier as shown in Figure 67. Power supply bypassing is critical to reject noise from the power supplies. A 2.2-μF power- supply decoupling capacitor must be placed within two inches of the device and can be shared with other op amps on the same board. A 0.1-μF decoupling capacitor must be placed as close to the power supply pins as possible, preferably within 0.1 inch. For split supply, a capacitor is required for both supplies. A 0.1-µF capacitor placed directly between the supplies is also beneficial for improving system noise performance. If the output load is heavy, from 16 Ω to 32 Ω, amplifier performance could begin to degrade. To drive such heavy loads, both channels of the OPA2835 device can be paralleled with the outputs isolated with 1-Ω resistors to reduce the loadingeffects. 38 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 9.2.1.3 ApplicationCurves A10-Ωseriesresistorcanbeinsertedbetweenthecapacitorandthenoninvertingpintoisolatethecapacitance. Figure 75 shows the THD+N performance with 100-kΩ and 300-Ω loads, and with no weighting and A-weighting. With no weighting, the THD+N performance is dominated by the noise for both loads. A-weighting provides filtering that improves the noise so a larger difference can be seen between the loads due to more distortion with R =300Ω. L Figure 76 and Figure 77 show FFT output with a 1-kHz tone and 100-kΩ and 300-Ω loads. To show relative performance of the device versus the test set, one channel has the OPA835 device in-line between generator output and analyzer input, and the other channel is in “Gen Mon” loopback mode, which internally connects the signal generator to the analyzer input. With 100-kΩ load (see Figure 76), the curves are indistinguishable from each other except for noise, which means the OPA835 device cannot be directly measured. With a 300-Ω load as shown in Figure 77, the main difference between the curves is the OPA835 device due to the higher even- orderharmonics.Thetest-setperformancemaskstheodd-orderharmonics. -90 0 Bv VS= 5 V, -10 VS= 5 V, nic Distortion + Noise - d--11-009505 VGRBAWOF -=wU= =eT1 0i ,g=8Wh 01t ,i knVHgRzMS, NRRoLL ==w e31i00g00h tkWinW,g FFT - dBV-------87654320000000 VGROF =U= T1 0,=W 1 VRMS, Harmo -110 RRLL== 310000 kWW, -90 Total --110100 Gen Mon - 100k +N - -115 -120 RL= 100k HD -130 T-120 -140 10 100 1k 10k 100k 0 2k 4k 6k 8k 10k 12k 14 16k 18k 20k f - Frequency - Hz f - Frequency - Hz Figure75.OPA8351V 20Hzto80kHzTHD+N Figure76.OPA835andAPGenMon1-kHzFFTPlot; RMS V =1V ,R =100kΩ OUT RMS L 0 -10 VS= 5 V, -20 VOUT= 1 VRMS, G = 1, -30 RF= 0W -40 -50 BV-60 d T - -70 FF-80 -90 -100 Gen Mon - 300 -110 RL= 300 -120 -130 -140 0 2k 4k 6k 8k 10k 12k 14 16k 18k 20k f - Frequency - Hz Figure77.OPA835andAPGenMon1kHzFFTPlot; V =1V ,R =300Ω OUT RMS L Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 39 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com 9.2.2 ActiveFilters The OPA835 and OPA2835 devices are good choices for active filters. Figure 79 and Figure 78 show MFB and Sallen-Key circuits designed using the WEBENCH® Filter Designer to implement second-order low-pass Butterworthfiltercircuits.Figure80 showsthefrequencyresponse. Other MFB and Sallen-Key filter circuits display similar performance. The main difference is the MFB is an inverting amplifier in the pass band and the Sallen-Key is noninverting. The primary advantage for each is the Sallen-Key in unity gain has no resistor gain error term, and thus no sensitivity to gain error, while the MFB has betterattenuationpropertiesbeyondthebandwidthoftheopamp. 1.82 kW 220 pF 1.82 kW 4.22 kW OPA835 1.5 nF Figure78. MFB100-kHzSecond-OrderLow-PassButterworthFilterCircuit 2.2 nF 562W 6.19 kW OPA835 330 pF Figure79. Sallen-Key100-kHzSecond-OrderLow-PassButterworthFilterCircuit 9.2.2.1 ApplicationCurve VS= 5 V, 0 VOUT= 100 mVpp dB -10 MFB e - d u nit g Ma -20 Sallen-Key n ai G -30 -40 1k 10k 100k 1M f - Frequency - Hz Figure80. MFBandSallen-KeySecond-OrderLow-PassButterworthFilterResponse 40 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 10 Power Supply Recommendations The OPAx835 devices are intended to work in a supply range of 2.7 V to 5 V. Supply-voltage tolerances are supported with the specified operating range of 2.5 V (7% on a 2.7-V supply) and 5.5 V (10% on a 5-V supply). Good power-supply bypassing is required. Minimize the distance (< 0.1 inch) from the power-supply pins to high frequency, 0.1-μF decoupling capacitors. A larger capacitor (2.2 µF is typical) is used along with a high frequency, 0.1-µF supply-decoupling capacitor at the device supply pins. For single-supply operation, only the positive supply has these capacitors. When a split supply is used, use these capacitors for each supply to ground. If necessary, place the larger capacitors further from the device and share these capacitors among several devices in the same area of the PCB. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. An optional supply decoupling capacitor across the two power supplies(forbipolaroperation)reducessecondharmonicdistortion. 11 Layout 11.1 Layout Guidelines The OPA835 EVM (SLOU314) can be used as a reference when designing the circuit board. TI recommends following the EVM layout of the external components near to the amplifier, ground plane construction, and power routingascloselyaspossible.Generalguidelinesarelistedbelow: 1. Signalroutingmustbedirectandasshortaspossibleintoanoutoftheopamp. 2. Thefeedbackpathmustbeshortanddirectavoidingviasifpossible,especiallywithG=+1. 3. Ground or power planes must be removed from directly under the negative input and output pins of the amplifier. 4. TI recommends placing a series output resistor as close to the output pin as possible. See Figure 41 for recommendedvaluesfortheexpectedcapacitiveload. 5. A 2.2-µF power-supply decoupling capacitor must be placed within two inches of the device and can be sharedwithotheropamps.Forsplitsupply,acapacitorisrequiredforbothsupplies. 6. A 0.1-µF power-supply decoupling capacitor must be placed as close to the supply pins as possible, preferablywithin0.1inch.Forsplitsupply,acapacitorisrequiredforbothsupplies. 7. The PD pin uses TTL logic levels. If the pin is not used, it must tied to the positive supply to enable the amplifier. If the pin is used, it must be actively driven. A bypass capacitor is not necessary, but is used for robustnessinnoisyenvironments. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 41 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com 11.2 Layout Example Figure81. TopLayer Figure82. BottomLayer 42 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 www.ti.com SLOS713I–JANUARY2011–REVISEDAUGUST2016 12 Device and Documentation Support 12.1 Device Support 12.1.1 DevelopmentSupport WEBENCH®FilterDesigner 12.2 Documentation Support 12.2.1 RelatedDocumentation Forrelateddocumentationseethefollowing: OPA835DBV,OPA836DBVEVM (SLOU314). 12.2.2 RelatedLinks Table 7 lists quick access links. Categories include technical documents, support and community resources, toolsandsoftware,andquickaccesstosampleorbuy. Table7.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY OPA835 Clickhere Clickhere Clickhere Clickhere Clickhere OPA2835 Clickhere Clickhere Clickhere Clickhere Clickhere 12.2.3 ReceivingNotificationofDocumentationUpdates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.2.4 CommunityResources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.3 Trademarks E2EisatrademarkofTexasInstruments. WEBENCHisaregisteredtrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 43 ProductFolderLinks:OPA835 OPA2835

OPA835,OPA2835 SLOS713I–JANUARY2011–REVISEDAUGUST2016 www.ti.com 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 44 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA835 OPA2835

PACKAGE OPTION ADDENDUM www.ti.com 4-Dec-2017 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) OPA2835ID ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 2835 & no Sb/Br) OPA2835IDGS ACTIVE VSSOP DGS 10 80 Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR -40 to 125 2835 & no Sb/Br) OPA2835IDGSR ACTIVE VSSOP DGS 10 2500 Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR -40 to 125 2835 & no Sb/Br) OPA2835IDR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 2835 & no Sb/Br) OPA2835IRMCR ACTIVE UQFN RMC 10 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 2835 & no Sb/Br) OPA2835IRMCT ACTIVE UQFN RMC 10 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 2835 & no Sb/Br) OPA2835IRUNR ACTIVE QFN RUN 10 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 2835 & no Sb/Br) OPA2835IRUNT ACTIVE QFN RUN 10 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 2835 & no Sb/Br) OPA835IDBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 QUM & no Sb/Br) OPA835IDBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 QUM & no Sb/Br) OPA835IRUNR ACTIVE QFN RUN 10 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 835 & no Sb/Br) OPA835IRUNT ACTIVE QFN RUN 10 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 835 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 4-Dec-2017 Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 30-Mar-2017 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) OPA2835IDGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 OPA2835IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 OPA2835IRMCR UQFN RMC 10 3000 180.0 9.5 2.3 2.3 1.1 2.0 8.0 Q2 OPA2835IRMCT UQFN RMC 10 250 180.0 9.5 2.3 2.3 1.1 2.0 8.0 Q2 OPA2835IRUNR QFN RUN 10 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 OPA2835IRUNT QFN RUN 10 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 OPA835IDBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 OPA835IDBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 OPA835IRUNR QFN RUN 10 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 OPA835IRUNT QFN RUN 10 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 30-Mar-2017 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) OPA2835IDGSR VSSOP DGS 10 2500 366.0 364.0 50.0 OPA2835IDR SOIC D 8 2500 340.5 338.1 20.6 OPA2835IRMCR UQFN RMC 10 3000 205.0 200.0 30.0 OPA2835IRMCT UQFN RMC 10 250 205.0 200.0 30.0 OPA2835IRUNR QFN RUN 10 3000 210.0 185.0 35.0 OPA2835IRUNT QFN RUN 10 250 210.0 185.0 35.0 OPA835IDBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 OPA835IDBVT SOT-23 DBV 6 250 180.0 180.0 18.0 OPA835IRUNR QFN RUN 10 3000 210.0 185.0 35.0 OPA835IRUNT QFN RUN 10 250 210.0 185.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE DBV0006A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 B A 1.45 MAX PIN 1 INDEX AREA 1 6 2X 0.95 3.05 2.75 1.9 5 2 4 3 0.50 6X 0.25 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214840/B 03/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side. 4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation. 5. Refernce JEDEC MO-178. www.ti.com

EXAMPLE BOARD LAYOUT DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214840/B 03/2018 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214840/B 03/2018 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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PACKAGE OUTLINE DGS0010A VSSOP - 1.1 mm max height SCALE 3.200 SMALL OUTLINE PACKAGE C 5.05 4.75 TYP SEATING PLANE A PIN 1 ID 0.1 C AREA 8X 0.5 10 1 3.1 2X 2.9 NOTE 3 2 5 6 0.27 10X 0.17 B 3.1 0.1 C A B 1.1 MAX 2.9 NOTE 4 0.23 TYP SEE DETAIL A 0.13 0.25 GAGE PLANE 0.15 0.7 0 - 8 0.05 0.4 DETAIL A TYPICAL 4221984/A 05/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187, variation BA. www.ti.com

EXAMPLE BOARD LAYOUT DGS0010A VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE 10X (1.45) 10X (0.3) SYMM (R0.05) TYP 1 10 SYMM 8X (0.5) 5 6 (4.4) LAND PATTERN EXAMPLE SCALE:10X SOOPLEDNEINRG MASK METAL MSOELTDAEL RU NMDAESRK SOOPLEDNEINRG MASK 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS NOT TO SCALE 4221984/A 05/2015 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DGS0010A VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE 10X (1.45) SYMM (R0.05) TYP 10X (0.3) 1 10 SYMM 8X (0.5) 5 6 (4.4) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X 4221984/A 05/2015 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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