OPA705 OPA2705 OPA705 OPA4705 OPA705 OPA705 OPA705® SBOS182A – JUNE 2001 Low-Cost, CMOS, Rail-to-Rail, I/O OPERATIONAL AMPLIFIERS FEATURES DESCRIPTION (cid:1) RAIL-TO-RAIL INPUT AND OUTPUT The OPA705 series low-cost op amps are optimized for appli- (cid:1) WIDE SUPPLY RANGE: cations requiring rail-to-rail input and output swing. Single, Single Supply: 4V to 12V dual, and quad versions are offered in a variety of packages. Dual Supplies: ±2 to ±6 While the quiescent current is less than 200µA per amplifier, (cid:1) LOW QUIESCENT CURRENT: 160µA the OPA705 still offers excellent dynamic performance (1MHz GBW and 0.6V/µs SR) and unity-gain stability. (cid:1) LIMITED RANGE CMRR: 96dB (cid:1) LOW OFFSET: 0.5mV The OPA705 series is fully specified and guaranteed over the supply range of ±2V to ±6V. Input swing extends (cid:1) HIGH SPEED: 1MHz, 0.6V/µs 300mV beyond the rail and the output swings to within (cid:1) MicroSIZE PACKAGES: 40mV of the rail. SOT23-5, MSOP-8, TSSOP-14 The single version (OPA705) is available in the MicroSIZE (cid:1) LOW INPUT BIAS CURRENT: 1pA SOT23-5 and in the standard SO-8 surface-mount packages. The dual version (OPA2705) is available in the MSOP-8, APPLICATIONS SO-8, and DIP-8 packages. The quad OPA4705 is available in the TSSOP-14 and SO-14 packages. All are specified for (cid:1) AUTOMOTIVE APPLICATIONS: operation from –40°C to +85°C. Audio, Sensor Applications, Security Systems (cid:1) PORTABLE EQUIPMENT (cid:1) ACTIVE FILTERS (cid:1) TRANSDUCER AMPLIFIER (cid:1) TEST EQUIPMENT OPA705 (cid:1) DATA ACQUISITION NC 1 8 NC –In 2 7 V+ +In 3 6 Out OPA4705 OPA705 V– 4 5 NC Out A 1 14 Out D Out 1 5 V+ –In A 2 13 –In D SO-8, DIP-8 V– 2 OPA2705 A D +In A 3 12 +In D +In 3 4 –In Out A 1 8 V+ V+ 4 11 V– A –In A 2 7 Out B +In B 5 10 +In C SOT23-5 B C B +In A 3 6 –In B –In B 6 9 –In C V– 4 5 +In B Out B 7 8 Out C MSOP-8, SO-8, DIP-8 TSSOP-14, SO-14 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2001, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com

ABSOLUTE MAXIMUM RATINGS(1) ELECTROSTATIC Supply Voltage, V+ to V–.................................................................13.2V DISCHARGE SENSITIVITY Signal Input Terminals, Voltage(2).....................(V–) –0.3V to (V+) +0.3V Current(2)....................................................10mA This integrated circuit can be damaged by ESD. Texas Instru- Output Short-Circuit(3)..............................................................Continuous Operating Temperature..................................................–55°C to +125°C ments recommends that all integrated circuits be handled with Storage Temperature.....................................................–65°C to +150°C appropriate precautions. Failure to observe proper handling Junction Temperature....................................................................+150°C and installation procedures can cause damage. Lead Temperature (soldering, 10s)...............................................+300°C ESD damage can range from subtle performance degrada- NOTES: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may tion to complete device failure. Precision integrated circuits degrade device reliability. (2) Input terminals are diode-clamped to the power may be more susceptible to damage because very small supply rails. Input signals that can swing more than 0.3V beyond the supply parametric changes could cause the device not to meet its rails should be current-limited to 10mA or less. (3) Short-circuit to ground, one amplifier per package. published specifications. PACKAGE/ORDERING INFORMATION MINIMUM PACKAGE RECOMMENDED DRAWING PACKAGE ORDERING TRANSPORT PRODUCT DESCRIPTION GAIN PACKAGE NUMBER MARKING NUMBER(1) MEDIA OPA705NA Single, GBW = 1MHz 1 SOT23-5 331 A05 OPA705NA/250 Tape and Reel " " " " " " OPA705NA/3K Tape and Reel OPA705UA Single, GBW = 1MHz 1 SO-8 182 OPA705UA OPA705UA Rails " " " " " " OPA705UA/2K5 Tape and Reel OPA705PA Single, GBW = 1MHz 1 DIP-8 006 OPA705PA OPA705PA Rails OPA2705EA Dual, GBW = 1MHz 1 MSOP-8 337 B05 OPA2705EA/250 Tape and Reel " " " " " " OPA2705EA/2K5 Tape and Reel OPA2705UA Dual, GBW = 1MHz 1 SO-8 182 OPA2705UA OPA2705UA Rails " " " " " " OPA2705UA/2K5 Tape and Reel OPA2705PA Dual, GBW = 1MHz 1 DIP-8 006 OPA2705PA OPA2705PA Rails OPA4705EA Quad, GBW = 1MHz 1 TSSOP-14 357 OPA4705EA OPA4705EA/250 Tape and Reel " " " " " " OPA4705EA/2K5 Tape and Reel OPA4705UA Quad, GBW = 1MHz 1 SO-14 235 OPA4705UA OPA4705UA Rails " " " " " " OPA4705UA/2K5 Tape and Reel NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /3K indicates 3000 devices per reel). Ordering 3000 pieces of “OPA705NA/3K” will get a single 3000-piece Tape and Reel. OPA705, 2705, 4705 2 SBOS182A

ELECTRICAL CHARACTERISTICS: V = 4V to 12V S ° ° Boldface limits apply over the specified temperature range, T = –40 C to +85 C A At T = +25°C, R = 20kΩ connected to V /2 and V = V /2, unless otherwise noted. A L S OUT S OPA705NA, UA, PA OPA2705EA, UA, PA OPA4705EA, UA PARAMETER CONDITION MIN TYP MAX UNITS OFFSET VOLTAGE Input Offset Voltage V V = ±5V, V = 0V ±0.5 ±5 mV OS S CM Drift dV /dT T = –40°C to +85°C ±4 µV/°C OS A vs Power Supply PSRR V = ±2V to ±6V, V = 0V 20 100 µV/V S CM Over Temperature V = ±2V to ±6V, V = 0V 100 µV/V S CM Channel Separation, dc R = 20kΩ 1 µV/V L f = 1kHz 98 dB INPUT VOLTAGE RANGE Common-Mode Voltage Range V (V–) – 0.3 (V+) + 0.3 V CM Common-Mode Rejection Ratio CMRR V = ±5V, (V–) – 0.3V < V < (V+) + 0.3V 66 77 dB S CM over Temperature V = ±5V, (V–) < V < (V+) 74 dB S CM V = ±5V, (V–) – 0.3V < V < (V+) – 2V 66 96 dB S CM over Temperature V = ±5V, (V–) < V < (V+) – 2V 93 dB S CM INPUT BIAS CURRENT Input Bias Current I V = ±5V, V = 0V ±1 ±10 pA B S CM Input Offset Current I V = ±5V, V = 0V ±0.5 ±10 pA OS S CM INPUT IMPEDANCE Differential 4 • 109 || 4 Ω || pF Common-Mode 5 • 1012 || 4 Ω || pF NOISE Input Voltage Noise, f = 0.1Hz to 10Hz V = ±5V, V = 0V 6 µVp-p S CM Input Voltage Noise Density, f = 1kHz e V = ±5V, V = 0V 45 nV/√Hz n S CM Current Noise Density, f = 1kHz i V = ±5V, V = 0V 2.5 fA/√Hz n S CM OPEN-LOOP GAIN Open-Loop Voltage Gain A R = 100kΩ, (V–)+0.1V < V < (V+)–0.1V 120 dB OL L O R = 20kΩ, (V–)+0.075V < V < (V+)–0.075V 100 110 dB L O over Temperature R = 20kΩ, (V–)+0.075V < V < (V+)–0.075V 106 dB L O R = 5kΩ, (V–)+0.15V < V < (V+)–0.15V 100 110 dB L O over Temperature R = 5kΩ, (V–)+0.15V < V < (V+)–0.15V 106 dB L O OUTPUT Voltage Output Swing from Rail R = 100kΩ, A > 80dB 40 mV L OL R = 20kΩ, A > 100dB 75 mV L OL R = 5kΩ, A > 100dB 150 mV L OL Output Current I |V – V | < 1V ±10 mA OUT S OUT Short-Circuit Current I ±40 mA SC Capacitive Load Drive C See Typical Performance Curves LOAD FREQUENCY RESPONSE C = 100pF L Gain-Bandwidth Product GBW G = +1 1 MHz Slew Rate SR V = ±5V, G = +1 0.6 V/µs S Settling Time, 0.1% t V = ±5V, 5V Step, G = +1 15 µs S S 0.01% V = ±5V, 5V Step, G = +1 20 µs S Overload Recovery Time V • Gain = V 3 µs IN S Total Harmonic Distortion + Noise THD+N V = ±5V, V = 3Vp-p, G = +1, f = 1kHz 0.02 % S O POWER SUPPLY Specified Voltage Range, Single Supply V 4 12 V S Specified Voltage Range, Dual Supplies V ±2 ±6 V S Operating Voltage Range 3.6 to 12 V Quiescent Current (per amplifier) I I = 0 160 250 µA Q O over Temperature 200 µA TEMPERATURE RANGE Specified Range –40 85 °C Operating Range –55 125 °C Storage Range –65 150 °C Thermal Resistance θ JA SOT23-5 Surface-Mount 200 °C/W MSOP-8 Surface-Mount 150 °C/W TSSOP-14 Surface-Mount 100 °C/W SO-8 Surface Mount 150 °C/W SO-14 Surface Mount 100 °C/W DIP-8 100 °C/W OPA705, 2705, 4705 3 SBOS182A

TYPICAL CHARACTERISTICS At T = +25°C, V = ±5V, and R = 20kΩ, unless otherwise noted. A S L GAIN AND PHASE vs FREQUENCY CMRR vs FREQUENCY 120 120 120 100 100 CMRR Limited Range 100 80 80 60 60 80 Gain (dB) 4200 4200 °Phase () MRR (dB) 60 CMRR Full Scale 0 0 C 40 –20 –20 20 –40 –40 –60 –60 0 10 100 1k 10k 100k 1M 10M 1 10 100 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) PSRR vs FREQUENCY MAXIMUM AMPLITUDE vs FREQUENCY 140 7 (V+) – (V–) = 12V 120 6 100 5 R (dB) 80 ude (V) 4 SR 60 plit 3 P m A 40 2 20 1 0 0 1 10 100 1k 10k 100k 1M 100 1k 10k 100k 1M 10M Frequency (Hz) Frequency (Hz) INPUT CURRENT AND VOLTAGE CHANNEL SEPARATION vs FREQUENCY SPECTRAL NOISE vs FREQUENCY 160 10000 10000 140 Current Channel Separation (dB) 112086400000 nput Current and Voltage√Spectral Noise nV/Hz 1101001000 VNooltiasgee Noise 1111000000 Output Current Spectral√Noise fA/Hz I 20 0 0.1 0.1 10 100 1k 10k 100k 1M 0.1 1 10 100 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) OPA705, 2705, 4705 4 SBOS182A

TYPICAL CHARACTERISTICS (Cont.) At T = +25°C, V = ±5V, and R = 20kΩ, unless otherwise noted. A S L COMMON-MODE REJECTION RATIO vs TEMPERATURE OPEN-LOOP GAIN vs TEMPERATURE 120 140 110 130 Limited Scale 100 B) 120 d B) MRR ( 90 A (dOL110 C 80 100 70 Full Scale 60 90 –80 –60 –40 –20 0 20 40 60 80 100 120 140 –100 –75 –50 –25 0 25 50 75 100 125 150 175 Temperature (°C) Temperature (°C) INPUT BIAS (I ) AND OFFSET (I ) B OS CURRENT vs TEMPERATURE QUIESCENT CURRENT vs TEMPERATURE 100000 250 10000 200 1000 nt (pA) 100 IB A) 150 Curre 10 IOS µI (Q100 s a Bi 1 50 0.1 0.0 0 –50 –25 0 25 50 75 100 125 150 175 –100 –75 –50 –25 0 25 50 75 100 125 150 175 Temperature (°C) Temperature (°C) TOTAL HARMONIC DISTORTION PLUS NOISE PSRR vs TEMPERATURE (Load = 5kΩ, BW = 8kHz, 1.0Vrms, G = +1) 120 1.000 110 100 0.100 dB) %) PSRR ( 90 THD ( 80 0.010 70 60 0.001 –75 –50 –25 0 10 25 50 75 100 110 130 150 1 10 100 1k 10k 100k Temperature (°C) Frequency (Hz) OPA705, 2705, 4705 5 SBOS182A

TYPICAL CHARACTERISTICS (Cont.) At T = +25°C, V = ±5V, and R = 20kΩ, unless otherwise noted. A S L INPUT BIAS CURRENT (I ) INPUT BIAS CURRENT (I ) B B vs COMMON-MODE VOLTAGE (V ) vs COMMON-MODE VOLTAGE (V ) CM CM TEMPERATURE = °25C TEMPERATURE = 125°C 15 20 10 15 A) A) p n nt ( 5 nt ( 10 e e Curr 0 Curr 5 s s a a Bi Bi ut –5 ut 0 p p n n I I –10 –5 –15 –10 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5 6 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5 6 Common-Mode Voltage, V (V) Common-Mode Voltage, V (V) CM CM SHORT-CIRCUIT CURRENT QUIESCENT CURRENT vs SUPPLY VOLTAGE vs SUPPLY VOLTAGE 200 60 I N (Sinking) SC 190 50 A) 180 mA) µCurrent ( 117600 Current ( 4300 Quiescent 115400 hort-Circuit 20 ISC P (Sourcing) 130 S 10 120 0 2 4 6 8 10 12 14 2 4 6 8 10 12 14 Supply Voltage (V) Supply Voltage (V) SMALL-SIGNAL OVERSHOOT (%) OUTPUT VOLTAGE SWING vs OUTPUT CURRENT vs CAPACITIVE LOAD AND GAIN 6 90 G = +1 +125°C 80 4 Sourcing +25°C –55°C 70 e (V) 2 %) 60 ut Voltag 0 ershoot ( 5400 G = –1 p v ut –2 O 30 O Sinking –55°C 20 –4 G= +5 +125°C +25°C 10 –6 0 0 10 20 30 40 50 60 70 10 100 1k 10k Output Current (±mA) Load Capacitance Value (pF) OPA705, 2705, 4705 6 SBOS182A

TYPICAL CHARACTERISTICS (Cont.) At T = +25°C, V = ±5V, and R = 20kΩ, unless otherwise noted. A S L SETTLING TIME vs GAIN V PRODUCTION DISTRIBUTION OS 100 25 90 80 20 µme (s) 7600 0.01% y (%) 15 Ti nc g 50 ue ettlin 40 Freq 10 S 30 5 0.1% 20 10 0 1 10 100 050505050515050505050 5.4.4.3.3.2.2.1.1.0.0.0.1.1.2.2.3.3.4.4.5. Non-Inverting Gain (V/V) –––––––––– Voltage Offset (mV) SMALL SIGNAL STEP RESPONSE VOS DRIFT PRODUCTION DISTRIBUTION (G = +1V/V, RL = 20kΩ, CL = 100pF) 25 20 %) ncy ( 15 V/div e m equ 10 50 Fr 5 0 0741852963036925814700 5µs/div ≤ 3≤ 2≤ 2≤ 2≤ 1≤ 1≤ 1≤ ≤ ≤ < < < < < 1< 1< 1< 2< 2< 2< 3> 3 Voltage Offset (µV/°C) LARGE SIGNAL STEP RESPONSE (G = +1V/V, R = 20kΩ, C = 100pF) L L v di V/ 1 10µs/div OPA705, 2705, 4705 7 SBOS182A

APPLICATIONS INFORMATION Power-supply pins should be bypassed with 1000pF ceramic capacitors in parallel with 1µF tantalum capacitors. OPA705 series op amps can operate on 160µA quiescent current from a single (or split) supply in the range of 4V to OPERATING VOLTAGE 12V (±2V to ±6V), making them highly versatile and easy OPA705 series op amps are fully specified and guaranteed to use. The OPA705 is unity-gain stable and offers 1MHz from +4V to +12V over a temperature range of –40ºC to bandwidth and 0.6V/µs slew rate. +85ºC. Parameters that vary significantly with operating volt- Rail-to-rail input and output swing helps maintain dynamic ages or temperature are shown in the Typical Characteristics. range, especially in low supply applications. Figure 1 shows the input and output waveforms for the OPA705 in unity- gain configuration. Operation is from a ±5V supply with a RAIL-TO-RAIL INPUT 100kΩ load connected to V /2. The input is a 10Vp-p The input common-mode voltage range of the OPA705 series S sinusoid. Output voltage is approximately 10Vp-p. extends 300mV beyond the supply rails at room temperature. This is achieved with a complementary input stage—an N- channel input differential pair in parallel with a P-channel differential pair, as shown in Figure 2. The N-channel pair is Input G = +1, VS = ±5V active for input voltages close to the positive rail, typically (V+) – 2.0V to 300mV above the positive supply, while the P- channel pair is on for inputs from 300mV below the negative v supply to approximately (V+) – 1.5V. There is a small di V/ transition region, typically (V+) – 2.0V to (V+) – 1.5V, in 0 2. which both pairs are on. This 500mV transition region can vary ±100mV with process variation. Thus, the transition region (both stages on) can range from (V+) – 2.1V to (V+) – 1.4V on the low end, up to (V+) – 1.9V to (V+) – 1.6V on Output (inverted on scope) the high end. Within the 500mV transition region PSRR, 200µs/div CMRR, offset voltage, and offset drift, and THD may vary compared to operation outside this region. FIGURE 1. Rail-to-Rail Input and Output. V+ V O VIN+ VIN– V– FIGURE 2. Simplified Schematic. OPA705, 2705, 4705 8 SBOS182A

INPUT VOLTAGE RAIL-TO-RAIL OUTPUT A class AB output stage with common-source transistors is Device inputs are protected by ESD diodes that will conduct used to achieve rail-to-rail output. This output stage is if the input voltages exceed the power supplies by more than capable of driving 1kΩ loads connected to any point be- approximately 300mV. Momentary voltages greater than tween V+ and ground. For light resistive loads (> 100kΩ), 300mV beyond the power supply can be tolerated if the the output voltage can swing to 40mV from the supply rail. current is limited to 10mA. This is easily accomplished with With moderate resistive loads (20kΩ), the output can swing an input resistor, as shown in Figure 3. Many input signals to within 75mV from the supply rails while maintaining high are inherently current-limited to less than 10mA; therefore, open-loop gain (see the typical performance curve “Output a limiting resistor is not always required. The OPA705 Voltage Swing vs Output Current”). features no phase inversion when the inputs extend beyond supplies if the input current is limited, as seen in Figure 4. CAPACITIVE LOAD AND STABILITY The OPA705 series op amps can drive up to 1000pF pure capacitive load. Increasing the gain enhances the amplifier’s ability to drive greater capacitive loads (see the typical performance curve “Small Signal Overshoot vs Capacitive +V Load”). I OVERLOAD One method of improving capacitive load drive in the unity- 10mA max OPA705 VOUT gain configuration is to insert a 10Ω to 20Ω resistor inside the V IN feedback loop, as shown in Figure 5. This reduces ringing R with large capacitive loads while maintaining DC accuracy. V– FIGURE 3. Input Current Protection for Voltages Exceeding the Supply Voltage. RS 20Ω OPA705 V OUT V IN C R L L V = ±5.0V, V = 11Vp-p S IN v FIGURE 5. Series Resistor in Unity-Gain Buffer Configura- di V/ tion Improves Capacitive Load Drive. 0 2. APPLICATION CIRCUITS The OPA705 series op amps are optimized for driving medium-speed sampling data converters. Figure 6 shows the OPA2705 in a dual-supply buffered reference configuration 20µs/div for the DAC7644. The DAC7644 is a 16-bit, low-power, quad-voltage output converter. Small size makes the combi- FIGURE 4. OPA705—No Phase Inversion with Inputs nation ideal for automatic test equipment, data acquisition Greater than the Power-Supply Voltage. systems, and other low-power space-limited applications. OPA705, 2705, 4705 9 SBOS182A

NC 48 NC 47 DAC7644 NC 46 NC 45 +V V A Sense 44 OUT V– V A 43 V OUT OUT VREFL AB Sense 42 –2.5V Ref Negative 1/2 Reference VREFL AB 41 OPA2705 500pF V H AB 40 REF V H AB Sense 39 V+ REF 500pF 1/2 VOUTB Sense 38 OPA2705 +2.5V Positive Ref V B 37 V Reference OUT OUT –V FIGURE 6. OPA705 as Dual Supply Configuration-Buffered References for the DAC7644. OPA705, 2705, 4705 10 SBOS182A

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) OPA2705EA/250 ACTIVE VSSOP DGK 8 250 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 B05 & no Sb/Br) OPA2705EA/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 B05 & no Sb/Br) OPA2705PA ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 OPA2705PA & no Sb/Br) OPA2705UA ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA & no Sb/Br) 2705UA OPA2705UAG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA & no Sb/Br) 2705UA OPA4705EA/250 ACTIVE TSSOP PW 14 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA & no Sb/Br) 4705EA OPA4705EA/2K5 ACTIVE TSSOP PW 14 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA & no Sb/Br) 4705EA OPA705NA/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 A05 & no Sb/Br) OPA705NA/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 A05 & no Sb/Br) OPA705PA ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 OPA705PA & no Sb/Br) OPA705UA ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA & no Sb/Br) 705UA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) OPA2705EA/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 OPA4705EA/250 TSSOP PW 14 250 180.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 OPA4705EA/2K5 TSSOP PW 14 2500 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 OPA705NA/250 SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 OPA705NA/3K SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) OPA2705EA/250 VSSOP DGK 8 250 210.0 185.0 35.0 OPA4705EA/250 TSSOP PW 14 250 210.0 185.0 35.0 OPA4705EA/2K5 TSSOP PW 14 2500 367.0 367.0 35.0 OPA705NA/250 SOT-23 DBV 5 250 180.0 180.0 18.0 OPA705NA/3K SOT-23 DBV 5 3000 180.0 180.0 18.0 PackMaterials-Page2

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