Dual Low Offset, Low Power Operational Amplifier Data Sheet OP200 FEATURES PIN CONNECTIONS Low input offset voltage: 75 μV maximum –IN A 1 16 OUT A Low offset voltage drift, over −55°C < T < +125°C A +IN A 2 15 NC 0.5 μV/°C maximum NC 3 14 NC Low supply current (per amplifier): 725 μA maximum V– 4 13 V+ High open-loop gain: 5000 V/mV minimum NC 5 12 NC +IN B 6 11 NC Low input bias current: 2 nA maximum –IN B 7 10 OUT B Low noise voltage density: 11 nV/√Hz at 1 kHz Stable with large capacitive loads: 10 nF typical NC 8NC = NO CONNECT9 NC 00322-001 Figure 1. 16-Lead SOIC (S-Suffix) OUT A 1 OP200 8 V+ –IN A 2 A 7 OUT B +IN A 3 B 6 –IN B V– 4 5 +IN B 00322-002 Figure 2. 8-Lead PDIP (P-Suffix) 8-Lead CERDIP (Z-Suffix) GENERAL DESCRIPTION The OP200 is the first monolithic dual operational amplifier Power consumption of the OP200 is low, with each amplifier to offer OP77 type precision performance. Available in the drawing less than 725 μA of supply current. The total current industry standard 8-lead pinout, the OP200 combines precision drawn by the dual OP200 is less than one-half that of a single performance with the space and cost savings offered by a dual OP07, yet the OP200 offers significant improvements over this amplifier. industry-standard op amp. The voltage noise density of the OP200, 11 nV/√Hz at 1 kHz, is half that of most competitive devices. The OP200 features an extremely low input offset voltage of less than 75 μV with a drift below 0.5 μV/°C, guaranteed over The OP200 is an ideal choice for applications requiring multiple the full military temperature range. Open-loop gain of the OP200 precision op amps and where low power consumption is critical. exceeds 5,000,000 into a 10 kΩ load; input bias current is under For a quad precision op amp, see the OP400. 2 nA; CMRR is over 120 dB; and PSRR is below 1.8 μV/V. On-chip Zener zap trimming is used to achieve the extremely low input offset voltage of the OP200 and eliminates the need for offset pulling. Rev. G Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©1978–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

OP200 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Applications Information .............................................................. 12 Pin Connections ............................................................................... 1 Dual Low Power Instrumentation Amplifier ......................... 12 General Description ......................................................................... 1 Precision Absolute Value Amplifier ......................................... 12 Revision History ............................................................................... 2 Precision Current Pump ............................................................ 12 Specifications ..................................................................................... 4 Dual 12-Bit Voltage Output DAC ............................................ 13 Electrical Characteristics ............................................................. 4 Dual Precision Voltage Reference ............................................ 13 Absolute Maximum Ratings ............................................................ 7 Programmable High Resolution Window Comparator ........ 14 Thermal Resistance ...................................................................... 7 Outline Dimensions ....................................................................... 15 ESD Caution .................................................................................. 7 Ordering Guide .......................................................................... 16 Typical Performance Characteristics ............................................. 8 REVISION HISTORY 3/2017—Rev. F to Rev. G Changes to Figure 15 ......................................................................... 9 Changes to Figure 21 ...................................................................... 10 Changes to Figure 21 ...................................................................... 10 Changes to Figure 30 and Figure 31 ............................................ 12 10/2015—Rev. E to Rev. F Changes to Programmable High Resolution Window Changes to General Description .................................................... 1 Comparator Section, Figure 33, and Figure 34 .......................... 13 Changes to Ordering Guide .......................................................... 16 Changes to Figure 35 ...................................................................... 14 Updated Outline Dimensions ....................................................... 15 9/2012—Rev. D to Rev. E Changes to Ordering Guide .......................................................... 16 Changed Table 2 Conditions from V = 15 V to V = ±15 V ...... 4 S S Updated Outline Dimensions ....................................................... 15 2/2004—Rev. A to Rev. B. Changes to Ordering Guide .......................................................... 16 OP200F Deleted .................................................................. Universal Changes to Ordering Guide ............................................................. 5 2/2009—Rev. C to Rev. D Changes to Figure 4 ........................................................................... 8 Change to Large Signal Voltage Gain, Table 2 .............................. 4 Updated Outline Dimension ........................................................ 11 Changes to Ordering Guide .......................................................... 16 4/2002—Rev. 0 to Rev. A. 8/2008—Rev. B to Rev. C Edits to Features................................................................................. 1 Updated Format .................................................................. Universal Edits to General Description ........................................................... 1 Changes to Features Section............................................................ 1 Edits to Ordering Information ........................................................ 1 Changes to Table 1 and Table 2 ....................................................... 4 Edits to Pin Connections .................................................................. 1 Changes to Table 3 and Table 4 ....................................................... 5 Edits to Absolute Maximum Ratings .............................................. 2 Deleted Table 7; Renumbered Sequentially................................... 5 Edits to Package Type ....................................................................... 2 Rev. G | Page 2 of 16

Data Sheet OP200 V+ BIAS OUT VOLTAGE LIMITING NETWORK +IN –IN V– 00322-003 Figure 3. Simplified Schematic (One of Two Amplifiers Shown) Rev. G | Page 3 of 16

OP200 Data Sheet SPECIFICATIONS ELECTRICAL CHARACTERISTICS V = ±15 V, T = 25°C, unless otherwise noted. S A Table 1. OP200A/OP200E OP200G Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage V 25 75 80 200 μV OS Long-Term Input Voltage Stability 0.1 0.1 μV/mo Input Offset Current I V = 0 V 0.05 1.0 0.05 3.5 nA OS CM Input Bias Current I V = 0 V 0.1 2.0 0.1 5.0 nA B CM Input Noise Voltage e p-p 0.1 Hz to 10 Hz 0.5 0.5 μV p-p n Input Noise Voltage Density1 e f = 10 Hz 22 36 22 nV/√Hz n O f = 1000 Hz 11 18 11 nV/√Hz O Input Noise Current i p-p 0.1 Hz to 10 Hz 15 15 pA p-p n Input Noise Current Density i f = 10 Hz 0.4 0.4 pA/√Hz n O Input Resistance Differential Mode R 10 10 MΩ IN Input Resistance Common Mode R 125 125 GΩ INCM Large Signal Voltage Gain A V = ±10 V VO O R = 10 kΩ 5000 12,000 3000 7000 M/mV L R = 2 kΩ 2000 3700 1500 3200 M/mV L 1 Sample tested. V = ±15 V, −55°C ≤ T ≤ +125°C for OP200A, unless otherwise noted. S A Table 2. OP200A Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage V 45 125 μV OS Average Input Offset Voltage Drift TCV 0.2 0.5 μV/°C OS Input Offset Current I V = 0 V 0.15 2.5 nA OS CM Input Bias Current I V = 0 V 0.9 5.0 nA B CM Large Signal Voltage Gain A V = 10 V VO O R = 10 kΩ 3000 9000 V/mV L R = 2 kΩ 1000 2700 V/mV L Input Voltage Range1 IVR ±12 ±12.5 V Common-Mode Rejection Ratio CMRR V = ±12 V 115 130 dB CM Capacitive Load Stability A = 1 8 nF V POWER SUPPLY Power Supply Rejection Ratio PSRR V = 3 V to 18 V 0.2 3.2 μV/V S Supply Current Per Amplifier I No load 600 775 μA SY OUTPUT CHARACTERISTICS Output Voltage Swing V R = 10 kΩ ±12 ±12.4 V O L R = 2 kΩ ±11 ±12 V L 1 Guaranteed by CMRR test. Rev. G | Page 4 of 16

Data Sheet OP200 V = ±15 V, T = 25°C, unless otherwise noted. S A Table 3. OP200A/OP200E OP200G Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Input Voltage Range1 IVR ±12 ±13 ±12 ±13 V Common-Mode Rejection Ratio CMRR V = ±12 V 120 135 110 130 dB CM Channel Separation2 CS V = 20 V p-p, f = 10 Hz 123 145 123 145 dB O O Input Capacitance C 3.2 3.2 pF IN Capacitive Load Stability A = 1, no oscillations 10 10 nF V POWER SUPPLY Power Supply Rejection Ratio PSRR V = ±3 V to ±18 V 0.4 1.8 0.6 5.6 μV/V S Supply Current Per Amplifier I No load 570 725 570 725 μA SY OUTPUT CHARACTERISTICS Output Voltage Swing V R= 10 kΩ ±12 ±12.6 ±12 ±12.6 V O L R = 2 kΩ ±11 ±12.2 ±11 ±12.2 V L DYNAMIC PERFORMANCE Slew Rate SR 0.1 0.15 0.1 0.15 V/μs Gain Bandwidth Product GBP A = 1 500 500 kHz V 1 Guaranteed by CMRR test. 2 Guaranteed but not 100% tested. V = ±15 V, −40°C ≤ T ≤ +85°C, unless otherwise noted. S A Table 4. OP200E OP200G Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage V 35 100 110 300 μV OS Average Input Offset Voltage Drift TCV 0.2 0.5 0.6 2.0 μV/°C OS Input Offset Current I V = 0 V 0.08 2.5 0.1 6.0 nA OS CM Input Bias Current I V = 0 V 0 3 5.0 0.5 10.0 nA B CM Large-Signal Voltage Gain A V = ±10 V VO O R= 10 kΩ 3000 10,000 2000 5000 V/mV L R = 2 kΩ 1500 3200 1000 2500 V/mV L Input Voltage Range1 IVR ±12 ±12.5 ±12 ±12.5 V Common-Mode Rejection Ratio CMRR V = ±12 V 115 130 105 130 dB CM Capacitive Load Stability A = 1, no oscillations 10 10 nF V POWER SUPPLY Power Supply Rejection Ratio PSRR V = ±3 V to ±18 V 0.15 3.2 0.3 10.0 μV/V S Supply Current Per Amplifier I No load 600 775 600 775 μA SY OUTPUT CHARACTERISTICS Output Voltage Swing V R = 10 kΩ ±12 ±12.4 ±12 ±12.4 V O L R = 2 kΩ ±11 ±12 ±11 ±12.2 V L 1 Guaranteed by CMRR test. Rev. G | Page 5 of 16

OP200 Data Sheet 1/2 OP200 V1 20V p-p @ 10Hz 50Ω 50Ω 1/2 OP200 V2 CHANNEL SEPARATION = 20 log V2/V11000 00322-004 Figure 4. Channel Separation Test Circuit 100Ω 10kΩ 1/2 OP1/2200 eOUT TAONA SLPYEZCETRRUM OP200 eOUT (nV/√Hz) = √2 × eOUT (nV/√Hz) × 101 00322-005 Figure 5. Noise Test Schematic Rev. G | Page 6 of 16

Data Sheet OP200 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 5. Parameter Rating Table 6. Supply Voltage ±20 V Package Type θJA1 θJC Unit Differential Input Voltage ±30 V 8-Lead CERDIP (Z Suffix) 148 16 °C/W Input Voltage Supply voltage 8-Lead Plastic DIP (P Suffix) 96 37 °C/W Output Short-Circuit Duration Continuous 16-Lead SOIC (S Suffix) 92 27 °C/W Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering, 60 sec) 300°C 1 θJA is specified for worst-case mounting conditions, that is, θJA is specified for device in socket for CERDIP and PDIP packages; θJA is specified for device Junction Temperature Range (TJ) −65°C to +150°C soldered to printed circuit board for SOIC package. Operating Temperature Range ESD CAUTION OP200A −55°C to +125°C OP200E, OP200G −40°C to +85°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. G | Page 7 of 16

OP200 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 300 TA = 25°C VS = ±15V V) VS = ±15V 250 E (µ 2 pA) AG T ( T N 200 L E O R V R SET T CU 150 F E F S O 1 F E IN T OF 100 G U N P A N CH I 50 0 00322-006 0 00322-009 0 1.0 2.0 3.0 4.0 5.0 –75 –50 –25 0 25 50 75 100 125 TIME (Minutes) TEMPERATURE (°C) Figure 6. Warm-Up Drift Figure 9. Input Offset Current vs. Temperature 60 1.0 VS = ±15V TA = 25°C 50 VS = ±15V V) 0.8 AGE (µ 40 NT (nA) T E 0.6 L R O R T V 30 CU FFSE BIAS 0.4 T O 20 UT U P P N IN I 0.2 10 0 00322-007 0 00322-010 –75 –50 –25 0 25 50 75 100 125 –15 –10 –5.0 0 5.0 10 15 TEMPERATURE (°C) COMON-MODE VOLTAGE (V) Figure 7. Input Offset Voltage vs. Temperature Figure 10. Input Bias Current vs. Common-Mode Voltage 3 140 TA = 25°C VS = ±15V VS = ±15V 120 2 B) d NT (nA) 1 CTION ( 100 E E R J 80 R E CU 0 E R AS OD 60 BI M T –1 N- PU MO 40 N M I O –2 C 20 –3 00322-008 0 00322-011 –75 –50 –25 0 25 50 75 100 125 1 10 100 1k 10k 100k TEMPERATURE (°C) FREQUENCY (Hz) Figure 8. Input Bias Current vs. Temperature Figure 11. Common-Mode Rejection vs. Frequency Rev. G | Page 8 of 16

Data Sheet OP200 100 1.18 TA = 25°C TWO AMPLIFIERS VS = ±15V TA = 25°C √Hz) A) 1.16 V/ m Y (n NT ( 1.14 T E OISE DENSI PPLY CURR 1.12 N U GE L S 1.10 A A LT OT VO T 1.08 10 00322-012 1.06 00322-015 1 10 100 1k ±2 ±6 ±10 ±14 ±18 FREQUENCY (Hz) SUPPLY VOLTAGE (V) Figure 12. Voltage Noise Density vs. Frequency Figure 15. Total Supply Current vs. Supply Voltage 1000 1.16 TA = 25°C TWO AMPLIFIERS VS = ±15V VS = ±15V Hz) A) 1.15 Y (fA/√ NT (m T E SI R 1.14 N R E U D C E Y S L OI PP 1.13 N U T S N L E A R T UR TO 1.12 C 100 00322-013 1.11 00322-016 1 10 100 1k –75 –50 –25 0 25 50 75 100 125 FREQUENCY (Hz) TEMPERATURE (°C) Figure 13. Current Noise Density vs. Frequency Figure 16. Total Supply Current vs. Temperature 140 120 NEGATIVE SUPPLY A) V/DIV) ON (n 100 GE (400n REJECTI 80 A Y LT PL 60 O P V U POSITIVE SUPPLY NOISE WER S 40 O P 20 00322-014 0 TA = 25°C 00322-017 0 2 4 6 8 10 0.1 1 10 100 1k 10k 100k TIME (SEC) FREQUENCY (Hz) Figure 14. 0.1 Hz to 10 Hz Noise Figure 17. Power Supply Rejection vs. Frequency Rev. G | Page 9 of 16

OP200 Data Sheet 100 TA = 25°C 0.7 VS = ±15V 80 ECTION (µV/V) 00..56 OP GAIN (dB) 6400 AAVV == 1100000 LY REJ 0.4 ED-LO 20 AV = 10 P S R SUP 0.3 CLO 0 AV = 1 E W PO 00..12–75 –50 –25 0 25 50 75 100 12500322-018 ––24001 10 100 1k 10k 100k 1M00322-021 TEMPERATURE (°C) FREQUENCY (Hz) Figure 18. Power Supply Rejection vs. Temperature Figure 21. Closed-Loop Gain vs. Frequency 6000 30 VS = ±15V TA = 25°C RL = 2kΩ VS = ±15V 5000 25 V p-pAT 1% V) DISTORTION N (V/m 4000 NG (V) 20 OP GAI 3000 UT SWI 15 O P L T EN- 2000 OU 10 P O 1000 5 0 00322-019 0 00322-022 –75 –50 –25 0 25 50 75 100 125 10 100 1k 10k 100k TEMPERATURE (°C) FREQUENCY (Hz) Figure 19. Open-Loop Gain vs. Temperature Figure 22. Maximum Output Swing vs. Frequency 140 1 TA = 25°C AV = 100 120 VS = ±15V %) N ( AV = 10 100 O GAIN (dB) 80 Degrees) DISTORTI 0.1 AV = 1 OP 60 0 FT ( NIC LO PHASE SHI MO PEN- 40 90 ASE HAR 0.01 O GAIN H L 20 135 P TA TA = 25°C TO VS = ±15V –200 180 00322-020 0.001 VROL U=T 2 =k Ω10V p-p 00322-023 10 100 1k 10k 100k 1M 100 1k 10k FREQUENCY (Hz) FREQUENCY (Hz) Figure 20. Open-Loop Gain and Phase Shift vs. Frequency Figure 23. Total Harmonic Distortion vs. Frequency Rev. G | Page 10 of 16

Data Sheet OP200 50 TA = 25°C 45 VS = ±15V 40 FALLING 35 %) T ( 30 O O H 25 S RISING R E 20 V O 15 10 050 0.5 1C.A0PACITIV1E.5 LOAD (n2.F0) 2.5 3.000322-024 5.00V 100µs TVAASV === 2±+511°5CV 00322-027 Figure 24. Overshoot vs. Capacitive Load Figure 27. Large Signal Transient Response 29 TA = 25°C VS = ±15V 28 A) m T ( 27 N E R UR 26 C UIT SINKING C 25 R CI RT- 24 TA = 25°C HO SOURCING VS = ±15V S AV = +1 23 220 1 T2IME (Minutes3) 4 500322-025 20mV 5µs 00322-028 Figure 25. Short-Circuit Current vs. Time Figure 28. Small Signal Transient Response 150 140 B) d ON ( 130 TI A R A P 120 E S L E ANN 110 TA = 25°C CH VS = ±15V 100 AV = +1 90 00322-026 10 100 FREQUE1kNCY (Hz) 10k 100k 20mV 5µs 00322-029 Figure 26. Channel Separation vs. Frequency Figure 29. Small Signal Transient Response, CLOAD = 1 nF Rev. G | Page 11 of 16

OP200 Data Sheet APPLICATIONS INFORMATION The OP200 is inherently stable at all gains and is capable of PRECISION ABSOLUTE VALUE AMPLIFIER driving large capacitive loads without oscillating. Nonetheless, The circuit in Figure 31 is a precision absolute value amplifier good supply decoupling is highly recommended. Proper supply with an input impedance of 10 MΩ. The high gain and low TCV OS decoupling reduces problems caused by supply line noise and of the OP200 ensure accurate operation with microvolt input improves the capacitive load driving capability of the OP200. signals. In this circuit, the input always appears as a common- DUAL LOW POWER INSTRUMENTATION mode signal to the op amps. The CMRR of the OP200 exceeds AMPLIFIER 120 dB, yielding an error of less than 2 ppm. A dual instrumentation amplifier that consumes less than 33 mW +15V of power per channel is shown in Figure 30. The linearity of the C2 0.1pF instrumentation amplifier exceeds 16 bits in gains of 5 to 200 and is R1 R3 better than 14 bits in gains from 200 to 1000. CMRR is above 1kΩ 1kΩ 115 dB (gain = 1000). Offset voltage drift is typically 0.2 μV/°C over the military temperature range, which is comparable to the C1 6 30pF D1 best monolithic instrumentation amplifiers. The bandwidth of 2 8 1N4148 1/2 7 OP200AZ VOUT the low power instrumentation amplifier is a function of gain OP210/20AZ 1 5 0V < VOUT < 10V and is shown in Table 7. VIN 3 4 1ND41148 R2 C2 2kΩ Table 7. Gain Bandwidth 0.1pF G5 a in B15a0n dkHwzi d th –15V 00322-031 10 67 kHz Figure 31. Precision Absolute Value Amplifier 100 7.5 kHz PRECISION CURRENT PUMP 1000 500 Hz The maximum output current of the precision current pump shown in Figure 32 is ±10 mA. Voltage compliance is ±10 V +15V with ±15 V supplies. Output impedance of the current transmit- 3 8 ter exceeds 3 MΩ with linearity better than 16 bits. + V–IN 5 2 OP210/20AZ 1 VOUT 10Rk3Ω 1/2 7 4 OP200AZ 6 R1 –15V 10kΩ 2 – R5 VREF 20kΩ 5kΩ 5kΩ 20kΩ VIN 10Rk1Ω 3 OP210/20EZ 1 100Ω IOUT RG + +15V VOUT = 5 +40R,0G00 VIN + VREF 00322-030 R4 8 5 Figure 30. Dual Low Power Instrumentation Amplifier 1kΩ 7 1/2 OP200EZ 6 Tinhpeu ot,u wtphuict hs iigsn naol rism saplelyc icfoiendn wecitthed r etosp aencat ltoog t ghreo ruenfedr.e Tnhcee IOUT =VRISN=1V00INΩ= 10mA/V 4 rtoef +er1e0n Vce iifn rpeuqtu ciraend b. e used to offset the output from −10 V –15V 00322-032 Figure 32. Precision Current Pump Rev. G | Page 12 of 16

Data Sheet OP200 DUAL 12-BIT VOLTAGE OUTPUT DAC DUAL PRECISION VOLTAGE REFERENCE The dual output DAC shown in Figure 33 is capable of providing A dual OP200 and a REF43, a 2.5 V reference, can be used to untrimmed 12-bit accurate operation over the entire military build a ±2.5 V precision voltage reference. Maximum output temperature range. Offset voltage, bias current, and gain errors current from each reference is ±10 mA with load regulation of the OP200 contribute less than 1/10 of an LSB error at 12 bits under 25 μV/mA. Line regulation is better than 15 μV/V and over the military temperature range. output voltage drift is under 20 μV/°C. Output voltage noise from 0.1 Hz to 10 Hz is typically 75 μV p-p. R1 and D1 ensure correct startup. 5V 21 VDD RFB A 3 8 DAC8221 REFEREN1C0EV 4 VREF A DA1C/2 A IOUT A 2 2 VOLTAGE DAC8221 1/2 1 OP200AZ OUT A 3 4 V– DAC DATA BUS PIN 6 (MSB)TO PIN 17 (LSB) RFB B 23 22 VREF B DA1C/2 B IOUT B 24 6 DAC8221 1/2 7 OP200AZ OUT B 5 18 DAC A/DAC B AGND 1 DAC 19 CS CONTROL 20 WR DGND 5 00322-033 Figure 33. Dual 12-Bit Voltage Output DAC +5V R1 22kΩ D1 1N914 +2.5V +5V R3 10kΩ VIN 2 VOUT 6 2 1/28 1 10Rk3Ω 6 REF43 OP200AZ 5 3 1/2 7 TRIM OP200AZ 4 5 GND 4 R4 5kΩ –5V –2.5V 00322-034 Figure 34. Dual Precision Voltage Reference Rev. G | Page 13 of 16

OP200 Data Sheet PROGRAMMABLE HIGH RESOLUTION WINDOW range. A dual CMOS 12-bit DAC, the DAC8221, is used in the COMPARATOR voltage switching mode to set the upper and lower thresholds (DAC A and DAC B, respectively). The programmable window comparator shown in Figure 35 is easily capable of 12-bit accuracy over the full military temperature 15V VIN 21 VDD 8 REFEREN1C0EV 2 IOUT A DA1C/2 A VREF A 4 3 VOLTAGE DAC8221 1/2 1 R1 OP200AZ 10kΩ 2 D1 5V 1N4148 R2 DAC DATA BUS 15V– 4 10kΩ TTL OUT PIN 6 (MSB) TO PIN 17 (LSB) 10Rk2Ω 5 D1N14148 R4 Q2N12222 10kΩ 1/2 7 OP200AZ 24 IOUT B DA1C/2 B VREF B 22 6 DAC8221 18 DAC A/DAC B DAC 19 CONTROL CS SIGNALS 20 WR DGND AGND 5 1 00322-035 Figure 35. Programmable High Resolution Window Comparator Rev. G | Page 14 of 16

Data Sheet OP200 OUTLINE DIMENSIONS 0.005 (0.13) 0.055 (1.40) MIN MAX 8 5 0.310 (7.87) 0.220 (5.59) 1 4 0.100 (2.54) BSC 0.405 (10.29) MAX 0.320 (8.13) 0.290 (7.37) 0.200 (5.08) 0.060 (1.52) MAX 0.015 (0.38) 0.200 (5.08) 0.150 (3.81) MIN 0.125 (3.18) 0.015 (0.38) 00..002134 ((00..5386)) 0.070 (1.78) SPELAANTIENG 1 05°° 0.008 (0.20) 0.030 (0.76) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 36. 8-Lead Ceramic Dual In-Line Package [CERDIP] (Q-8) Z-Suffix Dimensions shown in inches and (millimeters) 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 8 5 0.280 (7.11) 0.250 (6.35) 1 4 0.240 (6.10) 0.325 (8.26) 0.310 (7.87) 0.100 (2.54) 0.300 (7.62) BSC 0.060 (1.52) 0.195 (4.95) 0.210 (5.33) MAX 0.130 (3.30) MAX 0.115 (2.92) 0.015 0.150 (3.81) (0.38) 0.015 (0.38) 0.130 (3.30) MIN GAUGE 0.115 (2.92) SPLEAATNIENG PLANE 00..001140 ((00..3265)) 0.022 (0.56) 0.005 (0.13) 0.430 (10.92) 0.008 (0.20) 0.018 (0.46) MIN MAX 0.014 (0.36) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) COMPLIANTTO JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONSARE IN INCHES; MILLIMETER DIMENSIONS (RCINEOFRPEANRREERENN LCTEEHA EODSNSEL MSY)AAAYNR BDEE AR CROOEU NNNFODIGETUDAR-POEPFDRFOA INSPC RWHIAH ETOEQL UFEIO VORAR LU EHSNAETL ISFN FLDOEEARSDIGSN.. 070606-A Figure 37. 8-Lead Plastic Dual In-Line Package [PDIP] (N-8) P-Suffix Dimensions shown in inches and (millimeters) Rev. G | Page 15 of 16

OP200 Data Sheet 10.50(0.4134) 10.10(0.3976) 16 9 7.60(0.2992) 7.40(0.2913) 1 8 10.65(0.4193) 10.00(0.3937) 1.27(0.0500) 0.75(0.0295) BSC 2.65(0.1043) 0.25(0.0098) 45° 0.30(0.0118) 2.35(0.0925) 8° 0.10(0.0039) 0° COPLANARITY 0.10 0.51(0.0201) SPELAATNIENG 0.33(0.0130) 1.27(0.0500) 0.31(0.0122) 0.20(0.0079) 0.40(0.0157) C(RINOEFNPEATRRREOENNLCLTEIHNCEOGOSNDMELISPYM)LAEAIANNRNDSETIAORTRNOOESUJNANEORDDETEEDAICN-POSMPFTRIFALONLMPIDMIRLAELIRATIMTDEEESRTFSMEO;SRIRN-0ECU1QH3SU-EADIVAIINMAELDENENSSTIIOGSNNFS.OR 03-27-2007-B Figure 38. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) S-Suffix Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1 T = 25°C V Max (µV) Temperature Range Package Description Package Option A OS OP200AZ 75 −55°C to +125°C 8-Lead CERDIP Z-Suffix (Q-8) OP200EZ 75 −40°C to +85°C 8-Lead CERDIP Z-Suffix (Q-8) OP200GPZ 200 −40°C to +85°C 8-Lead PDIP P-Suffix (N-8) OP200GSZ 200 −40°C to +85°C 16-Lead SOIC_W S-Suffix (RW-16) OP200GSZ-REEL 200 −40°C to +85°C 16-Lead SOIC_W S-Suffix (RW-16) 1 The OP200GPZ, OP200GSZ, and OP200GSZ-REEL are RoHS Compliant Parts. ©1978–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00322-0-3/17(G) Rev. G | Page 16 of 16