NX3L2G384 Dual low-ohmic single-pole single-throw analog switch Rev. 7 — 26 March 2013 Product data sheet 1. General description The NX3L2G384 is a dual low-ohmic single-pole single-throw analog switch. Each switch has two input/output terminals (nY and nZ) and an active LOW enable input (nE). When pin nE is HIGH, the analog switch is turned off. Schmitt trigger action at the enable input (nE) makes the circuit tolerant to slower input rise and fall times. The NX3L2G384 allows signals with amplitude up to V to be CC transmitted from nY to nZ; or from nZ to nY. Its low ON resistance (0.5 ) and flatness (0.13 ) ensures minimal attenuation and distortion of transmitted signals. 2. Features and benefits  Wide supply voltage range from 1.4V to 4.3V  Very low ON resistance (peak): 1.6 (typical) at V =1.4V CC 1.0 (typical) at V =1.65V CC 0.55 (typical) at V =2.3V CC 0.50 (typical) at V =2.7V CC 0.50 (typical) at V =4.3V CC  High noise immunity  ESD protection: HBM JESD22-A114F Class 3A exceeds 7500V MM JESD22-A115-A exceeds 200V CDM AEC-Q100-011 revision B exceeds 1000V IEC61000-4-2 contact discharge exceeds 4000 V for switch ports  CMOS low-power consumption  Latch-up performance exceeds 100mA per JESD 78 Class II Level A  Direct interface with TTL levels at 3.0 V  Control input accepts voltages above the supply voltage  High current handling capability (350 mA continuous current under 3.3 V supply)  Specified from 40C to +85C and from 40C to +125C 3. Applications  Cell phone  PDA  Portable media player

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 4. Ordering information Table 1. Ordering info rmation Type number Package Temperature range Name Description Version NX3L2G384GT 40Cto+125C XSON8 plastic extremely thin small outline package; no leads; SOT833-1 8terminals; body 1 1.95  0.5 mm NX3L2G384GD 40Cto+125C XSON8 plastic extremely thin small outline package; noleads; SOT996-2 8terminals; body 3 2  0.5 mm NX3L2G384GM 40C to +125C XQFN8 plastic, extremely thin quad flat package; noleads; SOT902-2 8terminals; body 1.61.60.5mm 5. Marking Table 2. Marking cod es[1] Type number Marking code NX3L2G384GT ML2 NX3L2G384GD ML2 NX3L2G384GM ML2 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram 1Y 1Z 1E 2Z 2Y Y Z 2E E 001aai828 001aai598 Fig 1. Logic symbol Fig 2. Logic diagram (one switch) NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 2 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 7. Pinning information 7.1 Pinning NX3L2G384 1Y 1 8 VCC NX3L2G384 1Z 2 7 1E 1Y 1 8 VCC 1Z 2 7 1E 2E 3 6 2Z 2E 3 6 2Z GND 4 5 2Y GND 4 5 2Y 001aai831 001aaj531 Transparent top view Transparent top view Fig 3. Pin configuration SOT833-1 (XSON8) Fig 4. Pin configuration SOT996-2 (XSON8) NX3L2G384 terminal 1 C C index area V 1E 1 8 7 1Y 2Z 2 6 1Z 2Y 3 5 2E 4 D GN 001aai830 Transparent top view Fig 5. Pin configuration SOT902-2 (XQFN8) NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 3 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 7.2 Pin description Table 3. Pin descripti on Symbol Pin Description SOT833-1 and SOT996-2 SOT902-2 1Y, 2Y 1, 5 7, 3 independent input or output 1Z, 2Z 2, 6 6, 2 independent input or output GND 4 4 ground (0V) 1E, 2E 7, 3 1, 5 enable input (active LOW) V 8 8 supply voltage CC 8. Functional description Table 4. Function tab le[1] InputnE Switch L ON-state H OFF-state [1] H=HIGH voltage level; L=LOW voltage level. 9. Limiting values Table 5. Limiting valu es In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V supply voltage 0.5 +4.6 V CC V input voltage enable input nE [1] 0.5 +4.6 V I V switch voltage [2] 0.5 V + 0.5 V SW CC I input clamping current V <0.5V 50 - mA IK I I switch clamping current V <0.5V or V >V + 0.5 V - 50 mA SK I I CC I switch current V >0.5V or V < V + 0.5 V; - 350 mA SW SW SW CC sourceorsink current V >0.5V or V < V + 0.5 V; - 500 mA SW SW CC pulsedat1msduration, < 10 % duty cycle; peakcurrent T storage temperature 65 +150 C stg P total power dissipation T =40Cto+125C [3] - 250 mW tot amb [1] The minimum input voltage rating may be exceeded if the input current rating is observed. [2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not exceed 4.6 V. [3] For XSON8 and XQFN8 packages: above 118C the value of Ptotderates linearly with 7.8mW/K. NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 4 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 10. Recommended operating conditions Table 6. Recommend ed operating conditions Symbol Parameter Conditions Min Typ Max Unit V supply voltage 1.4 - 4.3 V CC V input voltage enable input nE 0 - 4.3 V I V switch voltage [1] 0 - V V SW CC T ambient temperature 40 - +125 C amb t/V input transition rise and fall rate V =1.4Vto4.3V [2] - - 200 ns/V CC [1] To avoid sinking GND current from terminal nZ when switch current flows in terminal nY, the voltage drop across the bidirectional switch must not exceed 0.4V. If the switch current flows into terminal nZ, noGND current will flow from terminal nY. In this case, there is no limit for the voltage drop across the switch. [2] Applies to control signal levels. 11. Static characteristics Table 7. Static charac teristics At recommended operating conditions; voltages are referenced to GND (ground 0V). Symbol Parameter Conditions T = 25 C T = 40 C to +125 C Unit amb amb Min Typ Max Min Max Max (85C) (125C) V HIGH-level V =1.4Vto1.95V 0.65V - - 0.65V - - V IH CC CC CC input voltage V =2.3 Vto2.7V 1.7 - - 1.7 - - V CC V =2.7 Vto3.6V 2.0 - - 2.0 - - V CC V =3.6 Vto4.3V 0.7V - - 0.7V - - V CC CC CC V LOW-level V =1.4Vto1.95V - - 0.35V - 0.35V 0.35V V IL CC CC CC CC input voltage V =2.3Vto2.7V - - 0.7 - 0.7 0.7 V CC V =2.7Vto3.6V - - 0.8 - 0.8 0.8 V CC V =3.6 Vto4.3V - - 0.3V - 0.3V 0.3V V CC CC CC CC I input leakage enable input nE; - - - - 0.5 1 A I current V =GNDto4.3V; I V =1.4Vto4.3V CC I OFF-state nY port; seeFigure6 S(OFF) leakage V =1.4Vto3.6V - - 5 - 50 500 nA CC current V =3.6Vto4.3V - - 10 - 50 500 nA CC I ON-state nZ port; seeFigure7 S(ON) leakage V =1.4Vto3.6V - - 5 - 50 500 nA CC current V =3.6Vto4.3V - - 10 - 50 500 nA CC I supply current V =V orGND; CC I CC V =GNDorV SW CC V =3.6V - - 100 - 690 6000 nA CC V =4.3V - - 150 - 800 7000 nA CC NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 5 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground 0V). Symbol Parameter Conditions T = 25 C T = 40 C to +125 C Unit amb amb Min Typ Max Min Max Max (85C) (125C) C input - 1.0 - - - - pF I capacitance C OFF-state - 35 - - - - pF S(OFF) capacitance C ON-state - 110 - - - - pF S(ON) capacitance 11.1 Test circuits VCC VCC nE nE VIH VIL nZ nY nZ nY IS IS VI GND VO VI GND VO 001aaj519 001aaj520 VI=0.3VorVCC0.3 V; VO=VCC  0.3 V or 0.3 V. VI=0.3VorVCC0.3 V; VO=open circuit. Fig 6. Test circuit for measuring OFF-state leakage Fig 7. Test circuit for measuring ON-state leakage current current 11.2 ON resistance Table 8. ON resistanc e At recommended operating conditions; voltages are referenced to GND (ground = 0V); for graphs see Figure9 to Figure15. Symbol Parameter Conditions T = 40 C to +85 C T 40 C to Unit amb amb +125 C Min Typ[1] Max Min Max R ON resistance (peak) V =GNDtoV ; ON(peak) I CC I =100mA; SW seeFigure8 V =1.4V - 1.6 3.7 - 4.1  CC V =1.65V - 1.0 1.6 - 1.7  CC V =2.3V - 0.55 0.8 - 0.9  CC V =2.7V - 0.5 0.75 - 0.9  CC V =4.3V - 0.5 0.75 - 0.9  CC NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 6 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch Table 8. ON resistance …continued At recommended operating conditions; voltages are referenced to GND (ground = 0V); for graphs see Figure9 to Figure15. Symbol Parameter Conditions T = 40 C to +85 C T 40 C to Unit amb amb +125 C Min Typ[1] Max Min Max R ON resistance mismatch V =GNDtoV ; [2] ON I CC between channels I =100mA SW V =1.4V - 0.04 0.3 - 0.3  CC V =1.65V - 0.04 0.2 - 0.3  CC V =2.3V - 0.02 0.08 - 0.1  CC V =2.7V - 0.02 0.075 - 0.1  CC V =4.3V - 0.02 0.075 - 0.1  CC R ON resistance (flatness) V =GNDtoV ; [3] ON(flat) I CC I =100mA SW V =1.4V - 1.0 3.3 - 3.6  CC V =1.65V - 0.5 1.2 - 1.3  CC V =2.3V - 0.15 0.3 - 0.35  CC V =2.7V - 0.13 0.3 - 0.35  CC V =4.3V - 0.2 0.4 - 0.45  CC [1] Typical values are measured at Tamb=25 C. [2] Measured at identical V , temperature and input voltage. CC [3] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical V and CC temperature. NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 7 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 11.3 ON resistance test circuit and graphs 001aag564 1.6 RON (Ω) 1.2 VSW (1) V 0.8 VCC (2) nE (3) VIL 0.4 (4) (5) (6) nZ nY Vl GND ISW 0 0 1 2 3 4 5 001aaj521 VI (V) R =V / I . (1) V =1.5V. ON SW SW CC (2) V =1.8V. CC (3) VCC=2.5V. (4) VCC=2.7V. (5) V =3.3V. CC (6) VCC=4.3V. Measured at Tamb=25C. Fig 8. Test circuit for measuring ON resistance Fig 9. Typical ON resistance as a function of input voltage NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 8 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 001aag565 001aag566 1.6 1.0 R(ΩO)N R(ΩO)N 0.8 1.2 (1) (2) 0.6 (3) (1) (4) 0.8 (2) (3) (4) 0.4 0.4 0.2 0 0 0 1 2 3 0 1 2 3 VI (V) VI (V) (1) Tamb=125C. (1) Tamb=125C. (2) Tamb=85C. (2) Tamb=85C. (3) Tamb=25C. (3) Tamb=25C. (4) Tamb=40C. (4) Tamb=40C. Fig 10. ON resistance as a function of input voltage; Fig 11. ON resistance as a function of input voltage; V =1.5V V =1.8V CC CC 001aag567 001aag568 1.0 1.0 RON RON (Ω) (Ω) 0.8 0.8 0.6 (1) 0.6 (1) (2) (2) (3) (3) (4) (4) 0.4 0.4 0.2 0.2 0 0 0 1 2 3 0 1 2 3 VI (V) VI (V) (1) Tamb=125C. (1) Tamb=125C. (2) Tamb=85C. (2) Tamb=85C. (3) Tamb=25C. (3) Tamb=25C. (4) Tamb=40C. (4) Tamb=40C. Fig 12. ON resistance as a function of input voltage; Fig 13. ON resistance as a function of input voltage; V =2.5V V =2.7V CC CC NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 9 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 001aag569 001aaj896 1.0 1.0 RON RON (Ω) (Ω) 0.8 0.8 0.6 0.6 (1) (1) (2) (2) (3) (3) (4) 0.4 (4) 0.4 0.2 0.2 0 0 0 1 2 3 4 0 1 2 3 4 5 VI (V) VI (V) (1) Tamb=125C. (1) Tamb=125C. (2) Tamb=85C. (2) Tamb=85C. (3) Tamb=25C. (3) Tamb=25C. (4) Tamb=40C. (4) Tamb=40C. Fig 14. ON resistance as a function of input voltage; Fig 15. ON resistance as a function of input voltage; V =3.3V V =4.3V CC CC 12. Dynamic characteristics Table 9. Dynamic cha racteristics At recommended operating conditions; voltages are referenced to GND (ground=0V); for load circuit see Figure17. Symbol Parameter Conditions T = 25 C T = 40 C to +125 C Unit amb amb Min Typ[1] Max Min Max Max (85C) (125C) t enable time nE to nZ or nY; en seeFigure16 V =1.4Vto1.6V - 27 41 - 44 48 ns CC V =1.65Vto1.95V - 23 35 - 37 40 ns CC V =2.3Vto2.7V - 17 26 - 28 31 ns CC V =2.7Vto 3.6V - 14 24 - 25 27 ns CC V =3.6Vto 4.3V - 14 24 - 25 27 ns CC t disable time nE to nZ or nY; dis seeFigure16 V =1.4Vto1.6V - 9 17 - 19 21 ns CC V =1.65Vto1.95V - 7 13 - 14 15 ns CC V =2.3Vto2.7V - 4 8 - 9 10 ns CC V =2.7Vto 3.6V - 3 7 - 8 9 ns CC V =3.6Vto 4.3V - 3 7 - 8 9 ns CC [1] Typical values are measured at Tamb=25C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 V and 4.3 V respectively. NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 10 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 12.1 Waveform and test circuits VI nE input VM VM GND ten tdis VOH nY or nZ output VX VX LOW to OFF OFF to LOW GND switch switch switch disabled enabled disabled 001aaj522 Measurement points are given in Table10. Logic level: V is the typical output voltage that occurs with the output load. OH Fig 16. Enable and disable times Table 10. Measuremen t points Supply voltage Input Output V V V CC M X 1.4V to 4.3V 0.5V 0.9V CC OH VCC nE nY/nZ nZ/nY G VI V VO RL CL VEXT = 1.5 V 001aaj523 Test data is given in Table11. Definitions test circuit: RL = Load resistance. C = Load capacitance including jig and probe capacitance. L VEXT = External voltage for measuring switching times. Fig 17. Test circuit for measuring switching times Table 11. Test data Supply voltage Input Load V V t, t C R CC I r f L L 1.4V to 4.3V V 2.5ns 35pF 50 CC NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 11 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 12.2 Additional dynamic characteristics Table 12. Additional dy namic characteristics At recommended operating conditions; voltages are referenced to GND (ground=0V); V = GND or V (unless otherwise I CC specified); t = t 2.5ns. r f Symbol Parameter Conditions T = 25 C Unit amb Min Typ Max THD total harmonic f =20Hzto20 kHz; R =32; seeFigure18 [1] i L distortion V =1.4V; V =1V(p-p) - 0.15 - % CC I V =1.65V; V =1.2V (p-p) - 0.10 - % CC I V =2.3V; V =1.5V(p-p) - 0.02 - % CC I V =2.7V; V =2V(p-p) - 0.02 - % CC I V =4.3V; V =2V(p-p) - 0.02 - % CC I f 3 dB frequency R =50; seeFigure19 [1] (3dB) L response V =1.4 V to 4.3V - 60 - MHz CC  isolation (OFF-state) f =100kHz; R =50; seeFigure20 [1] iso i L V =1.4 V to 4.3V - 90 - dB CC V crosstalk voltage between digital inputs and switch; ct f =1MHz;C =50 pF; R =50; seeFigure21 i L L V =1.4 V to 3.6V - 0.2 - V CC V =3.6 V to 4.3V - 0.2 - V CC Xtalk crosstalk between switches; [1] f =100kHz;R =50;seeFigure22 i L V =1.4 V to 4.3V - 90 - dB CC Q charge injection f =1MHz; C =0.1 nF; R =1 M; V =0V; inj i L L gen R =0; see Figure23 gen V =1.5 V - 3 - pC CC V =1.8 V - 3 - pC CC V =2.5V - 3 - pC CC V =3.3V - 3 - pC CC V =4.3V - 6 - pC CC [1] f is biased at 0.5V . i CC 13. Test circuits VCC 0.5VCC nE VIL RL nY/nZ nZ/nY fi D 001aaj524 Fig 18. Test circuit for measuring total harmonic distortion NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 12 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch VCC 0.5VCC nE VIL RL nY/nZ nZ/nY fi dB 001aaj525 Adjust fi voltage to obtain 0dBm level at output. Increase fi frequency until dB meter reads 3dB. Fig 19. Test circuit for measuring the frequency response when channel is in ON-state VCC 0.5VCC 0.5VCC nE RL VIH RL nY/nZ nZ/nY fi dB 001aaj526 Adjust f voltage to obtain 0dBm level at input. i Fig 20. Test circuit for measuring isolation (OFF-state) VCC nE nY/nZ nZ/nY G VI RL RL CL V VO 0.5VCC 0.5VCC 001aaj527 a. Test circuit logic off on off input (nE) VO Vct 001aaj528 b. Input and output pulse definitions Fig 21. Test circuit for measuring crosstalk voltage between digital inputs and switch NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 13 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 0.5VCC 1E VIL RL 1Y or 1Z 1Z or 1Y CHANNEL fi 50 Ω ON V VO1 0.5VCC 2E VIH RL 2Y or 2Z 2Z or 2Y CHANNEL R50i Ω OFF V VO2 001aai832 20 log (V / V ) or 20 log (V / V ). 10 O2 O1 10 O1 O2 Fig 22. Test circuit for measuring crosstalk between switches VCC nE nY/nZ nZ/nY Rgen G VI V VO RL CL Vgen GND 001aaj529 a. Test circuit logic off on off input (nE) VO VO 001aaj530 b. Input and output pulse definitions Definition: Qinj=VO CL. VO = output voltage variation. Rgen = generator resistance. Vgen = generator voltage. Fig 23. Test circuit for measuring charge injection NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 14 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 14. Package outline XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm SOT833-1 b 1 2 3 4 4× L1 L (2) e 8 7 6 5 e1 e1 e1 8× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT mA(a1x) mAa1x b D E e e1 L L1 0.25 2.0 1.05 0.35 0.40 mm 0.5 0.04 0.6 0.5 0.17 1.9 0.95 0.27 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 07-11-14 SOT833-1 - - - MO-252 - - - 07-12-07 Fig 24. Package outline SOT833-1 (XSON8) NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 15 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 3 x 2 x 0.5 mm SOT996-2 D B A E A A1 detail X terminal 1 index area e1 C v C A B L1 e b w C y1C y 1 4 L2 L 8 5 X 0 1 2 mm scale Dimensions (mm are the original dimensions) Unit(1) A A1 b D E e e1 L L1 L2 v w y y1 max 0.05 0.35 2.1 3.1 0.5 0.15 0.6 mm nom 0.5 0.5 1.5 0.1 0.05 0.05 0.1 min 0.00 0.15 1.9 2.9 0.3 0.05 0.4 sot996-2_po Outline References European Issue date version IEC JEDEC JEITA projection 07-12-21 SOT996-2 12-11-20 Fig 25. Package outline SOT996-2 (XSON8) NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 16 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch XQFN8: plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6 x 1.6 x 0.5 mm SOT902-2 X D B A terminal 1 index area E A A1 detail X e C v C A B b w C y1C y 4 3 5 e1 2 6 7 1 terminal 1 8 index area L metal area not for soldering L1 0 1 2 mm scale Dimensions Unit(1) A A1 b D E e e1 L L1 v w y y1 max 0.5 0.05 0.25 1.65 1.65 0.35 0.15 mm nom 0.20 1.60 1.60 0.55 0.5 0.30 0.10 0.1 0.05 0.05 0.05 min 0.00 0.15 1.55 1.55 0.25 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. sot902-2_po Outline References European Issue date version IEC JEDEC JEITA projection 10-11-02 SOT902-2 - - - MO-255 - - - 11-03-31 Fig 26. Package outline SOT902-2 (XQFN8) NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 17 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 15. Abbreviations Table 13. Abbreviation s Acronym Description CDM Charged Device Model CMOS Complementary Metal Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model PDA Personal Digital Assistant TTL Transistor-Transistor Logic 16. Revision history T able 14. Revision history Document ID Release date Data sheet status Change notice Supersedes NX3L2G384 v.7 20130326 Product data sheet - NX3L2G384 v.6 Modifications: • For type number NX3L2G384GD XSON8U has changed to XSON8. NX3L2G384 v.6 20120617 Product data sheet - NX3L2G384 v.5 NX3L2G384 v.5 20111107 Product data sheet - NX3L2G384 v.4 NX3L2G384 v.4 20101228 Product data sheet - NX3L2G384 v.3 NX3L2G384 v.3 20090828 Product data sheet - NX3L2G384 v.2 NX3L2G384 v.2 20090415 Product data sheet - NX3L2G384 v.1 NX3L2G384 v.1 20080918 Product data sheet - - NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 18 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 17. Legal information 17.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URLhttp://www.nxp.com. 17.2 Definitions Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Draft — The document is a draft version only. The content is still under malfunction of an NXP Semiconductors product can reasonably be expected internal review and subject to formal approval, which may result in to result in personal injury, death or severe property or environmental modifications or additions. NXP Semiconductors does not give any damage. NXP Semiconductors and its suppliers accept no liability for representations or warranties as to the accuracy or completeness of inclusion and/or use of NXP Semiconductors products in such equipment or information included herein and shall have no liability for the consequences of applications and therefore such inclusion and/or use is at the customer’s own use of such information. risk. Short data sheet — A short data sheet is an extract from a full data sheet Applications — Applications that are described herein for any of these with the same product type number(s) and title. A short data sheet is intended products are for illustrative purposes only. NXP Semiconductors makes no for quick reference only and should not be relied upon to contain detailed and representation or warranty that such applications will be suitable for the full information. For detailed and full information see the relevant full data specified use without further testing or modification. sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the Customers are responsible for the design and operation of their applications full data sheet shall prevail. and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product Product specification — The information and data provided in a Product design. It is customer’s sole responsibility to determine whether the NXP data sheet shall define the specification of the product as agreed between Semiconductors product is suitable and fit for the customer’s applications and NXP Semiconductors and its customer, unless NXP Semiconductors and products planned, as well as for the planned application and use of customer have explicitly agreed otherwise in writing. In no event however, customer’s third party customer(s). Customers should provide appropriate shall an agreement be valid in which the NXP Semiconductors product is design and operating safeguards to minimize the risks associated with their deemed to offer functions and qualities beyond those described in the applications and products. Product data sheet. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the 17.3 Disclaimers customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Limited warranty and liability — Information in this document is believed to Semiconductors products in order to avoid a default of the applications and be accurate and reliable. However, NXP Semiconductors does not give any the products or of the application or use by customer’s third party representations or warranties, expressed or implied, as to the accuracy or customer(s). NXP does not accept any liability in this respect. completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no Limiting values — Stress above one or more limiting values (as defined in responsibility for the content in this document if provided by an information the Absolute Maximum Ratings System of IEC60134) will cause permanent source outside of NXP Semiconductors. damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in In no event shall NXP Semiconductors be liable for any indirect, incidental, the Recommended operating conditions section (if present) or the punitive, special or consequential damages (including - without limitation - lost Characteristics sections of this document is not warranted. Constant or profits, lost savings, business interruption, costs related to the removal or repeated exposure to limiting values will permanently and irreversibly affect replacement of any products or rework charges) whether or not such the quality and reliability of the device. damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards sale, as published at http://www.nxp.com/profile/terms, unless otherwise customer for the products described herein shall be limited in accordance agreed in a valid written individual agreement. In case an individual with the Terms and conditions of commercial sale of NXP Semiconductors. agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to Right to make changes — NXP Semiconductors reserves the right to make applying the customer’s general terms and conditions with regard to the changes to information published in this document, including without purchase of NXP Semiconductors products by customer. limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior No offer to sell or license — Nothing in this document may be interpreted or to the publication hereof. construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 19 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch Export control — This document as well as the item(s) described herein NXP Semiconductors’ specifications such use shall be solely at customer’s may be subject to export control regulations. Export might require a prior own risk, and (c) customer fully indemnifies NXP Semiconductors for any authorization from competent authorities. liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ Non-automotive qualified products — Unless this data sheet expressly standard warranty and NXP Semiconductors’ product specifications. states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested Translations — A non-English (translated) version of a document is for in accordance with automotive testing or application requirements. NXP reference only. The English version shall prevail in case of any discrepancy Semiconductors accepts no liability for inclusion and/or use of between the translated and English versions. non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in 17.4 Trademarks automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the Notice: All referenced brands, product names, service names and trademarks product for such automotive applications, use and specifications, and (b) are the property of their respective owners. whenever customer uses the product for automotive applications beyond 18. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NX3L2G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 26 March 2013 20 of 21

NX3L2G384 NXP Semiconductors Dual low-ohmic single-pole single-throw analog switch 19. Contents 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2 5 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Functional description . . . . . . . . . . . . . . . . . . . 4 9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 10 Recommended operating conditions. . . . . . . . 5 11 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 11.1 Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 11.2 ON resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 6 11.3 ON resistance test circuit and graphs. . . . . . . . 8 12 Dynamic characteristics. . . . . . . . . . . . . . . . . 10 12.1 Waveform and test circuits. . . . . . . . . . . . . . . 11 12.2 Additional dynamic characteristics . . . . . . . . . 12 13 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 14 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 15 15 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 18 16 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 18 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19 17.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19 17.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 17.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 17.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20 18 Contact information. . . . . . . . . . . . . . . . . . . . . 20 19 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2013. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 26 March 2013 Document identifier: NX3L2G384

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: N XP: NX3L2G384GD,125 NX3L2G384GM,125 NX3L2G384GT,115