NTMS5838NL Power MOSFET (cid:2) 40 V, 7.5 A, 20 m Features • Low R DS(on) • Low Capacitance • Optimized Gate Charge http://onsemi.com • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant V(BR)DSS RDS(ON) MAX ID MAX MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) 20 m(cid:5) @ 10 V 40 V 7.5 A Parameter Symbol Value Unit 36.5 m(cid:5) @ 4.5 V Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage VGS ±20 V D Continuous Drain TA = 25°C ID 5.8 A C(Nuortree n1t) R(cid:2)JA Steady TA = 70°C 4.6 Power Dissipation State TA = 25°C PD 1.5 W G R(cid:2)JA (Note 1) TA = 70°C 1.0 Continuous Drain TA = 25°C ID 7.5 A S C(Nuortree n1t) R(cid:2)JA TA = 70°C 6.0 N−CHANNEL MOSFET t ≤10 s Power Dissipation TA = 25°C PD 2.6 W R(cid:2)JA (Note 1) TA = 70°C 1.6 MARKING DIAGRAM/ PIN ASSIGNMENT Pulsed Drain tp = 10 (cid:3)s IDM 30 A 1 8 Current Source A5 Drain Operating Junction and Storage TJ, TSTG −55 to °C SO−8 Source (cid:2)YW838 Drain Temperature +150 Source WN Drain CASE 751 Gate (cid:2)L Drain Source Current (Body Diode) IS 7.5 A STYLE 12 Top View Single Pulse Drain−to−Source Avalanche EAS 20 mJ Energy (VDD = 40 V, VGS = 10 V, A = Assembly Location L = 0.1 mH(cid:4) IAS 20 A Y = Year L(1e/a8d″ fTreommp cearsaetu froer f1o0r Ss)oldering Purposes TL 260 °C W(cid:2) W == PWbo−rFk rWeee ePkackage* (*Note: Microdot may be in either location) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ORDERING INFORMATION THERMAL RESISTANCE MAXIMUM RATINGS Device Package Shipping† Parameter Symbol Value Unit NTMS5838NLR2G SO−8 2500/Tape & Reel Junction−to−Ambient Steady State (Note 1) R(cid:2)JA 83 (Pb−Free) Junction−to−Ambient − t ≤10 s (Note 1) R(cid:2)JA 49 †For information on tape and reel specifications, °C/W including part orientation and tape sizes, please Junction−to−Foot (Drain) (Note 1) R(cid:2)JF 22 refer to our Tape and Reel Packaging Specification Junction−to−Ambient Steady State (Note 2) R(cid:2)JA 123 Brochure, BRD8011/D. 1. Surface−mounted on FR4 board using 1 sq−in pad (Cu area = 1.127 in sq [2 oz] including traces). 2. Surface−mounted on FR4 board using 0.155 in sq (100mm2) pad size. © Semiconductor Components Industries, LLC, 2012 1 Publication Order Number: February, 2012 − Rev. 2 NTMS5838NL/D

NTMS5838NL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 (cid:3)A 40 V Drain−to−Source Breakdown Voltage V(BR)DSS/ 32 mV/°C Temperature Coefficient TJ Zero Gate Voltage Drain Current IDSS VGS = 0 V, TJ = 25°C 1 VDS = 40 V TJ = 125°C 100 (cid:3)A Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±20 V ±100 nA ON CHARACTERISTICS (Note 3) Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 (cid:3)A 1.0 1.8 3.0 V Negative Threshold Temperature Coefficient VGS(TH)/TJ 6.0 mV/°C Drain−to−Source On Resistance RDS(on) VGS = 10 V, ID = 7 A 16.2 20 m(cid:5) VGS = 4.5 V, ID = 7 A 25.0 36.5 Forward Transconductance gFS VDS = 15 V, ID = 7 A 4.0 S CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance CISS 785 Output Capacitance COSS VGS = 0 V, f = 1 MHz, VDS = 20 V 123 pF Reverse Transfer Capacitance CRSS 90 Total Gate Charge QG(TOT) VGS = 10 V, VDS = 20 V; ID = 7 A 17 8.6 11 Threshold Gate Charge QG(TH) 0.8 nC Gate−to−Source Charge QGS VGS = 4.5 V, VDS = 20 V; ID = 7 A 2.8 Gate−to−Drain Charge QGD 4.0 Plateau Voltage VGP 3.2 V Gate Resistance RG 1.8 (cid:5) SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time td(ON) 11 RTuisren −TOimff eDelay Time td(OtrFF) VGIDS == 74 .A5 ,V R, GV D=S 2 =.5 2 (cid:5)0 V, 2137 ns Fall Time tf 4.0 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, TJ = 25°C 0.84 1.2 V IS = 7 A TJ = 125°C 0.7 Reverse Recovery Time tRR 17 Charge Time ta VGS = 0 V, dIS/dt = 100 A/(cid:3)s, 11 ns Discharge Time tb IS = 7 A 6.0 Reverse Recovery Charge QRR 10 nC 3. Pulse Test: pulse width (cid:2) 300 (cid:3)s, duty cycle (cid:2) 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2

NTMS5838NL TYPICAL PERFORMANCE CURVES 50 50 10 V 5.5 V 4.4 V TJ = 25°C VDS ≥ 5 V 40 40 A) 7.5 V A) T ( T ( N 4 V N E 30 E 30 R R R R U U C C N 20 3.6 V N 20 RAI RAI TJ = 125°C D D I D, 10 I D, 10 TJ = 25°C 3 V TJ = −55°C 0 0 0 1 2 3 4 5 2 3 4 5 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics (cid:5)) CE ( 0.06 (cid:5)E () 0.035 AN TJ = 25°C NC TJ = 25°C SIST 0.05 ID = 7 A STA E SI E R RE 0.025 VGS = 4.5 V C 0.04 E R C U R O U −S 0.03 SO VGS = 10 V O − T O 0.015 − T N − RAI 0.02 AIN D R S(on), 0.01 D on), 0.005 RD 2 3 4 5 6 7 8 9 10DS( 2 6 10 14 18 R VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and Voltage Gate Voltage 1.6 100000 VGS = 4.5 V VGS = 0 V ED) ID = 7 A CE1.4 RZ DRAIN−TO−SOU S(on),SISTANCE (NORMALI01..821 I, LEAKAGE (nA)DSS101000000 TJ = 1T5J0 =°C 125°C DE RR 0.6 100 −50 −25 0 25 50 75 100 125 150 5 15 25 35 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current Temperature vs. Voltage http://onsemi.com 3

NTMS5838NL TYPICAL PERFORMANCE CURVES 1200 6 TJ = 25°C 1000 VGS = 0 V V) QT V) F) E ( E ( p C C CITANCE ( 680000 Ciss TO−SOUR 4 QGS QGD TO−SOUR A − − P E N A 400 T 2 AI C A R C, 200 Coss V, GGS VIDG =S 7= A10 V V, DDS Crss TJ = 25°C 0 0 0 10 20 30 40 0 1 2 3 4 5 6 7 8 9 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−To−Source and Drain−To−Source Voltage vs. Total Charge 1000 VDS = 20 V 12 VGS = 0 V IVDG =S 7= A4.5 V T (A)10 TJ = 25°C 100 EN ns) RR 8 E ( CU t, TIM 10 td(otffr) td(on) URCE 6 tf O 4 S , S I 2 1 0 1 10 100 0.2 0.4 0.6 0.8 1 RG, GATE RESISTANCE ((cid:5)) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Figure 10. Diode Forward Voltage vs. Current Variation vs. Gate Resistance 100 20 J) T (A) 10 1 ms AIN−TO−ERGY (m15 ID = 20 A N RN RE 1 E DE E R SH U LC10 RAIN C 0.1 STCIN =G 2L5E° CPULSE 11000 (cid:3) (cid:3)ss GLE PUVALAN I, DD 0.01 RDS(on) LIMIT d1c0 ms S, SINRCE A 5 THERMAL LIMIT AU EO PACKAGE LIMIT S 0.001 0 0.1 1 10 100 25 50 75 100 125 150 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Figure 12. Maximum Avalanche Energy vs. Safe Operating Area Starting Junction Temperature http://onsemi.com 4

NTMS5838NL TYPICAL PERFORMANCE CURVES 100 D = 0.5 0.2 10 0.1 0.05 W) 0.02 C/ °R(t) ( 1 0.01 0.1 SINGLE PULSE 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 t, TIME (s) Figure 13. Thermal Response http://onsemi.com 5

NTMS5838NL PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK NOTES: −X− 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. A 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) 8 5 PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR B S 0.25 (0.010) M Y M PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL 1 IN EXCESS OF THE D DIMENSION AT −Y− 4 K 6. M75A1X−I0M1U TMH RMUA T7E51R−IA0L6 CAROEN DOIBTSIOONL.ETE. NEW STANDARD IS 751−07. G MILLIMETERS INCHES DIM MIN MAX MIN MAX A 4.80 5.00 0.189 0.197 C NX 45(cid:3) B 3.80 4.00 0.150 0.157 SEATING C 1.35 1.75 0.053 0.069 PLANE D 0.33 0.51 0.013 0.020 −Z− G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 0.10 (0.004) J 0.19 0.25 0.007 0.010 H D M J K 0.40 1.27 0.016 0.050 M 0 (cid:3) 8 (cid:3) 0 (cid:3) 8 (cid:3) N 0.25 0.50 0.010 0.020 0.25 (0.010)M Z Y S X S S 5.80 6.20 0.228 0.244 SOLDERING FOOTPRINT* STYLE 12: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 1.52 5. DRAIN 0.060 6. DRAIN 7. DRAIN 8. DRAIN 7.0 4.0 0.275 0.155 0.6 1.270 0.024 0.050 (cid:3) (cid:4) mm SCALE 6:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com NTMS5838NL/D 6