NTGS5120P, NVGS5120P Power MOSFET −60 V, −2.9 A, Single P−Channel, TSOP−6 Features • 60 V BVds, Low R in TSOP−6 Package DS(on) • 4.5 V Gate Rating • http://onsemi.com NV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable V(BR)DSS RDS(ON) MAX ID MAX • This is a Pb−Free Device 111 m(cid:3) @ −10 V −60 V −2.9 A Applications 142 m(cid:3) @ −4.5 V • High Side Load Switch • Power Switch for Printers, Communication Equipment P−Channel MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) 1 2 5 6 Parameter Symbol Value Unit Drain−to−Source Voltage VDSS −60 V Gate−to−Source Voltage VGS (cid:2)20 V 3 Continuous Drain Steady TA = 25°C ID −2.5 Current (Note 1) State TA = 85°C −2.0 A 4 t (cid:3) 5 s TA = 25°C −2.9 MARKING Power Dissipation Steady PD 1.1 DIAGRAM (Note 1) State TA = 25°C W t (cid:3) 5 s 1.4 TSOP−6 XX M(cid:2) Continuous Drain TA = 25°C ID −1.8 CASE 318G (cid:2) Current (Note 2) Steady TA = 85°C −1.3 A 1 STYLE 1 1 State P(Noowtee r2 D)issipation TA = 25°C PD 0.6 W XX = Device Code M = Date Code Pulsed Drain Current tp = 10 (cid:2)s IDM −20 A (cid:2) = Pb−Free Package (Note: Microdot may be in either location) Operating Junction and Storage Temperature TJ, −55 to °C TSTG 150 PIN ASSIGNMENT Lead Temperature for Soldering Purposes TL 260 °C DrainDrainSource (1/8” from case for 10 s) 6 5 4 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces) 2. Surface−mounted on FR4 board using the minimum recommended pad size. 1 2 3 DrainDrain Gate ORDERING INFORMATION See detailed ordering and shipping information ion page5 of this data sheet. © Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: August, 2014 − Rev. 1 NTGS5120P/D

NTGS5120P, NVGS5120P THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit Junction−to−Ambient – Steady State (Note 3) R(cid:4)JA 102 Junction−to−Ambient – t = 5 s (Note 3) R(cid:4)JA 77.6 °C/W Junction−to−Ambient – Steady State (Note 4) R(cid:4)JA 200 3. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces) 4. Surface−mounted on FR4 board using the minimum recommended pad size. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = −250 (cid:2)A −60 V Zero Gate Voltage Drain Current IDSS VGS = 0 V, TJ = 25°C −1.0 (cid:2)A VDS = −48 V TJ = 125°C −5.0 Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±12 V (cid:2)100 nA VDS = 0 V, VGS = ±20 V (cid:2)200 nA ON CHARACTERISTICS (Note 5) Gate Threshold Voltage VGS(TH) VGS = VDS, ID = −250 (cid:2)A −1.0 −3.0 V Drain−to−Source On Resistance RDS(on) VGS = −10 V, ID = −2.9 A 72 111 m(cid:3) VGS = −4.5 V, ID = −2.5 A 88 142 Forward Transconductance gFS VDS = −5.0 V, ID = −6.0 A 10.1 S CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance CISS 942 pF Output Capacitance COSS VGS = 0 V, f = 1 MHz, VDS = −30 V 72 Reverse Transfer Capacitance CRSS 48 Total Gate Charge QG(TOT) 18.1 nC Threshold Gate Charge QG(TH) VGS = −10 V, VDS = −30 V; 1.2 Gate−to−Source Charge QGS ID = −2.9 A 2.7 Gate−to−Drain Charge QGD 3.6 SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time td(ON) 8.7 ns Rise Time tr VGS = −10 V, VDS = −30 V, 4.9 Turn−Off Delay Time td(OFF) ID = −1.0 A, RG = 6.0 (cid:3) 38 Fall Time tf 12.8 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, TJ = 25°C −0.75 −1.0 V IS = −0.9 A Reverse Recovery Time tRR 18.3 ns Charge Time ta VGS = 0 VIS, d=I S−/0d.t9 = A 100 A/(cid:2)s, 15.5 ns Reverse Recovery Charge QRR 15.1 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. Pulse Test: pulse width (cid:3) 300 (cid:2)s, duty cycle (cid:3) 2% 6. Switching characteristics are independent of operating junction temperatures http://onsemi.com 2

NTGS5120P, NVGS5120P TYPICAL CHARACTERISTICS 3.5 −3.0 V −2.8 V TJ = 25°C 5.0 A) 3.0 −10 V A) VDS ≥ −10 V T ( 2.5 −4.5 V T ( 4.0 N −3.2 V N E E R R R 2.0 −2.6 V R 3.0 U U C C N 1.5 N AI AI 2.0 R R D 1.0 D , D , D TJ = −55°C TJ = 25°C −I −2.4 V −I 1.0 0.5 VGS = −2.2 V TJ = 125°C 0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 0.4 0.9 1.4 1.9 2.4 2.9 3.4 3.9 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) −VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics (cid:3)) (cid:3)) TANCE ( 00..1280 ITDJ == −225.°9C A TANCE ( 00..0190 TJ = 25°C VGS = −4.5 V S S SI 0.16 SI E E R R 0.08 CE 0.14 CE VGS = −10 V R R U 0.12 U 0.07 O O S S − 0.10 − O O 0.06 T T − 0.08 − N N AI AI 0.05 R 0.06 R D D , n)0.04 , n)0.04 o o S( 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10 S( 1.0 2.0 3.0 4.0 5.0 6.0 7.0 D D R R −VGS, GATE−TO−SOURCE VOLTAGE (V) −ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 10,000 ES- 1.8 ID = −2.9 A VGS = 0 V R VGS = −4.5 V SOURCE MALIZED)11..46 GE (nA)1000 TJ = 150°C −R A OO K RAIN−TNCE (N11..02 , LEASS 100 TJ = 125°C , Dn)STA −ID S(oI0.8 D R 0.6 10 −50 −25 0 25 50 75 100 125 150 10 20 30 40 50 60 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current Temperature vs. Voltage http://onsemi.com 3

NTGS5120P, NVGS5120P TYPICAL CHARACTERISTICS 1300 V) 10 11210000 VTJG =S =2 50° CV AGE ( 9.0 Qt F)1000 Ciss OLT 8.0 E (p 900 E V 7.0 C 800 C 6.0 N R A 700 U T O 5.0 CI 600 S PA 500 O− 4.0 C, CA 340000 Coss ATE−T 23..00 Qgs Qgd TJ = 25°C 1200000 Crss V, GGS 1.00 IVDd =s =− 2−.93 0A V − 0 10 20 30 40 0 2.0 4.0 6.0 8.0 10 12 14 16 18 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage vs. Total Charge 1000 1.4 VVIDDG =DS −==1 −−.031 00A VV td(off) NT (A) 11..02 VTJG =S =2 50° CV 100 E E (ns) tf CURR 0.8 M E TI td(on) C 0.6 t, 10 UR O 0.4 tr , SS −I 0.2 1.0 0 1.0 10 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 RG, GATE RESISTANCE ((cid:3)) −VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current vs. Gate Resistance 100 S) MP 10 10 (cid:2)s A T ( 100 (cid:2)s N E R R 1 1 ms CU 0 V ≤ VGS ≤ 20 V N SINGLE PULSE RAI TC = 25°C 10 ms D 0.1 , D RDS(on) LIMIT I THERMAL LIMIT PACKAGE LIMIT dc 0.01 0.1 1 10 100 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4

NTGS5120P, NVGS5120P TYPICAL CHARACTERISTICS W) C/ 1000 ° E ( S N 100 D = 0.5 O SP 0.2 RE 10 0.1 L 0.05 A M 0.02 R E 1 H 0.01 T T N E 0.1 SI N Single Pulse A R T 0.01 , a(t) 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 hj Rt t, PULSE TIME (s) Figure 12. Thermal Response Table 1. ORDERING INFORMATION Marking Part Number (XX) Package Shipping† NTGS5120PT1G P6 TSOP−6 3000 / Tape & Reel (Pb−Free) NVGS5120PT1G VP6 TSOP−6 3000 / Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5

NTGS5120P, NVGS5120P PACKAGE DIMENSIONS TSOP−6 CASE 318G−02 ISSUE V D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. H 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. É6ÉÉ5 4 L2 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, GAUGE PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR E1 E PLANE GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D ÉÉÉ AND E1 ARE DETERMINED AT DATUM H. 1 2 3 5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE. L NOTE 5 b M C PSLEAANTIENG DIM MIN MILLNIMOEMTERSMAX DETAIL Z A 0.90 1.00 1.10 e A1 0.01 0.06 0.10 b 0.25 0.38 0.50 c 0.10 0.18 0.26 c D 2.90 3.00 3.10 0.05 A EE1 21..5300 21..7550 31..0700 e 0.85 0.95 1.05 A1 L 0.20 0.40 0.60 DETAIL Z LM2 0° 0.25− BSC 10° STYLE 1: RECOMMENDED PIN 1.DRAIN SOLDERING FOOTPRINT* 2.DRAIN 3.GATE 6X 4.SOURCE 0.60 5.DRAIN 6.DRAIN 3.20 6X 0.95 0.95 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com NTGS5120P/D 6

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: NTGS5120PT1G NVGS5120PT1G