NCP700B LDO Regulator - Ultra Low Noise, High PSRR, BiCMOS RF 200 mA http://onsemi.com Noise sensitive RF applications such as Power Amplifiers in cell phones and precision instrumentation require very clean power MARKING supplies. The NCP700B is 200 mA LDO that provides the engineer DIAGRAM with a very stable, accurate voltage with ultra low noise and very high Power Supply Rejection Ratio (PSRR) suitable for RF applications. In 1 WDFN6 X M order to optimize performance for battery operated portable CASE 511BJ (cid:2) applications, the NCP700B employs an advanced BiCMOS process to combine the benefits of low noise and superior dynamic performance of bipolar elements with very low ground current consumption at full 5 loads offered by CMOS. TSOP−5 XXXAYW 5 Furthermore, in order to provide a small footprint for space SN SUFFIX (cid:2) 1 constrained applications, the NCP700B is stable with small, low value CASE 483 1 capacitors and is available in a very small WDFN6 1.5 mm x 1.5 mm and TSOP−5 package. X, XXX = Specific Device Code M = Date Code Features A = Assembly Location • Output Voltage Options: Y = Year W = Work Week ♦ 1.8 V, 2.5 V, 2.8 V, 3.0 V, 3.3 V (cid:2) = Pb−Free Package ♦ Contact Factory for Other Voltage Options • Excellent Line and Load Regulation • Ultra Low Noise (typ. 10 (cid:2)Vrms) PIN CONNECTIONS • Very High PSRR (typ 82 dB @ 1 kHz) • Stable with Ceramic Output Capacitors as low as 1 (cid:2)F IN 1 6 EN • Very Low Ground Current (typ. 70 (cid:2)A @ no load) GND 2 5 NC • Low Disable Mode Current (max. 1 (cid:2)A) • Active Discharge Circuit OUT 3 4 BYP • Current Limit Protection • (Top View) Thermal Shutdown Protection • These are Pb−Free Devices Applications IN 1 5 OUT • Smartphones / PDAs / Palmtops / GPS • Cellular Telephones (Power Amplifier) GND 2 • Noise Sensitive Applications (RF, Video, Audio) • EN 3 4 BYP Analog Power Supplies • Battery Supplied Devices (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 19 of this data sheet. © Semiconductor Components Industries, LLC, 2013 1 Publication Order Number: September, 2019 − Rev. 2 NCP700B/D

NCP700B VIN VOUT 1 3 IN OUT NCP700B 6 4 EN BYP 1C (cid:2)IFN OFFON GND2 1C0n onisFe C1 O(cid:2)FUT Figure 1. NCP700B Typical Application (WDFN6) RDIS RPD Figure 2. Simplified Block Diagram PIN FUNCTION DESCRIPTION WDFN TSSOP−5 Pin No. Pin No. Pin Name Description 1 1 IN Input Voltage 2 2 GND Power Supply Ground 3 5 OUT Regulated Output Voltage 4 4 BYP Noise reduction pin. (Connect 10 nF or 100 nF capacitor to GND) Enable pin: This pin allows on/off control of the regulator. To disable the device, connect to 6 3 EN GND. If this function is not in use, connect to Vin. Internal 5 M(cid:3) Pull Down resistor is con- nected between EN and GND. 5 - N/C Not connected http://onsemi.com 2

NCP700B MAXIMUM RATINGS Rating Symbol Value Unit Input Voltage IN −0.3 V to 6 V V Chip Enable Voltage EN −0.3 V to VIN +0.3 V Noise Reduction Voltage BYP −0.3 V to VIN +0.3 V V Output Voltage OUT −0.3 V to VIN +0.3 V V Output short−circuit duration Infinity Maximum Junction Temperature TJ(max) 150 °C Storage Temperature Range TSTG −55 to 150 °C Electrostatic Discharge (Note 1) Human Body Model ESD 2000 V Machine Model 200 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V tested per MIL−STD−883, Method 3015 Machine Model Method 200 V THERMAL CHARACTERISTICS Rating Symbol Value Unit Package Thermal Resistance, WDFN6: (Note 2) °C/W Junction−to−Ambient (Note 3) (cid:4)JA 185 Package Thermal Characterization Parameter, WDFN6: Junction-to-Lead (Pin 2) (Note 3) (cid:5) 123 JL2 Junction-to-Board (Note 3) (cid:5) 111 JB Package Thermal Resistance, TSOP-5: (Note 2 and 3) °C/W Junction−to−Case (Pin 2) (cid:5)JL2 92 Junction−to−Ambient R(cid:4)JA 204 2. Refer to APPLICATION INFORMATION for Safe Operating Area 3. Single component mounted on 1 oz, FR4 PCB with 645mm2 Cu area. http://onsemi.com 3

NCP700B ELECTRICAL CHARACTERISTICS VIN = VOUT + 0.5 V or 2.5 V (whichever is greater), VEN = 1.2 V, CIN = COUT = 1 (cid:2)F, Cnoise = 10 nF, IOUT = 1 mA, TJ = −40°C to 125°C, unless otherwise specified (Note 4) Parameter Test Conditions Symbol Min Typ Max Unit REGULATOR OUTPUT Input Voltage Range VIN 2.5 − 5.5 V Output Voltage Accuracy TJ = −40°C to 125°C, VOUT −2.5% − +2.5% V VIN = (VOUT + 0.5 V) to 5.5 V IOUT = 1 mA to 200 mA Line Regulation VIN = (VOUT +0.5 V) to 5.5 V, IOUT = 1 mA (cid:6)VOUT / − 0.6 4 mV (cid:6)VIN Load Regulation IOUT = 0 mA to 200 mA (cid:6)VOUT / − 0.2 5 mV (cid:6)IOUT Dropout Voltage (Note 5) IOUT= 200 mA VOUT(NOM) = 2.5 V VDO − 140 230 mV VOUT(NOM) = 2.8 V − 120 205 VOUT(NOM) = 3.0 V − 115 190 VOUT(NOM) = 3.3 V − 110 185 Output Current Limit VOUT = VOUT(NOM) – 0.1 V ILIM 200 310 470 mA Output Short Circuit Current VOUT = 0V ISC 205 320 490 mA Ground Current IGND (cid:2)A IOUT = 0 mA − 70 110 IOUT = 200 mA − 75 130 Disable Current VEN = 0 V IDIS − 0.1 1 (cid:2)A Power Supply Rejection Ratio VIN = VOUT +1.0 V, VOUT = 1.8 V, PSRR − 82 − dB IOUT = 150 mA, f = 1 kHz Output Noise Voltage f = 10 Hz to 100 kHz, Cnoise = 10 nF VN − 15 − (cid:2)VRMS IOUT = 150 mA, Cnoise = 100 nF − 10 − VOUT = 1.8 V Turn−On Time (Note 6) IOUT = 150 mA, Cnoise = 10 nF tON − 400 − (cid:2)s Enable Threshold Low Vth(EN) − − 0.4 V High 1.2 − − Enable Internal Pull−Down RPD 2.5 5 10 M(cid:3) Resistance (Note 7) Active Discharge Resistance VEN = 0 V RDIS − 1 − k(cid:3) Thermal Shutdown Shutdown, Temperature increasing TSDU − 150 − °C Reset, Temperature decreasing TSDD − 135 − °C Operating Junction Temperature TJ −40 125 °C 4. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 5. Measured when the output voltage falls 100 mV below the nominal output voltage (nominal output voltage is the voltage at the output meas- ured under the condition VIN = VOUT + 0.5 V). In the case of devices having the nominal output voltage VOUT = 1.8 V the minimum input to output voltage differential is given by the VIN(MIN) = 2.5 V. 6. The turn−on time is the time from asserting the EN to the point where output voltage reaches 98% nominal voltage level. 7. Expected to disable the device when EN pin is floating. http://onsemi.com 4

NCP700B TYPICAL CHARACTERISTICS 1.836 V) 1.824 E ( G A 1.812 T L O T V 1.800 U P T U 1.788 O , ut VIN = 2.5 V, Vo 1.776 CIN = COUT = 1 (cid:2)F, Cnoise = 10 nF 1.764 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) Figure 3. Output Voltage vs. Junction Temperature, V = 1.8 V OUT 2.8560 V) 2.8373 E ( G A 2.8187 T L O T V 2.8000 U P T U 2.7813 O , ut Vo 2.7627 VIN = 3.3 V, CIN = COUT = 1 (cid:2)F, 2.7440 Cnoise = 10 nF −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) Figure 4. Output Voltage vs. Junction Temperature, V = 2.8 V OUT 3.06 V) 3.04 E ( G A 3.02 T L O T V 3.00 U P T U 2.98 O , ut Vo 2.96 VIN = 3.5 V, CIN = COUT = 1 (cid:2)F, 2.94 Cnoise = 10 nF −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) Figure 5. Output Voltage vs. Junction Temperature, V = 3.0 V OUT http://onsemi.com 5

NCP700B TYPICAL CHARACTERISTICS 3.3660 180 CIN = COUT = 1 (cid:2)F, V) 3.3440 mV) 150 Cnoise = 10 nF AGE ( 3.3220 AGE ( 120 TJ = 25°C T T L L O O T V 3.3000 T V 90 TJ = 125°C U U P O T P U 3.2780 O 60 V, Oout 3.2560 VCCIInNNo i==se 3C =.O8 1 UV0T, n=F 1 (cid:2)F, V, DRDO 30 TJ = −40°C 3.2340 0 −40 −20 0 20 40 60 80 100 120 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (°C) IOUT, OUTPUT CURRENT (mA) Figure 6. Output Voltage vs. Junction Figure 7. Dropout Voltage vs. Output Current, Temperature, V = 3.3 V V = 2.8 V OUT OUT 180 180 CIN = COUT = 1 (cid:2)F, CIN = COUT = 1 (cid:2)F, V) Cnoise = 10 nF V) Cnoise = 10 nF m 150 m 150 E ( E ( G G A 120 A 120 OLT TJ = 25°C OLT TJ = 25°C V V T 90 T 90 OU TJ = 125°C OU TJ = 125°C P P O 60 O 60 R R , DO 30 TJ = −40°C , DO 30 TJ = −40°C D D V V 0 0 0 40 80 120 160 200 0 40 80 120 160 200 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) Figure 8. Dropout Voltage vs. Output Current, Figure 9. Dropout Voltage vs. Output Current, V = 3.0 V V = 3.3 V OUT OUT http://onsemi.com 6

NCP700B TYPICAL CHARACTERISTICS 100 110 90 IOUT = 10 mA 100 IOUT = 10 mA 80 90 80 70 IOUT = 150 mA 70 IOUT = 150 mA B) 60 B) d d 60 RR ( 50 IOUT = 200 mA RR ( 50 IOUT = 200 mA S 40 S P 30 TA = 25°C, P 40 TA = 25°C, 20 CCnOoUisTe == 11 0(cid:2) Fn,F, 2300 CCnOoUisTe == 11 0(cid:2)0F, nF, 100 VVOINU =T 3=. 01 .V8 DVC, ± 50 mVAC 100 VVOINU =T 3=. 01 .V8 DVC, ± 50 mVAC 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 10. PSRR vs. Frequency, 1.8 V Output Figure 11. PSRR vs. Frequency, 1.8 V Output Voltage Option, C = 1 (cid:2)F, C = 10 nF Voltage Option, C = 1(cid:2)F, C = 100nF OUT noise OUT noise 100 120 90 IOUT = 10 mA 110 IOUT = 10 mA 100 80 90 70 80 B) 60 IOUT = 150 mA B) 70 IOUT = 150 mA R (d 50 IOUT = 200 mA R (d 60 SR 40 SR 50 IOUT = 200 mA P 30 TA = 25°C, P 40 TA = 25°C, 20 CCnOoUisTe == 41.07 n(cid:2)FF,, 2300 CCnOoUisTe == 41.070 (cid:2) nF,F, 100 VVOINU =T 3=. 01 .V8 DVC, ± 50 mVAC 100 VVOINU =T 3=. 01 .V8 DVC, ± 50 mVAC 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 12. PSRR vs. Frequency, 1.8 V Output Figure 13. PSRR vs. Frequency, 1.8V Output Voltage Option, C = 4.7 (cid:2)F, C = 10 nF Voltage Option, C = 4.7(cid:2)F, C = 100nF OUT noise OUT noise 110 110 100 100 IOUT = 10 mA IOUT = 10 mA 90 90 IOUT = 150 mA 80 IOUT = 150 mA 80 70 70 dB) 60 dB) 60 IOUT = 200 mA RR ( 50 IOUT = 200 mA RR ( 50 S S P 40 TA = 25°C, P 40 TA = 25°C, 30 Cnoise = 10 nF, 30 Cnoise = 100 nF, 20 COUT = 1 (cid:2)F, 20 COUT = 1 (cid:2)F, 10 VVOINU =T 3=. 32 .V8 DVC, ± 50 mVAC 10 VVOINU =T 3=. 32 .V8 DVC, ± 50 mVAC 0 0 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 14. PSRR vs. Frequency, 2.8 V Output Figure 15. PSRR vs. Frequency, 2.8 V Output Voltage Option, C = 1 (cid:2)F, C = 10 nF Voltage Option, C = 1 (cid:2)F, C = 100 nF OUT noise OUT noise http://onsemi.com 7

NCP700B TYPICAL CHARACTERISTICS 110 110 100 100 IOUT = 10 mA IOUT = 10 mA 90 90 80 80 70 IOUT = 150 mA 70 IOUT = 150 mA B) B) d 60 d 60 RR ( 50 IOUT = 200 mA RR ( 50 IOUT = 200 mA S S P 40 TA = 25°C, P 40 TA = 25°C, 30 Cnoise = 10 nF, 30 Cnoise = 100 nF, 20 COUT = 4.7 (cid:2)F, 20 COUT = 4.7 (cid:2)F, 10 VOUT = 2.8 V, 10 VOUT = 2.8 V, VIN = 3.3 VDC ± 50 mVAC VIN = 3.3 VDC ± 50 mVAC 0 0 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 16. PSRR vs. Frequency, 2.8 V Output Figure 17. PSRR vs. Frequency, 2.8 V Output Voltage Option, C = 4.7 (cid:2)F, C = 10 nF Voltage Option, C = 4.7 (cid:2)F, C = 100 nF OUT noise OUT noise 10 10 HZ) 10 HzV −O 1U0T0 = k 3H.z3 IVntegral HZ) 10 HzV −O 1U0T0 = k 3H.z3 IVntegral ICOOUUTT = = 5 10 (cid:2)mFA,, √V/ Noise: Vn = 25.3 (cid:2)Vrms √V/ Noise: Vn = 11.9 (cid:2)Vrms Cnoise = 100 nF (cid:2)SE ( 1.0 10 HzV −O 1U0T0 = k 2H.z8 IVntegral (cid:2)SE ( 1.0 2V.I5N V=, VwOhUicTh =e v+e0r. 5is Vh iogrher NOI Noise: Vn = 22.6 (cid:2)Vrms NOI VOUT = 2.8 V E E 10 Hz − 100 kHz Integral TAG 10 HzV −O 1U0T0 = k 1H.z8 IVntegral TAG Noise: Vn = 11.7 (cid:2)Vrms OL 0.10 IOUT = 50 mA, Noise: Vn = 14.9 (cid:2)Vrms OL 0.10 T V COUT = 1 (cid:2)F, T V PU Cnoise = 10 nF PU VOUT = 1.8 V UT VIN = VOUT = +0.5 V or UT 10 Hz − 100 kHz Integral O 2.5 V, whichever is higher O Noise: Vn = 9.4 (cid:2)Vrms 0.01 0.01 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 18. Output Noise vs. Frequency, C = Figure 19. Output Noise vs. Frequency, C = OUT OUT 1 (cid:2)F, C = 10 nF, I = 50 mA 1 (cid:2)F, C = 100 nF, I = 50 mA noise OUT noise OUT 10 10 √V/HZ) 1N0o HiszeV :− OV 1Un0 T=0 = 2k 23H..z83 5 IVn (cid:2)teVgrmrasl √V/HZ) 10N HozisV e−O: 1UV0Tn0 == k 3H1.2z3 (cid:2)IVnVtermgsral ICCOOnUoUTisT e= = =2 101 00(cid:2) 0Fm, nAF, (cid:2)E ( VOUT = 2.8 V (cid:2)E ( VIN = VOUT = +0.5 V or S 1.0 10 Hz − 100 kHz Integral S 1.0 2.5 V, whichever is higher NOI Noise: Vn = 22.7 (cid:2)Vrms NOI E E VOUT = 2.8 V G VOUT = 1.8 V G 10 Hz − 100 kHz Integral VOLTA 0.10 IOUT = 200 mA, 10N Hozis e−: 1V0n0 = k H15z (cid:2)InVtermgsral VOLTA 0.10 Noise: Vn = 11.7 (cid:2)Vrms T COUT = 1 (cid:2)F, T U U P Cnoise = 10 nF P VOUT = 1.8 V UT VIN = VOUT = +0.5 V or UT 10 Hz − 100 kHz Integral O 0.01 2.5 V, whichever is higher O 0.01 Noise: Vn = 9.5 (cid:2)Vrms 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 20. Output Noise vs. Frequency, C = Figure 21. Output Noise vs. Frequency, C = OUT OUT 1 (cid:2)F, C = 10 nF, I = 200 mA 1 (cid:2)F, C = 100 nF, I = 200 mA noise OUT noise OUT http://onsemi.com 8

NCP700B TYPICAL CHARACTERISTICS 35 20 TA = 25°C, PUT 30 CVOOUUTT == 31. 3(cid:2) FV,, PUT 1168 T T U IOUT = 200 mA U S O)s25 VIN = 3.8 V S O)s14 M m M m12 RVr RVr Hz (cid:2)E ( 20 Hz (cid:2)E ( 10 kS kS HZ to 100 NOI 15 HZ to 100 NOI 468 TCVAOn oU=isT 2e = 5= °3 C1.30, 0V n,F, 10 10 10 2 IOUT = 200 mA VIN = 3.8 V 5 0 0 50 100 150 200 250 300 350 400 450 500 1 3 5 7 9 11 13 15 17 19 21 Cnoise, NOISE BYPASS CAPACITOR (nF) COUT, OUTPUT CAPACITOR ((cid:2)F) Figure 22. Output Noise vs. Noise Bypass Figure 23. Output Noise vs. Output Capacitance, C = 1 (cid:2)F, V = 3.3 V, I = Capacitance, C = 100 nF, V = 3.3 V, OUT OUT OUT noise OUT 200 mA I = 200 mA OUT 30 15 T 28 T 14 U U P 26 VOUT = 3.3 V P 13 T T RMS OUV)rms2224 VOUT = 2.8 V RMS OUV)rms1112 VVOOUUTT == 32..38 VV Hz (cid:2)E ( 20 Hz (cid:2)E ( 10 kS kS 00 OI 18 00 OI 9 VOUT = 1.8 V 1N 1N Z to 16 VOUT = 1.8 V Z to 8 H 14 H 7 0 TA = 25°C, Cnoise = 10 nF, COUT = 1 (cid:2)F, 0 TA = 25°C, Cnoise = 100 nF, COUT = 1 (cid:2)F, 1 12 VIN = VOUT + 0.5 V or 2.5 V, whichever is higher 1 6 VIN = VOUT + 0.5 V or 2.5 V, whichever is higher 10 5 0 25 50 75 100 125 150 175 200 0 25 50 75 100 125 150 175 200 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) Figure 24. Output Noise vs. Load Current, Figure 25. Output Noise vs. Load Current, C = 10 nF, C = 1 (cid:2)F C = 100 nF, C = 1 (cid:2)F noise OUT noise OUT 300 200 GE (V) 200 mA 1 mA 0100 NT (mA) TA E L R O R V U T 1.85 C U T P 1.80 U T P U T O 1.75 U V, OUT 1.70 COUT = 4.7 (cid:2)F, VIN = 2.5 V, Cnoise = 100 nF, , OOUT 1.65 dIOUT/dt = 200 mA / 1 (cid:2)s I 1.60 0 40 80 120 160 200 240 280 320 360 400 t, TIME ((cid:2)s) Figure 26. Load Transient Response, V = OUT 1.8 V, C = 4.7 (cid:2)F, C = 100 nF OUT noise http://onsemi.com 9

NCP700B TYPICAL CHARACTERISTICS 300 200 TAGE (V) 200 mA 1 mA 0100 ENT (mA) L1.90 R O R V U T 1.85 C U T P1.80 U T P U T O1.75 U V, OUT1.70 COUT = 1 (cid:2)F, VIN = 2.5 V, Cnoise = 100 nF, , OOUT 1.65 dIOUT/dt = 200 mA / 1 (cid:2)s I 1.60 0 40 80 120 160 200 240 280 320 360 400 t, TIME ((cid:2)s) Figure 27. Load Transient Response, V = OUT 1.8 V, C = 1 (cid:2)F, C = 100 nF OUT noise 300 200 GE (V) 200 mA 1 mA 0100 NT (mA) TA E L3.40 R O R V U T 3.35 C U T P3.30 U T P U T O3.25 U V, OUT3.20 COUT = 4.7 (cid:2)F, VIN = 3.8 V, Cnoise = 100 nF, , OOUT 3.15 dIOUT/dt = 200 mA / 1 (cid:2)s I 3.10 0 40 80 120 160 200 240 280 320 360 400 t, TIME ((cid:2)s) Figure 28. Load Transient Response, V = OUT 3.3 V, C = 4.7 (cid:2)F, C = 100 nF OUT noise 300 200 GE (V) 200 mA 1 mA 0100 NT (mA) TA E L3.40 R O R V U T 3.35 C U T P3.30 U T P U T O3.25 U V, OUT3.20 COUT = 1 (cid:2)F, VIN = 3.8 V, Cnoise = 100 nF, , OOUT 3.15 dIOUT/dt = 200 mA / 1 (cid:2)s I 3.10 0 40 80 120 160 200 240 280 320 360 400 t, TIME ((cid:2)s) Figure 29. Load Transient Response, V = OUT 3.3 V, C = 1 (cid:2)F, C = 100 nF OUT noise http://onsemi.com 10

NCP700B TYPICAL CHARACTERISTICS 4.0 3.5 AGE (V) VIN = 3.5 V VIN = 2.5 V 23..50 GE (V) OLT 1.810 TA L V O T 1.805 V U T UTP 1.800 NPU , OT 1.795 , IN OU 1.790 VI V 1.785 COUT = 1 (cid:2)F, VIN = 2.5 V, Cnoise = 100 nF, IOUT = 30 mA, dVIN/dt = 1 V / 1 (cid:2)s 1.780 0 20 40 60 80 100 120 140 160 180 200 t, TIME ((cid:2)s) Figure 30. Line Transient Response, V = 1.8 V, C = 1 (cid:2)F, I = 30 mA OUT OUT OUT 4.0 3.5 GE (V) VIN = 3.5 V VIN = 2.5 V 23..50 E (V) A G OLT 1.810 TA L V O T 1.805 V U T P 1.800 U , OUTOUT 11..779905 COUT = 1 (cid:2)F, VIN = 2.5 V, V, INPIN V Cnoise = 100 nF, IOUT = 200 mA, 1.785 dVIN/dt = 1 V / 1 (cid:2)s 1.780 0 20 40 60 80 100 120 140 160 180 200 t, TIME ((cid:2)s) Figure 31. Line Transient Response, V = 1.8 V, C = 1 (cid:2)F, I = 200 mA OUT OUT OUT 5.0 4.5 GE (V) VIN = 4.5 V VIN = 3.5 V 34..50 E (V) A G OLT 3.010 TA L V O T 3.005 V U T P 3.000 U , OUTOUT 22..999905 COUT = 1 (cid:2)F, VIN = 3.5 V, V, INPIN V 2.985 Cnoise = 100 nF, IOUT = 30 mA, dVIN/dt = 1 V / 1 (cid:2)s 2.980 0 20 40 60 80 100 120 140 160 180 200 t, TIME ((cid:2)s) Figure 32. Line Transient Response, V = 3.0 V, C = 1 (cid:2)F, I = 30 mA OUT OUT OUT http://onsemi.com 11

NCP700B TYPICAL CHARACTERISTICS 5.0 4.5 GE (V) VIN = 4.5 V VIN = 3.5 V 34..50 E (V) A G OLT 3.010 TA L V O T 3.005 V U T P 3.000 U UT NP , OOUT22..999905 COUT = 1 (cid:2)F, VIN = 3.5 V, V, IIN V 2.985 Cnoise = 100 nF, IOUT = 200 mA, dVIN/dt = 1 V / 1 (cid:2)s 2.980 0 20 40 60 80 100 120 140 160 180 200 t, TIME ((cid:2)s) Figure 33. Line Transient Response, V = 3.0 V, C = 1 (cid:2)F, I = 200 mA OUT OUT OUT 5.7 3.8 GE (V) VEN = 3.8 V 01..09 GE (V) PUT VOLTA 34..00 VEN = 0C Vnoise = 10 nF BLE VOLTA T A OU 2.0 Cnoise = 220 nF EN V, OUT 01..00 Cnoise =C 4n7o isneF = 100 nCFOUT = 1 (cid:2)F, V, EN VIN = 3.8 V −1.0 0 2 4 6 8 10 12 14 16 t, TIME (ms) Figure 34. Turn−On Response V = 3.3 V, C = 1 (cid:2)F, I = 30 mA OUT OUT OUT 5.25 3.50 GE (V) VEN = 3.5 V 01..0705 GE (V) OLTA VEN = 0 V OLTA PUT V 34..00 Cnoise = 10 nF BLE V T A OU 2.0 Cnoise = 220 nF EN V, OUT 01..00 Cnoise = 100 nFCOUT = 1 (cid:2)F, V, EN Cnoise = 47 nF VIN = 3.5 V −1.0 0 2 4 6 8 10 12 14 16 t, TIME (ms) Figure 35. Turn−On Response V = 3 V, C = 1 (cid:2)F, I = 30 mA OUT OUT OUT http://onsemi.com 12

NCP700B TYPICAL CHARACTERISTICS 3 VEN = 2.5 V 2 GE (V) 01 GE (V) PUT VOLTA 12..50 VEN = C0n Voise = 10 nF BLE VOLTA UT Cnoise = 220 nF NA O 1.0 E V, OUT 00..05 Cnoise = 100 nF COUT = 1 (cid:2)F, V, EN Cnoise = 47 nF VIN = 2.5 V −0.5 0 1 2 3 4 5 6 7 8 9 10 t, TIME (ms) Figure 36. Turn−On Response V = 1.8 V, C = 1 (cid:2)F, I = 30 mA OUT OUT OUT 5.7 VEN = 3.8 V Cnoise = 10 nF, 3.8 GE (V) VEN = 0 V TJ = 25°C 01..09 GE (V) OLTA OLTA PUT V 34..00 RRLOAD = 22 (cid:3) BLE V OUT 2.0 RRLOAD = 110 (cid:3) ENA V, OUT 1.0 RRLOAD = 3.3 k(cid:3) V, EN 0.0 −1.0 0 1 2 3 4 5 6 7 8 9 10 t, TIME (ms) Figure 37. Turn−Off Response V = 3.3 V, C = 1 (cid:2)F OUT OUT 5.25 VEN = 3.5 V Cnoise = 10 nF, GE (V) VEN = 0 V TJ = 25°C 013...075050 GE (V) OLTA OLTA PUT V 3.0 RRLOAD = 20 (cid:3) BLE V OUT 2.0 RRLOAD = 100 (cid:3) ENA V, OUT 1.0 RRLOAD = 3 k(cid:3) V, EN 0.0 −1.0 0 1 2 3 4 5 6 7 8 9 10 t, TIME (ms) Figure 38. Turn−Off Response V = 3 V, C = 1 (cid:2)F OUT OUT http://onsemi.com 13

NCP700B TYPICAL CHARACTERISTICS 3.75 12 VEN = 2.5 V Cnoise = 10 nF, TJ = 25°C, OLTAGE (V) VEN = 0 V TJ = 25°C 012..255OLTAGE (V) TIME (ms)108 IOUT = 0 mA − 200V mOAUT = 3.3 V PUT V 12..50 RRLOAD = 12 (cid:3) BLE V N−ON 6 VOUT = 3 V OUT 1.0 RRLOAD = 60 (cid:3) ENA TUR 4 V, OUT0.5 RRLOAD = 1.8 k(cid:3) V, EN t, ON 2 VOUT = 1.8 V 0.0 −0.5 0 0 1 2 3 4 5 6 7 8 9 10 0 20 40 60 80 100 120 140 160180 200 220 240 t, TIME (ms) Cnoise, NOISE BYPASS CAPACITANCE (nF) Figure 39. Turn−Off Response Figure 40. Turn−On Time vs. Noise Bypass VOUT = 1.8 V, COUT = 1 (cid:2)F Capacitance, COUT = 1 (cid:2)F, IOUT = 0 mA − 200 mA 800 350 VOLTAGE (V) IOSUhTo r=t− 3C2i5rc muiAt ICOnUoTiIsO e=U =1T 1m=0 A10 mnFA 0246000000 URRENT (mA) T CURRENT (mA) 331373 VCCIInNNo i==se VC =OO 1UU0TT n+=F 01. 5(cid:2) FV,, VOUT = 3.3 V T 4 Normal C UI 300 PU 3 Operation UT RC VOUT = 1.8 V T P CI OU 2 VOUT = 3 V UT T− 283 V, OUT1 VOUT = 0 V , OOUTSHOR 267 0 I , C S −1 I 250 00..00 00..11 00..22 00..33 00..44 00..55 00..66 00..77 00..88 00..99 11..00 −40 −20 0 20 40 60 80 100 120 t, TIME (ms) TJ, JUNCTION TEMPERATURE (°C) Figure 41. Short−Circuit Protection, Figure 42. Short−Circuit Current vs. Junction V = 3 V, C = 1 (cid:2)F, C = 100 nF Temperature, V = 1.8 V, 3.3 V OUT OUT noise OUT 400 2.00 Thermal 300 LTAGE (V) Shutdown IOOUNpTo e=rr ma2t0aio0ln mA 0120000RENT (mA)LTAGE (V)111...257505 O RO T V4.0 CUT V1.00 TJ = 25°C PU3.0 VOUT = 3 V UT PU T PT0.75 U TU V, OOUT12..000 ICOnUoTis e= =2 0100 0m nAF I, OUOUTV, OOUT00..2550 TTJJ == −14205°°CC ICOnUoTis e= =1 01 0m0A nF −1.0 0.00 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 43. Thermal Shutdown Protection Figure 44. Output Voltage vs. Input Voltage, V = 3 V, C = 100 nF, C = 1 (cid:2)F V = 1.8 V, C = 1 (cid:2)F OUT noise OUT OUT OUT http://onsemi.com 14

NCP700B TYPICAL CHARACTERISTICS 3.00 3.50 2.75 3.25 V) 2.50 V) 3.00 E ( 2.25 E ( 2.75 G G 2.50 A 2.00 A T T 2.25 L L O 1.75 O 2.00 V V T 1.50 T 1.75 U U P 1.25 P 1.50 , OUTUT 01..7050 TJ = 25°C TJ = −40°C , OUTUT 011...702505 TJ = 25°C TJ = −40°C VO 0.50 TJ = 125°C IOUT = 10 mA VO 0.50 TJ = 125°C IOUT = 10 mA 0.25 Cnoise = 100 nF 0.25 Cnoise = 100 nF 0 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 45. Output Voltage vs. Input Voltage, Figure 46. Output Voltage vs. Input Voltage, V = 2.8 V, C = 1 (cid:2)F V = 3.3 V, C = 1 (cid:2)F OUT OUT OUT OUT 1.8091 2.8038 1.8090 TJ = 25°C 2.8037 TJ = 25°C E (V)1.8089 CIOnUoTis e= =1 01 0m0A nF E (V)2.8036 CIOnUoTis e= =1 01 0m0A nF G1.8088 G2.8035 OLTA1.8087 OLTA2.8034 V V UT 1.8086 UT 2.8033 P1.8085 P2.8032 UT UT O1.8084 O2.8031 V, OUT1.8083 V, OUT2.8030 1.8082 2.8029 1.8081 2.8028 2.5 3 3.5 4 4.5 5 5.5 3 3.5 4 4.5 5 5.5 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 47. Output Voltage vs. Input Voltage, Figure 48. Output Voltage vs. Input Voltage, V = 1.8 V, C = 1 (cid:2)F V = 2.8 V, C = 1 (cid:2)F OUT OUT OUT OUT 3.3129 90 V)3.3128 TIOJU =T 2=5 1°C0 mA (cid:2)A) 80 TAGE (33..33112267 Cnoise = 100 nF RENT ( 6700 TJ = 125°C VOL3.3125 CUR 50 TJ = 25°C UT 3.3124 NT 40 OUTP33..33112223 ESCE 30 TJ = −40°C , OUT3.3121 QUI 20 VOUT = 2.8 V V3.3120 I, Q 10 COUT = 1 (cid:2)F 3.3119 0 3.5 4 4.5 5 5.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 49. Output Voltage vs. Input Voltage, Figure 50. Quiescent Current vs. Input V = 3.3 V, C = 1 (cid:2)F Voltage, V = 2.8 V, C = 1 (cid:2)F OUT OUT OUT OUT http://onsemi.com 15

NCP700B TYPICAL CHARACTERISTICS 100 100 (cid:2)NT (A) 789000 TJ = 25°C (cid:2)NT (A) 8900 TTJJ == 12255°°CC E E URR 60 TJ = 125°C URR 70 TJ = −40°C T C 50 T C 60 N N E 40 E SC 30 TJ = −40°C SC 50 E E UI UI 40 Q 20 Q I, Q 10 VCOOUUTT == 31. 3(cid:2) FV I, Q 30 CCInNo i=se C =O 1U0T n=F 1 (cid:2)F, 0 20 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 0 20 40 60 80 100 120 140 160 180 200 VIN, INPUT VOLTAGE (V) IOUT, OUTPUT CURRENT (mA) Figure 51. Quiescent Current vs. Input Figure 52. Quiescent Current vs. Output Voltage, V = 3.3 V, C = 1 (cid:2)F Current, V = 3.3 V OUT OUT OUT 100 100 A) 90 TJ = 125°C A) 90 TJ = 125°C (cid:2) (cid:2) NT ( 80 TJ = 25°C NT ( 80 TJ = 25°C E E RR 70 TJ = −40°C RR 70 TJ = −40°C U U C C T 60 T 60 N N E E C 50 C 50 S S E E UI 40 UI 40 Q Q , Q 30 CIN = COUT = 1 (cid:2)F, , Q 30 CIN = COUT = 1 (cid:2)F, I I Cnoise = 10 nF Cnoise = 10 nF 20 20 0 20 40 60 80 100 120 140 160 180 200 0 20 40 60 80 100 120 140 160 180 200 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) Figure 53. Quiescent Current vs. Output Figure 54. Quiescent Current vs. Output Current, V = 3.0 V Current, V = 2.8 V OUT OUT 110 10 (cid:3)) (cid:2)A) 100 TJ = 125°C OR ( Unstable Operation RegionVOUT = 3.3 V RENT ( 8900 TJ = 25°C PACIT 1 R A CU 70 TJ = −40°C T C VOUT = 2.8 V NT 60 PU VOUT = 1.8 V E T C U Stable Operation Region S 50 O 0.1 QUIE 40 ESR, VOUT = 1.8 V, 2.8 V, 3.3 V, CIN = COUT = 1 (cid:2)F, I, Q 30 CCInNo i=se C =O 1U0T n=F 1 (cid:2)F, C OUT Cwhnoicishee =v e1r0 i sn Fh,i gVhIeNr .= VOUT + 0.5 V or 2.5 V 20 0.01 0 20 40 60 80 100 120 140 160 180 200 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (A) Figure 55. Quiescent Current vs. Output Figure 56. Output Capacitor ESR vs. Output Current, V = 1.8 V Current OUT http://onsemi.com 16

NCP700B APPLICATIONS INFORMATION General 5 M(cid:3) pull−down resistor (R ) assures that the device is PD The NCP700B is a high performance 200 mA low turned off when EN pin is not connected. dropout linear regulator. This device delivers excellent noise The device can be used as a simple regulator without use and dynamic performance consuming only 75 (cid:2)A (typ) of the chip enable feature by tying the EN to the IN pin. quiescent current at full load, with the PSRR of (typ) 82 dB at 1 kHz. Excellent load transient performance and small Active Discharge package size makes the device ideal for portable Active discharge circuitry has been implemented to insure applications. a fast VOUT turn off time. When EN goes low, the active Logic EN input provides ON/OFF control of the output discharge transistor turns on creating a path to discharge the voltage. When the EN is low the device consumes as low as output capacitor COUT through 1 k(cid:3) (RDIS) resistor. typically 0.1 (cid:2)A. Turn−On Time Access to the major contributor of noise within the The Turn−On time of the regulator is defined as the time integrated circuit – Bandgap Reference is provided through needed to reach the output voltage which is 98% V after OUT the BYP pin. This allows bypassing the source of noise by assertion of the EN pin. This time is determined by the noise the noise reduction capacitor and reaching noise levels bypass capacitance C and nominal output voltage level below 10 (cid:2)V . noise RMS VOUT according the following formula: The device is fully protected in case of output short circuit V [V] condition and overheating assuring a very robust design. t [s](cid:2)C [F](cid:3) OUT (eq. 1) ON noise 68(cid:3)10−6[A] Input Capacitor Requirements (C ) IN It is recommended to connect a 1 (cid:2)F ceramic capacitor Example: between IN pin and GND pin of the device. This capacitor Using Cnoise = 100 nF, VOUT = 3 V, COUT = 1 (cid:2)F, will provide a low impedance path for unwanted AC signals 3 or noise present on the input voltage. The input capacitor t (cid:2)100(cid:3)10−9(cid:3) (cid:2)4.41ms ON 68(cid:3)10−6 will also limit the influence of input trace inductances and The Turn−On time is independent of the load current and Power Supply resistance during sudden load current output capacitor C . To avoid output voltage overshoot changes. Higher capacitances will improve the line transient OUT during Turn−On please select C ≥ 10 nF. response. noise Current Limit Output Capacitor Requirements (C ) OUT Output Current is internally limited within the IC to a The NCP700B has been designed to work with low ESR typical 310 mA. The NCP700B will source this amount of ceramic capacitors on the output. The device will also work current measured with a voltage 100 mV lower than the with other types of capacitors until the minimum value of typical operating output voltage. If the Output Voltage is capacitance is assured and the capacitor ESR is within the specified range. Generally it is recommended to use 1 (cid:2)F or directly shorted to ground (VOUT = 0 V), the short circuit protection will limit the output current to 320 mA (typ). The larger X5R or X7R ceramic capacitor on the output pin. current limit and short circuit protection will work properly Noise Bypass Capacitor Requirements (Cnoise) up to VIN = 5.5 V at TA = 25°C. There is no limitation for the The C capacitor is connected directly to the high short circuit duration. noise impedance node. Any loading on this pin like the connection Thermal Shutdown of oscilloscope probe, or the C capacitor leakage will noise When the die temperature exceeds the Thermal Shutdown cause a voltage drop in regulated output voltage. The threshold (T − 150°C typical), Thermal Shutdown event minimum value of noise bypass capacitor is 10 nF. Values SDU is detected and the output (V ) is turned off. below 10 nF should be avoided due to possible Turn−On OUT The IC will remain in this state until the die temperature overshoot. Particular value should be chosen based on the decreases below the Thermal Shutdown Reset threshold output noise requirements (Figure 22). Larger values of (T − 135°C typical). Once the IC temperature falls below C will improve the output noise and PSRR but will SDU noise the 135°C the LDO is turned−on again. increase the regulator Turn−On time. The thermal shutdown feature provides the protection Enable Operation from a catastrophic device failure due to accidental The enable function is controlled by the logic pin EN. The overheating. This protection is not intended to be used as a voltage threshold of this pin is set between 0.4 V and 1.2 V. substitute for proper heat sinking. Voltage lower than 0.4 V guarantees the device is off. Reverse Current Voltage higher than 1.2 V guarantees the device is on. The The PMOS pass transistor has an inherent body diode NCP700B enters a sleep mode when in the off state drawing less than typically 0.1 (cid:2)A of quiescent current. The internal which will conduct the current in case that the VOUT > VIN. http://onsemi.com 17

NCP700B Such condition could exist in the case of pulling the V 15 (cid:2)Vrms by using 10 nF to less than 10 (cid:2)Vrms by using a IN voltage to ground. Then the output capacitor voltage will be 100 nF from the BYP pin to ground. For more information partially discharged through the PMOS body diode. It have please refer to Figures 22 through 24. been verified that the device will not be damaged if the output capacitance is less than 22 (cid:2)F. If however larger Minimum Load Current NCP700B does not require any minimum load current for output capacitors are used or extended reverse current stability. The minimum load current is assured by the condition is anticipated the device may require additional internal circuitry. external protection against the excessive reverse current. Power Dissipation Output Noise For given ambient temperature T and thermal resistance If we neglect the noise coming from the (IN) input pin of A the LDO, the main contributor of noise present on the output R(cid:4)JA the maximum device power dissipation can be calculated by: pin (OUT) is the internal bandgap reference. This is because any noise which is generated at this node will be 125(cid:4)T P (cid:2) A (eq. 2) subsequently amplified through the error amplifier and the D(MAX) (cid:4) JA PMOS pass device. Access to the bandgap reference node is For reliable operation junction temperature should be supplied through the BYP pin. For the 1.8 V output voltage limited to +125°C. option Noise can be reduced from a typical value of 450 0.8 ENTC/W) 400 PD(MAX), TA = 25°C, P2 Do(zM CAXU), TThAi c=k n2e5s°Cs, 0.7 ER N−TO−AMBI°SISTANCE ( 233505000 1 oz CU Thickness 000...456 XIMUM POWATION (W) OE AP TIR 200 0.3 MSI NCAL , X)DIS UM 150 0.2 A (cid:4), JJATHER 100 (cid:4)JA, 2 oz CU Thicknes(cid:4)sJA, 1 oz CU Thickness 0.1 PD(M 50 0 0 100 200 300 400 500 600 700 800 PCB COPPER AREA (mm2) Figure 57. Thermal Resistance and Maximum Power Dissipation vs. Copper Area (WDFN6) 310 0.60 PD(MAX), TA = 25°C, TW) 290 2 oz Cu Thickness 0.55 ENC/ ER AMBI°CE ( 270 0.50 POWW) N−TO−SISTAN 223500 P1 Do(zM CAXu) ,T ThAic =k n2e5s°sC, 00..4405 XIMUM ATION ( OE AP TIR 210 0.35 MSI NCAL (cid:4)JA, 1 oz Cu Thickness , X)DIS (cid:4), JUJATHERM 117900 (cid:4)JA, 2 oz Cu Thickness 00..2350 PD(MA 150 0.20 0 100 200 300 400 500 600 700 PCB COPPER AREA (mm2) Figure 58. Thermal Resistance and Maximum Power Dissipation vs. Copper Area (TSOP−5) http://onsemi.com 18

NCP700B Load Regulation the pin should be as small as possible to avoid noise pickup. The NCP700B features very good load regulation of In order to minimize the solution size use 0402 or 0603 5 mV Max. in 0 mA to 200 mA range. In order to achieve capacitors. To obtain small transient variations and good this very good load regulation a special attention to PCB regulation characteristics place C and C capacitors IN OUT design is necessary. The trace resistance from the OUT pin close to the device pins and make the PCB traces wide. to the point of load can easily approach 100 m(cid:3) which will Larger copper area connected to the pins will also improve cause 20 mV voltage drop at full load current, deteriorating the device thermal resistance. the excellent load regulation. The actual power dissipation can be calculated by the Power Supply Rejection Ratio formula: The NCP700b features excellent Power Supply Rejection P (cid:2)(cid:5)V (cid:4)V (cid:6)I (cid:7)V I (eq. 3) ratio. The PSRR can be tuned by selecting proper C and D IN OUT OUT INGND noise COUT capacitors. Line Regulation In the frequency range from 10 Hz up to about 10 kHz the The NCP700B features very good line regulation of larger noise bypass capacitor C will help to improve the 0.6mV/V (typ). Furthermore the detailed Output Voltage vs. noise PSRR. At the frequencies above 10 kHz the addition of Input Voltage characteristics (Figures 47 through 49) show higher COUT output capacitor will result in improved PSRR. that up to VIN = 5 V the Output Voltage deviation is typically less than 250 (cid:2)V for 1.8 V output voltage option and less PCB Layout Recommendations Connect the input (C ), output (C ) and noise bypass than 150 (cid:2)V for higher output voltage options. Above the IN OUT capacitors (Cnoise) as close as possible to the device pins. VIN = 5 V the output voltage falls rapidly which leads to the The C capacitor is connected to high impedance BYP typical 0.6 mV/V. noise pin and thus the length of the trace between the capacitor and ORDERING INFORMATION Device Nominal Output Voltage Marking Package Shipping† NCP700BMT18TBG 1.8 V J NCP700BMT25TBG 2.5 V Q WDFN6 NCP700BMT28TBG 2.8 V K 1.5 x 1.5 3000 / Tape & Reel (Pb−Free) NCP700BMT30TBG 3.0 V L NCP700BMT33TBG 3.3 V P NCP700BSN18T1G 1.8 V ADQ NCP700BSN25T1G 2.5 V AD3 TSOP-5 NCP700BSN28T1G 2.8 V ADR 3000 / Tape & Reel (Pb-Free) NCP700BSN30T1G 3.0 V ADT NCP700BSN33T1G 3.3 V ADU †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 19

NCP700B PACKAGE DIMENSIONS WDFN6 1.5x1.5, 0.5P CASE 511BJ ISSUE B D A L NOTES: 1. DIMENSIONING AND TOLERANCING PER B ASME Y14.5M, 1994. L1 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30mm FROM TERMINAL TIP. DETAIL A 4. COPLANARITY APPLIES TO THE EXPOSED ÍÍÍ ALTERNATE TERMINAL PAD AS WELL AS THE TERMINALS. PIN ONE E CONSTRUCTIONS MILLIMETERS REFERENCE ÍÍÍ DIM MIN MAX A 0.70 0.80 2X 0.10 C ÍÍÍ EXPOSEÉD CuÉÉMOLD CMPD ÉÉÉA3 AA13 0.000.20 RE0F.05 b 0.20 0.30 ÉÉÉÉÉÉ ÉÇÉÇÉÇ 2X 0.10 C D 1.50 BSC TOP VIEW E 1.50 BSC e 0.50 BSC A1 L 0.40 0.60 0.05 C DETAIL B A3 DETAIL B L1 --- 0.15 ALTERNATE L2 0.50 0.70 CONSTRUCTIONS A RECOMMENDED MOUNTING FOOTPRINT* 0.05 C A1 5X NOTE 4 SIDE VIEW C SPELAATNIENG 6X 0.35 0.73 DETAIL A e 5X L 1.80 1 3 L2 0.83 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering 6 4 details, please download the ON Semiconductor Soldering and 6X b Mounting Techniques Reference Manual, SOLDERRM/D. 0.10 C A B BOTTOM VIEW 0.05 C NOTE 3 http://onsemi.com 20

NCP700B PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE H NOTES: 1. DIMENSIONING AND TOLERANCING PER NOTE 5 D5X ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 0.20 C A B 3. MAXIMUM LEAD THICKNESS INCLUDES 2X 0.10 T LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS M OF BASE MATERIAL. 2X 0.20 T 5 4 B S 4. DMIOMLEDN FSLIOANSSH ,A P ARNODT RBU DSOIO NNOST, OINRC GLUATDEE 1 2 3 BURRS. K 5. OPTIONAL CONSTRUCTION: AN L DETAIL Z ADDITIONAL TRIMMED LEAD IS ALLOWED G IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. A MILLIMETERS DIM MIN MAX DETAIL Z A 3.00 BSC J B 1.50 BSC C C 0.90 1.10 0.05 H SPELAATNIENG GD 0.02.595 BS0C.50 H 0.01 0.10 T J 0.10 0.26 SOLDERING FOOTPRINT* K 0.20 0.60 L 1.25 1.55 M 0 (cid:3) 10 (cid:3) 1.9 S 2.50 3.00 0.074 0.95 0.037 2.4 0.094 1.0 0.039 0.7 (cid:5) (cid:6) 0.028 SCALE 10:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com NCP700B/D 21