NCP5500, NCV5500, NCP5501, NCV5501 LDO Voltage Regulator 500 mA These linear low drop voltage regulators provide up to 500 mA over http://onsemi.com a user−adjustable output range of 1.25 V to 5.0 V, or at a fixed output voltage of 1.5 V, 3.3 V or 5.0 V, with typical output voltage accuracy MARKING DIAGRAMS better than 3%. An internal PNP pass transistor permits low dropout voltage and operation at full load current at the minimum input DPAK 5 voltage. NCV versions are qualified for demanding automotive 1 CENTER LEAD CROP x5500yG CASE 175AA applications that require extended temperature operation and site and 5 ALYWW change control. NCP5500 and NCV5500 versions include an Pin 1. EN Enable/Shutdown function and are available in a DPAK 5 and SOIC 8 2. Vin packages. NCP5501 and NCV5501 versions are available in DPAK 3 TAB,3. GND 1 5 for applications that do not require logical on/off control. 4. Vout 5. NC/ADJ This regulator family is ideal for applications that require a broad input voltage range, and low dropout performance up to 500 mA load 4 DPAK 3 using low cost ceramic capacitors. Integral protection features include SINGLE GAUGE x5501yG short circuit current and thermal shutdown. 1 2 CASE 369C ALYWW 3 Features Pin 1. Vin 1 3 • Output Current up to 500 mA TAB,2. GND • 3. Vout 2.9% Output Voltage Accuracy x = P (NCP), V (NCV) • Low Dropout Voltage (230 mV at 500 mA) 5500/1 = Device Code • y = Output Voltage Enable Control Pin (NCP5500 / NCV5500) = L = 1.5 V • Reverse Bias Protection = T = 3.3 V • = U = 5.0 V Short Circuit Protection = W = Adjustable • Thermal Shutdown A = Assembly Location • Wide Operating Temperature Range L = Wafer Lot Y = Year NCV5500 / NCV5501; −40°C to +125°C Ambient Temperature WW = Work Week NCP5500 / NCP5501; −40°C to +85°C Ambient Temperature G = Pb−Free Package • NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 8 Qualified and PPAP Capable 5500x • 8 SOIC−8 Stable with Low Cost Ceramic Capacitors ALYW CASE 751 • 1 (cid:2) These are Pb−Free Devices 1 Pin 1. Vin Typical Applications 2. GND x = Output Voltage, NCP/NCV • 3. GND A = Adjustable, NCV Automotive • 4. Vout B = Adjustable, NCP Industrial and Consumer 5. NC/ADJ A = Assembly Location • Post SMPS Regulation 6. GND L = Wafer Lot • 7. GND Y = Year Point of Use Regulation 8. EN W = Work Week (cid:2) = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. © Semiconductor Components Industries, LLC, 2013 1 Publication Order Number: September, 2019 − Rev. 12 NCP5500/D

NCP5500, NCV5500, NCP5501, NCV5501 NCP5500 NCP5501 NCV5500 NCV5501 Vin Vout Output Input C10in (cid:2)F C4.o7u t(cid:2)F R1* Enable EN* GNDNC/ADJ* RL OFF ON GND R2* *Applicable to NCP5500/NCV5500 only. Figure 1. Typical Application Circuit PIN FUNCTION DESCRIPTIONS DPAK 3 DPAK 5 SOIC−8 Pin Pin No. Pin No. Pin No. Name Description − 1 8 EN Enable. This pin allows for on/off control of the regulator. High level turns on the output. To disable the device, connect to ground. If this function is not in use, con- nect to Vin. 1 2 1 Vin Positive power supply input voltage. 2, Tab 3, Tab 2, 3, 6, 7 GND Ground. This pin is internally connected to the Tab heat sink. 3 4 4 Vout Regulated output voltage. − 5 5 NC/ADJ No connection (Fixed output versions). Voltage−adjust input (Adjustable output version). Use an external voltage divider to set the output voltage over a range of 1.25 V to 5.0 V. Vin Vout Current Limit and Error Amplifier Saturation Sense Bandgap Reference − + Thermal Shutdown Connection for Fixed Output Enable EN* Block* GND Connection for Adjustable Output NC / ADJ* *Applicable to NCP5500/NCV5500 only. Figure 2. Block Diagram http://onsemi.com 2

NCP5500, NCV5500, NCP5501, NCV5501 ABSOLUTE MAXIMUM RATINGS Rating Symbol Min Max Unit Input Voltage (Note 1) Vin −0.3 (Note 2) +18 V Output, Enable Voltage Vout, EN −0.3 +16 or V Vin + 0.3 (Notes 2 and 5) Maximum Junction Temperature TJ − 150 °C Storage Temperature TStg −55 +150 °C Moisture Sensitivity Level All Packages MSL 1 − Lead Temperature Soldering °C Reflow (SMD Styles Only), Pb−Free Versions (Note 3) Tsld 265 Peak ESD Capability, Human Body Model (Note 4) ESDHBM 4000 − V ESD Capability, Machine Model (Note 4) ESDMM 200 − V ESD Capability, Charged Device Model (Note 4) ESDCDM 1000 − V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. *Latchup Current Maximum Rating: ≤ 100 mA per JEDEC standard: JESD78. 1. Refer to Electrical Characteristics and Application Information for Safe Operating Area. 2. Reverse bias protection feature valid only if Vout − Vin (cid:2) 7 V. 3. Pb−Free, 60 sec –150 sec above 217°C, 40 sec max at peak temperature 4. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) ESD Charged Device Model tested per EIA/JES D22/C101, Field Induced Charge Model 5. Maximum = +16 V or (Vin + 0.3 V), whichever is lower. THERMAL CHARACTERISTICS Rating Symbol Min Max Unit Package Dissipation PD Internally Limited W Thermal Characteristics, DPAK 3 and DPAK 5 (Note 1) °C/W Thermal Resistance, Junction−to−Air (Note 6) R(cid:3)JA 60 Thermal Resistance, Junction−to−Case R(cid:3)JC 5.2 Thermal Characteristics, SOIC−8 (Note 1) °C/W Thermal Resistance, Junction−to−Air (Note 6) R(cid:3)JA 80 Thermal Reference, Junction−to−Lead R(cid:4)JL 22 6. As measured using a copper heat spreading area of 650 mm2, 1 oz copper thickness. OPERATING RANGES Rating Symbol Min Max Unit Operating Input Voltage (Note 1) Vin Vout + VDO, 2.5 V 16 V (Note 7) Adjustable Output Voltage Range (Adjustable Version Only) Vout 1.25 5.0 V Operating Ambient Temperature Range TA °C NCP5500, NCP5501 −40 85 NCV5500, NCV5501 −40 125 7. Minimum Vin = 2.5 V or (Vout + VDO), whichever is higher. http://onsemi.com 3

NCP5500, NCV5500, NCP5501, NCV5501 ELECTRICAL CHARACTERISTICS Vin = 2.5 V or Vout + 1.0 V (whichever is higher), Cin = 10 (cid:2)F, Cout = 4.7 (cid:2)F, for typical values TA = 25°C, for min/max values TA = −40°C to 85°C (NCP Version), TA = −40°C to 125°C (NCV Version) unless otherwise noted (Note 13). Characteristic Symbol Test Conditions Min Typ Max Unit OUTPUT Output Voltage (Note 14) VNOM±2.9% 5 V Regulator V 3.3 V Regulator Vout TA = 25°C, Iout = 50 mA V 1.5 V Regulator V ADJ Regulator Output Voltage (Note 8) (−4.9%) VNOM (+4.9%) 5 V Regulator 4.755 5.0 5.245 V 3.3 V Regulator Vout 1.0 mA < Iout < 500 mA 3.138 3.3 3.462 V 1.5 V Regulator 1.427 1.5 1.574 V ADJ Regulator 1.189 1.25 1.311 Line Regulation REGLINE Iout = 50 mA −1.0 0.1 1.0 % 2.5 V or (Vout + 1.0 V) < Vin < 16 V Load Regulation REGLOAD 1.0 mA < Iout < 500 mA −1.0 0.35 1.0 % Dropout Voltage (Note 9) VDO mV 5.0 V Version Iout = 1.0 mA, (cid:5)Vout = −2% − 5 90 Iout = 500 mA, (cid:5)Vout = −2% − 230 700 3.3 V Version Iout = 1.0 mA, (cid:5)Vout = −2% − 5 90 Iout = 500 mA, (cid:5)Vout = −2% − 230 700 1.5 V Version (Note 10) Iout = 1.0 mA, (cid:5)Vout = −2% − − 1073 Iout = 500 mA, (cid:5)Vout = −2% − − 1073 Adjustable Version (Note 11) Iout = 1.0 mA, (cid:5)Vout = −2% − 5 90 Iout = 500 mA, (cid:5)Vout = −2% − 230 700 Ground Current IGND Iout = 100 (cid:2)A 300 500 (cid:2)A Iout = 500 mA 10 20 mA Disable Current in Shutdown ISD Adjustable and 1.5 V versions 30 50 (cid:2)A (NCP5500, NCV5500) All other versions 40 50 Current Limit Iout(LIM) Vout = 90% of Vout(nom) 500 700 900 mA Ripple Rejection Ratio (Notes 9 & 14) RR 120 Hz − 75 − dB Iout = 100 mA, 1 kHz − 75 − 10 kHz − 70 − Output Noise Voltage (Notes 12 & 14) Vn f = 10 Hz to 100 kHz, Vin = 2.5 V (cid:2)Vrms Vout = 1.25 V, Iout = 1.0 mA 18 f = 10 Hz to 100 kHz, Vin = 2.5 V Vout = 1.25 V, Iout = 100 mA 35 ENABLE (NCP5500, NCV5500 Only) Enable Voltage VENoff OFF (shutdown) State 0.4 V VENon ON (enabled) State 2.0 Enable Pin Bias Current IEN VEN = Vin, Iout = 1.0 mA − 1.0 (cid:2)A ADJUST Adjust Pin Current (Note 14) IADJ VEN = Vin, VADJ = 1.25 V, Vout = 1.25 V − 60 nA THERMAL SHUTDOWN Thermal Shutdown Temperature (Note 14) TSD Iout = 100 (cid:2)A 150 − 210 °C 8. Deviation from nominal. For adjustable versions, Pin ADJ connected to Vout. 9. See Typical Characteristics section for additional information. 10.VDO is constrained by the minimum input voltage of 2.5 V. 11.Vout is set by external resistor divider to 5 V. 12.Vn for other fixed voltage versions, as well as adjustable versions set to other output voltages, can be calculated from the following formula: Vn = Vn(x) * Vout / 1.25, where Vn(x) is the typical value from the table above. 13.Performance guaranteed over specified operating conditions by design, guard banded test limits, and/or characterization, production tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 14.Values are based on design and/or characterization. http://onsemi.com 4

NCP5500, NCV5500, NCP5501, NCV5501 TYPICAL CHARACTERISTICS 3.45 5.25 3.42 5.20 Vin = 13.2 V Vin = 13.2 V E (V) 5.15 RL = 1 k(cid:6) E (V) 3.39 RL = 1 k(cid:6) G 5.10 G 3.36 A A LT 5.05 LT 3.33 O O T V 5.00 T V 3.30 U U P 4.95 P 3.27 T T OU 4.90 OU 3.24 , out4.85 , out 3.21 V V 4.80 Vout(nom) = 5 V 3.18 Vout(nom) = 3.3 V 4.75 3.15 −40 0 40 80 120 −40 0 40 80 120 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 3. Output Voltage vs. Ambient Figure 4. Output Voltage vs. Ambient Temperature Temperature 1.58 1.30 1.56 Vin = 13.2 V 1.29 Vin = 13.2 V V) RL = 1 k(cid:6) V) 1.28 RL = 1 k(cid:6) E ( 1.54 E ( G G 1.27 A A LT 1.52 LT 1.26 O O T V 1.50 T V 1.25 U U P P 1.24 T 1.48 T OU OU 1.23 , ut1.46 , ut 1.22 o o V V 1.44 Vout(nom) = 1.5 V 1.21 Vout(nom) = 1.25 V (ADJ) 1.42 1.20 −40 0 40 80 120 −40 0 40 80 120 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 5. Output Voltage vs. Ambient Figure 6. Output Voltage vs. Ambient Temperature Temperature 500 500 450 V) V) E (m 400 E (m 400 AG TA = 125°C AG 350 TA = 125°C T T L 300 L 300 O O T V TA = 25°C T V 250 TA = 25°C OU 200 TA = −40°C OU 200 P P RO RO 150 TA = −40°C D D , O 100 O 100 D D V Vout(nom) = 5 V V 50 Vout(nom) = 3.3 V 0 0 0 100 200 300 400 500 600 0 100 200 300 400 500 600 Iout, OUTPUT CURRENT (mA) Iout, OUTPUT CURRENT (mA) Figure 7. Dropout Voltage vs. Output Current Figure 8. Dropout Voltage vs. Output Current http://onsemi.com 5

NCP5500, NCV5500, NCP5501, NCV5501 TYPICAL CHARACTERISTICS 18 18 A) 16 TA = −40°C A) 16 m m T ( 14 T ( 14 TA = −40°C N N RE 12 TA = 25°C RE 12 UR 10 UR 10 TA = 25°C C C UND 8 TA = 125°C UND 8 TA = 125°C O 6 O 6 R R , GD 4 , GD 4 IGN 2 Vout(nom) = 5 V IGN 2 Vout(nom) = 1.25 V (ADJ) 0 0 0 100 200 300 400 500 600 700 0 100 200 300 400 500 600 700 Iout, OUTPUT CURRENT (mA) Iout, OUTPUT CURRENT (mA) Figure 9. Ground Current vs. Output Current Figure 10. Ground Current vs. Output Current 6 6 A) RL = 1 k(cid:6) Vout(nom) = 5 V A) RL = 1 k(cid:6) Vout(nom) = 3.3 V m 5 m 5 T ( T ( N N E 4 E 4 R R R R U U D C 3 D C 3 N N U U O 2 O 2 R R G G , ND 1 , ND 1 G G I I 0 0 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Vin, INPUT VOLTAGE (V) Vin, INPUT VOLTAGE (V) Figure 11. Ground Current vs. Input Voltage Figure 12. Ground Current vs. Input Voltage 6 6 mA) 5 RL = 1 k(cid:6) Vout(nom) = 1.5 V mA) 5 RL = 1 k(cid:6) Vout(nom) = 1.25 V (ADJ) T ( T ( N N E 4 E 4 R R R R U U D C 3 D C 3 N N U U O 2 O 2 R R G G , ND 1 , ND 1 G G I I 0 0 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Vin, INPUT VOLTAGE (V) Vin, INPUT VOLTAGE (V) Figure 13. Ground Current vs. Input Voltage Figure 14. Ground Current vs. Input Voltage http://onsemi.com 6

NCP5500, NCV5500, NCP5501, NCV5501 TYPICAL CHARACTERISTICS 90 90 1 mA B) 80 B) 80 1 mA 100 mA d d N ( 70 N ( 70 O O TI 60 TI 60 C 500 mA C 500 mA E 50 E 50 J J E E R R E 40 E 40 L 100 mA L PP 30 Vin = 6 V, PP 30 Vin = 6 V, R, RI 20 (cid:5)Vin = 0.5 Vpp R, RI 20 (cid:5)Vin = 0.5 Vpp R R 10 10 Vout(nom) = 1.5 V Vout(nom) = 1.25 V (ADJ) 0 0 0.01 0.1 1 10 100 0.01 0.1 1 10 100 f, FREQUENCY (kHz) f, FREQUENCY (kHz) Figure 15. Ripple Rejection vs. Frequency Figure 16. Ripple Rejection vs. Frequency 10 12 11 9 10 8 9 7 8 (cid:6)) 6 Unstable Region (cid:6)) 7 Unstable Region R ( 5 R ( 6 ES 4 ES 5 4 3 Stable Region 3 Stable Region 2 1 CouVto =ut (1n o(cid:2)mF) t=o 51 0V (cid:2)F 12 CoVuotu =t( n1o m(cid:2)F) = t o3 .130 V (cid:2)F 0 0 00 5500 110000 115500 220000 225500 330000 335500 440000 445500 550000 0 50 100 150 200 250 300 350 400 450 500 Iout, OUTPUT CURRENT (mA) Iout, OUTPUT CURRENT (mA) Figure 17. Output Capacitor ESR Stability vs. Figure 18. Output Capacitor ESR Stability vs. Output Current Output Current 10 10 9 9 8 8 7 Unstable Region 7 Unstable Region (cid:6)) 6 (cid:6)) 6 R ( 5 R ( 5 S S E 4 E 4 3 3 2 Stable Region Cout = 1 (cid:2)F to 10 (cid:2)F 2 Stable Region Cout = 1 (cid:2)F to 10 (cid:2)F 1 Vout(nom) = 1.5 V 1 Vout(nom) = 1.25 V (ADJ) 0 0 0 50 100 150 200 250 300 350 400 450 500 0 50 100 150 200 250 300 350 400 450 500 Iout, OUTPUT CURRENT (mA) Iout, OUTPUT CURRENT (mA) Figure 19. Output Capacitor ESR Stability vs. Figure 20. Output Capacitor ESR Stability vs. Output Current Output Current NOTE:Typical characteristics were measured with the same conditions as electrical characteristics, unless otherwise noted. http://onsemi.com 7

NCP5500, NCV5500, NCP5501, NCV5501 NCP5500 NCV5500 Input Iin Vin Vout Iout Output Cin Cin2 Cout 10 (cid:2)F 100 nF Enable RL IEN EN GND ADJ IADJ IGND IQ NCP5501 NCV5501 Input Iin Vin Vout Iout Output Cin Cin2 Cout 10 (cid:2)F 100 nF RL GND IGND IQ Figure 21. Measuring Circuits Circuit Description linear regulator: startup delay, load transient response and The NCP5500/NCP5501/NCV5500/NCV5501 are loop stability. The capacitor value and type should be based integrated linear regulators with a DC load current on cost, availability, size and temperature constraints. Refer capability of 500 mA. The output voltage is regulated by a to Typical Operating Characteristics for stability regions. PNP pass transistor controlled by an error amplifier and band gap reference. The choice of a PNP pass element Enable Input (NCP5500, NCV5500) provides the lowest possible dropout voltage, particularly at The enable pin is used to turn the regulator on or off. By reduced load currents. Pass transistor base drive current is holding the pin at a voltage less than 0.4 V, the output of the controlled to prevent oversaturation. The regulator is regulator will be turned off to a minimal current drain state. When the voltage at the Enable pin is greater than 2.0 V, the internally protected by both current limit and thermal output of the regulator will be enabled and rise to the shutdown. Thermal shutdown occurs when the junction temperature exceeds 150°C. The NCV5500 includes an regulated output voltage. The Enable pin may be connected directly to the input pin to provide a constant enable to the enable/shutdown pin to turn off the regulator to a low current regulator. drain standby state. Regulator Active Load Protection in Shutdown (NCP5500, The error amplifier compares the reference voltage to a NCV5500) When a linear regulator is disabled (shutdown), the output sample of the output voltage (V ) and drives the base of a out (load) voltage should be zero. However, stray PC board PNP series pass transistor via a buffer. The reference is a leakage paths, output capacitor dielectric absorption, and bandgap design for enhanced temperature stability. inductively coupled power sources can cause an undesirable Saturation control of the PNP pass transistor is a function of regulator output voltage if load current is low or zero. The the load current and input voltage. Oversaturation of the NCV5500 features a load protection network that is active output power device is prevented, and quiescent current in only during Shutdown mode. This network switches in a the ground pin is minimized. shunt current path (~500 (cid:2)A) from V to Ground. This out Regulator Stability Considerations feature also provides a controlled (“soft”) discharge path for The input capacitor is necessary to stabilize the input the output capacitor after a transition from Enable to impedance to reduce transient line influences. The output Shutdown. capacitor helps determine three main characteristics of a http://onsemi.com 8

NCP5500, NCV5500, NCP5501, NCV5501 Calculating Resistors for the ADJ Versions Ripple Rejection: The ratio of the peak−to−peak input ripple The adjustable version uses feedback resistors to adjust voltage to the peak−to−peak output ripple voltage. the output to the desired output voltage. With V connected out Current Limit: Peak current that can be delivered to the to ADJ, the adjustable version will regulate at 1.25 V output. (cid:2)4.9% (1250 (cid:2) 61.25 mV). Output voltage formula with an external resistor divider: Calculating Power Dissipation The maximum power dissipation for a single output (cid:4) (cid:10) (cid:6) (cid:9) (cid:4) (cid:10) regulator (Figure 21) is: V (cid:3) 1.25V(cid:5) 60E−9(cid:7) (R1(cid:7)R2) (cid:7) (R1(cid:8)R2) (cid:6) (cid:9) (eq. 1) out (R1(cid:8)R2) R2 PD(max)(cid:3) Vin(max)(cid:5)Vout(min) Iout(max)(cid:8)Vin(max)IGND Where Where R = value of the divider resistor connected between V 1 out V is the maximum input voltage, in(max) and ADJ, V is the minimum output voltage, out(min) R = value of the divider resistor connected between ADJ 2 I is the maximum output current for the application, out(max) and GND, I is the ground current at I . GND out(max) The term “1.25 V” has a tolerance of (cid:2)4.9%; the term Once the value of P is known, the maximum “60E−9” can vary in the range 15E−9 to 60E−9. D(max) For values of R less than 15 K(cid:6), the term within brackets permissible value of R(cid:3)JA can be calculated: 2 ( [ ] ) will evaluate to less than 1 mV and can be ignored. This (cid:4)150°C(cid:5)T (cid:10) R (cid:3) A (eq. 2) simplifies the output voltage formula to: (cid:3)JA P V = 1.25 V * ((R1 + R2) / R2)) with a tolerance of (cid:2)4.9%, D wohuitch is the tolerance of the 1.25 V output when delivering The value of R(cid:3)JA can then be compared with those in the up to 500 mA of output current. Thermal Characteristics table. Those packages with R(cid:3)JA less than the calculated value in Equation 2 will keep the die temperature below 150°C. DEFINITION OF TERMS In some cases, none of the packages will be sufficient to Dropout Voltage: The input−to−output voltage differential dissipate the heat generated by the IC, and an external heat at which the circuit ceases to regulate against further sink will be required. reduction input voltage. Measured when the output voltage has dropped 2% relative to the value measured at nominal Heat Sinks input voltage. Dropout voltage is dependent upon load A heat sink effectively increases the surface area of the current and junction temperature. package to improve the flow of heat away from the IC and Input Voltage: The DC voltage applied to the input into the surrounding air. terminals with respect to ground. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like Line Regulation: The change in output voltage for a change series electrical resistances, these resistances are summed to in the input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques determine the value of R(cid:3)JA: such that the average chip temperature is not significantly R(cid:3)JA(cid:3)R(cid:3)JC(cid:8)R(cid:3)CS(cid:8)R(cid:3)SA (eq. 3) affected. where Load Regulation: The change in output voltage for a change R(cid:3)JC is the junction−to−case thermal resistance, in load current at constant chip temperature. Pulse loading R(cid:3)CS is the case−to−heatsink thermal resistance, techniques are employed such that the average chip R(cid:3)SA is the heatsink−to−ambient thermal resistance. temperature is not significantly affected. R(cid:3)JC appears in the Thermal Characteristics table. Like Quiescent and Ground Current: The quiescent current is R(cid:3)JA, it too is a function of package type. R(cid:3)CS and R(cid:3)SA are the current which flows through the ground when the LDO functions of the package type, heat sink and the interface operates without a load on its output: internal IC operation, between them. These values appear in data sheets of heat bias, etc. When the LDO becomes loaded, this term is called sink manufacturers. the Ground current. It is actually the difference between the Thermal, mounting, and heat sink considerations are input current (measured through the LDO input pin) and the further discussed in ON Semiconductor Application Note output current. AN1040/D. http://onsemi.com 9

NCP5500, NCV5500, NCP5501, NCV5501 ORDERING INFORMATION Package Device Nominal Output Voltage* Marking Package Shipping† NCP5500DT15RKG P5500LG DPAK 5 2500 / Tape & Reel (Pb−Free) NCV5500DT15RKG** V5500LG DPAK 5 2500 / Tape & Reel (Pb−Free) NCP5501DT15RKG P5501LG DPAK 3 2500 / Tape & Reel (Pb−Free) 1.5 NCV5501DT15RKG** V5501LG DPAK 3 2500 / Tape & Reel (Pb−Free) NCP5501DT15G P5501LG DPAK 3 75 Units / Rail (Pb−Free) NCV5501DT15G** V5501LG DPAK 3 75 Units / Rail (Pb−Free) NCP5500DT33RKG P5500TG DPAK 5 2500 / Tape & Reel (Pb−Free) NCV5500DT33RKG** V5500TG DPAK 5 2500 / Tape & Reel (Pb−Free) NCP5501DT33RKG P5501TG DPAK 3 2500 / Tape & Reel (Pb−Free) 3.3 NCV5501DT33RKG** V5501TG DPAK 3 2500 / Tape & Reel (Pb−Free) NCP5501DT33G P5501TG DPAK 3 75 Units / Rail (Pb−Free) NCV5501DT33G** V5501TG DPAK 3 75 Units / Rail (Pb−Free) NCP5500DT50RKG P5500UG DPAK 5 2500 / Tape & Reel (Pb−Free) NCV5500DT50RKG** V5500UG DPAK 5 2500 / Tape & Reel (Pb−Free) NCP5501DT50RKG P5501UG DPAK 3 2500 / Tape & Reel (Pb−Free) 5.0 NCV5501DT50RKG** V5501UG DPAK 3 2500 / Tape & Reel (Pb−Free) NCP5501DT50G P5501UG DPAK 3 75 Units / Rail (Pb−Free) NCV5501DT50G** V5501UG DPAK 3 75 Units / Rail (Pb−Free) NCP5500DTADJRKG P5500WG DPAK 5 2500 / Tape & Reel (Pb−Free) Adjustable NCV5500DTADJRKG** V5500WG DPAK 5 2500 / Tape & Reel (Pb−Free) NCP5500DADJR2G 5500B SO−8 2500 / Tape & Reel Adjustable (Pb−Free) NCV5500DADJR2G** 5500A SO−8 2500 / Tape & Reel Adjustable (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *Contact ON Semiconductor for other fixed voltages. **NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable http://onsemi.com 10

NCP5500, NCV5500, NCP5501, NCV5501 PACKAGE DIMENSIONS DPAK 3 (SINGLE GAUGE) CASE 369C ISSUE D NOTES: C 1.DIMENSIONING AND TOLERANCING PER ASME A Y14.5M, 1994. E A 2.CONTROLLING DIMENSION: INCHES. 3.THERMAL PAD CONTOUR OPTIONAL WITHIN DI- MENSIONS b3, L3 and Z. b3 B c2 4.DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. L3 4 Z 5.DOIUMTEENRSMIOONSST DE XATNRDE ME EASR EO FD ETTHEER PMLIANSETDIC A TB OTHDEY. D H 6.DATUMS A AND B ARE DETERMINED AT DATUM 1 2 3 DETAIL A PLANE H. INCHES MILLIMETERS DIM MIN MAX MIN MAX L4 A 0.086 0.094 2.18 2.38 b2 A1 0.000 0.005 0.00 0.13 b c b 0.025 0.035 0.63 0.89 b2 0.030 0.045 0.76 1.14 e 0.005 (0.13) M C H b3 0.180 0.215 4.57 5.46 c 0.018 0.024 0.46 0.61 L2 GPLAAUNGEE C SPELAATNIENG cD2 00..203158 00..204254 50..9476 60..2621 E 0.250 0.265 6.35 6.73 e 0.090 BSC 2.29 BSC H 0.370 0.410 9.40 10.41 L A1 L 0.055 0.070 1.40 1.78 L1 L1 0.108 REF 2.74 REF L2 0.020 BSC 0.51 BSC DETAIL A L3 0.035 0.050 0.89 1.27 ROTATED 90(cid:2) CW L4 −−− 0.040 −−− 1.01 Z 0.155 −−− 3.93 −−− SOLDERING FOOTPRINT* 6.20 3.00 0.244 0.118 2.58 0.102 5.80 1.60 6.17 0.228 0.063 0.243 (cid:4) (cid:10) mm SCALE 3:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 11

NCP5500, NCV5500, NCP5501, NCV5501 PACKAGE DIMENSIONS DPAK 5, CENTER LEAD CROP CASE 175AA ISSUE A NOTES: 1.DIMENSIONING AND TOLERANCING −T− SEATING PER ANSI Y14.5M, 1982. PLANE 2.CONTROLLING DIMENSION: INCH. B C INCHES MILLIMETERS DIM MIN MAX MIN MAX V R E R1 A 0.235 0.245 5.97 6.22 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.020 0.028 0.51 0.71 Z E 0.018 0.023 0.46 0.58 A F 0.024 0.032 0.61 0.81 S G 0.180 BSC 4.56 BSC 12 3 4 5 H 0.034 0.040 0.87 1.01 U J 0.018 0.023 0.46 0.58 K K 0.102 0.114 2.60 2.89 L 0.045 BSC 1.14 BSC F R 0.170 0.190 4.32 4.83 J R1 0.185 0.210 4.70 5.33 L H US 00..002250 0.−0−40− 00..6531 1−.−01− V 0.035 0.050 0.89 1.27 D5 PL Z 0.155 0.170 3.93 4.32 G 0.13 (0.005) M T SOLDERING FOOTPRINT* 6.4 0.252 2.2 0.086 5.8 0.34 5.36 0.228 0.013 0.217 10.6 0.8 0.417 0.031 (cid:4) (cid:10) mm SCALE 4:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 12

NCP5500, NCV5500, NCP5501, NCV5501 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK NOTES: −X− 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. A 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) 8 5 PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR B S 0.25 (0.010) M Y M PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL 1 IN EXCESS OF THE D DIMENSION AT −Y− 4 K 6. 7M5A1X−I0M1U TMH RMUA T7E51R−IA0L6 CAROEN DOIBTSIOONL.ETE. NEW STANDARD IS 751−07. G MILLIMETERS INCHES DIM MIN MAX MIN MAX A 4.80 5.00 0.189 0.197 C NX 45(cid:3) B 3.80 4.00 0.150 0.157 SEATING C 1.35 1.75 0.053 0.069 PLANE D 0.33 0.51 0.013 0.020 −Z− G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 0.10 (0.004) J 0.19 0.25 0.007 0.010 H D M J K 0.40 1.27 0.016 0.050 M 0 (cid:3) 8 (cid:3) 0 (cid:3) 8 (cid:3) N 0.25 0.50 0.010 0.020 0.25 (0.010)M Z Y S X S S 5.80 6.20 0.228 0.244 SOLDERING FOOTPRINT* 1.52 0.060 7.0 4.0 0.275 0.155 0.6 1.270 0.024 0.050 (cid:4) (cid:10) mm SCALE 6:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com NCP5500/D 13

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: NCV5500DT15RKG NCV5501DT15G NCV5501DT15RKG NCP5500DT15RKG NCP5500DT50RKG NCP5500DTADJRKG NCP5501DT15G NCP5501DT15RKG NCP5501DT50G NCP5501DT50RKG NCP5500DADJR2G NCV5500DTADJRKG NCV5500DT50RKG NCV5501DT50G NCV5501DT50RKG NCP5500DT33RKG NCP5501DT33G NCP5501DT33RKG NCV5500DT33RKG NCV5501DT33G NCV5501DT33RKG NCV5500DADJR2G