NCP51199, NCV51199 DDR 2-Amp Source / Sink V Termination Regulator TT The NCP/NCV51199 is a linear regulator designed to supply a regulated V termination voltage for DDR−2 and DDR−3 memory TT applications. The regulator is capable of actively sourcing and sinking ±2 A peak currents for DDR−2, and DDR−3 up to ±1.5 A while www.onsemi.com regulating the V output voltage to within ±10 mV. The output TT termination voltage is regulated to track V / 2 by two external MARKING DDQ voltage divider resistors connected to the PV , GND, and V pins. DIAGRAM CC REF The NCP/NCV51199 incorporates a high−speed differential 8 amplifier to provide ultra−fast response to line and load transients. SOIC8−NB EP XXXXXX Other features include source/sink current limiting, soft−start and 8 PD SUFFIX ALYW on−chip thermal shutdown protection. CASE 751BU (cid:2) 1 Features 1 • Supports DDR−2 V Termination to ±2 A, DDR−3 to ±1.5 A (peak) TT XXXXXX = Specific Device Code • Stable with 10 (cid:2)F Ceramic Capacitance on V Output A = Assembly Location TT • L = Wafer Lot Integrated Power MOSFETs Y = Year • High Accuracy VTT Output at Full−Load WW = Work Week • Fast Transient Response (cid:2) = Pb−Free Package • Built−in Soft−Start • Shutdown for Standby or Suspend Mode • PIN CONNECTION Integrated Thermal and Current−Limit Protection • NCV Prefix for Automotive and Other Applications Requiring 1 8 PVCC NC Unique Site and Control Change Requirements; AEC−Q100 GND NC Qualified and PPAP Capable • VREF VCC These Devices are Pb−Free and are RoHS Compliant VTT NC SOIC−8 EP Typical Applications • SDRAM Termination Voltage for DDR−2 / DDR−3 • Motherboard, Notebook, and VGA Card Memory Termination ORDERING INFORMATION • Set Top Box, Digital TV, Printers See detailed ordering, marking and shipping information in the package dimensions section on page 6 of this data sheet. © Semiconductor Components Industries, LLC, 2017 1 Publication Order Number: April, 2017 − Rev. 3 NCP51199/D

NCP51199, NCV51199 NCP51199 PVCC = 1.5 to 5.0 V* 1 5 V PVCC VCC 6 C2 C3 R2 2 100k GND 3 VREF 4 VTT = 0.75 to 2.5 V* VTT C1 Enable R1 C4 100k R3 *For DDR2: PVCC = 1.8 V, VTT = 0.9 V DDR3: PVCC = 1.5 V, VTT = 0.75 V C1 = 1 (cid:2)F (Low ESR) C4 = 1000 (cid:2)F + 10 (cid:2)F (10 (cid:2)F ceramic) C2 = 470 (cid:2)F (Low ESR) R3 = Optional VTT discharge resistor C3 = 47 (cid:2)F N−ch MOSFET = Optional Enable / Disable Figure 1. Application Diagram PIN FUNCTION DESCRIPTION Pin No. Pin Name Description 1 PVCC Input voltage which supplies current to the output pin. CIN = 470 (cid:2)F with low ESR. 2 GND Common Ground 3 V Buffered reference voltage input equal to ½ of V and active low shutdown pin. An external resistor REF DDQ divider dividing down the PV voltage creates the regulated output voltage. Pulling the pin to ground CC (0.15 V maximum) turns the device off. 4 V Regulator output voltage capable of sourcing and sinking current while regulating the output rail. TT C = 1000 (cid:2)F + 10 (cid:2)F ceramic with low ESR. OUT 5 NC True No Connect 6 V The V pin is a 5 V input pin that provides internal bias to the controller. PV should always be kept CC CC CC lower or equal to V . CC 7 NC True No Connect 8 NC True No Connect EP Thermal Pad Pad for thermal connection. The exposed pad must be connected to the ground plane using multiple vias for maximum power dissipation performance. www.onsemi.com 2

NCP51199, NCV51199 ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Input Supply Voltage Range (Vcc (cid:2) PVCC) (Note 1) PVCC, −0.3 to 6 V VCC Output Voltage Range VTT −0.3 to 6 V Reference Input Range VREF −0.3 to 6 V Maximum Junction Temperature TJ(max) 125 °C Storage Temperature Range TSTG −65 to 150 °C ESD Capability, Human Body Model (Note 2) ESDHBM 2 kV ESD Capability, Machine Model (Note 2) ESDMM 150 V Lead Temperature Soldering TSLD 260 °C Reflow (SMD Styles Only), Pb−Free Versions (Note 3) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) Latchup Current Maximum Rating: ≤150 mA per JEDEC standard: JESD78 3. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D THERMAL CHARACTERISTICS Rating Symbol Value Unit Thermal Characteristics, SO8−EP (Note 4) °C/W Thermal Resistance, Junction−to−Air (Note 5) R(cid:3)JA 84 Power Rating at 25°C Ambient = 1.19 W, derate 12 mW/°C Thermal Reference, Junction−to−Lead2 (Note 5) R(cid:4)JL 20 4. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area. 5. Values based on copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate. OPERATING RANGES (Note 6) Rating Symbol Min Max Unit Input Voltage PVCC 1.5 5.5 V Bias Supply Voltage VCC 4.75 5.25 V Ambient Temperature TA −40 85 °C Junction Temperature TJ −40 125 °C 6. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. www.onsemi.com 3

NCP51199, NCV51199 ELECTRICAL CHARACTERISTICS PVCC = 1.8 V / 1.5 V; VCC = 5 V; VREF = 0.9 V / 0.75 V; COUT = 10 (cid:2)F (Ceramic); TA = +25°C, unless otherwise noted. Parameter Test Conditions Symbol Min Typ Max Unit REGULATOR OUTPUT Output Offset Voltage Iout = 0 A VOS −20 − +20 mV Load Regulation VREF = 900 mV, Iout = ±1.8 A, PVCC = 1.8 V Regload mV VREF = 750 mV, Iout = ±1.4 A, PVCC = 1.5 V −10 − +10 INPUT AND STANDBY CURRENTS Bias Supply Current Iout = 0 A IBIAS − 0.8 2.5 mA Standby Current VREF < 0.2 V (Shutdown), RLOAD = 180(cid:5) ISTB − 1 90 (cid:2)A CURRENT LIMIT PROTECTION PVCC = 1.8 V, VREF = 0.9 V 2.0 − 3.5 Current Limit ILIM A PVCC = 1.5 V, VREF = 0.75 V 1.5 − 3.5 SHUTDOWN THRESHOLDS Enable VIH 0.6 − − Shutdown Threshold Voltage V Shutdown VIL − − 0.15 THERMAL SHUTDOWN Thermal Shutdown Temperature VCC = 5 V TSD 160 168 176 °C Thermal Shutdown Hysteresis VCC = 5 V TSH 35 35 40 °C www.onsemi.com 4

NCP51199, NCV51199 TYPICAL CHARACTERISTICS 0.915 0.770 PVCC = 1.8 V, VCC = 5 V PVCC = 1.5 V, VCC = 5 V 0.910 0.765 V) V)0.760 E (0.905 E ( G G0.755 A A T0.900 T L L O O0.750 V V T 0.895 T U U0.745 P P UT0.890 UT0.740 O O 0.885 0.735 0.880 0.730 −50 −25 0 25 50 75 100 125 −50 −25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 2. Output Voltage vs. Temperature Figure 3. Output Voltage vs. Temperature 0.60 1.2 V) 0.55 VCC = 5 V PVCC = 1.8 V, VCC = 5 V D ( 1.0 OL 0.50 mA) H ES 0.45 NT ( 0.8 R Enabled E H 0.40 R N T UR 0.6 W 0.35 C O Shutdown C D C T 0.30 V U 0.4 H S 0.25 0.20 0.2 −50 −25 0 25 50 75 100 125 −50 −25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 4. Shutdown Threshold vs. Figure 5. V Current vs. Temperature CC Temperature 3.0 3.5 PVCC = 1.8 V, VCC = 5 V 2.5 A) 3.0 mA) MIT ( 2.5 T ( 2.0 T LI N N 2.0 E E R 1.5 R R R U U 1.5 C C PV CC 1.0 RCE 1.0 PPVVCCCC == 11..85 VV,, VVCCCC == 55 VV U 0.5 O S 0.5 0 0 −50 −25 0 25 50 75 100 125 −50 −25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 6. PV Current vs. Temperature Figure 7. Source Current Limits vs. CC Temperature www.onsemi.com 5

NCP51199, NCV51199 TYPICAL CHARACTERISTICS 3.5 20 V) 3.0 m 15 A) E ( T ( 2.5 NS 10 MI O LI SP 5 T 2.0 E NK CURREN 11..05 PPVVCCCC == 11..85 VV,, VVCCCC == 55 VV RANSIENT R −−1005 SI T 0.5 , T −15 T V 0 −20 −50 −25 0 25 50 75 100 125 TEMPERATURE (°C) TIME (100 (cid:2)sec / div) Figure 8. Sink Current Limits vs. Temperature Figure 9. 1.25 V, (cid:2)1.6 A Transient Response Table 1. ORDERING INFORMATION Device Marking Package Shipping † NCP51199PDR2G 51199 SOIC−8 2500 / Tape & Reel NCV51199PDR2G* V51199 (Pb-Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. www.onsemi.com 6

NCP51199, NCV51199 PACKAGE DIMENSIONS SOIC8−NB EP CASE 751BU ISSUE E D NOTES: 8 A NOTE 5 2X F 1. DY1IM4.E5NMS, I1O9N9I4N.G AND TOLERANCING PER ASME 5 0.10 C D 2. CONTROLLING DIMENSION: MILLIMETERS. NOTE 6 3. DIMENSION b DOES NOT INCLUDE DAMBAR A1 PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.10mm IN EXCESS OF MAXIMUM MATERIAL E E1 CONDITION. NOTE 4 4. DIMENSION D DOES NOT INCLUDE MOLD FLASH, L2 PROTRUSIONS, OR GATE BURRS. MOLD FLASH, 2X 4 T0.IP20S C L C SPELAATNIENG PERXCOETERDU S0I.O15NmSm, O PRE RG ASTIDEE B. UDRIMRESN SSHIOALNL E N DOOTES 4 DETAIL A NOT INCLUDE INTERLEAD FLASH OR 1 8Xb PPRROOTTRRUUSSIIOONN. SINHTAELRL LNEOATD E FXLCAESEHD O 0R.25mm PER NOTE 5B 0.25 M C A-B D SIDE. DIMENSIONS D AND E ARE DETERMINED AT DATUM F. TOP VIEW 5. DIMENSIONS A AND B ARE TO BE DETERMINED 2X AT DATUM F. 0.10 C A-B 6. A1 IS DEFINED AS THE VERTICAL DISTANCE NOTE 4 FROM THE SEATING PLANE TO THE LOWEST D DETAIL A h POINT ON THE PACKAGE BODY. 0.10 C 8X 7. TAB CONTOUR MAY VARY MINIMALLY TO INCLUDE 0.10 C TOOLING FEATURES. B MILLIMETERS DIM MIN MAX A e C SEATING B END VIEW AA1 10..3050 10..7150 SIDE VIEW PLANE b 0.31 0.51 b1 0.28 0.48 c 0.17 0.25 NOTE 7 c1 0.17 0.23 F b D 4.90 BSC E 6.00 BSC ÇÉÇÉb1 ÇÉ E1 3.90 BSC G e 1.27 BSC ÇÉÇÉÇÉ F 1.55 2.39 c c1 G 1.55 2.39 ÇÇÇ h 0.25 0.50 L 0.40 1.27 SECTION B−B L2 0.25 BSC BOTTOM VIEW RECOMMENDED SOLDERING FOOTPRINT* 2.60 2.60 8X1.52 7.00 1 8X 0.76 1.27 PITCH DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 7

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