NCP3063, NCP3063B, NCV3063 1.5 A, Step-Up/Down/ Inverting Switching Regulators http://onsemi.com The NCP3063 Series is a higher frequency upgrade to the popular MC34063A and MC33063A monolithic DC−DC converters. These MARKING devices consist of an internal temperature compensated reference, DIAGRAMS comparator, a controlled duty cycle oscillator with an active current limit circuit, a driver and a high current output switch. This series was specifically designed to be incorporated in Step−Down, Step−Up and 3063x Voltage−Inverting applications with a minimum number of external ALYW components. 8 (cid:2) 1 1 Features SOIC−8 • Operation to 40 V Input D SUFFIX V3063 • Low Standby Current CASE 751 ALYW • (cid:2) Output Switch Current to 1.5 A 1 • Output Voltage Adjustable • Frequency Operation of 150 kHz • Precision 1.5% Reference NCP3063x • AWL New Features: Internal Thermal Shutdown with Hysteresis YYWWG New Features: Cycle−by−Cycle Current Limiting • 1 Pb−Free Packages are Available 8 1 Applications PDIP−8 NCV3063 • Step−Down, Step−Up and Inverting supply applications P, P1 SUFFIX AWL • CASE 626 YYWWG High Power LED Lighting • 1 Battery Chargers 8 1 NCP NCP3063 TSD 3063x ALYW SET dominant (cid:2) 1 R Q DFN−8 S CASE 488AF NCP 7 COMPARATOR 3063 − ALYW + S SET dominant 2 (cid:2) Rs Q R Vin 0.156 (cid:3) 0.2 V OSCILLATOR 3D NCP3063x = xS p=e Bcific Device Code CT L A = Assembly Location 12 V 2+2C0i n(cid:2)F + COMPARATOR REF1E.2R5E VNCE 2.C2 TnF 47 (cid:2)H LY,, YWYL == WYeaafrer Lot 5 − REGULATOR 4 V3.o3u tV / W(cid:2) , WW == PWbo−rFk rWeee ePkackage 800 mA (Note: Microdot may be in either location) R1 R2 3.9 k(cid:3) 470 (cid:2)F + 2.4 k(cid:3) Cout ORDERING INFORMATION See detailed ordering and shipping information in the package Figure 1. Typical Buck Application Circuit dimensions section on page 16 of this data sheet. © Semiconductor Components Industries, LLC, 2009 1 Publication Order Number: November, 2009 − Rev. 9 NCP3063/D

NCP3063, NCP3063B, NCV3063 Switch Collector 1 8 N.C. ÇÇ ÇN.C. Switch Collector ÇÇ Ç Switch Emitter 2 7 Ipk Sense Switch Emitter Ipk Sense Timing CapacitorÇÇ EP Flag Ç Timing Capacitor 3 6 VCC VCC ÇÇ Ç Comparator GND Comparator GND 4 5 Inverting Inverting (Top View) Input (Top View) Input NOTE: EP Flag must be tied to GND Pin 4 on PCB Figure 2. Pin Connections Figure 3. Pin Connections NCP3063 8 1 N.C. TSD Switch Collector SET dominant R Q S COMPARATOR 7 Ipk Sense − S 2 + Q SET dominant Switch Emitter R 0.2 V OSCILLATOR 3 6 CT Timing Capacitor +VCC COMPARATOR 1.25 V + REFERENCE 5 − REGULATOR 4 Comparator Inverting Input GND Figure 4. Block Diagram http://onsemi.com 2

NCP3063, NCP3063B, NCV3063 PIN DESCRIPTION Pin No. Pin Name Description 1 Switch Collector Internal Darlington switch collector 2 Switch Emitter Internal Darlington switch emitter 3 Timing Capacitor Timing Capacitor Oscillator Input 4 GND Ground pin for all internal circuits 5 Comparator Inverting input pin of internal comparator Inverting Input 6 VCC Voltage Supply 7 Ipk Sense Peak Current Sense Input to monitor the voltage drop across an external resistor to limit the peak current through the circuit 8 N.C. Pin Not Connected Exposed Exposed Pad The exposed pad beneath the package must be connected to GND (Pin 4). Additionally, using Pad proper layout techniques, the exposed pad can greatly enhance the power dissipation capabilities of the NCP3063. MAXIMUM RATINGS (measured vs. Pin 4, unless otherwise noted) Rating Symbol Value Unit VCC pin 6 VCC 0 to +40 V Comparator Inverting Input pin 5 VCII −0.2 to + VCC V Darlington Switch Collector pin 1 VSWC 0 to +40 V Darlington Switch Emitter pin 2 (transistor OFF) VSWE −0.6 to + VCC V Darlington Switch Collector to Emitter pin 1−2 VSWCE 0 to +40 V Darlington Switch Current ISW 1.5 A Ipk Sense Pin 7 VIPK −0.2 to VCC + 0.2 V Timing Capacitor Pin 3 VTCAP −0.2 to +1.4 V POWER DISSIPATION AND THERMAL CHARACTERISTICS Rating Symbol Value Unit PDIP−8 Thermal Resistance, Junction−to−Air R(cid:4)JA 100 °C/W SOIC−8 Thermal Resistance, Junction−to−Air R(cid:4)JA 180 °C/W Thermal Resistance, Junction−to−Case R(cid:4)JC 45 DFN−8 Thermal Resistance, Junction−to−Air R(cid:4)JA 80 °C/W Storage Temperature Range TSTG −65 to +150 °C Maximum Junction Temperature TJ MAX +150 °C Operating Junction Temperature Range (Note 3) NCP3063 TJ 0 to +70 °C NCP3063B, NCV3063 −40 to +125 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series contains ESD protection and exceeds the following tests: Pin 1−8: Human Body Model 2000 V per AEC Q100−002; 003 or JESD22/A114; A115 Machine Model Method 200 V 2. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78. 3. The relation between junction temperature, ambient temperature and Total Power dissipated in IC is TJ = TA + R(cid:4) • PD 4. The pins which are not defined may not be loaded by external signals http://onsemi.com 3

NCP3063, NCP3063B, NCV3063 ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, TJ = Tlow to Thigh [Note 5], unless otherwise specified) Symbol Characteristic Conditions Min Typ Max Unit OSCILLATOR fOSC Frequency (VPin 5 = 0 V, CT = 2.2 nF, 110 150 190 kHz TJ = 25°C) IDISCHG / Discharge to Charge Current Ratio (Pin 7 to VCC, TJ = 25°C) 5.5 6.0 6.5 − ICHG IDISCHG Capacitor Discharging Current (Pin 7 to VCC, TJ = 25°C) 1650 (cid:2)A ICHG Capacitor Charging Current (Pin 7 to VCC, TJ = 25°C) 275 (cid:2)A VIPK(Sense) Current Limit Sense Voltage (TJ = 25°C) (Note 6) 165 200 235 mV OUTPUT SWITCH (Note 7) VSWCE(DROP) Darlington Switch Collector to (ISW = 1.0 A, Pin 2 to GND, 1.0 1.3 V Emitter Voltage Drop TJ = 25°C) (Note 7) IC(OFF) Collector Off−State Current (VCE = 40 V) 0.01 100 (cid:2)A COMPARATOR VTH Threshold Voltage TJ = 25°C 1.250 V NCP3063 −1.5 +1.5 % NCP3063B, NCV3063 −2 +2 % REGLiNE Threshold Voltage Line Regulation (VCC = 5.0 V to 40 V) −6.0 2.0 6.0 mV ICII in Input Bias Current (Vin = Vth) −1000 −100 1000 nA TOTAL DEVICE ICC Supply Current (VCC = 5.0 V to 40 V, 7.0 mA CT = 2.2 nF, Pin 7 = VCC, VPin 5 > Vth, Pin 2 = GND, remaining pins open) Thermal Shutdown Threshold 160 °C Hysteresis 10 °C 5. NCP3063: Tlow = 0°C, Thigh = +70°C; NCP3063B, NCV3063: Tlow = −40°C, Thigh = +125°C 6. The VIPK(Sense) Current Limit Sense Voltage is specified at static conditions. In dynamic operation the sensed current turn−off value depends on comparator response time and di/dt current slope. See the Operating Description section for details. 7. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible. 8. NCV prefix is for automotive and other applications requiring site and change control. http://onsemi.com 4

NCP3063, NCP3063B, NCV3063 450 190 400 180 CT = 2.2 nF TJ = 25°C 350 z) z)170 H 300 H k k Y ( 250 Y (160 C C N N150 E 200 E U U Q Q140 E 150 E R R F 100 F130 50 120 0 110 0 1 2 3 4 5 6 7 8 9 1011121314151617181920 3 7 12 16 21 25 29 34 38 40 Ct, CAPACITANCE (nF) VCC, SUPPLY VOLTAGE (V) Figure 5. Oscillator Frequency vs. Oscillator Figure 6. Oscillator Frequency vs. Supply Timing Capacitor Voltage 2.4 1.25 2.2 VIEC =C 1= A5.0 V 1.20 VCC = 5.0 V V) 2.0 V) IC = 1 A P ( P ( O O1.15 R 1.8 R D D E E G 1.6 G A A1.10 T T L L O 1.4 O V V 1.05 1.2 1.0 1.0 −50 0 50 100 150 −50 0 50 100 150 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 7. Emitter Follower Configuration Output Figure 8. Common Emitter Configuration Output Darlington Switch Voltage Drop vs. Temperature Darlington Switch Voltage Drop vs. Temperature 2.0 1.5 1.9 VCC = 5.0 V 1.4 VCC = 5.0 V 1.8 TJ = 25°C 1.3 TJ = 25°C P (V) 1.7 P (V) 1.2 O 1.6 O 1.1 R R E D 1.5 E D 1.0 G G A 1.4 A 0.9 OLT 1.3 OLT 0.8 V V 1.2 0.7 1.1 0.6 1.0 0.5 0 0.5 1.0 1.5 0 0.5 1.0 1.5 IE, EMITTER CURRENT (A) IC, COLLECTOR CURRENT (A) Figure 9. Emitter Follower Configuration Output Figure 10. Common Emitter Configuration Darlington Switch Voltage Drop vs. Emitter Current Output Darlington Switch Voltage Drop vs. Collector Current http://onsemi.com 5

NCP3063, NCP3063B, NCV3063 V) E (1.30 E 0.30 G S 0.28 A N OLT1.28 SE 0.26 V T D MI 0.24 HOL1.26 T LIE (V)0.22 S NG RE RETA0.20 TH1.24 UROL0.18 TOR , Cse)V0.16 RA1.22 sen 0.14 A k( P p 0.12 M Vi O1.20 0.10 C −40−25 −10 5 20 35 50 65 80 95 110 125 −40−25 −10 5 20 35 50 65 80 95 110125 , h Vt TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 11. Comparator Threshold Voltage vs. Figure 12. Current Limit Sense Voltage vs. Temperature Temperature 6.0 5.5 A) m T ( 5.0 N RE 4.5 R U C 4.0 Y L P 3.5 P U , SCC 3.0 CPiTn =5 ,2 7.2 = n VFCC I 2.5 Pin 2 = GND 2.0 3.0 8.0 13 18 23 28 33 38 43 VCC, SUPPLY VOLTAGE (V) Figure 13. Standby Supply Current vs. Supply Voltage http://onsemi.com 6

NCP3063, NCP3063B, NCV3063 INTRODUCTION The NCP3063 is a monolithic power switching regulator controlled by the oscillator, thus pumping up the output filter optimized for dc to dc converter applications. The capacitor. When the output voltage level reaches nominal, combination of its features enables the system designer to the output switch next cycle turning on is inhibited. The directly implement step−up, step−down, and voltage− feedback comparator will enable the switching immediately inverting converters with a minimum number of external when the load current causes the output voltage to fall below components. Potential applications include cost sensitive nominal. Under these conditions, output switch conduction consumer products as well as equipment for industrial can be enabled for a partial oscillator cycle, a partial cycle markets. A representative block diagram is shown in plus a complete cycle, multiple cycles, or a partial cycle plus Figure4. multiple cycles. (See AN920/D for more information). Operating Description Oscillator The NCP3063 is a hysteretic, dc−dc converter that uses a The oscillator frequency and off−time of the output switch gated oscillator to regulate output voltage. In general, this are programmed by the value selected for timing capacitor mode of operation is somewhat analogous to a capacitor C . Capacitor C is charged and discharged by a 1 to 6 ratio T T charge pump and does not require dominant pole loop internal current source and sink, generating a positive going compensation for converter stability. The Typical Operating sawtooth waveform at Pin 3. This ratio sets the maximum Waveforms are shown in Figure 14. The output voltage t /(t + t ) of the switching converter as 6/(6 + 1) or ON ON OFF waveform shown is for a step−down converter with the 0.857 (typical) The oscillator peak and valley voltage ripple and phasing exaggerated for clarity. During initial difference is 500 mV typically. To calculate the C capacitor T converter startup, the feedback comparator senses that the value for required oscillator frequency, use the equations output voltage level is below nominal. This causes the found in Figure 15. An Excel based design tool can be found output switch to turn on and off at a frequency and duty cycle at www.onsemi.com on the NCP3063 product page. 1 Feedback Comparator Output 0 1 IPK Comparator Output 0 Timing Capacitor, CT On Output Switch Off Nominal Output Voltage Level Output Voltage Startup Operation Figure 14. Typical Operating Waveforms http://onsemi.com 7

NCP3063, NCP3063B, NCV3063 Peak Current Sense Comparator With a voltage ripple gated converter operating under Real V on R resistor turn−off sc normal conditions, output switch conduction is initiated by Vturn_off(cid:2)Vipk(sense)(cid:3)Rs(cid:4)(t_delay(cid:4)di(cid:5)dt) the Voltage Feedback comparator and terminated by the Typical I comparator response time t_delay is 350 ns. oscillator. Abnormal operating conditions occur when the pk The di/dt current slope is growing with voltage difference on converter output is overloaded or when feedback voltage the inductor pins and with decreasing inductor value. sensing is lost. Under these conditions, the I Current Sense pk It is recommended to check the real max peak current in comparator will protect the Darlington output Switch. The the application at worst conditions to be sure that the max switch current is converted to a voltage by inserting a peak current will never get over the 1.5A Darlington Switch fractional ohm resistor, R , in series with V and the SC CC Current max rating. Darlington output switch. The voltage drop across R is SC monitored by the Current Sense comparator. If the voltage Thermal Shutdown drop exceeds 200 mV with respect to V , the comparator CC Internal thermal shutdown circuitry is provided to protect will set the latch and terminate output switch conduction on the IC in the event that the maximum junction temperature a cycle−by−cycle basis. This Comparator/Latch is exceeded. When activated, typically at 160°C, the Output configuration ensures that the Output Switch has only a Switch is disabled. The temperature sensing circuit is single on−time during a given oscillator cycle. designed with 10°C hysteresis. The Switch is enabled again when the chip temperature decreases to at least 150°C Real threshold. This feature is provided to prevent I1 Vturn−off on catastrophic failures from accidental device Rs Resistor overheating. It is not intended to be used as a I through the di/dt slope Darlington replacement for proper heatsinking. Switch Io Vipk(sense) Output Switch t_delay The output switch is designed in a Darlington configuration. This allows the application designer to operate at all conditions at high switching speed and low voltage drop. The Darlington Output Switch is designed to The V Current Limit Sense Voltage threshold is IPK(Sense) switch a maximum of 40 V collector to emitter voltage and specified at static conditions. In dynamic operation the current up to 1.5 A. sensed current turn−off value depends on comparator response time and di/dt current slope. APPLICATIONS Figures 16 through 24 show the simplicity and flexibility increase output current and helps with efficiency still of the NCP3063. Three main converter topologies are keeping low cost bill of materials. Typical schematics of demonstrated with actual test data shown below each of the boost configuration with NMOS transistor, buck circuit diagrams. configuration with PMOS transistor and buck configuration Figure 15 gives the relevant design equations for the key with LOW V PNP are shown. CE(sat) parameters. Additionally, a complete application design aid Another advantage of using the external transistor is for the NCP3063 can be found at www.onsemi.com. higher operating frequency which can go up to 250 kHz. Figures 25 through 31 show typical NCP3063 Smaller size of the output components such as inductor and applications with external transistors. This solution helps to capacitor can be used then. http://onsemi.com 8

NCP3063, NCP3063B, NCV3063 (See Notes 9, 10, 11) Step−Down Step−Up Voltage−Inverting ton Vout(cid:3)VF Vout(cid:3)VF(cid:6)Vin |Vout|(cid:3)VF toff Vin(cid:6)VSWCE(cid:6)Vout Vin(cid:6)VSWCE Vin(cid:6)VSWCE ton ton ton ton toff toff toff (cid:7) (cid:8) (cid:7) (cid:8) (cid:7) (cid:8) f ton(cid:3)1 f ton(cid:3)1 f ton(cid:3)1 toff toff toff CT CT(cid:2)381.6(cid:4)10(cid:6)6(cid:6)343(cid:4)10(cid:6)12 fosc (cid:7) (cid:8) (cid:7) (cid:8) IL(avg) Iout Iout ton(cid:3)1 Iout ton(cid:3)1 toff toff Ipk (Switch) IL(avg)(cid:3)(cid:5)IL IL(avg)(cid:3)(cid:5)IL IL(avg)(cid:3)(cid:5)IL 2 2 2 RSC 0.20 0.20 0.20 Ipk(Switch) Ipk(Switch) Ipk(Switch) (cid:7) (cid:8) (cid:7) (cid:8) (cid:7) (cid:8) L Vin(cid:6)VSWCE(cid:6)Vout Vin(cid:6)VSWCE Vin(cid:6)VSWCE (cid:5)IL ton (cid:5)IL ton (cid:5)IL ton (cid:9) V (cid:7) (cid:8) ripple(pp) 2 tonIout tonIout (cid:5)IL 1 (cid:3)(ESR)2 (cid:10) (cid:3)(cid:5)IL(cid:4)ESR (cid:10) (cid:3)(cid:5)IL(cid:4)ESR 8fCO CO CO (cid:7) (cid:8) (cid:7) (cid:8) (cid:7) (cid:8) Vout VTH R2(cid:3)1 VTH R2(cid:3)1 VTH R2(cid:3)1 R1 R1 R1 9. VSWCE − Darlington Switch Collector to Emitter Voltage Drop, refer to Figures 7, 8, 9 and 10. 10.VF − Output rectifier forward voltage drop. Typical value for 1N5819 Schottky barrier rectifier is 0.4 V. 11.The calculated ton/toff must not exceed the minimum guaranteed oscillator charge to discharge ratio. The Following Converter Characteristics Must Be Chosen: V − Nominal operating input voltage. in V − Desired output voltage. out I − Desired output current. out (cid:5)I − Desired peak−to−peak inductor ripple current. For maximum output current it is suggested that (cid:5)I be chosen to be L L less than 10% of the average inductor current IL(avg). This will help prevent Ipk (Switch) from reaching the current limit threshold set by R . If the design goal is to use a minimum inductance value, let (cid:5)I = 2(I ). This will proportionally reduce SC L L(avg) converter output current capability. f − Maximum output switch frequency. V − Desired peak−to−peak output ripple voltage. For best performance the ripple voltage should be kept to a low ripple(pp) value since it will directly affect line and load regulation. Capacitor C should be a low equivalent series resistance (ESR) O electrolytic designed for switching regulator applications. Figure 15. Design Equations http://onsemi.com 9

NCP3063, NCP3063B, NCV3063 R201 U201 8 1 0R15 N.C. SWC L201 47 (cid:2)H +VOUT = +3.3 V / 800 mA 7 2 +VIN = +12 V IPK SWE 1 6 3 1 VCC TCAP D201 C206 J203 J201 5 COMP GND 4 C203 + 0.1 (cid:2)F C205 C201 + NCP3063 2.2 nF 1N5819 470 (cid:2)F / 25 V J204 C202 0.1 (cid:2)F 220 (cid:2)F / 50 V 1 GND J202 R203 1 GND 3K9 ±1% R202 2K4 ±1% Figure 16. Typical Buck Application Schematic Value of Components Name Value Name Value L201 47 (cid:2)H, Isat > 1.5 A R201 150 m(cid:3), 0.5 W D201 1 A, 40 V Schottky Rectifier R202 2.40 k(cid:3) C202 220 (cid:2)F, 50 V, Low ESR R203 3.90 k(cid:3) C205 470 (cid:2)F, 25 V, Low ESR C201 100 nF Ceramic Capacitor C203 2.2 nF Ceramic Capacitor C202 100 nF Ceramic Capacitor Test Results Test Condition Results Line Regulation Vin = 9 V to 12 V, Io = 800 mA 8 mV Load Regulation Vin = 12 V, Io = 80 mA to 800 mA 9 mV Output Ripple Vin = 12 V, Io = 40 mA to 800 mA ≤ 85 mVpp Efficiency Vin = 12 V, Io = 400 mA to 800 mA > 73% Short Circuit Current Vin = 12 V, Rload = 0.15 (cid:3) 1.25 A 76 74 %) 72 Y ( C N 70 E CI FI F 68 E 66 64 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 OUTPUT LOAD (Adc) Figure 18. Efficiency vs. Output Current for the Buck Demo Board at Vin = 12 V, Vout = 3.3 V, TA = 25(cid:2)C Figure 17. Buck Demoboard Layout http://onsemi.com 10

NCP3063, NCP3063B, NCV3063 L101 100 (cid:2)H R101 U101 +VOUT = +24 V / 350 mA 8 1 D101 1N5819 0R15 N.C. SWC 1 7 2 +VIN = +12 V IPK SWE J103 6 3 + 1 VCC TCAP C106 C105 J101 5 COMP GND 4 C103 0.1 (cid:2)F 330 (cid:2)F / 50 V C101 + NCP3063 2.2 nF J104 C102 0.1 (cid:2)F 470 (cid:2)F / 25 V 1 GND J102 R103 1 GND 18K0 ±1% R102 1K0 ±1% Figure 19. Typical Boost Application Schematic Value of Components Name Value Name Value L101 100 (cid:2)H, Isat > 1.5 A R101 150 m(cid:3), 0.5 W D101 1 A, 40 V Schottky Rectifier R102 1.00 k(cid:3) C102 470 (cid:2)F, 25 V, Low ESR R103 18.00 k(cid:3) C105 330 (cid:2)F, 50 V, Low ESR C101 100 nF Ceramic Capacitor C103 2.2 nF Ceramic Capacitor C106 100 nF Ceramic Capacitor Test Results Test Condition Results Line Regulation Vin = 9 V to 15 V, Io = 250 mA 2 mV Load Regulation Vin = 12 V, Io = 30 mA to 350 mA 5 mV Output Ripple Vin = 12 V, Io = 10 mA to 350 mA ≤ 350 mVpp Efficiency Vin = 12 V, Io = 50 mA to 350 mA > 85.5% 90 89 88 %) 87 Y ( 86 C EN 85 CI FI 84 F E 83 82 81 80 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 OUTPUT LOAD (Adc) Figure 21. Efficiency vs. Output Current for the Boost Demo Board at Vin = 12 V, Vout = 24 V, TA = 25(cid:2)C Figure 20. Boost Demoboard Layout http://onsemi.com 11

NCP3063, NCP3063B, NCV3063 R501 U501 8 1 0R15 N.C. SWC 7 2 +VIN = +5 V IPK SWE 6 3 1 VCC TCAP J501 5 COMP GND 4 C503 L501 D501 C501 + NCP3063 2.2 nF 22 (cid:2)H 1N5819 C502 0.1 (cid:2)F 330 (cid:2)F / 25 V J502 VOUT = −12 V / 100 mA R503 1 1 J503 GND 1K96 ±1% C506 C505 1R65K092 ±1% 0.1 (cid:2)F +470 (cid:2)F / 35 V 1 J504 GND Figure 22. Typical Voltage Inverting Application Schematic Value of Components Name Value Name Value L501 22 (cid:2)H, Isat > 1.5 A R501 150 m(cid:3), 0.5 W D501 1 A, 40 V Schottky Rectifier R502 16.9 k(cid:3) C502 330 (cid:2)F, 25 V, Low ESR R503 1.96 k(cid:3) C505 470 (cid:2)F, 35 V, Low ESR C501 100 nF Ceramic Capacitor C503 2.2 nF Ceramic Capacitor C506 100 nF Ceramic Capacitor Test Results Test Condition Results Line Regulation Vin = 4.5 V to 6 V, Io = 50 mA 1.5 mV Load Regulation Vin = 5 V, Io = 10 mA to 100 mA 1.6 mV Output Ripple Vin = 5 V, Io = 0 mA to 100 mA ≤ 300 mVpp Efficiency Vin = 5 V, Io = 100 mA 49.8% Short Circuit Current Vin = 5 V, Rload = 0.15 (cid:3) 0.885 A 52 50 48 %) Y ( 46 C EN 44 CI FI 42 F E 40 38 36 0 20 40 60 80 100 OUTPUT LOAD (mAdc) Figure 24. Efficiency vs. Output Current for the Figure 23. Voltage Inverting Demoboard Layout Voltage Inverting Demo Board at Vin = +5 V, Vout = −12 V, TA = 25(cid:2)C http://onsemi.com 12

NCP3063, NCP3063B, NCV3063 VIN = 8 − 18 V/0.6 A R1 82m L1 10(cid:2) 1N5819 VOUT = 31 V/0.35 A R2 1k Q1 D1 NTD18N06 IC1 NCP3063 C5 6n8 D 8 1 N.C. SWC 7 2 R7 6 1G IPK SWE 6 VCC TC 3 470 2 4 S 5 4 COMP GND 5 3 IC2 BC846BPD C3 10n R5 24k C1 C2 C4 C6 C7 + R3 R4 R8 330(cid:2) 100n M18 1k 1n2 1k 100n 330(cid:2) 0V GND Figure 25. Typical Boost Application Schematic with External NMOS Transistor 8866 External transistor is recommended in applications where wide input voltage ranges and higher power is required. The 8844 suitable schematic with an additional NMOS transistor and 8822 its driving circuit is shown in the Figure 25. The driving %) circuit is controlled from SWE Pin of the NCP3063 through Y (8800 frequency compensated resistor divider R7/R8. The driver C N7788 IC2 is ON Semiconductor low cost dual NPN/PNP E CI transistor BC846BPD. Its NPN transistor is connected as a FI7766 F super diode for charging the gate capacitance. The PNP E 7744 transistor works as an emitter follower for discharging the gate capacitor. This configuration assures sharp driving 7722 ILOAD = 350 mA edge between 50 − 100 ns as well as it limits power 7700 consumption of R7/R8 divider down to 50 mW. The output 66 88 1100 1122 1144 1166 1188 2200 current limit is balanced by resistor R3. The fast switching INPUT VOLTAGE (V) with low RDS(on) NMOS transistor will achieve efficiencies up to 85% in automotive applications. Figure 26. Typical Efficiency for Application Shown in Figure 25. http://onsemi.com 13

NCP3063, NCP3063B, NCV3063 VIN = 8 − 19 V R1 50m NTGS411Q1P2 L1 10(cid:2)VOUT = 3V3/3 A T1 6 R5 BC848CPD 2 1k 1 IC1 NCP3063 5 8 1 3 4 N.C. SWC 7 2 IPK SWE R6 6 3 VCC TC 5 COMP GND 4 22k R2 1k7 C1 + C2 C5 C4 D1 C6 C7 + R3 R8 330(cid:2) 100n 1k 2n2 470 6n8 1N5822 100n 330(cid:2) 0V GND Figure 27. Typical Buck Application Schematic with External PMOS Transistor 100 Figure 27 shows typical buck configuration with external PMOS transistor. The principle of driving the Q2 gate is the 95 same as shown in Figure 27. 90 Resistor R6 connected between TC and SWE pin provides %) a pulsed feedback voltage. It is recommended to use this Y ( 85 VIN = 8 V pulsed feedback approach on applications with a wide input C N 80 voltage range, applications with the input voltage over E CI VIN = 18 V +12 V or applications with tighter specifications on output FI 75 F ripple. The suitable value of resistor R6 is between E 70 10k − 68k. The pulse feedback approach increases the operating frequency by about 20%. It also creates more 65 regular switching waveforms with constant operating 60 frequency which results in lower output ripple voltage and 0 0.5 1 1.5 2 2.5 3 improved efficiency. OUTPUT LOAD (Adc) The pulse feedback resistor value has to be selected so that Figure 28. NCP3063 Efficiency vs. Output Current for the capacitor charge and discharge currents as listed in the Buck External PMOS at V = 3.3 V, f = 220 kHz, electrical characteristic table, are not exceeded. Improper out T = 25(cid:2)C selection will lead to errors in the oscillator operation. The A maximum voltage at the TC Pin cannot exceed 1.4 V when implementing pulse feedback. http://onsemi.com 14

NCP3063, NCP3063B, NCV3063 VIN = 8 − 19 V R1 Q1 NSS35200 L1 33(cid:2) VOUT = 3V3/1 A 150m D2 R4 33 NSR0130 IC1 NCP3063 8 1 N.C. SWC R5 7 2 IPK SWE 6 VCC TC 3 33 5 4 COMP GND R3 1k7 D1 C1 + C2 C3 C5 C6 + R2 100(cid:2) 100n 1k 2n2 1N5819 100n 100(cid:2) 0V GND Figure 29. Typical Buck Application Schematic with External Low V (sat) PNP Transistor CE 100 Typical application of the buck converter with external 95 bipolar transistor is shown in the Figure 29. It is an ideal solution for configurations where the input and output 90 voltage difference is small and high efficiency is required. %) 85 NSS35200, the low VCE(sat) transistor from Y ( 80 ON Semiconductor will be ideal for applications with 1 A C N 75 output current, the input voltages up to 15 V and operating E CI 70 frequency 100 − 150 kHz. The switching speed could be FI F improved by using desaturation diode D2. E 65 60 55 50 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 OUTPUT LOAD (Adc) Figure 30. NCP3063 Efficiency vs. Output Current for External Low V at V = +5 V, f = 160 kHz, CE(sat) in T = 25(cid:2)C A http://onsemi.com 15

NCP3063, NCP3063B, NCV3063 R1 IC1 NCP3063 8 1 N.C. SWC 7 2 L1 IPK SWE 6 3 VCC TC 5 COMP GND 4 R5 22k R2 10R R4 C1 C2 C3 D1 C4 R3 4n7 0V 0V Figure 31. Typical Schematic of Buck Converter with RC Snubber and Pulse Feedback In some cases where there are oscillations on the output minimize the oscillation. Typical usage is shown in the due to the input/output combination, output load variations Figure 31. C3 values can be selected between 2.2 nF and or PCB layout a snubber circuit on the SWE Pin will help 6.8 nF and R4 can be from 10 (cid:3) to 22 (cid:3). ORDERING INFORMATION Device Package Shipping† NCP3063PG PDIP−8 50 Units / Rail (Pb−Free) NCP3063BPG PDIP−8 50 Units / Rail (Pb−Free) NCP3063BMNTXG DFN−8 4000 / Tape & Reel (Pb−Free) NCP3063DR2G SOIC−8 2500 / Tape & Reel (Pb−Free) NCP3063BDR2G SOIC−8 2500 / Tape & Reel (Pb−Free) NCP3063MNTXG DFN−8 4000 / Tape & Reel (Pb−Free) NCV3063PG PDIP−8 50 Units / Rail (Pb−Free) NCV3063DR2G SOIC−8 2500 / Tape & Reel (Pb−Free) NCV3063MNTXG DFN−8 4000 / Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. NCV prefix is for automotive and other applications requiring site and change control. http://onsemi.com 16

NCP3063, NCP3063B, NCV3063 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AJ NOTES: −X− 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. A 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) 8 5 PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR B S 0.25 (0.010) M Y M PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL 1 IN EXCESS OF THE D DIMENSION AT −Y− 4 K 6. M75A1X−I0M1U TMH RMUA T7E51R−IA0L6 CAROEN DOIBTSIOONL.ETE. NEW STANDARD IS 751−07. G MILLIMETERS INCHES DIM MIN MAX MIN MAX A 4.80 5.00 0.189 0.197 C NX 45(cid:3) B 3.80 4.00 0.150 0.157 SEATING C 1.35 1.75 0.053 0.069 PLANE D 0.33 0.51 0.013 0.020 −Z− G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 0.10 (0.004) J 0.19 0.25 0.007 0.010 H D M J K 0.40 1.27 0.016 0.050 M 0 (cid:3) 8 (cid:3) 0 (cid:3) 8 (cid:3) N 0.25 0.50 0.010 0.020 0.25 (0.010)M Z Y S X S S 5.80 6.20 0.228 0.244 SOLDERING FOOTPRINT* 1.52 0.060 7.0 4.0 0.275 0.155 0.6 1.270 0.024 0.050 (cid:7) (cid:8) mm SCALE 6:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 17

NCP3063, NCP3063B, NCV3063 PACKAGE DIMENSIONS 8 LEAD PDIP CASE 626−05 ISSUE L NOTES: 1.DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 8 5 2.PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3.DIMENSIONING AND TOLERANCING PER ANSI −B− Y14.5M, 1982. 1 4 MILLIMETERS INCHES DIM MIN MAX MIN MAX A 9.40 10.16 0.370 0.400 F B 6.10 6.60 0.240 0.260 C 3.94 4.45 0.155 0.175 NOTE 2 −A− D 0.38 0.51 0.015 0.020 F 1.02 1.78 0.040 0.070 L G 2.54 BSC 0.100 BSC H 0.76 1.27 0.030 0.050 J 0.20 0.30 0.008 0.012 K 2.92 3.43 0.115 0.135 C L 7.62 BSC 0.300 BSC M --- 10 (cid:3) --- 10(cid:3) J N 0.76 1.01 0.030 0.040 −T− SEATING N STYLE 1: PLANE PIN 1.AC IN M 2.DC + IN D K 3.DC - IN 4.AC IN H G 5.GROUND 0.13 (0.005) M T A M B M 6.OUTPUT 7.AUXILIARY 8.VCC http://onsemi.com 18

NCP3063, NCP3063B, NCV3063 PACKAGE DIMENSIONS 8 PIN DFN, 4x4 CASE 488AF−01 ISSUE C D A NOTES: B L L 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED L1 TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30MM FROM TERMINAL TIP. REFEPRINE ONCNEE ÉÉ E DOEPTTIAONILA LA 4. CPAODP LAASN WAREILTLY A ASP TPHLEIE TSE TROM TINHAEL ESX.POSED 2X 0.15 C ÉÉ CONSTRUCTIONS 5. DCEOTNASILTSR UAC ATNIODN BS S FHOORW T EORPMTIIONNAALSL. MILLIMETERS 2X 0.15 C DIM MIN MAX TOP VIEW A3 A 0.80 1.00 EXPOSEDÇ CuÇÇMOLD CMPD ÉÉÉ A1 0.00 0.05 A3 0.20 REF DETAIL B ÇÉÇÉÇÉ ÉÇÉÇÉÇ b 0.25 0.35 0.10 C D 4.00 BSC ÇÇÇÇÇ D2 1.91 2.21 A A1 E 4.00 BSC 8X 0.08 C (A3) DETAIL B E2 2.09 2.39 ALTERNATE e 0.80 BSC NOTE 4 A1 C SEATING CONSTRUCTIONS K 0.20 −−− SIDE VIEW PLANE L 0.30 0.50 L1 −−− 0.15 D2 SOLDERING FOOTPRINT* DETAIL A Ç1ÇÇÇÇ4 8X L 2.21 08X.63 ÇÇÇÇÇ E2 ÇÇÇÇÇ K 8 5 4.30 2.39 8Xb e 0.10 C A B PACKAGE OUTLINE 0.05 C NOTE 3 BOTTOM VIEW 8X 0.35 0.80 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5773−3850 Sales Representative http://onsemi.com NCP3063/D 19

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: NCV3063DR2G NCP3063DR2G NCP3063BDR2G NCP3063BMNTXG NCV3063MNTXG NCP3063MNTXG