NCL30080 Quasi-Resonant Primary Side Current-Mode Controller for LED Lighting The NCL30080 is a PWM current mode controller targeting isolated flyback and non−isolated constant current topologies. The controller www.onsemi.com operates in a quasi−resonant mode to provide high efficiency. Thanks to a novel control method, the device is able to precisely regulate a constant LED current from the primary side. This removes the need for secondary side feedback circuitry, biasing and an optocoupler. 1 The device is highly integrated with a minimum number of external TSOP−6 components. A wide VCC range simplifies the design process and SN SUFFIX allows a single design to support a wide LED forward voltage range. A CASE 318G robust suite of safety protection is built in to simplify the design. This device is specifically intended for very compact space efficient designs. MARKING DIAGRAM Features • AAxAYW(cid:2) Quasi−resonant Peak Current−mode Control Operation (cid:2) • Primary Side Sensing (no optocoupler needed) 1 • Wide V Range CC • Precise LED Constant Current Regulation ±1% Typical AAx = Specific Device Code x = E or Z • Line Feed−forward for Enhanced Regulation Accuracy A = Assembly Location • Low LED Current Ripple Y = Year • 250 mV ±2% Guaranteed Voltage Reference for Current Regulation W(cid:2) == PWbo−rFk rWeee ePkackage • ~ 0.9 Power Factor with Valley Fill Input Stage (Note: Microdot may be in either location) • Low LED Current Ripple • Source 300 mA / Sink 500 mA Totem Pole Driver with 12 V Gate PIN CONNECTIONS Clamp • Low Start−up Current (13 (cid:2)A typ.) 1 ZCD VIN • Small Space Saving Low Profile Package GND VCC • Wide Temperature Range of −40 to +125°C • CS DRV Pb−free, Halide−free MSL1 Product • Robust Protection Features (Top View) ♦ Over Voltage / LED Open Circuit Protection ♦ Secondary Diode Short Protection ♦ Output Short Circuit Protection Typical Applications ♦ Shorted Current Sense Pin Fault Detection • ♦ Latched and Auto−recoverable Versions Integral LED Bulbs • ♦ Brown−out LED Power Driver Supplies • ♦ VCC Under Voltage Lockout LED Light Engines ♦ Thermal Shutdown ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 25 of this data sheet. © Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: January, 2015 − Rev. 3 NCL30080/D

NCL30080 . . Aux . 1 6 2 5 3 4 Figure 1. Typical Application Schematic for NCL30080 Table 1. PIN FUNCTION DESCRIPTION Pin No Pin Name Function Pin Description 1 ZCD Zero Crossing Detection Connected to the auxiliary winding; this pin detects the core reset event. 2 GND − The controller ground 3 CS Current sense This pin monitors the primary peak current 4 DRV Driver output The current capability of the totem pole gate drive (+0.3/−0.5 A) makes it suit- able to effectively drive a broad range of power MOSFETs. 5 VCC Supplies the controller This pin is connected to an external auxiliary voltage. 6 VIN Input voltage sensing This pin observes the HV rail and is used in valley selection. This pin also Brown−Out monitors and protects for low mains conditions. www.onsemi.com 2

NCL30080 STOP VDD VREF OFF Aux_SCP VCC GND Fault UVLO CS_shorted VCC Management Management Latch Internal Thermal VCC_max VCC Over Voltage Ipkmax Shutdown Protection WOD_SCP BO_NOK Qdrv VVIN VCC Clamp ZCD Zero Crossing Detection Circuit Valley Selection Aux. Winding Short Circuit Protection S Qdrv DRV Aux_SCP Q VVIN VVLY R Line Feedforward STOP VREF CS Leading CS_reset Constant−Current Edge Control Blanking VVIN Ipkmax STOP Max. Peak VIN Current Ipkmax BO_NOK Brown−Out Limit CS Short CS_shorted Protection VVIN Winding and Output diode WOD_SCP Short Circuit Protection Figure 2. Internal Circuit Architecture www.onsemi.com 3

NCL30080 Table 2. MAXIMUM RATINGS TABLE Symbol Rating Value Unit VCC(MAX) Maximum Power Supply voltage, VCC pin, continuous voltage −0.3, +35 V ICC(MAX) Maximum current for VCC pin Internally limited mA VDRV(MAX) Maximum driver pin voltage, DRV pin, continuous voltage −0.3, VDRV (Note 1) V IDRV(MAX) Maximum current for DRV pin −500, +800 mA VMAX Maximum voltage on low power pins (except pins DRV and VCC) −0.3, +5.5 V IMAX Current range for low power pins (except pins ZCD, DRV and VCC) −2, +5 mA VZCD(MAX) Maximum voltage for ZCD pin −0.3, +10 V IZCD(MAX) Maximum current for ZCD pin −2, +5 mA RθJ−A Thermal Resistance, Junction−to−Air 360 °C/W TJ(MAX) Maximum Junction Temperature 150 °C Operating Temperature Range −40 to +125 °C Storage Temperature Range −60 to +150 °C ESD Capability, HBM model (Note 2) 4 kV ESD Capability, MM model (Note 2) 200 V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. VDRV is the DRV clamp voltage VDRV(high) when VCC is higher than VDRV(high). VDRV is VCC unless otherwise noted. 2. This device series contains ESD protection and exceeds the following tests: Human Body Model 4000 V per JEDEC JESD22−A114−F and Machine Model Method 200 V per JEDEC JESD22−A115−A. 3. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78 except for VIN pin which passes 60 mA. www.onsemi.com 4

NCL30080 Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values TJ = 25°C, VCC = 12 V; For min/max values TJ = −40°C to +125°C, Max TJ = 150°C, VCC = 12 V) Description Test Condition Symbol Min Typ Max Unit STARTUP AND SUPPLY CIRCUITS Supply Voltage V Startup Threshold VCC increasing VCC(on) 16 18 20 Minimum Operating Voltage VCC decreasing VCC(off) 8.2 8.8 9.4 Hysteresis VCC(on) – VCC(off) VCC decreasing VCC(HYS) 8 – – Internal logic reset VCC(reset) 3.5 4.5 5.5 Over Voltage Protection VCC(OVP) 26 28 30 V VCC OVP threshold VCC(off) noise filter tVCC(off) – 5 – (cid:2)s VCC(reset) noise filter− tVCC(reset) – 20 – Startup current ICC(start) – 13 30 (cid:2)A Startup current in fault mode ICC(sFault) – 46 60 (cid:2)A Supply Current mA Device Disabled/Fault VCC > VCC(off) ICC1 0.8 1.0 1.4 Device Enabled/No output load on pin 4 Fsw = 65 kHz ICC2 – 2.15 4.0 Device Switching (Fsw = 65 kHz) CDRV = 470 pF, ICC3 – 2.6 5.0 Fsw = 65 kHz CURRENT SENSE Maximum Internal current limit VILIM 0.95 1 1.05 V Leading Edge Blanking Duration for VILIM tLEB 250 300 350 ns (Tj = −25°C to 125°C) Leading Edge Blanking Duration for VILIM tLEB 240 300 350 ns (Tj = −40°C to 125°C) Input Bias Current DRV high Ibias – 0.02 – (cid:2)A Propagation delay from current detection to gate off−state tILIM – 50 150 ns Threshold for immediate fault protection activation VCS(stop) 1.35 1.5 1.65 V Leading Edge Blanking Duration for VCS(stop) tBCS – 120 – ns Blanking time for CS to GND short detection VpinVIN = 1 V tCS(blank1) 8.0 – 14 (cid:2)s Blanking time for CS to GND short detection VpinVIN = 3.3 V tCS(blank2) 2.6 – 4.6 (cid:2)s GATE DRIVE Drive Resistance (cid:3) DRV Sink RSNK – 13 – DRV Source RSRC – 30 – Drive current capability mA DRV Sink (Note 4) ISNK – 500 – DRV Source (Note 4) ISRC – 300 – Rise Time (10% to 90%) CDRV = 470 pF tr – 40 – ns Fall Time (90% to 10%) CDRV = 470 pF tf – 30 – ns DRV minimum high level VCC = VCC(off)+0.2 V VDRV(low) 8 – – V CDRV = 470 pF, RDRV = 33 k(cid:3) DRV high clamp level VCC = 30 V VDRV(high) 10 12 14 V CDRV = 470 pF, RDRV = 33 k(cid:3) 4. Guaranteed by design www.onsemi.com 5

NCL30080 Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values TJ = 25°C, VCC = 12 V; For min/max values TJ = −40°C to +125°C, Max TJ = 150°C, VCC = 12 V) Description Test Condition Symbol Min Typ Max Unit ZERO VOLTAGE DETECTION CIRCUIT ZCD threshold voltage VZCD increasing VZCD(THI) 25 45 65 mV ZCD threshold voltage (Note 4) VZCD decreasing VZCD(THD) 5 25 45 mV ZCD hysteresis (Note 4) VZCD(HYS) 10 – – mV Threshold voltage for output short circuit or aux. winding VZCD(short) 0.8 1 1.2 V short circuit detection Short circuit detection Timer VZCD < VZCD(short) tOVLD 70 90 110 ms Auto−recovery timer duration trecovery 3 4 5 s Input clamp voltage V High state Ipin1 = 3.0 mA VCH – 9.5 – Low state Ipin1 = −2.0 mA VCL −0.9 −0.6 −0.3 Propagation Delay from valley detection to DRV high VZCD decreasing tDEM – – 150 ns Equivalent time constant for ZCD input (Note 4) tPAR – 20 – ns Blanking delay after on−time tBLANK 2.25 3 3.75 (cid:2)s Timeout after last demag transition tTIMO 5 6.5 8 (cid:2)s CONSTANT CURRENT CONTROL Reference Voltage at Tj = 25°C VREF 245 250 255 mV Reference Voltage Tj = −40°C to 125°C VREF 242.5 250 257.5 mV Current sense lower threshold for detection of the VCS(low) 30 55 80 mV leakage inductance reset time LINE FEED−FORWARD VVIN to ICS(offset) conversion ratio KLFF 15 17 19 (cid:2)A/V Offset current maximum value VpinVIN = 4.5 V Ioffset(MAX) 67.5 76.5 85.5 (cid:2)A VALLEY SELECTION Threshold for line range detection Vin increasing VVIN increasing VHL 2.28 2.4 2.52 V (1st to 2nd valley transition for VREF > 0.75 V) Threshold for line range detection Vin decreasing VVIN decreasing VLL 2.18 2.3 2.42 V (2nd to 1st valley transition for VREF > 0.75 V) Blanking time for line range detection tHL(blank) 15 25 35 ms THERMAL SHUTDOWN Thermal Shutdown (Note 4) Device switching TSHDN 130 155 170 °C (FSW around 65 kHz) Thermal Shutdown Hysteresis (Note 4) TSHDN(HYS) – 55 – °C BROWN−OUT Brown−Out ON level (IC start pulsing) VSD increasing VBO(on) 0.90 1 1.10 V Brown−Out OFF level (IC shuts down) VSD decreasing VBO(off) 0.85 0.9 0.95 V BO comparators delay tBO(delay) – 30 – (cid:2)s Brown−Out blanking time tBO(blank) 35 50 65 ms Brown−Out pin bias current IBO(bias) −250 – 250 nA 4. Guaranteed by design www.onsemi.com 6

NCL30080 TYPICAL CHARACTERISTICS 18.15 8.85 18.10 8.80 V)18.05 V) (on) (off)8.75 C( C( C18.00 C V V 8.70 17.95 17.90 8.65 −40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 3. V vs. Junction Temperature Figure 4. V vs. Junction Temperature CC(on) CC(off) 27.80 1.09 27.75 1.07 27.70 1.05 (V)P)27.65 mA) 1.03 OV27.60 (1 VCC(27.55 ICC1.01 27.50 0.99 27.45 0.97 27.40 0.95 −40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 5. V vs. Junction Temperature Figure 6. I vs. Junction Temperature CC(OVP) CC1 2.20 2.70 2.65 2.15 2.60 A) A) 2.55 m m (22.10 (3 C C2.50 C C I I 2.45 2.05 2.40 2.00 2.35 −40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 7. I vs. Junction Temperature Figure 8. I vs. Junction Temperature CC2 CC3 www.onsemi.com 7

NCL30080 TYPICAL CHARACTERISTICS 54 19 52 50 17 (cid:2) (A)art) 15 (cid:2) (A)ault) 4486 ICC(st 13 ICC(sF 44 42 11 40 9 38 −40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 9. I vs. Junction Temperature Figure 10. I vs. Junction Temperature CC(start) CC(sFault) 1.51 1.002 1.000 1.50 0.998 (V)CS(stop) 11..4498 V (V)ILIM0.996 V 0.994 1.47 0.992 1.46 0.990 −40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 11. V vs. Junction Temperature Figure 12. V vs. Junction Temperature CS(stop) ILIM 305 3.00 303 301 2.98 299 s) 297 (cid:2)s) 2.96 (nB 295 (NK E A tL 293 BL 2.94 t 291 289 2.92 287 285 2.90 −40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 13. t vs. Junction Temperature Figure 14. t vs. Junction Temperature LEB BLANK www.onsemi.com 8

NCL30080 TYPICAL CHARACTERISTICS 6.80 254 253 6.70 252 6.60 s) V) 251 (cid:2) m (O 6.50 (F 250 M E tTI VR 249 6.40 248 6.30 247 6.20 246 −40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 15. t vs. Junction Temperature Figure 16. V vs. Junction Temperature TIMO REF 55.8 17.65 55.6 17.60 55.4 mV) 55.2 V)17.55 (CS(low)5554..08 (cid:2)K (A/LFF17.50 V 54.6 17.45 54.4 54.2 17.40 −40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 17. V vs. Junction Temperature Figure 18. K vs. Junction Temperature CS(low) LFF 2.42 2.30 2.41 2.29 2.40 V) V) (L 2.39 (L2.28 H L V V 2.38 2.27 2.37 2.36 2.26 −40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 19. V vs. Junction Temperature Figure 20. V vs. Junction Temperature HL LL www.onsemi.com 9

NCL30080 TYPICAL CHARACTERISTICS 25.5 1.000 25.0 0.995 s) m 24.5 V)0.990 (NK) (on) LA O( B 24.0 B0.985 L( V H t 23.5 0.980 23.0 0.975 −40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 21. t vs. Junction Temperature Figure 22. V vs. Junction Temperature HL(BLANK) BO(on) 0.910 53.5 53.0 0.905 52.5 s) (V)BO(off)0.900 (mBLANK)5512..50 V O( B t 51.0 0.895 50.5 0.890 50.0 −40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 23. V vs. Junction Temperature Figure 24. t vs. Junction BO(off) BO(BLANK) Temperature 85.0 4.40 84.5 4.35 84.0 4.30 83.5 (ms)VLD 8832..05 (s)covery44..2205 O e t tr 82.0 4.15 81.5 4.10 81.0 80.5 4.05 −40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 25. t vs. Junction Temperature Figure 26. t vs. Junction Temperature OVLD recovery www.onsemi.com 10

NCL30080 Application Information The NCL30080 implements a current−mode architecture • Brown−Out: the controller includes a brown−out operating in quasi−resonant mode. Thanks to proprietary circuit with a validation timer which safely stops the circuitry, the controller is able to accurately regulate the controller in the event that the input voltage is too low. secondary side current of the flyback converter without The device will automatically restart if the line recovers. using any opto−coupler or measuring directly the secondary • Cycle−by−cycle peak current limit: when the current side current. sense voltage exceeds the internal threshold V , the • ILIM Quasi−Resonance Current−Mode Operation: MOSFET is turned off for the rest of the switching cycle. implementing quasi−resonance operation in peak • Winding Short−Circuit Protection: an additional current−mode control, the NCL30080 optimizes the comparator with a short LEB filter (t ) senses the CS BCS efficiency by switching in the valley of the MOSFET signal and stops the controller if V reaches 1.5 x CS drain−source voltage. Thanks to a smart control V . For noise immunity reasons, this comparator is ILIM algorithm, the controller locks−out in a selected valley enabled only during the main LEB duration t . LEB and remains locked until the input voltage or the output • Output Short−circuit protection: If a very low current set point significantly changes. • voltage is applied on ZCD pin for 90 ms (nominal), the Primary Side Constant Current Control: thanks to a controllers assume that the output or the ZCD pin is proprietary circuit, the controller is able to compensate shorted to ground and enters shutdown. The auto− for the leakage inductance of the transformer and allow restart version (B suffix) waits 4 seconds, then the accurate control of the secondary side current. controller restarts switching. In the latched version (A • Line Feed−forward: compensation for possible suffix), the controller is latched as long as V stays CC variation of the output current caused by system slew above the V threshold. CC(reset) rate variation. • Open LED protection: if the voltage on the VCC pin exceeds an internal limit, the controller shuts down and waits 4 seconds before restarting switching. www.onsemi.com 11

NCL30080 Constant Current Control Figure 27 shows the basic circuit of a flyback converter. Figure28 portrays the primary and secondary current of a flyback converter operating in discontinuous conduction mode (DCM). Vbulk Transformer Lleak Cclp Rclp Nsp Vout . Lp . Clamping network DRV Clump Rsense Figure 27. Basic Flyback Converter Schematic www.onsemi.com 12

NCL30080 During the on−time of the MOSFET, the bulk voltage turned off, the drain voltage begins to oscillate because of V is applied to the magnetizing and leakage inductors L the resonating network formed by the inductors (L +L ) bulk p p leak and L and the current ramps up. and the lump capacitor. This voltage is reflected on the leak When the MOSFET is turned−off, the inductor current auxiliary winding wired in flyback mode. Thus, by first charges C . The output diode is off until the voltage monitoring the auxiliary winding voltage, we can detect the lump across L reverses and reaches: end of the conduction time of secondary diode. The constant p (cid:2) (cid:4) current control block picks up the leakage inductor current, Nsp Vout(cid:3)Vf (eq. 1) the end of conduction of the output rectifier and controls the drain current to maintain the output current constant. The output diode current increase is limited by the leakage inductor. As a result, the secondary peak current is reduced: We have: I V ID,pk(cid:5) NL,sppk (eq. 2) Iout(cid:6)2NspRREsFense (eq. 3) The diode current reaches its peak when the leakage inductor The output current value is set by choosing the sense is reset. Thus, in order to accurately regulate the output resistor: current, we need to take into account the leakage inductor V R (cid:6) ref (eq. 4) current. This is accomplished by sensing the clamping sense 2N I spout network current. Practically, a node of the clamp capacitor From Equation 3, the first key point is that the output is connected to R instead of the bulk voltage V . sense bulk current is independent of the inductor value. Moreover, the Then, by monitoring the voltage on the CS pin, we have an leakage inductance does not influence the output current image of the primary current (red curve in Figure 28). value as the reset time is processed by the controller. When the diode conducts, the secondary current decreases linearly from I to zero. When the diode current has D,pk IL,pk NspID,pk Ipri(t) Isec(t) time t1 t2 ton tdemag Vaux(t) time Figure 28. Flyback Currents and Auxiliary Winding Voltage in DCM www.onsemi.com 13

NCL30080 Internal Soft−Start At startup or after recovering from a fault, there is a small current control block will slowly increase the peak current internal soft−start of 40 (cid:2)s. towards its nominal value as the output voltage grows. In addition, during startup, as the output voltage is zero Figure29 shows a soft−start simulation example for a 9W volts, the demagnetization time is long and the constant LED driver illustrating a natural soft startup. 16.0 12.0 1 Vout V) 8.00 ( 4.00 0 800m 600m A)400m 2 Iout ( 200m 0 800m 600m V)400m 4 VControl ( 200m 0 3 VCS 604u 1.47m 2.34m 3.21m 4.07m time in seconds Figure 29. Startup Simulation Showing the Natural Soft−start Cycle−by−Cycle Current Limit Winding and Output Diode Short−Circuit Protection When the current sense voltage exceeds the internal In parallel with the cycle−by−cycle sensing of the CS pin, threshold V , the MOSFET is turned off for the rest of the another comparator with a reduced LEB (t ) and a higher ILIM BCS switching cycle (Figure 30). threshold (1.5 V typical) is integrated to sense a winding short−circuit and immediately stops the DRV pulses. The controller goes into auto−recovery mode in version B. In version A, the controller is latched. In latch mode, the DRV pulses stop and VCC ramps up and down. The circuit un−latches when VCC pin voltage drops below V CC(reset) threshold. www.onsemi.com 14

NCL30080 S Q DRV Vdd aux Q latch VCC CS R Vcc LEB1 + PWMreset management Rsense Vcontrol − UVLO VCCstop + Ipkmax 8_HICC grand reset − VILIMIT OVP STOP OVP LEB2 + WOD_SCP − latch VCS(stop) S Q OFF WOD_SCP S Q Q Q R R 8_HICC grand reset from Fault Management Block Figure 30. Winding Short Circuit Protection, Max. Peak Current Limit Circuits www.onsemi.com 15

NCL30080 V Over Voltage Protection (Open LED Protection) In the NCL30080, when the V voltage reaches the CC CC If no output load is connected to the LED string fails open V threshold, the controller stops the DRV pulses and CC(OVP) circuited, the controller must be able to safely limit the the 4−s timer starts counting. The IC re−start switching after output voltage excursion. the 4−s timer has elapsed as long as V ≥ V . This is CC CC(on) illustrated in Figure 31. 40.0 VCC(OVP) 30.0 1 VCC VCC(on) V) 20.0 ( 10.0 VCC(off) 0 40.0 30.0 2 Vout V) 20.0 ( 10.0 0 800m 600m A)400m ( 200m 0 3 Iout 8.00 6.00 4 OVP V) 4.00 ( 2.00 0 1.38 3.96 6.54 9.11 11.7 time in seconds Figure 31. Open LED Protection Chronograms www.onsemi.com 16

NCL30080 Valley Lockout Quasi−square wave resonant systems have a wide valley until the input voltage varies significantly. This switching frequency excursion. The switching frequency avoids valley jumping and the inherent noise caused by this increases when the output load decreases or when the input phenomenon. voltage increases. The switching frequency of such systems The input voltage is sensed by the VIN pin. The internal must be limited. logic selects the operating valley according to VIN pin The NCL30080 changes the valley as the input voltage voltage (line range detection in Figure 32). For a universal increases. This limits the switching frequency excursion. mains design, the controller operates in the first valley at low Once a valley is selected, the controller stays locked in the line and in the second valley at high line. Vbulk VIN + LLine HLine 25−ms blanking time − 2.4 V if LLine low 2.3 V if LLine high Figure 32. Line Range Detection Table 4. VALLEY SELECTION VIN pin voltage for valley change VVIN decreases 0 −LL− 2.3 V −HL− 5 V Valley number 1st 2nd 0 −LL− 2.4 V −HL− 5 V VVIN increases VIN pin voltage for valley change www.onsemi.com 17

NCL30080 Zero Crossing Detection Block the valleys. To avoid such a situation, the NCL30080 The ZCD pin detects when the drain-source voltage of the features a time-out circuit that generates pulses if the voltage power MOSFET reaches a valley. on ZCD pin stays below the V threshold for 6.5(cid:2)s ZCD(THD) A valley is detected when the voltage on pin 1 crosses (nominal). below the VZCD(THD) internal threshold. The time-out also acts as a substitute clock for the valley At startup or in case of extremely damped free detection and simulates a missing valley in case of very oscillations, the ZCD comparator may not be able to detect damped free oscillations. VZCD 43 VZCD(THD) The 3rd valley is validated high 14 2nd,3rd low 12 The 2nd valley is detected The 3rd valley is not detected By the ZCD comparator by the ZCD comp high low 15 ZCD comp high low 16 TimeOut Time−out circuit adds a pulse to account for the missing 3rd valley high low 17 Clk Figure 33. Time−out Chronograms Normally with this type of time−out function, in the event To avoid these scenarios, a protection circuit consisting of the ZCD pin or the auxiliary winding is shorted, the a comparator and secondary timer starts counting when the controller could continue switching leading to improper ZCD voltage is below the V threshold. If this timer ZCD(short) regulation of the LED current. Moreover during an output reaches 90 ms, the controller detects a fault and shutdown. short circuit, the controller will strive to maintain constant The auto−restart version (B suffix) waits 4 seconds, then the current operation. controller restarts switching. In the latched version (Asuffix), the controller is latched as long as V stays CC above the V threshold. CC(reset) www.onsemi.com 18

NCL30080 Line Feed−forward Because of internal and external propagation delays, the Normally this error would increase if the input line MOSFET is not turned−off immediately when the current voltage increased because the slew rate through the primary set−point is reached. As a result, the primary peak current is inductance would increase. To compensate for the peak slightly higher than expected resulting in a small output current increase brought by the variation, a positive voltage current error which can be compensated for during proportional to the line voltage is added to the current sense component selection. signal. The amount of offset voltage can be adjusted using the R resistor as shown in Figure 34. LFF VCS(offset)(cid:6)KLFFVpinVINRCS (eq. 5) The offset voltage is applied only during the MOSFET on−time. Bulk rail VDD VIN ICS(offset) CS RCS Rsense Q_drv Figure 34. Line Feed−forward Schematic Brown−out condition overrides the hiccup on V (V does not wait CC CC In order to protect the supply against a very low input to reach V ) and the IC immediately goes into startup CC(off) voltage, the NCL30080 features a brown−out circuit with a mode (I = I ). Note for most compact LED driver CC CC(start) fixed ON/OFF threshold. The controller is allowed to start applications, if a true line dropout occurs, the energy in the if a voltage higher than 1 V is applied to the VIN pin and input bulk capacitor will be discharged and the LED load shuts−down if the VIN pin voltage decreases and stays will turn off before the 50 ms timer expires. below 0.9 V for 50 ms nominal. Exiting a brown−out Vbulk VIN + BO_NOK 50−ms blanking time − 1 V if BONOK high 0.9 V if BONOK low Figure 35. Brown−out Circuit www.onsemi.com 19

NCL30080 160 120 VBulk V) 80.0 ( 1 40.0 0 18.0 VCC(on) 2 16.0 V) 14.0 ( 12.0 VCC 10.0 VCC(off) 1.10 VBO(on) 900m V) VBO(off) (700m VpinVIN 500m 3 300m 8.00 50−ms Timer 6.00 BO_NOK low => Startup mode V) ( 4.00 2.00 BO_NOK 0 4 46.1m 138m 231m 323m 415m time in seconds Figure 36. Brown−Out Chronograms (Valley Fill circuit is used) www.onsemi.com 20

NCL30080 CS Pin Short Circuit Protection With a traditional controller, if the CS pin or the sense power supply against a short circuit of the CS pin. When the resistor is shorted to ground, the driver will not be able to MOSFET is on, if the CS voltage stays below V after CS(low) turn off, leading to potential damage of the power supply. To the adaptive blanking timer has elapsed, the controller shuts avoid this, the NCL30080 features a circuit to protect the down and will attempt to restart on the next V hiccup. CC Adaptative VVIN Blanking Time Q_drv CS − + S VCS(low) Q CS_short Q R UVLO BO_NOK Figure 37. CS Pin Short Circuit Protection Schematic Fault Management In this mode, the DRV pulses are stopped. V voltage CC OFF Mode decrease through the controller own consumption (ICC1). The circuit turns off whenever a major condition prevents For the output diode short circuit protection, the output / it from operating: aux. winding short circuit protection and the VCC OVP, the • controller waits 4 seconds (auto−recovery timer) and then Incorrect feeding of the circuit: “UVLO high”. The initiates a startup sequence (V ≥ V ) before UVLO signal becomes high when V drops below CC CC(on) CC re−starting switching. V and remains high until V exceeds V . CC(off) CC CC(on) • V OVP Latch Mode CC • This mode is activated by the output diode short−circuit Output diode short circuit protection: “WOD_SCP protection (WOD_SCP) and the Aux_SCP in version A high” only. • Output / Auxiliary winding Short circuit protection: In this mode, the DRV pulses are stopped and the “Aux_SCP high” controller is latched. There are hiccups on V . • CC Die over temperature (TSD) The circuit un−latches when V < V . CC CC(reset) • Brown−Out: “BO_NOK” high • Pin CS short circuited to GND: “CS_short high” www.onsemi.com 21

NCL30080 Reset Timer has finished counting VCC > VCC(on) VCC < VCC(off) or BO_NOK ↓ VCC_OVP BO_NOK high Stop or TSD 4−s or CS_Short Timer VCC Disch. BO_NOK high or TSD or CS_Short WOD_SCP or Aux_SCP or VCC_OVP Run VCC < VCC(off) With states:Reset → Controller is reset, ICC = ICC(start) Stop → Controller is ON, DRV is not switching Run → Normal switching VCC Disch. → No switching, ICC = ICC1, waiting for VCC to decrease to VCC(off) 4−s Timer → the auto−recovery timer is counting, VCC is ramping up and down between VCC(on) and VCC(off) Figure 38. State Diagram for B Version Faults www.onsemi.com 22

NCL30080 Reset Timer has finished counting VCC > VCC(on) VCC < VCC(off) or VCC < VCC(reset) BO_NOK ↓ BO_NOK high T4im−ser VCC_OVP Stop or TSD or CS_Short VCC Disch. VCC_OVP BO_NOK high or TSD or CS_Short Latch Run WOD_SCP or VCC < VCC(off) Aux_SCP With states:Reset → Controller is reset, ICC = ICC(start) Stop → Controller is ON, DRV is not switching Run → Normal switching VCC Disch. → No switching, ICC = ICC1, waiting for VCC to decrease to VCC(off) 4−s Timer → the auto−recovery timer is counting, VCC is ramping up and down between VCC(on) and VCC(off) Latch → Controller is latched off, VCC is ramping up and down between VCC(on) and VCC(off), only VCC(reset) can release the latch. Figure 39. State Diagram for A Version Faults www.onsemi.com 23

NCL30080 PACKAGE DIMENSIONS TSOP−6 CASE 318G−02 ISSUE V D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. H 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. É6 É5 4 L2 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, GAUGE PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR E1 E PLANE GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D ÉÉ AND E1 ARE DETERMINED AT DATUM H. 1 2 3 5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE. L NOTE 5 b M C PSLEAANTIENG DIM MIN MILLNIMOEMTERSMAX DETAIL Z A 0.90 1.00 1.10 e A1 0.01 0.06 0.10 b 0.25 0.38 0.50 c 0.10 0.18 0.26 c D 2.90 3.00 3.10 A E 2.50 2.75 3.00 0.05 E1 1.30 1.50 1.70 e 0.85 0.95 1.05 A1 L 0.20 0.40 0.60 DETAIL Z L2 0.25 BSC M 0° − 10° RECOMMENDED SOLDERING FOOTPRINT* 6X 0.60 3.20 6X 0.95 0.95 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 24

NCL30080 OPTIONS Controller Output SCP Winding/Output Diode SCP NCL30080A Latched Latched NCL30080B Auto−recovery Auto−recovery ORDERING INFORMATION Device Package Marking Package Type Shipping† NCL30080ASNT1G AAE TSOP−6 3000 / Tape & Reel (Pb−Free, Halide−Free) NCL30080BSNT1G AAZ TSOP−6 3000 / Tape & Reel (Pb−Free, Halide−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative www.onsemi.com NCL30080/D 25