NBVSBAXXX Series 2.5 V/3.3 V, LVPECL Voltage-Controlled Crystal Oscillator (VCXO) (cid:2) PureEdge Product Series http://onsemi.com The NBVSBAXXX series voltage−controlled crystal oscillator (VCXO) devices are designed to meet today’s requirements for 2.5 V MARKING DIAGRAM and 3.3V LVPECL clock generation applications. These devices use a high Q fundamental mode crystal and Phase Locked Loop (PLL) multiplier to provide a wide range of frequencies from 60 MHz to 700 NBVSBAXXX MHz (factory configurable per user specifications) with a pullable XXX.XXXX range of ±100ppm and a frequency stability of ±50ppm. The 6 PIN CLCC AWLYYWWG silicon−based PureEdge(cid:2) products design provides users with LN SUFFIX exceptional frequency stability and reliability. They produce an ultra CASE 848AB low jitter and phase noise LVPECL differential output. The NBVSBAXXX series are members of ON Semiconductor’s PureEdge(cid:2) clock family that provides accurate and precision clock NBVSBAXXX generation solutions. XXX.XXXX Available in the industry standard 5.0 x 7.0 x 1.8 mm and in a new 6 PIN CLCC AWLYYWWG 3.2 x 5.0 x 1.2 mm SMD (CLCC) package on 16 mm tape and reel in LU SUFFIX quantities of 1,000. CASE 848AC Features • NBVSBAXXX = NBVSBAXXX (±50 ppm) LVPECL Differential Output XXX.XXXX = Output Frequency (MHz) • Operating Range: 2.5 V ±5%, 3.3 V ±10% A = Assembly Location • Ultra Low Jitter and Phase Noise − 0.5 ps (12 kHz − 20 MHz) WL = Wafer Lot • YY = Year Factory Configurable Frequencies from 60 MHz to 700 MHz (see WW = Work Week Standard Frequencies in the Ordering Information Table in page 6) G = Pb−Free Package • Pullable Range Minimum of ±100 ppm • Frequency Stability of ±50 ppm • Control Voltage with Positive Slope ORDERING INFORMATION • Voltage Control Linearity of ±10% See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. • Uses High Q Fundamental Mode Crystal • Hermetically Sealed Ceramic SMD Package • These Devices are Pb−Free and RoHS Compliant Applications • Networking • SONET • 10 Gigabit Ethernet • Networking Base Stations • Broadcasting © Semiconductor Components Industries, LLC, 2011 1 Publication Order Number: April, 2011 − Rev. 2 NBVSBA011/D

NBVSBAXXX Series VDD CLK CLK 6 5 4 PLL Clock Multiplier 1 2 3 VC OE GND Figure 1. Simplified Logic Diagram VC 1 6 VDD OE 2 5 CLK GND 3 4 CLK Figure 2. Pin Connections (Top View) Table 1. PIN DESCRIPTION Pin No. Symbol I/O Description 1 VC (Note 1) Analog Input Analog control voltage input pin that adjusts output oscillation frequency. f0 =VC = 1.65 V 2 OE LVTTL/LVCMOS Output Enable Pin. When left floating pin defaults to logic HIGH and output is active. Control Input See OE pin description Table 2. 3 GND Power Supply Ground at 0 V. Electrical and Case Ground. 4 CLK LVPECL Output Non−Inverted Clock Output. Typically loaded with 50 (cid:2) receiver termination resistor to VTT = VDD − 2 V. 5 CLK LVPECL Output Inverted Clock Output. Typically loaded with 50 (cid:2) receiver termination resistor to VTT = VDD − 2 V. 6 VDD Power Supply Positive Power Supply Voltage. Voltage should not exceed 2.5 V ±5% and 3.3 V ±10%. 1. Control voltage has a positive slope with a linearity of ±10%; VC = 1.65 V ± 1 V. Table 2. OUTPUT ENABLE TRI−STATE FUNCTION OE Pin Output Pins Open Active HIGH Level Active LOW Level High Z Table 3. ATTRIBUTES Characteristic Value Internal Default State Resistor 170 k(cid:2) ESD Protection Human Body Model 2 kV Machine Model 200 V Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test 2. For additional Moisture Sensitivity information, refer to Application Note AND8003/D. http://onsemi.com 2

NBVSBAXXX Series Table 4. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Units VDD Positive Power Supply GND = 0 V 4.6 V VIN Control Input (VC and OE) VIN ≤ VDD + 200 mV V VIN ≥ GND − 200 mV Iout LVPECL Output Current Continuous 25 mA Surge 50 TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −55 to +120 °C Tsol Wave Solder See Figure 4 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 5. DC CHARACTERISTICS (VDD = 2.5 V ± 5%; 3.3 V ± 10%, GND = 0 V, TA = −40°C to +85°C) (Note 3) Symbol Characteristic Conditions Min. Typ. Max. Units IDD Power Supply Current 90 110 mA VIH Input HIGH Voltage OE 2000 VDD mV VIL Input LOW Voltage OE GND − 200 800 mV IIH Input HIGH Current OE −100 +100 (cid:3)A IIL Input LOW Current OE −100 +100 (cid:3)A VOH Output HIGH Voltage VDD−1195 VDD−945 mV VOL Output LOW Voltage VDD−1945 VDD−1600 mV VOUTPP Output Voltage Amplitude 700 mV NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Measurement taken with outputs terminated with 50 (cid:2) to VDD − 2.0 V. See Figure 3. http://onsemi.com 3

NBVSBAXXX Series Table 6. AC CHARACTERISTICS (VDD = 2.5 ±5%, VDD = 3.3 ±10%, GND = 0 V, TA = -40°C to +85°C) Symbol Characteristic Conditions Min. Typ. Max. Units fCLKOUT Output Clock Frequency NBVSBA011 122.88 MHz NBVSBA027 148.50 NBVSBA018 155.52 NBVSBA017 156.25 NBVSBA015 200.00 NBVSBA024 622.08 NBVSBA026 644.53 NBVSBA041 693.48 NBVSBA037 707.35 (cid:4)f Frequency Stability (Note 5) ±50 ppm tjit((cid:5)) RMS Phase Jitter 12 kHz to 20 MHz 0.5 0.9 ps tjitter Cycle to Cycle, RMS 1000 Cycles 2 8 ps Cycle to Cycle, Peak-to-Peak 1000 Cycles 10 30 ps Period, RMS 10,000 Cycles 1 4 ps Period, Peak-to-Peak 10,000 Cycles 6 20 ps tOE/OD Output Enable/Disable Time 200 ns FP Crystal Pullability (Note 4) 0 ≤ VC ≤ 3.3 V ±100 ppm VC(bw) Control Voltage Bandwidth - 3 dB 20 KHz tDUTY_CYCLE Output Clock Duty Cycle 45 50 55 % (Measured at Cross Point) tR Output Rise Time (20% and 80%) 245 400 ps tF Output Fall Time (80% and 20%) 245 400 ps tstart Start-up Time 1 5 ms Aging 1st Year 3 ppm Every Year After 1st 1 NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Gain transfer is positive with a rate of 130 ppm/V. 5. Parameter guarantees 10 years of aging. Includes initial stability at 25°C, shock, vibration and first year aging. http://onsemi.com 4

NBVSBAXXX Series Table 7. PHASE NOISE PERFORMANCE 011 027 018 017 015 122.88 148.50 155.52 156.25 200.00 Parameter Characteristic Condition MHZ MHz MHz MHZ MHz Units (cid:5)NOISE Output Phase−Noise Performance 100 Hz offset −90 −90 −90 −90 −87 dBc/Hz 1 kHz offset −118 −118 −116 −116 −114 dBc/Hz 10 kHz offset −127 −127 −126 −126 −125 dBc/Hz 100 kHz offset −127 −127 −126 −126 −125 dBc/Hz 1 MHz offset −134 −134 −134 −134 −132 dBc/Hz 10 MHz offset −160 −160 −160 −160 −158 dBc/Hz Table 8. PHASE NOISE PERFORMANCE (continued) 024 026 041 037 622.08 644.53 693.48 707.35 Parameter Characteristic Condition MHZ MHZ MHZ MHZ Units (cid:5)NOISE Output Phase−Noise Performance 100 Hz offset −80 −86 −78 −78 dBc/Hz 1 kHz offset −106 −107 −105 −105 dBc/Hz 10 kHz offset −117 −116 −115 −115 dBc/Hz 100 kHz offset −117 −116 −115 −115 dBc/Hz 1 MHz offset −122 −125 −124 −124 dBc/Hz 10 MHz offset −150 −150 −149 −149 dBc/Hz Table 9. RELIABILITY COMPLIANCE Parameter Standard Method Shock Mechanical MIL−STD−833, Method 2002, Condition B Solderability Mechanical MIL−STD−833, Method 2003 Vibration Mechanical MIL−STD−833, Method 2007, Condition A Solvent Resistance Mechanical MIL−STD−202, Method 215 Thermal Shock Environment MIL−STD−833, Method 1011, Condition A Moisture Level Sensitivity Environment MSL1 260°C per IPC/JEDEC J−STD−020D NBVSXXXXX Q Zo = 50 (cid:2) IN Driver Receiver Device Device Q Zo = 50 (cid:2) IN 50 (cid:2) 50 (cid:2) VTT VTT = VDD − 2.0 V Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) http://onsemi.com 5

NBVSBAXXX Series temp. 260°C Temperature (°C) 20 − 40 sec. max. peak 6°C/sec. max. 260 3°C/sec. max. 217 ramp−up cooling 175 150 pre−heat reflow Time 60(cid:2)180 sec. 60(cid:2)150 sec. Figure 4. Recommended Reflow Soldering Profile Table 10. ORDERING INFORMATION Device Output Frequency (MHz) Package Shipping† 5.0 x 7.0 x 1.8 mm NBVSBA011LN1TAG 122.88 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA027LN1TAG 148.50 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA018LN1TAG 155.52 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA017LN1TAG 156.25 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA015LN1TAG 200.00 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA024LN1TAG 622.08 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA026LN1TAG 644.53 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA037LN1TAG 707.35 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA041LN1TAG 693.48 CLCC−6, Pb−Free 1000 / Tape & Reel 5.0 x 7.0 x 1.8 mm NBVSBA011LNHTAG 122.88 CLCC−6, Pb−Free 100 / Tape & Reel NBVSBA027LNHTAG 148.50 CLCC−6, Pb−Free 100 / Tape & Reel NBVSBA018LNHTAG 155.52 CLCC−6, Pb−Free 100 / Tape & Reel NBVSBA017LNHTAG 156.25 CLCC−6, Pb−Free 100 / Tape & Reel NBVSBA015LNHTAG 200.00 CLCC−6, Pb−Free 100 / Tape & Reel NBVSBA024LNHTAG 622.08 CLCC−6, Pb−Free 100 / Tape & Reel NBVSBA026LNHTAG 644.53 CLCC−6, Pb−Free 100 / Tape & Reel NBVSBA037LNHTAG 707.35 CLCC−6, Pb−Free 100 / Tape & Reel NBVSBA041LNHTAG 693.48 CLCC−6, Pb−Free 100 / Tape & Reel 3.2 x 5.0 x 1.2 mm NBVSBA011LU1TAG* 122.88 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA027LU1TAG* 148.50 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA018LU1TAG* 155.52 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA017LU1TAG* 156.25 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA015LU1TAG* 200.00 CLCC−6, Pb−Free 1000 / Tape & Reel http://onsemi.com 6

NBVSBAXXX Series Table 10. ORDERING INFORMATION Device Output Frequency (MHz) Package Shipping† 3.2 x 5.0 x 1.2 mm NBVSBA024LU1TAG* 622.08 CLCC−6, Pb−Free 1000 / Tape & Reel NBVSBA026LU1TAG* 644.53 CLCC−6, Pb−Free 1000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and Reel Packaging Specification Brochure, BRD8011/D. *Consult factory for availability. http://onsemi.com 7

NBVSBAXXX Series PACKAGE DIMENSIONS 6 PIN CLCC, 7x5, 2.54P CASE 848AB−01 ISSUE O D A NOTES: B 1. DIMENSIONING AND TOLERANCING PER D1 ASME Y14.5M, 1994. 4X 0.15 C 2. CONTROLLING DIMENSION: MILLIMETERS. MILLIMETERS DIM MIN NOM MAX A 1.70 1.80 1.90 E2 E1 E A1 0.70 REF TERMINAL 1 INDICATOR A2 0.36 REF A3 0.08 0.10 0.12 b 1.30 1.40 1.50 D 7.00 BSC D2 D1 6.17 6.20 6.23 D2 6.66 6.81 6.96 TOP VIEW D3 5.08 BSC E 5.00 BSC A3 A2 E1 4.37 4.40 4.43 0.10 C E2 4.65 4.80 4.95 E3 3.49 BSC A e 2.54 BSC L 1.17 1.27 1.37 R 0.70 REF SIDE VIEW A1 C SEATING PLANE SOLDERING FOOTPRINT* D3 e 1 2 3 6X R 1.50 E3 5.06 0.10 C A B 6 5 4 0.05 C 6Xb 6XL BOTTOM VIEW 2.54 16.X50 PITCH DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 8

NBVSBAXXX Series PACKAGE DIMENSIONS 6 PIN CLCC, 5x3.2, 1.27P CASE 848AC−01 ISSUE O NOTES: D A 1. DIMENSIONING AND TOLERANCING PER B D1 ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. PIN ONE MILLIMETERS REFERENCE DIM MIN MAX E1 E A 1.05 1.35 2X 0.15 C A1 0.35 0.65 A3 0.90 REF b 0.50 0.80 2X 0.15 C D 5.00 BSC TOP VIEW D1 4.25 4.55 E 3.20 BSC E1 2.45 2.75 0.10 C E2 2.90 3.20 e 1.27 BSC A L 0.75 1.05 A1 A3 SOLDERING FOOTPRINT* METALLIZED C SEATING ZONES PLANE SIDE VIEW 6X0.74 16.X13 1 E2 3.30 6XL 6Xb e 0.10 C A B 0.05 C BOTTOM VIEW 1 PACKAGE 1.27 OUTLINE PITCH DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5773−3850 Sales Representative http://onsemi.com NBVSBA011/D 9