MTS62C19A Dual Full-Bridge Motor Driver Features Description • 750 mA Continuous Output Current The MTS62C19A motor driver is a CMOS device capa- • Load Voltage Supply: 10V to 40V ble of driving both windings of a bipolar stepper motor or bidirectionally control two DC motors. Each of the • Full Bipolar Stepper Motor Drive Capability two independent H-bridge outputs is capable of sus- • Bidirectional DC Motor Capability taining 40V and delivering up to 750 mA of continuous • Internal Fixed T Time PWM Current Control OFF current. The output current level is controlled by an • Internal Protection Diodes internal PWM circuit that is configured using two logic • Internal Thermal Shutdown inputs, a current sense resistor, and a selectable • Under Voltage Lockout reference voltage. The H-bridge outputs have been optimized to provide a low output saturation voltage • LS-TTL Compatible Logic Inputs with Pull-Up drop. Resistors • Low R Output Resistance Full, half, and micro-stepping operations are possible ON with the PWM current control and logic inputs. The • Low Quiescent Current maximum output current is set by a sensing resistor • Operating Temperature Range: -20°C to +85°C and a user selectable reference voltage. The output • Pin Compatible with Allegro 6219 current limit is selected using two logic level inputs. The selectable output current limits are 0%, 33%, 67%, or Applications 100% of the maximum output current. Each bridge has a PHASE input signal which is used to control the direc- • Stepper Motor Actuators tion of current flow through the H-bridge and the load. • DC Motor Actuators The H-bridge power stage is controlled by non-overlap- • Automotive HVAC Ventilation ping signals which prevent current cross conduction • Automotive Power Seats when switching the direction of the current flow. Internal clamp diodes protect against inductive transients. Thermal protection circuitry disables the outputs when Note: The MTS62C19A device is formerly a the junction temperature exceeds the safe operating product of Advanced Silicon. limit. No special power-up sequencing is required. Undervoltage Lockout circuitry prevents the chip from operating when the load supply is applied prior to the logic supply. The device is supplied in a 24-pin SOP Package. Package Types SOP-24  2010 Microchip Technology Inc. DS22260A-page 1

MTS62C19A Functional Block Diagram VLOGIC VLOAD PHASE1 Shift Drivers Logic I01 OUT1A Power I11 Bridge OUT1B Current VREF1 Sense One-shot Comparator Under-V Thermal Lockout Shutdown PHASE2 Shift Drivers I02 Logic OUT2A I12 Power Bridge OUT2B Current VREF2 Sense One-shot Comparator COMPIN1 COMPIN2 RC2 RC1 GND SENSE1 SENSE2 DS22260A-page 2  2010 Microchip Technology Inc.

MTS62C19A Typical Application 5V 10 to 30V 100nF 100nF 100uF VLOGIC VLOAD PHASE1 Shift Drivers I01 Logic OUT1A I11 Power Bridge OUT1B VREF1 Current Sense One-shot P Comparator u c / gi o Under-V Thermal L Lockout Shutdown PHASE2 Shift Drivers I02 Logic OUT2A I12 Power M Bridge OUT2B Current Sense VREF2 One-shot Comparator COMPIN1 COMPIN2 RC2 RC1 GND SENSE1 SENSE2 Rt Ct Ct Rt Rt Rt Rc Cc Rc Cc  2010 Microchip Technology Inc. DS22260A-page 3

MTS62C19A 1.0 ELECTRICAL † Notice: Stresses above those listed under “Maximum Rat- ings” may cause permanent damage to the device. This is a CHARACTERISTICS stress rating only and functional operation of the device at those or any other conditions above those indicated in the Absolute Maximum Ratings † operational listings of this specification is not implied. Expo- sure to maximum rating conditions for extended periods may Logic Supply Voltage (VLOGIC) ......................... -0.3 to +5.5V affect device reliability. Load Supply Voltage (V ) ..........................-0.3 to +40.0V LOAD Logic Input Voltage Range (V ) ....... -0.3 to VLOGIC + 0.3V IN V Voltage Range (V ).............................-0.3 to +10.0V REF REF Output Current (Peak) ..................................................... ±1A Output Current (Continuous) ...................................... ±0.75A Sense Output Voltage ...................................... -0.3V to 1.5V Junction Temperature (T ).............................-20°C to +150°C J Operating Temperature Range (T )............-20°C to +85°C OPR Storage Temperature Range (T ).............-55°C to +150°C STG ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise specified, all limits are established for V = 4.5V to 5.5V,V = 30V,V = 5V, LOGIC LOAD REF T = 25°C A Parameters Sym Min Typ Max Units Conditions DC Characteristics Logic Supply Voltage V 4.5 5.0 5.5 V LOGIC Load Supply Voltage V 10 30 40 V LOAD Logic Supply Current I — 0.8 1.0 mA VLOGIC V Voltage Range V 1.5 5.0 7.0 V REF REF Driver Supply Current I — 0.55 1.0 mA Both Bridges ON, No Load VLOAD_ON I — 0.55 1.0 mA Both Bridges Off VLOAD_OFF Control Logic Input Current I — — -70 µA I01,I11,I02,I12,PHASE1,PHASE2, IN (V = 0V) (Note1) IN Logic Low Input Voltage V — — 0.8 V I01,I11,I02,I12,PHASE1,PHASE2 IL Logic High Input Voltage V 2.4 — — V I01,I11,I02,I12,PHASE1,PHASE2 IH Current Limit Threshold V _V 9.5 10 10.5 — I0=L,I1=L REF SENS Ratio (VREF ÷ VSENSE) E 13.5 15 16.5 — I0=H,I1=L 25.5 30 34.5 — I0=L,I1=H Driver Output Saturation V — 0.55 0.65 V (Sink) IOUT = +500 mA ONN Voltage VCE(SAT) (Low Side) — 0.90 1.00 V (Sink) IOUT = +750 mA V — 1.05 1.40 V (Source) IOUT = -500 mA ONP (High Side) — 1.85 2.10 V (Source) IOUT = -750 mA Clamp Diode Forward Volt- V — 0.95 1.30 V I = 750 mA F_NDIODE F age (Note2) V — 1.00 1.30 V I = 750 mA F_PDIODE F Driver Output Leakage Cur- I — — -50 µA VOUT = 0V LEAK rent — — 50 µA V = V OUT LOAD Thermal Shutdown Temper- T — 170 — °C J_SHDN ature AC Characteristics Cut-off Time (one-shot T — 50 58 µs Rs=1,Rc=1k,Cc=820pF, OFF pulse) Rt=56k, Ct=820pF Turn-off Delay T — 1.5 10 µs D — — Note 1: V = 5.0V input current given by internal pull-up to Logic Supply. IN 2: Clamp/Freewheel diode is the intrinsic body-drain diode of the NMOS and PMOS transistors. DS22260A-page 4  2010 Microchip Technology Inc.

MTS62C19A TEMPERATURE SPECIFICATIONS Parameters Sym Min Typ Max Units Conditions Recommended Temperature Ranges Junction Temperature Range T -20 +125 °C J Operating Temperature Range T -20 +70 °C A Thermal Package Resistance Thermal Resistance, SOP-24  — 76 — JA °C/W EIA/JEDEC JESD51-10  — 16 — JC  2010 Microchip Technology Inc. DS22260A-page 5

MTS62C19A 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table2-1. TABLE 2-1: MTS62C19A PIN FUNCTION TABLE Pin No. Type Name Function SOP-24 1 Output OUT1A Output 1 ‘A’ Side of Motor Winding 2 Output OUT2A Output 2 ‘A’ Side of Motor Winding 3 Input SENSE2 Current Sense for Output 2 4 Input COMPIN2 Current Sense Comparator Input for Output 2 5 Output OUT2B Output 2 ‘B’ Side of Motor Winding 6 Power GND Negative Logic Supply (Ground) 7 Power GND Negative Logic Supply (Ground) 8 Input I02 Output 2 Current Selection Bit 0 9 Input I12 Output 2 Current Selection Bit 1 10 Input PHASE2 Output 2 Phase 11 Input VREF2 Output 2 Current Reference 12 Input RC2 Output 2 RC Time Constant 13 Power VLOGIC Positive Logic Supply Voltage 14 Input RC1 Output 1 RC Time Constant 15 Input VREF1 Output 1 Current Reference 16 Input PHASE1 Output 1 Phase 17 Input I11 Output 1 Current Selection Bit 1 18 Power GND Negative Logic Supply (Ground) 19 Power GND Negative Logic Supply (Ground) 20 Input I01 Output 1 Current Selection Bit 0 21 Output OUT1B Output 1 ‘B’ Side of Motor Winding 22 Input COMPIN1 Current Sense Comparator Input for Output 1 23 Input SENSE1 Current Sense for Output 1 24 Power VLOAD Positive Load Supply Voltage 2.1 Ground Terminal (GND) 2.4 Current Detection Selection (I01, I02, I11, I12) Logic supply ground. Only the driver current flows out of this pin; there is no high current. Minimize voltage Comparator input for current threshold detection. The drops between this pin and the logic inputs. voltage across the sense resistor is fed back to this input through the low pass filter RcCc. The power tran- 2.2 Logic Supply Voltage (VLOGIC) sistors are disabled when the sense voltage exceeds the reference voltage of the selected comparator. Connect VLOGIC to the logic source voltage. Decouple When this occurs the current decays for a time set by the supply with a 0.1 µF ceramic capacitor mounted RtCt (T = 1.1 RtCt). OFF close to the VLOGIC and GND terminals. 2.3 Load Supply Voltage (VLOAD) Connect VLOAD to the motor positive voltage supply. The motor current is supplied through this pin and the selected output transistors. DS22260A-page 6  2010 Microchip Technology Inc.

MTS62C19A 2.5 Current Flow Direction Selection 2.8 Current Sense Comparator Input (PHASE1, PHASE2) (COMPIN1, COMPIN2) Logic input to select the direction of current flow Current sense comparator input. through the load. A “HIGH” logic signal level causes load current to flow from OUTxA to OUTxB. A “LOW” 2.9 Output Stage OFF Time (RC1, logic level causes load current to flow from OUTxB to RC2) OUTxA. A parallel RtCt network connected to this pin sets the 2.6 Current Sense Reference (VREF1, OFF time of the power transistors. The pulse generator VREF2) is a monostable triggered by the output of the current sense comparator. Reference voltage for current sense comparator. Determines the level of output current detection 2.10 Output Stage (OUT1A, OUT2A, together with sensing resistor and inputs I0x, I1x. OUT1B, OUT2B) 2.7 Current Sense Input (SENSE1, Output connection to “A” side and “B” side of motor SENSE2) windings. Connection to lower sources of output stage for inser- tion of current sense resistor.  2010 Microchip Technology Inc. DS22260A-page 7

MTS62C19A 3.0 FUNCTIONAL DESCRIPTION 3.1 Power Bridge Operation The circuit is designed to drive the two windings of a Each motor winding is driven by an H-type bridge bipolar stepper motor and can be divided in two identi- consisting of two N and two P transistors that allow the cal channels (channel 1 and channel 2) and protection current to flow in both winding directions depending on circuitry for over temperature and undervoltage. The the value of the PHASE signal (Table3-1). The H- functionality of a channel and protection circuitry is bridge can be set in 5 configurations that are related to presented on next sections. the digital inputs PHASE, I0 and I1 and to the current sensed. These configurations are given in Table3-2. VLOAD VLOAD VLOAD Pa Pb Pa Pb Pa Pb L H H H H H OUTA OUTB OUTA OUTB OUTA OUTB L H L H L L Na Nb Na Nb Na Nb SENSE SENSE SENSE Rs Rs Rs a) b) c) FIGURE 3-1: Power bridge control (PHASE = H / forward): (a) bridge ON, (b) source OFF, and (c) all OFF / coasting (for PHASE = L / reverse: invert A and B in drawings) TABLE 3-1: CURRENT DIRECTION CONTROL Phase Output Current L Current flows from OUTxB to OUTxA H Current flows from OUTxA to OUTxB TABLE 3-2: POWER BRIDGE GATE CONTROL TRUTH TABLE I0I1 PHASE overi T Case/Mode gna gpa gnb gpb OFF 00/01/10 1 0 0 Forward ON L L H H 00/01/10 1 x 1 Forward OFF L H H H 00/01/10 0 0 0 Reverse ON H H L L 00/01/10 0 x 1 Reverse OFF H H L H 11 x x x No Current/ L H L H Coasting Legend: Bold = Active MOS Transistors, Overi = Overcurrent flag, T = Channel T State Flag OFF OFF DS22260A-page 8  2010 Microchip Technology Inc.

MTS62C19A 3.2 PWM Current Control The current level in each motor winding is controlled by a PWM circuit with a fixed T time. The load current OFF flowing in the winding is sensed through an external sensing resistor Rs connected between the power bridge's source pin SENSE (sources of transistors Na and Nb) and GND. VLOAD Power VREF Bridge Pa Pb One-Shot OUTA ÷10 Source Disable OUTB I0 Na Nb I1 COMPIN RC SENSE Rc Cc Ct Rt Rs FIGURE 3-2: PWM Current Control Circuit Principle (Channel 1 Shown) The voltage across Rs is compared to a fraction of the EQUATION 3-1: reference voltage VREF, chosen with the logic input V bits I0 and I1 (Table3-3). The power bridge and thus I  REF the load current can also be switched off completely MAX 10*R when both logic inputs are high. Note that any logic S input left unconnected will be treated as a high level (pull-up resistor). The maximum trip current for regulation, given for I0 I1 = 00 is calculated in Equation3-1. TABLE 3-3: CURRENT LEVEL CONTROL TRUTH TABLE I0 I1 Comp. Trip Voltage Output Current 0 0 Vtrip = 1/10*Vref Imax = Vref/10RS 1 0 Vtrip = 1/15*Vref 2/3*Imax = Vref/15RS 0 1 Vtrip = 1/30*Vref 1/3*Imax = Vref/30RS 1 1 x 0 (no current) When the maximum allowed current is reached, the bridge source is turned off during a fixed period T OFF (typically 50us) given by a non-retriggerable pulse gen- erator and the external timing components Rt (20k- 100k range) and Ct (100 pF-1000 pF range): toff = 1.1*(Rt*Ct) During T the winding current decreases. When the OFF driver is re-enabled, the winding current increases again until it reaches the threshold, and the cycle repeats itself maintaining the load current at the desired level.  2010 Microchip Technology Inc. DS22260A-page 9

MTS62C19A PHASE thshtd_en + Iout 0 - 1 I MAX 0 145°C 170°C td toff ton FIGURE 3-3: PWM Output Current FIGURE 3-4: Thermal Shutdown Output Waveform vs. Temperature Showing Hysteresis An undervoltage lockout circuit protects the 3.3 Circuit Protection MTS62C19A from potential shoot-through currents when the load supply voltage is applied prior to the A thermal protection circuitry turns off all drivers when logic supply voltage. The power bridge and all outputs the junction temperature exceeds a safe operating limit are disabled if VLOGIC is smaller than 4V. of 170°C (typ.). This protects the devices from failure due to excessive heating. Despite this thermal protec- With this protection feature, the circuit will withstand tion, output short circuits are not permitted. The output any order of turn-on or turn-off of the supply voltages drivers are re-enabled once junction temperature has VLOGIC and VLOAD. Normal dV/dt values are dropped below 145°C (typ.). assumed. DS22260A-page 10  2010 Microchip Technology Inc.

MTS62C19A 4.0 APPLICATION CIRCUITS & ISSUES 4.1 Typical Application The MTS62C19A circuit with external components for a typical application is shown in Figure4-1. Typical passive component values are: Rs = 1, Rc = 1k, Cc = 820pF, Rt = 56k and Ct = 820pF. 5V 10 to 30V 100nF 100nF 100uF VLOGIC VLOAD PHASE1 Shift Drivers I01 Logic OUT1A I11 Power Bridge OUT1B VREF1 Current Sense One-shot P Comparator u c / gi o Under-V Thermal L Lockout Shutdown PHASE2 Shift Drivers I02 Logic OUT2A I12 Power M Bridge OUT2B Current Sense VREF2 One-shot Comparator COMPIN1 COMPIN2 RC2 RC1 GND SENSE1 SENSE2 Rt Ct Ct Rt Rt Rt Rc Cc Rc Cc FIGURE 4-1: Typical Application Circuit During PWM operation, when the output stage is turned-on, large voltage peaks might appear across Rs, which can wrongly trigger the input comparator. To avoid an unstable current control, an external RcCc fil- ter should be used that delays the comparator action. Depending on load type many applications will not require this filter (SENSE connected to COMPIN).  2010 Microchip Technology Inc. DS22260A-page 11

MTS62C19A 4.2 Stepping Examples The MTS62C19A allows to control a motor in full-step, half-step, modified half-step and microstepping mode, as shown in Figure4-2. Full-Step Half-Step Modified Half-Step Micro-Stepping (1/8th) 1 2 3 4 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1... ...32 I01 I11 PHASE1 I02 I12 PHASE2 5V VREF1 0V 5V VREF2 5V 5V 5V 0V +500mA Motor Current 0 in Phase 1 -500mA +500mA Motor Current +167mA +333mA in Phase 2 -167mA 0 -333mA -500mA FIGURE 4-2: Examples of Stepping Modes Achievable with Typical Application Circuit 4.3 PCB Design Guidelines Unused inputs should be connected to fixed voltage levels in order to get the highest noise immunity. Typi- cal PCB layout guidelines for power application should be followed. These include separate power ground planes, supply decoupling capacitors close to the IC, short connections and use of maximized copper areas to improve thermal dissipation. DS22260A-page 12  2010 Microchip Technology Inc.

MTS62C19A 5.0 MECHANICAL DIMENSIONS SOP 24L Package Outline 24 13 E H ° 5 4 X 0 2 0 . 0 1 12 0.016 typ 0.5 typ D A 1 A L 0 1 0 0. GAUGE PLANE SEATING PLANE  Symbol Minimum Typical Maximum Unit A — — 2.642 (0.104) mm (inch) A1 0.102 (0.004) — — mm (inch) D 15.545 (0.612) 15.697 (0.618) 15.850 (0.624) mm (inch) E 7.417 (0.292) 7.518 (0.296) 7.595 (0.299) mm (inch) H 10.287 (0.405) 10.464 (0.412) 10.643 (0.419) mm (inch) L 0.533 (0.021) 0.787 (0.031) 1.041 (0.041) mm (inch) J 0 4 8 ° Note 1: JEDEC outline: M0-119 AA 2: Dimensions “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions and gate burrs should not exceed 0.25mm (0.010inch) per side. 3: Dimensions “E” does not include inter-lead flash, or protrusions. Inter-lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.  2010 Microchip Technology Inc. DS22260A-page 13

MTS62C19A NOTES: DS22260A-page 14  2010 Microchip Technology Inc.

MTS62C19A APPENDIX A: REVISION HISTORY Revision A (September 2010) • Original Release of this Document.  2010 Microchip Technology Inc. DS22260A-page 15

MTS62C19A NOTES: DS22260A-page 16  2010 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC, and may be superseded by updates. It is your responsibility to KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PIC32 logo, rfPIC and UNI/O are registered trademarks of MICROCHIP MAKES NO REPRESENTATIONS OR Microchip Technology Incorporated in the U.S.A. and other WARRANTIES OF ANY KIND WHETHER EXPRESS OR countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, INCLUDING BUT NOT LIMITED TO ITS CONDITION, MXDEV, MXLAB, SEEVAL and The Embedded Control QUALITY, PERFORMANCE, MERCHANTABILITY OR Solutions Company are registered trademarks of Microchip FITNESS FOR PURPOSE. Microchip disclaims all liability Technology Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, CodeGuard, devices in life support and/or safety applications is entirely at dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, the buyer’s risk, and the buyer agrees to defend, indemnify and ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial hold harmless Microchip from any and all damages, claims, Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified suits, or expenses resulting from such use. No licenses are logo, MPLIB, MPLINK, mTouch, Omniscient Code conveyed, implicitly or otherwise, under any Microchip Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, intellectual property rights. PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2010, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-60932-535-0 Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.  2010 Microchip Technology Inc. DS22260A-page 17

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