MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 D LowSupply-VoltageRange:1.8Vto3.6V D BootstrapLoader D UltralowPowerConsumption D On-ChipEmulationModule -- ActiveMode:350Aat1MHz,2.2V D FamilyMembersInclude -- StandbyMode:1.1A MSP430F47163:92KBFlash,4KBRAM -- OffMode(RAMRetention):0.2A 3Sigma-DeltaADCs D FivePower-SavingModes MSP430F47173:92KBFlash,8KBRAM D Wake-UpFromStandbyModeinLess 3Sigma-DeltaADCs Than6s MSP430F47183:116KBFlash,8KBRAM 3Sigma-DeltaADCs D 16-BitRISCArchitecture, MSP430F47193:120KBFlash,4KBRAM 62.5-nsInstructionCycleTime 3Sigma-DeltaADCs D Three-ChannelInternalDMA MSP430F47126:56KBFlash,4KBRAM D Three,SixorSeven16-BitSigma-Delta 6Sigma-DeltaADCs Analog-to-Digital(A/D)ConvertersWith MSP430F47166:92KBFlash,4KBRAM DifferentialPGAInputs 6Sigma-DeltaADCs D 16-BitTimer_BWithThree MSP430F47176:92KBFlash,8KBRAM Capture/Compare-With-ShadowRegisters 6Sigma-DeltaADCs MSP430F47186:116KBFlash,8KBRAM D 16-BitTimer_AWithThree 6Sigma-DeltaADCs Capture/CompareRegisters MSP430F47196:120KBFlash,4KBRAM D On-ChipComparator 6Sigma-DeltaADCs D FourUniversalSerialCommunication MSP430F47127:56KBFlash,4KBRAM Interface(USCI)Modules 7Sigma-DeltaADCs -- USCI_A0andUSCI_A1 MSP430F47167:92KBFlash,4KBRAM -- EnhancedUARTSupporting 7Sigma-DeltaADCs Auto-BaudrateDetection MSP430F47177:92KBFlash,8KBRAM -- IrDAEncoderandDecoder 7Sigma-DeltaADCs -- SynchronousSPI MSP430F47187:116KBFlash,8KBRAM -- USCI_B0andUSCI_B1 7Sigma-DeltaADCs -- I2C MSP430F47197:120KBFlash,4KBRAM -- SynchronousSPI 7Sigma-DeltaADCs D IntegratedLCDDriverWithContrast D Availableina100-PinPlasticQuad ControlforUpto160Segments Flatpack(QFP)Package D BasicTimerWithReal-TimeClockFeature D ForCompleteModuleDescriptions,Seethe D 32-BitHardwareMultiplier MSP430x4xxFamilyUser’sGuide, LiteratureNumberSLAU056 D BrownoutDetector D ForE-MeterReferenceDesignand D SupplyVoltageSupervisor/MonitorWith Software,SeeImplementationofa ProgrammableLevelDetection Three-PhaseElectronicWatt-HourMeter D SerialOnboardProgramming, usingtheMSP430F471xx,Literature NoExternalProgrammingVoltageNeeded NumberSLAA409 ProgrammableCodeProtectionbySecurity Fuse This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage.ESDdamagecanrange fromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemoresusceptibletodamage becauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications.Thesedeviceshavelimited built-inESDprotection. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTION DATA information is current as of publication date. Copyright2011,TexasInstrumentsIncorporated ProductsconformtospecificationsperthetermsofTexasInstruments standardwarranty.Productionprocessingdoesnotnecessarilyinclude testingofallparameters. POSTOFFICEBOX655303DALLAS,TEXAS75265 1

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 description TheTexasInstrumentsMSP430familyofultralow-powermicrocontrollersconsistsofseveraldevicesfeaturing differentsetsofperipheralstargetedforvariousapplications.Thearchitecture,combinedwithfivelow-power modes,isoptimizedtoachieveextendedbatterylifeinportablemeasurementapplications.Thedevicesfeature a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency.Thedigitallycontrolledoscillator(DCO)allowswake-upfromlow-powermodestoactivemodeinless than6s. The MSP430F471xx series are microcontroller configurations targeted to single-phase and poly-phase electricitymeterswiththree,six,orseven16-bitsigma-deltaA/Dconverters.Eachchannelhasadifferential input pair and programmable input gain. Also integrated are two 16-bit timers, four universal serial communicationinterfaces(USCI),DMA,68I/Opins,andaliquidcrystaldriver(LCD)withintegratedcontrast control. AVAILABLEOPTIONS{ PACKAGEDDEVICES} TTA PLASTIC100-PINQFP(PZ) MSP430F47127IPZ MSP430F47167IPZ MSP430F47177IPZ MSP430F47187IPZ MSP430F47197IPZ MSP430F47126IPZ MSP430F47166IPZ --40Cto85C MSP430F47176IPZ MSP430F47186IPZ MSP430F47196IPZ MSP430F47163IPZ MSP430F47173IPZ MSP430F47183IPZ MSP430F47193IPZ †For the most current package and ordering information, see the PackageOptionAddendumattheendofthisdocument,orseethe TIwebsiteatwww.ti.com. ‡Packagedrawings,thermaldata,andsymbolizationareavailableat www.ti.com/packaging. DEVELOPMENT TOOL SUPPORT AllMSP430 microcontrollers include an Embedded Emulation Module (EEM) allowing advanced debugging and programming through easy to use development tools. Recommended hardware options include the following: D DebuggingandProgrammingInterface -- MSP-FET430UIF(USB) -- MSP-FET430PIF(ParallelPort) D DebuggingandProgrammingInterfacewithTargetBoard -- MSP-FET430U100 D Stand-AloneTargetBoard -- MSP-TS430PZ100 D ProductionProgrammer -- MSP-GANG430 2 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 functional block diagram, MSP430F471x7 XIN XOUT P3.x/P4.x P7.x/P8.x DVCC1/2 DVSS1/2 AVCC AVSS P1.x/P2.x XT2IN XT2OUT P5.x P9.x/P10.x 2 2 2x8 3x8 3x8+1x4 PortsP1/P2 Ports Ports Oscillators ACLK Flash RAM SD16_A P3/P4 P7/P8 120kB 4kB (w/oBUF) 2x8I/O P5 P9/P10 FLL+ SMCLK 116kB 8kB 7 Comparator Interrupt Sigma-- _A 92kB 4kB DeltaA/D capability& 3x8I/Owith 4x8/2x16I/O MCLK 92kB 8kB Converter pull--up/down pull--up/down pull--up/down 56kB 4kB Resistors Resistors Resistors 16MHz MAB DMA CPU Controller incl.16 Registers MDB 3Channels EEM (L:8+2) HMaurldtiwplaierer Timer_B3 LCD_A USCI_A0 USCI_A1 Brownout (32x32) Watchdog Timer_A3 BasicTimer (UART/LIN, (UART/LIN, JTAG Protection MPY, WDT+ 3CC & 160 IrDA,SPI) IrDA,SPI) Interface 3CC Registers, Real--Time SVS/SVM MPYS, 15/16--Bit Registers Shadow Clock Segments USCI_B0 USCI_B1 MAC, Reg 1,2,3,4Mux (SPI,I2C) (SPI,I2C) MACS RST/NMI functional block diagram, MSP430F471x6 XIN XOUT P3.x/P4.x P7.x/P8.x DVCC1/2 DVSS1/2 AVCC AVSS P1.x/P2.x XT2IN XT2OUT P5.x P9.x/P10.x 2 2 2x8 3x8 3x8+1x4 PortsP1/P2 Ports Ports Oscillators ACLK FFllaasshh RRAAMM SD16_A P3/P4 P7/P8 120kB 4kB (w/oBUF) 2x8I/O P5 P9/P10 FLL+ SMCLK 111260kkBB 84kkBB 6 Comparator Interrupt 116kB 8kB Sigma-- _A 9922kkBB 44kkBB DeltaA/D capability& 3x8I/Owith 4x8/2x16I/O MCLK 9922kkBB 88kkBB Converter pull--up/down pull--up/down pull--up/down 56kB 4kB Resistors Resistors Resistors 16MHz MAB DMA CPU Controller incl.16 Registers MDB 3Channels EEM (L:8+2) HMaurldtiwplaierer Timer_B3 LCD_A USCI_A0 USCI_A1 Brownout (32x32) Watchdog Timer_A3 BasicTimer (UART/LIN, (UART/LIN, JTAG Protection MPY, WDT+ 3CC & 160 IrDA,SPI) IrDA,SPI) Interface 3CC Registers, Real--Time SVS/SVM MPYS, 15/16--Bit Registers Shadow Clock Segments USCI_B0 USCI_B1 MAC, Reg 1,2,3,4Mux (SPI,I2C) (SPI,I2C) MACS RST/NMI POSTOFFICEBOX655303DALLAS,TEXAS75265 3

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 functional block diagram, MSP430F471x3 XIN XOUT P3.x/P4.x P7.x/P8.x DVCC1/2 DVSS1/2 AVCC AVSS P1.x/P2.x XT2IN XT2OUT P5.x P9.x/P10.x 2 2 2x8 3x8 3x8+1x4 PortsP1/P2 Ports Ports Oscillators ACLK Flash RAM SD16_A P3/P4 P7/P8 (w/oBUF) 2x8I/O P5 P9/P10 FLL+ SMCLK 120kB 4kB 3 Comparator Interrupt 116kB 8kB Sigma-- _A capability& 3x8I/Owith 4x8/2x16I/O 92kB 4kB DeltaA/D MCLK 92kB 8kB Converter pull--up/down pull--up/down pull--up/down Resistors Resistors Resistors 16MHz MAB DMA CPU Controller incl.16 Registers MDB 3Channels EEM (L:8+2) HMaurldtiwplaierer Timer_B3 LCD_A USCI_A0 USCI_A1 Brownout (32x32) Watchdog Timer_A3 BasicTimer (UART/LIN, (UART/LIN, JTAG Protection MPY, WDT+ 3CC & 160 IrDA,SPI) IrDA,SPI) Interface 3CC Registers, Real--Time SVS/SVM MPYS, 15/16--Bit Registers Shadow Clock Segments USCI_B0 USCI_B1 MAC, Reg 1,2,3,4Mux (SPI,I2C) (SPI,I2C) MACS RST/NMI 4 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 pin designation, MSP430F471x7IPZ PZPACKAGE OMI A L O MI (TOPUTVIEW) 1SIM1SO1CLKB1SD B1SC1STE0SIM 0SO OK AAAC CAA A MCLK UTH/SVSLK/SMCLLK/ACLK1TXD/UC1RXD/UC1STE/UC1SIMO/U 1SOMI/U1CLK/UC0TXD/UC 0RXD/UC ST/NMI CKMSDI/TCLKDO/TDIVSS1 T2INT2OUTVCC11.0/TA01.1/TA0/1.2/TA11.3/TBO1.4/TBC1.5/TAC1.6/UCA1.7/UCA2.0/UCB2.1/UCB 2.2/UCB2.3/UCB2.4/UCA 2.5/UCA2.6/CA0 2.7/CA1 R TTTTD XXDPPPPPPPPPP PPP PP P 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 0 9 9 9 9 9 9 9 9 9 9 8 8 8 8 8 8 8 8 8 8 7 7 7 7 1 A0.0+† 1 75 P3.0/UCB0STE/UCA0CLK A0.0--† 2 74 P3.1/UCB0SIMO/UCB0SDA A1.0+† 3 73 P3.2/UCB0SOMI/UCB0SCL A1.0--† 4 72 P3.3/UCB0CLK/UCA0STE A2.0+† 5 71 P3.4/TA2/S39 A2.0--† 6 70 P3.5/TB0/S38 AVSS 7 69 P3.6/TB1/S37 AVCC 8 68 P3.7/TB2/S36 VREF 9 67 DVSS2 A3.0+† 10 66 XOUT A3.0--† 11 65 XIN A4.0+† 12 64 DVCC2 A4.0--† 13 63 LCDCAP/R33 A5.0+† 14 MSP430F471x7IPZ 62 P5.7/R23 A5.0--† 15 61 P5.6/LCDREF/R13 A6.0+† 16 60 P5.5/R03 A6.0--† 17 59 P5.4/COM3 AVSS 18 58 P5.3/COM2 P10.3/S0 19 57 P5.2/COM1 P10.2/S1 20 56 P5.1/COM0 P10.1/S2 21 55 P5.0/SVSIN P10.0/S3 22 54 P4.0/CAOUT/S35 P9.7/S4 23 53 P4.1/DMAE0/S34 P9.6/S5 24 52 P4.2/S33 P9.5/S6 25 51 P4.3/S32 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 2 2 2 2 3 3 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 5 789012 3456 789012345678901 SSS111 1111 111222222222233 P9.4/P9.3/P9.2/9.1/S9.0/S8.7/S 8.6/S8.5/S8.4/S8.3/S 8.2/S8.1/S8.0/S7.7/S7.6/S7.5/S7.4/S7.3/S7.2/S7.1/S7.0/S4.7/S4.6/S4.5/S4.4/S PPP PPPP PPPPPPPPPPPPPPP †Itisrecommendedtoshortunusedanaloginputpairsandconnectthemtoanalogground(AVSS). POSTOFFICEBOX655303DALLAS,TEXAS75265 5

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 pin designation, MSP430F471x6IPZ PZPACKAGE OMI A L O MI (TOPUTVIEW) 1SIM1SO1CLKB1SD B1SC1STE0SIM 0SO OK AAAC CAA A MCLK UTH/SVSLK/SMCLLK/ACLK1TXD/UC1RXD/UC1STE/UC1SIMO/U 1SOMI/U1CLK/UC0TXD/UC 0RXD/UC ST/NMI CKMSDI/TCLKDO/TDIVSS1 T2INT2OUTVCC11.0/TA01.1/TA0/1.2/TA11.3/TBO1.4/TBC1.5/TAC1.6/UCA1.7/UCA2.0/UCB2.1/UCB 2.2/UCB2.3/UCB2.4/UCA 2.5/UCA2.6/CA0 2.7/CA1 R TTTTD XXDPPPPPPPPPP PPP PP P 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 0 9 9 9 9 9 9 9 9 9 9 8 8 8 8 8 8 8 8 8 8 7 7 7 7 1 A0.0+† 1 75 P3.0/UCB0STE/UCA0CLK A0.0--† 2 74 P3.1/UCB0SIMO/UCB0SDA A1.0+† 3 73 P3.2/UCB0SOMI/UCB0SCL A1.0--† 4 72 P3.3/UCB0CLK/UCA0STE A2.0+† 5 71 P3.4/TA2/S39 A2.0--† 6 70 P3.5/TB0/S38 AVSS 7 69 P3.6/TB1/S37 AVCC 8 68 P3.7/TB2/S36 VREF 9 67 DVSS2 A3.0+† 10 66 XOUT A3.0--† 11 65 XIN A4.0+† 12 64 DVCC2 A4.0--† 13 63 LCDCAP/R33 A5.0+† 14 MSP430F471x6IPZ 62 P5.7/R23 A5.0--† 15 61 P5.6/LCDREF/R13 NC‡ 16 60 P5.5/R03 NC‡ 17 59 P5.4/COM3 AVSS 18 58 P5.3/COM2 P10.3/S0 19 57 P5.2/COM1 P10.2/S1 20 56 P5.1/COM0 P10.1/S2 21 55 P5.0/SVSIN P10.0/S3 22 54 P4.0/CAOUT/S35 P9.7/S4 23 53 P4.1/DMAE0/S34 P9.6/S5 24 52 P4.2/S33 P9.5/S6 25 51 P4.3/S32 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 2 2 2 2 3 3 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 5 789012 3456 789012345678901 SSS111 1111 111222222222233 P9.4/P9.3/P9.2/9.1/S9.0/S8.7/S 8.6/S8.5/S8.4/S8.3/S 8.2/S8.1/S8.0/S7.7/S7.6/S7.5/S7.4/S7.3/S7.2/S7.1/S7.0/S4.7/S4.6/S4.5/S4.4/S PPP PPPP PPPPPPPPPPPPPPP †Itisrecommendedtoshortunusedanaloginputpairsandconnectthemtoanalogground(AVSS). ‡Connectpintoanalogground(AVSS). 6 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 pin designation, MSP430F471x3IPZ PZPACKAGE OMI A L O MI (TOPUTVIEW) 1SIM1SO1CLKB1SD B1SC1STE0SIM 0SO OK AAAC CAA A MCLK UTH/SVSLK/SMCLLK/ACLK1TXD/UC1RXD/UC1STE/UC1SIMO/U 1SOMI/U1CLK/UC0TXD/UC 0RXD/UC ST/NMI CKMSDI/TCLKDO/TDIVSS1 T2INT2OUTVCC11.0/TA01.1/TA0/1.2/TA11.3/TBO1.4/TBC1.5/TAC1.6/UCA1.7/UCA2.0/UCB2.1/UCB 2.2/UCB2.3/UCB2.4/UCA 2.5/UCA2.6/CA0 2.7/CA1 R TTTTD XXDPPPPPPPPPP PPP PP P 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 0 9 9 9 9 9 9 9 9 9 9 8 8 8 8 8 8 8 8 8 8 7 7 7 7 1 A0.0+† 1 75 P3.0/UCB0STE/UCA0CLK A0.0--† 2 74 P3.1/UCB0SIMO/UCB0SDA A1.0+† 3 73 P3.2/UCB0SOMI/UCB0SCL A1.0--† 4 72 P3.3/UCB0CLK/UCA0STE A2.0+† 5 71 P3.4/TA2/S39 A2.0--† 6 70 P3.5/TB0/S38 AVSS 7 69 P3.6/TB1/S37 AVCC 8 68 P3.7/TB2/S36 VREF 9 67 DVSS2 NC‡ 10 66 XOUT NC‡ 11 65 XIN NC‡ 12 64 DVCC2 NC‡ 13 63 LCDCAP/R33 NC‡ 14 MSP430F471x3IPZ 62 P5.7/R23 NC‡ 15 61 P5.6/LCDREF/R13 NC‡ 16 60 P5.5/R03 NC‡ 17 59 P5.4/COM3 AVSS 18 58 P5.3/COM2 P10.3/S0 19 57 P5.2/COM1 P10.2/S1 20 56 P5.1/COM0 P10.1/S2 21 55 P5.0/SVSIN P10.0/S3 22 54 P4.0/CAOUT/S35 P9.7/S4 23 53 P4.1/DMAE0/S34 P9.6/S5 24 52 P4.2/S33 P9.5/S6 25 51 P4.3/S32 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 2 2 2 2 3 3 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 5 789012 3456 789012345678901 SSS111 1111 111222222222233 P9.4/P9.3/P9.2/9.1/S9.0/S8.7/S 8.6/S8.5/S8.4/S8.3/S 8.2/S8.1/S8.0/S7.7/S7.6/S7.5/S7.4/S7.3/S7.2/S7.1/S7.0/S4.7/S4.6/S4.5/S4.4/S PPP PPPP PPPPPPPPPPPPPPP †Itisrecommendedtoshortunusedanaloginputpairsandconnectthemtoanalogground(AVSS). ‡Connectpintoanalogground(AVSS). POSTOFFICEBOX655303DALLAS,TEXAS75265 7

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 Terminal Functions TERMINAL II//OO DDEESSCCRRIIPPTTIIOONN NAME NO. A0.0+ 1 I SD16_ApositiveanaloginputA0.0(seeNote1) A0.0-- 2 I SD16_AnegativeanaloginputA0.0(seeNote1) A1.0+ 3 I SD16_ApositiveanaloginputA1.0(seeNote1) A1.0-- 4 I SD16_AnegativeanaloginputA1.0(seeNote1) A2.0+ 5 I SD16_ApositiveanaloginputA2.0(seeNote1) A2.0-- 6 I SD16_AnegativeanaloginputA2.0(seeNote1) AVSS 7 Analogsupplyvoltage,negativeterminal. AVCC 8 Analogsupplyvoltage,positiveterminal.MustnotpoweruppriortoDVCC1/DVCC2. Inputforanexternalreferencevoltage/ VREF 9 I/O internalreferencevoltageoutput(canbeusedasmid-voltage) A3.0+ SD16_ApositiveanaloginputA3.0(seeNote1)-- 10 I (MSP430F471x6/7only) NotconnectedinMSP430F471x3,connectpintoanalogground(AVSS). A3.0-- SD16_AnegativeanaloginputA3.0(seeNote1)-- 11 I (MSP430F471x6/7only) NotconnectedinMSP430F471x3,connectpintoanalogground(AVSS). A4.0+ SD16_ApositiveanaloginputA4.0(seeNote1)-- 12 I (MSP430F471x6/7only) NotconnectedinMSP430F471x3,connectpintoanalogground(AVSS). A4.0-- SD16_AnegativeanaloginputA4.0(seeNote1)-- 13 I (MSP430F471x6/7only) NotconnectedinMSP430F471x3,connectpintoanalogground(AVSS). A5.0+ SD16_ApositiveanaloginputA5.0(seeNote1)-- 14 I (MSP430F471x6/7only) NotconnectedinMSP430F471x3,connectpintoanalogground(AVSS). A5.0-- SD16_AnegativeanaloginputA5.0(seeNote1)-- 15 I (MSP430F471x6/7only) NotconnectedinMSP430F471x3,connectpintoanalogground(AVSS). A6.0+ SD16_ApositiveanaloginputA6.0(seeNote1)-- 16 I (MSP430F471x7only) NotconnectedinMSP430F471x6,connectpintoanalogground(AVSS). A6.0-- SD16_AnegativeanaloginputA6.0(seeNote1)-- 17 I (MSP430F471x7only) NotconnectedinMSP430F471x6,connectpintoanalogground(AVSS). AVSS 18 Analogsupplyvoltage,negativeterminal. P10.3/S0 19 I/O General-purposedigitalI/O/LCDsegmentoutput0 P10.2/S1 20 I/O General-purposedigitalI/O/LCDsegmentoutput1 P10.1/S2 21 I/O General-purposedigitalI/O/LCDsegmentoutput2 P10.0/S3 22 I/O General-purposedigitalI/O/LCDsegmentoutput3 P9.7/S4 23 I/O General-purposedigitalI/O/LCDsegmentoutput4 P9.6/S5 24 I/O General-purposedigitalI/O/LCDsegmentoutput5 P9.5/S6 25 I/O General-purposedigitalI/O/LCDsegmentoutput6 P9.4/S7 26 I/O General-purposedigitalI/O/LCDsegmentoutput7 P9.3/S8 27 I/O General-purposedigitalI/O/LCDsegmentoutput8 P9.2/S9 28 I/O General-purposedigitalI/O/LCDsegmentoutput9 P9.1/S10 29 I/O General-purposedigitalI/O/LCDsegmentoutput10 P9.0/S11 30 I/O General-purposedigitalI/O/LCDsegmentoutput11 P8.7/S12 31 I/O General-purposedigitalI/O/LCDsegmentoutput12 P8.6/S13 32 I/O General-purposedigitalI/O/LCDsegmentoutput13 P8.5/S14 33 I/O General-purposedigitalI/O/LCDsegmentoutput14 P8.4/S15 34 I/O General-purposedigitalI/O/LCDsegmentoutput15 P8.3/S16 35 I/O General-purposedigitalI/O/LCDsegmentoutput16 P8.2/S17 36 I/O General-purposedigitalI/O/LCDsegmentoutput17 P8.1/S18 37 I/O General-purposedigitalI/O/LCDsegmentoutput18 NOTES: 1. Itisrecommendedtoshortunusedanaloginputpairsandconnectthemtoanalogground. 8 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 Terminal Functions (continued) TERMINAL II//OO DDEESSCCRRIIPPTTIIOONN NAME NO. P8.0/S19 38 I/O General-purposedigitalI/O/LCDsegmentoutput19 P7.7/S20 39 I/O General-purposedigitalI/O/LCDsegmentoutput20 P7.6/S21 40 I/O General-purposedigitalI/O/LCDsegmentoutput21 P7.5/S22 41 I/O General-purposedigitalI/O/LCDsegmentoutput22 P7.4/S23 42 I/O General-purposedigitalI/O/LCDsegmentoutput23 P7.3/S24 43 I/O General-purposedigitalI/O/LCDsegmentoutput24 P7.2/S25 44 I/O General-purposedigitalI/O/LCDsegmentoutput25 P7.1/S26 45 I/O General-purposedigitalI/O/LCDsegmentoutput26 P7.0/S27 46 I/O General-purposedigitalI/O/LCDsegmentoutput27 P4.7/S28 47 I/O General-purposedigitalI/O/LCDsegmentoutput28 P4.6/S29 48 I/O General-purposedigitalI/O/LCDsegmentoutput29 P4.5/S30 49 I/O General-purposedigitalI/O/LCDsegmentoutput30 P4.4/S31 50 I/O General-purposedigitalI/O/LCDsegmentoutput31 P4.3/S32 51 I/O General-purposedigitalI/O/LCDsegmentoutput32 P4.2/S33 52 I/O General-purposedigitalI/O/LCDsegmentoutput33 P4.1/DMAE0/S34 53 I/O General-purposedigitalI/O/DMAChannel0externaltrigger/LCDsegmentoutput34 P4.0/CAOUT/S35 54 I/O General-purposedigitalI/O/Comparator_Aoutput/LCDsegmentoutput35 P5.0/SVSIN 55 I/O General-purposedigitalI/O/analoginputtosupplyvoltagesupervisor P5.1/COM0 56 I/O General-purposedigitalI/O/commonoutput,COM0--3areusedforLCDbackplanes. P5.2/COM1 57 I/O General-purposedigitalI/O/commonoutput,COM0--3areusedforLCDbackplanes. P5.3/COM2 58 I/O General-purposedigitalI/O/commonoutput,COM0--3areusedforLCDbackplanes. P5.4/COM3 59 I/O General-purposedigitalI/O/commonoutput,COM0--3areusedforLCDbackplanes. P5.5/R03 60 I/O General-purposedigitalI/O/InputportoflowestanalogLCDlevel(V5) General-purposedigitalI/O/ExternalreferencevoltageinputforregulatedLCDvoltage/Inputport P5.6/LCDREF/R13 61 I/O ofthirdmostpositiveanalogLCDlevel(V4orV3) P5.7/R23 62 I/O General-purposedigitalI/O/InputportofsecondmostpositiveanalogLCDlevel(V2) LCDCAP/R33 63 I LCDCapacitorconnection/Input/outputportofmostpositiveanalogLCDlevel(V1) DVCC2 64 Digitalsupplyvoltage,positiveterminal. XIN 65 I InputportforcrystaloscillatorXT1.Standardorwatchcrystalscanbeconnected. XOUT 66 O OutputterminalofcrystaloscillatorXT1 DVSS2 67 Digitalsupplyvoltage,negativeterminal. General-purposedigitalI/O/Timer_B3CCR2.Capture:CCI2A/CCI2Binput,compare:Out2output P3.7/TB2/S36 68 I/O /LCDsegmentoutput36 General-purposedigitalI/O/Timer_B3CCR1.Capture:CCI1A/CCI1Binput,compare:Out1output P3.6/TB1/S37 69 I/O /LCDsegmentoutput37 General-purposedigitalI/O/Timer_B3CCR0.Capture:CCI0A/CCI0Binput,compare:Out0output P3.5/TB0/S38 70 I/O /LCDsegmentoutput38 General-purposedigitalI/O/Timer_ACapture:CCI2Ainput,compare:Out2output P3.4/TA2/S39 71 I/O /LCDsegmentoutput39 P3.3/ General-purposedigitalI/O/ 72 I/O UCB0CLK/UCA0STE USCI_B0clockinput/output/USCI_A0slavetransmitenable P3.2/ General-purposedigitalI/O/ 73 I/O UCB0SOMI/UCB0SCL USCI_B0slaveout/masterininSPImode,SCLI2CclockinI2Cmode P3.1/ General-purposedigitalI/O/ 74 I/O UCB0SIMO/UCB0SDA USCI_B0slavein/masteroutinSPImode,SDAI2CdatainI2Cmode POSTOFFICEBOX655303DALLAS,TEXAS75265 9

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 Terminal Functions (continued) TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION P3.0/ General-purposedigitalI/O/ 75 I/O UCB0STE/UCA0CLK USCI_B0slavetransmitenable/USCI_A0clockinput/output P2.7/CA1 76 I/O General-purposedigitalI/O/Comparator_Ainput P2.6/CA0 77 I/O General-purposedigitalI/O/Comparator_Ainput P2.5/ General-purposedigitalI/O/USCI_A0receivedatainputinUARTmode,slaveout/masterininSPI 78 I/O UCA0RXD/UCA0SOMI mode P2.4/ General-purposedigitalI/O/USCI_A0transmitdataoutputinUARTmode,slavein/masteroutin 79 I/O UCA0TXD/UCA0SIMO SPImode P2.3/ General-purposedigitalI/O/ 80 I/O UCB1CLK/UCA1STE USCI_B1clockinput/output/USCI_A1slavetransmitenable P2.2/ General-purposedigitalI/O/ 81 I/O UCB1SOMI/UCB1SCL USCI_B1slaveout/masterininSPImode,SCLI2CclockinI2Cmode P2.1/ General-purposedigitalI/O/ 82 I/O UCB1SIMO/UCB1SDA USCI_B1slavein/masteroutinSPImode,SDAI2CdatainI2Cmode P2.0/ General-purposedigitalI/O/ 83 I/O UCB1STE/UCA1CLK USCI_B1slavetransmitenable/USCI_A1clockinput/output P1.7/ General-purposedigitalI/O/ 84 I/O UCA1RXD/UCA1SOMI USCI_A1receivedatainputinUARTmode,slaveout/masterininSPImode P1.6/ General-purposedigitalI/O/ 85 I/O UCA1TXD/UCA1SIMO USCI_A1transmitdataoutputinUARTmode,slavein/masteroutinSPImode General-purposedigitalI/O/Timer_A,clocksignalTACLKinput/ P1.5/TACLK/ACLK 86 I/O ACLKoutput(dividedby1,2,4,or8) General-purposedigitalI/O/inputclockTBCLK—Timer_B3/ P1.4/TBCLK/SMCLK 87 I/O submainsystemclockSMCLKoutput General-purposedigitalI/O/switchallPWMdigitaloutputportstohighimpedance—Timer_B3TB0 P1.3/TBOUTH/SVSOUT 88 I/O toTB2/SVS:outputofSVScomparator P1.2/TA1 89 I/O General-purposedigitalI/O/Timer_A,Capture:CCI1Ainput,compare:Out1output General-purposedigitalI/O/Timer_A.Capture:CCI0Binput/MCLKoutput. P1.1/TA0/MCLK 90 I/O Note:TA0isonlyaninputonthispin/BSLreceive P1.0/TA0 91 I/O General-purposedigitalI/O/Timer_A.Capture:CCI0Ainput,compare:Out0output/BSLtransmit DVCC1 92 Digitalsupplyvoltage,positiveterminal. XT2OUT 93 O OutputterminalofcrystaloscillatorXT2 XT2IN 94 I InputportforcrystaloscillatorXT2.Onlystandardcrystalscanbeconnected. DVSS1 95 Digitalsupplyvoltage,negativeterminal. TDO/TDI 96 I/O Testdataoutputport.TDO/TDIdataoutputorprogrammingdatainputterminal TDI/TCLK 97 I Testdatainputortestclockinput.ThedeviceprotectionfuseisconnectedtoTDI/TCLK. TMS 98 I Testmodeselect.TMSisusedasaninputportfordeviceprogrammingandtest. TCK 99 I Testclock.TCKistheclockinputportfordeviceprogrammingandtest. RST/NMI 100 I Resetinputornonmaskableinterruptinputport 10 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 short-form description CPU TheMSP430CPUhasa16-bitRISCarchitecture ProgramCounter PC/R0 that is highly transparent to the application. All operations,otherthanprogram-flowinstructions, StackPointer SP/R1 are performed as register operations in StatusRegister SR/CG1/R2 conjunction with seven addressing modes for source operand and four addressing modes for ConstantGenerator CG2/R3 destinationoperand. General-PurposeRegister R4 The CPU is integrated with 16 registers that provide reduced instruction execution time. The General-PurposeRegister R5 register-to-register operation execution time is onecycleoftheCPUclock. General-PurposeRegister R6 Fouroftheregisters,R0toR3,arededicatedas General-PurposeRegister R7 program counter, stack pointer, status register, and constant generator, respectively. The General-PurposeRegister R8 remaining registers are general-purpose registers. General-PurposeRegister R9 PeripheralsareconnectedtotheCPUusingdata, General-PurposeRegister R10 address, and control buses and can be handled withallinstructions. General-PurposeRegister R11 instructionset General-PurposeRegister R12 Theinstructionsetconsistsof51instructionswith three formats and seven address modes. Each General-PurposeRegister R13 instruction can operate on word and byte data. Table1 shows examples of the three types of General-PurposeRegister R14 instruction formats; Table2 shows the address General-PurposeRegister R15 modes. Table1.InstructionWordFormats Dualoperands,source-destination e.g.,ADD R4,R5 R4+R5------>R5 Singleoperands,destinationonly e.g.,CALL R8 PC---->(TOS),R8---->PC Relativejump,un/conditional e.g.,JNE Jump-on-equalbit=0 Table2.AddressModeDescriptions ADDRESSMODE S D SYNTAX EXAMPLE OPERATION D D Register MOVRs,Rd MOVR10,R11 R10 ---->R11 D D Indexed MOVX(Rn),Y(Rm) MOV2(R5),6(R6) M(2+R5)---->M(6+R6) D D Symbolic(PCrelative) MOVEDE,TONI M(EDE)---->M(TONI) D D Absolute MOV&MEM,&TCDAT M(MEM)---->M(TCDAT) D Indirect MOV@Rn,Y(Rm) MOV@R10,Tab(R6) M(R10)---->M(Tab+R6) Indirect D M(R10)---->R11 MOV@Rn+,Rm MOV@R10+,R11 autoincrement R10+2---->R10 D Immediate MOV#X,TONI MOV#45,TONI #45 ---->M(TONI) NOTE: S=source,D=destination POSTOFFICEBOX655303DALLAS,TEXAS75265 11

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 operatingmodes TheMSP430hasoneactivemodeandfivesoftware-selectablelow-powermodesofoperation.Aninterrupt eventcanwakeupthedevicefromanyofthefivelow-powermodes,servicetherequest,andrestorebackto thelow-powermodeonreturnfromtheinterruptprogram. Thefollowingsixoperatingmodescanbeconfiguredbysoftware: D ActivemodeAM -- Allclocksareactive D Low-powermode0(LPM0) -- CPUisdisabled -- ACLKandSMCLKremainactive.MCLKisdisabled. -- FLL+loopcontrolremainsactive D Low-powermode1(LPM1) -- CPUisdisabled -- FLL+loopcontrolisdisabled -- ACLKandSMCLKremainactive.MCLKisdisabled. D Low-powermode2(LPM2) -- CPUisdisabled -- MCLKandFLL+loopcontrolandDCOCLKaredisabled -- DCO’sdcgeneratorremainsenabled -- ACLKremainsactive D Low-powermode3(LPM3) -- CPUisdisabled -- MCLK,FLL+loopcontrol,andDCOCLKaredisabled -- DCO’sdcgeneratorisdisabled -- ACLKremainsactive D Low-powermode4(LPM4) -- CPUisdisabled -- ACLKisdisabled -- MCLK,FLL+loopcontrol,andDCOCLKaredisabled -- DCO’sdcgeneratorisdisabled -- Crystaloscillatorisstopped 12 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 interruptvectoraddresses Theinterruptvectorsandthepower-upstartingaddressarelocatedintheaddressrange0FFFFhto0FFC0h. Thevectorcontainsthe16-bitaddressoftheappropriateinterrupt-handlerinstructionsequence.Ifthereset vector(at0FFFEh)contains0FFFFh(e.g.,flashisnotprogrammed)theCPUentersLPM4afterpower-up. WORD INTERRUPTSOURCE INTERRUPTFLAG SYSTEMINTERRUPT PRIORITY ADDRESS Power-Up PORIFG Reset 0FFFEh 31,highest ExternalReset RSTIFG Watchdog WDTIFG FlashMemory KEYV PCOut-of-Range(seeNote4) (seeNote1) NMI NMIIFG(seeNotes1and3) (Non)maskable OscillatorFault OFIFG(seeNotes1and3) (Non)maskable 0FFFCh 30 FlashMemoryAccessViolation ACCVIFG(seeNotes1and3) (Non)maskable Timer_B3 TBCCR0CCIFG(seeNote2) Maskable 0FFFAh 29 TBCCR1toTBCCR2CCIFGs Timer_B3 Maskable 0FFF8h 28 TBIFG(seeNotes1and2) Comparator_A CAIFG Maskable 0FFF6h 27 WatchdogTimer WDTIFG Maskable 0FFF4h 26 USCI_A0/B0Receive UCA0RXIFG,UCB0RXIFG Maskable 0FFF2h 25 USCI_B0I2CStatus (seeNotes1and5) USCI_A0/B0Transmit UCA0TXIFG,UCB0TXIFG Maskable 0FFF0h 24 USCI_B0I2CReceive/Transmit (seeNotes1and6) SD16_A SD16CCTLxSD16OVIFG,SD16CCTLxSD16IFG Maskable 0FFEEh 23 (seeNotes1and2) Timer_A3 TACCR0CCIFG(seeNote2) Maskable 0FFECh 22 TACCR1andTACCR2CCIFGs, Timer_A3 Maskable 0FFEAh 21 TAIFG(seeNotes1and2) I/OPortP1(EightFlags) P1IFG.0toP1IFG.7(seeNotes1and2) Maskable 0FFE8h 20 USCI_A1/B1Receive UCA1RXIFG,UCB1RXIFG Maskable 0FFE6h 19 USCI_B1I2CStatus (seeNotes1and5) USCI_A1/B1Transmit UCA1TXIFG,UCB1TXIFG Maskable 0FFE4h 18 USCI_B1I2CReceive/Transmit (seeNotes1and6) I/OPortP2(EightFlags) P2IFG.0toP2IFG.7(seeNotes1and2) Maskable 0FFE2h 17 BasicTimer1/RTC BTIFG Maskable 0FFE0h 16 DMA DMA0IFG,DMA1IFG,DMA2IFG Maskable 0FFDEh 15 (seeNotes1and2) 0FFDChto 14to RReesseerrvveedd RReesseerrvveedd((sseeeeNNoottee88)) 0FFC0h 0,lowest NOTES: 1. Multiplesourceflags 2. Interruptflagsarelocatedinthemodule. 3. (Non)maskable:theindividualinterrupt-enablebitcandisableaninterruptevent,butthegeneral-interruptenablecannotdisable it. 4. AresetisgeneratediftheCPUtriestofetchinstructionsfromwithinthemoduleregistermemoryaddressrange(0hto01FFh)or fromwithinunusedaddressranges. 5. USCI_BinSPImode:UCBxRXIFG.USCI_BinI2Cmode:UCALIFG,UCNACKIFG,ICSTTIFG,UCSTPIFG 6. USCI_BinSPImode:UCBxTXIFG.USCI_BinI2Cmode:UCBxRXIFG,UCBxTXIFG 7. Theaddress0x0FFBEisusedasbootstraploadersecuritykey(BSLSKEY). A0x0AA55atthislocationdisablestheBSLcompletely. Azerodisablestheerasureoftheflashifaninvalidpasswordissupplied. 8. Theinterruptvectorsataddresses0FFDChto0FFC0harenotusedinthisdeviceandcanbeusedforregularprogramcodeif necessary. POSTOFFICEBOX655303DALLAS,TEXAS75265 13

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 special function registers TheMSP430specialfunctionregisters(SFR)arelocatedinthelowestaddressspaceandareorganizedas bytemoderegisters.SFRsshouldbeaccessedwithbyteinstructions. interruptenable1and2 Address 7 6 5 4 3 2 1 0 00h ACCVIE NMIIE OFIE WDTIE rw--0 rw--0 rw--0 rw--0 WDTIE Watchdogtimerinterruptenable.Inactiveifwatchdogmodeisselected.Activeifwatchdog timerisconfiguredinintervaltimermode. OFIE Oscillatorfaultenable NMIIE (Non)maskableinterruptenable ACCVIE Flashaccessviolationinterruptenable Address 7 6 5 4 3 2 1 0 01h BTIE UCB0TXIE UCB0RXIE UCA0TXIE UCA0RXIE rw--0 rw--0 rw--0 rw--0 rw--0 UCA0RXIE USCI_A0receiveinterruptenable UCA0TXIE USCI_A0transmitinterruptenable UCB0RXIE USCI_B0receiveinterruptenable UCB0TXIE USCI_B0transmitinterruptenable BTIE Basictimerinterruptenable 14 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 interruptflagregister1and2 Address 7 6 5 4 3 2 1 0 02h NMIIFG RSTIFG PORIFG OFIFG WDTIFG rw--0 rw--(0) rw--(1) rw--1 rw--(0) WDTIFG Setonwatchdogtimeroverfloworsecuritykeyviolation. ResetonV power-uporaresetconditionatRST/NMIpininresetmode. CC OFIFG Flagsetonoscillatorfault RSTIFG Externalresetinterruptflag.SetonaresetconditionatRST/NMIpininresetmode.Reset onV power-up CC PORIFG Power-oninterruptflag.SetonV power-up. CC NMIIFG SetviaRST/NMI-pin Address 7 6 5 4 3 2 1 0 UCB0 UCB0 UCA0 UCA0 03h BTIFG TXIFG RXIFG TXIFG RXIFG rw--0 rw--1 rw--0 rw--1 rw--0 UCA0RXIFG USCI_A0receiveinterruptflag UCA0TXIFG USCI_A0transmitinterruptflag UCB0RXIFG USCI_B0receiveinterruptflag UCB0TXIFG USCI_B0transmitinterruptflag BTIFG BasicTimer1interruptflag Legend rw: Bitcanbereadandwritten. rw-0,1: Bitcanbereadandwritten.ItisResetorSetbyPUC. rw-(0,1): Bitcanbereadandwritten.ItisResetorSetbyPOR. SFRbitisnotpresentindevice POSTOFFICEBOX655303DALLAS,TEXAS75265 15

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 memory organization MSP430F47126/ MSP430F47163/ MSP430F47173/ MSP430F47183/ MSP430F47193/ MSP430F47127 MSP430F47166/ MSP430F47176/ MSP430F47186/ MSP430F47196/ MSP430F47167 MSP430F47177 MSP430F47187 MSP430F47197 Memory Size 56KB 92KB 92KB 116KB 120KB Main:interruptvector Flash 0FFFFh--0FFC0h 0FFFFh--0FFC0h 0FFFFh--0FFC0h 0FFFFh--0FFC0h 0FFFFh--0FFC0h Main:codememory Flash 0FFFFh--002100h 018FFFh-- 019FFFh-- 01FFFFh-- 01FFFFh-- 002100h 003100h 003100h 002100h RAM(Total) Size 4KB 4KB 8KB 8KB 4KB 020FFh--01100h 020FFh--01100h 030FFh--01100h 030FFh--01100h 020FFh--01100h Extended Size 2KB 2KB 6KB 6KB 2KB 020FFh--01900h 020FFh--01900h 030FFh--01900h 030FFh--01900h 020FFh--01900h Mirrored Size 2KB 2KB 2KB 2KB 2KB 018FFh--01100h 018FFh--01100h 018FFh--01100h 018FFh--01100h 018FFh--01100h Informationmemory Size 256Byte 256Byte 256Byte 256Byte 256Byte Flash 010FFh--01000h 010FFh--01000h 010FFh--01000h 010FFh--01000h 010FFh--01000h Bootmemory Size 1KB 1KB 1KB 1KB 1KB ROM 0FFFh--0C00h 0FFFh--0C00h 0FFFh--0C00h 0FFFh--0C00h 0FFFh--0C00h RAM Size 2KB 2KB 2KB 2KB 2KB (mirroredat 09FFh--0200h 09FFh--0200h 09FFh--0200h 09FFh--0200h 09FFh--0200h 018FFh--01100h) Peripherals 16-bit 01FFh--0100h 01FFh--0100h 01FFh--0100h 01FFh--0100h 01FFh--0100h 8-bit 0FFh--010h 0FFh--010h 0FFh--010h 0FFh--010h 0FFh--010h 8-bitSFR 0Fh--00h 0Fh--00h 0Fh--00h 0Fh--00h 0Fh--00h bootstrap loader (BSL) TheMSP430bootstraploader(BSL)enablesuserstoprogramtheflashmemoryorRAMusingaUARTserial interface.AccesstotheMSP430memoryviatheBSLis protectedbyuser-definedpassword.Forcomplete descriptionofthefeaturesoftheBSLanditsimplementation,seetheMSP430MemoryProgrammingUser’s Guide,literaturenumberSLAU265. BSLFUNCTION PZPACKAGEPINS DataTransmit 91-P1.0 DataReceive 90-P1.1 flash memory TheflashmemorycanbeprogrammedviatheJTAGport,thebootstraploader,orin-systembytheCPU.The CPUcanperformsingle-byteandsingle-wordwritestotheflashmemory.Featuresoftheflashmemoryinclude: D Flash memory has n segments of main memory and four segments of information memory (A to D) of 64byteseach.Eachsegmentinmainmemoryis512bytesinsize. D Segments0tonmaybeerasedinonestep,oreachsegmentmaybeindividuallyerased. D SegmentsAtoDcanbeerasedindividually,orasagroupwithsegments0ton. SegmentsAtoDarealsocalledinformationmemory. D Segment A might contain calibration data. After reset segment A is protected against programming or erasing. It can be unlocked but care should be taken not to erase this segment if the calibration data is required. D Flashcontentintegritycheckwithmarginalreadmodes. 16 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 peripherals PeripheralsareconnectedtotheCPUthroughdata,address,andcontrolbusesandcanbehandledusingall instructions.Forcompletemoduledescriptions,seetheMSP430x4xxFamilyUser’sGuide,literaturenumber SLAU056. oscillator and system clock TheclocksystemissupportedbytheFLL+modulethatincludessupportfora32768-Hzwatchcrystaloscillator, an internal digitally-controlled oscillator (DCO) and an 8-MHz high-frequency crystal oscillator (XT1) plus a 16-MHzhigh-frequencycrystaloscillator(XT2).TheFLL+clockmoduleisdesignedtomeettherequirements ofbothlowsystemcostandlowpowerconsumption.TheFLL+featuresadigitalfrequencylockedloop(FLL) hardwarethat,inconjunctionwithadigitalmodulator,stabilizestheDCOfrequencytoaprogrammablemultiple ofthewatchcrystalfrequency.TheinternalDCOprovidesafastturn-onclocksourceandstabilizesinlessthan 6s.TheFLL+moduleprovidesthefollowingclocksignals: D Auxiliaryclock(ACLK),sourcedfroma32768-Hzwatchcrystalorahigh-frequencycrystal D Mainclock(MCLK),thesystemclockusedbytheCPU D Sub-Mainclock(SMCLK),thesub-systemclockusedbytheperipheralmodules D ACLK/n,thebufferedoutputofACLK,ACLK/2,ACLK/4,orACLK/8 brownout, supply voltage supervisor (SVS) Thebrownoutcircuitisimplementedtoprovidetheproperinternalresetsignaltothedeviceduringpoweron andpoweroff.TheSVScircuitrydetectsifthesupplyvoltagedropsbelowauserselectablelevelandsupports bothsupplyvoltagesupervision(thedeviceisautomaticallyreset)andsupplyvoltagemonitoring (SVM,the deviceisnotautomaticallyreset). TheCPUbeginscodeexecutionafterthebrownoutcircuitreleasesthedevicereset.However,V maynot CC haverampedtoV atthattime.TheusermustinsurethedefaultFLL+settingsarenotchangeduntilV CC(min) CC reachesV .Ifdesired,theSVScircuitcanbeusedtodeterminewhenV reachesV . CC(min) CC CC(min) digital I/O Therearenine8-bitI/Oportsimplemented—portsP1throughP5andP7throughP10. D AllindividualI/Obitsareindependentlyprogrammable. D Anycombinationofinput,output,andinterruptconditionsispossible. D Edge-selectableinterruptinputcapabilityforalltheeightbitsofportsP1andP2. D Read/writeaccesstoport-controlregistersissupportedbyallinstructions. D PortsP7/P8andP9/P10canbeaccessedword-wiseasportsPAandPBrespectively. D EachI/Ohasanindividuallyprogrammablepullup/pulldownresistor. Note:OnlyfourbitsofportP10(P10.0toP10.3)areavailableonexternalpins,butallcontrolanddatabitsforportP10areimplemented. POSTOFFICEBOX655303DALLAS,TEXAS75265 17

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 DMA controller TheDMAcontrollerallowsmovementofdatafromonememoryaddresstoanotherwithoutCPUintervention. For example, the DMA controller can be used to move data from a USCI module to RAM. Using the DMA controller can increase the throughput of peripheral modules. The DMA controller reduces system power consumptionbyallowingtheCPUtoremaininsleepmodewithouthavingtoawakentomovedatatoorfrom aperipheral. DMATRIGGERSELECTDMAXTSELX DESCRIPTION 0000 DMAREQbit(softwaretrigger) 0001 TACCR2CCIFGbit 0010 TBCCR2CCIFGbit 0011 UCA0RXIFGbit 0100 UCA0TXIFGbit 0101 N/A 0110 SD16IFGbit 0111 TACCR0CCIFGbit 1000 TBCCR0CCIFGbit 1001 UCA1RXIFGbit 1010 UCA1TXIFGbit 1011 Multiplierready 1100 UCB0RXIFGbit 1101 UCB0TXIFGbit DMA0IFGbittriggersDMAchannel1 1110 DMA1IFGbittriggersDMAchannel2 DMA2IFGbittriggersDMAchannel0 1111 ExternaltriggerDMAE0 hardware multiplier Themultiplicationoperationissupportedbyadedicatedperipheralmodule.Themoduleperformsoperations with 32-bit, 24-bit, 16-bit and 8-bit operands. The module is capable of supporting signed and unsigned multiplicationaswellassignedandunsignedmultiplyandaccumulateoperations. watchdog timer (WDT+) TheprimaryfunctionoftheWDT+moduleistoperformacontrolledsystemrestartafterasoftwareproblem occurs.Iftheselectedtimeintervalexpires,asystemresetisgenerated.Ifthewatchdogfunctionisnotneeded inanapplication,themodulecanbeconfiguredasanintervaltimerandcangenerateinterruptsatselectedtime intervals. Basic Timer1 and Real-Time Clock (RTC) TheBasicTimer1hastwoindependent8-bittimersthatcanbecascadedtoforma16-bittimer/counter.Both timerscanbereadandwrittenbysoftware.TheBasicTimer1isextendedtoprovideanintegratedreal-time clock (RTC). An internal calendar compensates for months with less than 31 days and includes leap year correction. 18 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 universal serial communication interfaces (USCIs) (USCI_A0, USCI_B0, USCI_A1, USCI_B1) The USCI module is used for serial data communication. The USCI module supports synchronous communicationprotocolssuchasSPI(3-pinor4-pin)andI2Candasynchronouscommunicationprotocolssuch asUART,enhancedUARTwithautomaticbaudratedetection(LIN),andIrDA. USCI_A0andUSCI_A1providessupportforSPI(3-pinor4-pin),UART,enhancedUART,andIrDA. USCI_B0andUSCI_B1providessupportforSPI(3-pinor4-pin)andI2C. Timer_A3 Timer_A3 is a 16-bit timer/counter with three capture/compare registers. Timer_A3 can support multiple capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities. Interruptsmaybegeneratedfromthecounteronoverflowconditionsandfromeachofthecapture/compare registers. TIMER_A3SIGNALCONNECTIONS INPUTPIN DEVICEINPUT MODULEINPUT MODULEOUTPUT OUTPUTPIN MODULEBLOCK NUMBER SIGNAL NAME SIGNAL NUMBER 86-P1.5 TACLK TACLK ACLK ACLK TTiimmeerr NNAA SMCLK SMCLK 86-P1.5 TACLK INCLK 91-P1.0 TA0 CCI0A 91-P1.0 90-P1.1 TA0 CCI0B CCCCRR00 TTAA00 DVSS GND DVCC VCC 89-P1.2 TA1 CCI1A 89-P1.2 CAOUT(internal) CCI1B CCCCRR11 TTAA11 DVSS GND DVCC VCC 71-P3.4 TA2 CCI2A 71-P3.4 ACLK(internal) CCI2B CCCCRR22 TTAA22 DVSS GND DVCC VCC POSTOFFICEBOX655303DALLAS,TEXAS75265 19

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 Timer_B3 Timer_B3 is a 16-bit timer/counter with three capture/compare registers. Timer_B3 can support multiple capture/compares, PWM outputs, and interval timing. Timer_B3 also has extensive interrupt capabilities. Interruptsmaybegeneratedfromthecounteronoverflowconditionsandfromeachofthecapture/compare registers. TIMER_B3SIGNALCONNECTIONS INPUTPIN DEVICEINPUT MODULEINPUT MODULEOUTPUT OUTPUTPIN MODULEBLOCK NUMBER SIGNAL NAME SIGNAL NUMBER 87-P1.4 TBCLK TBCLK ACLK ACLK TTiimmeerr NNAA SMCLK SMCLK 87-P1.4 TBCLK INCLK 70--P3.5 TB0 CCI0A 70-P3.5 70--P3.5 TB0 CCI0B CCCCRR00 TTBB00 DVSS GND DVCC VCC 69-P3.6 TB1 CCI1A 69-P3.6 69-P3.6 TB1 CCI1B CCCCRR11 TTBB11 DVSS GND DVCC VCC 68-P3.7 TB2 CCI2A 68-P3.7 68-P3.7 TB2 CCI2B CCCCRR22 TTBB22 DVSS GND DVCC VCC Comparator_A Theprimaryfunctionofthecomparator_Amoduleistosupportprecisionslopeanalog-to-digitalconversions, battery-voltagesupervision,andmonitoringofexternalanalogsignals. SD16_A The SD16_A module integrates three (MSP430F471x3), six (MSP430F471x6) or seven (MSP430F471x7) independent16-bitsigma-deltaA/Dconverters.Eachchannelisdesignedwithafullydifferentialanaloginput pairandprogrammablegainamplifierinputstage.Inadditiontoexternalanaloginputs,aninternalV sense CC andtemperaturesensorarealsoavailable. LCD driver with regulated charge pump TheLCD_AdrivergeneratesthesegmentandcommonsignalsrequiredtodriveanLCDdisplay.TheLCD_A controllerhasdedicateddatamemorytoholdsegmentdriveinformation.Commonandsegmentsignalsare generatedasdefinedbythemode.Static,2-MUX,3-MUX,and4-MUXLCDsaresupportedbythisperipheral. The module can provide a LCD voltage independent of the supply voltage via an integrated charge pump. FurthermoreitispossibletocontroltheleveloftheLCDvoltageandthuscontrastinsoftware. 20 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 embedded emulation module (EEM) All MSP430F471x3, MSP430F471x6, and MSP430F471x7 devices have an EEM that supports real-time in-systemdebugging.TheimplementedLversionoftheEEMhasthefollowingfeatures: D Eighthardwaretriggersonmemoryaddressordatabus D TwohardwaretriggersonwriteaccessestoCPUregister D Eightcombinationaltriggerstocombineanyofthe10abovehardwaretriggers D Triggersequencer D CPUbreakreactiononcombinationaltriggersforbreakpoints D Statestoragetotraceinternalbuses D Clockcontrolonmodulelevel POSTOFFICEBOX655303DALLAS,TEXAS75265 21

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 peripheral file map PERIPHERALSWITHWORDACCESS Watchdog Watchdogtimercontrol WDTCTL 0120h Flash_A Flashcontrol4 FCTL4 01BEh Flashcontrol3 FCTL3 012Ch Flashcontrol2 FCTL2 012Ah Flashcontrol1 FCTL1 0128h Timer__B3 Capture/compareregister2 TBCCR2 0196h Capture/compareregister1 TBCCR1 0194h Capture/compareregister0 TBCCR0 0192h Timer_Bregister TBR 0190h Capture/comparecontrol2 TBCCTL2 0186h Capture/comparecontrol1 TBCCTL1 0184h Capture/comparecontrol0 TBCCTL0 0182h Timer_Bcontrol TBCTL 0180h Timer_Binterruptvector TBIV 011Eh Timer__A3 Capture/compareregister2 TACCR2 0176h Capture/compareregister1 TACCR1 0174h Capture/compareregister0 TACCR0 0172h Timer_Aregister TAR 0170h Capture/comparecontrol2 TACCTL2 0166h Capture/comparecontrol1 TACCTL1 0164h Capture/comparecontrol0 TACCTL0 0162h Timer_Acontrol TACTL 0160h Timer_Ainterruptvector TAIV 012Eh 32-bit Hardware MPY32control0 MPY32CTL0 015Ch MMulltiiplliier 64-bitresult3--mostsignificantword RES3 015Ah 64-bitresult2 RES2 0158h 64-bitresult1 RES1 0156h 64-bitresult0--leastsignificantword RES0 0154h Second32-bitoperand,highword OP2H 0152h Second32-bitoperand,lowword OP2L 0150h Multiplysigned+accumulate/ MACS32H 014Eh 32-bitoperand1,highword Multiplysigned+accumulate/ MACS32L 014Ch 32-bitoperand1,lowword Multiply+accumulate/ MAC32H 014Ah 32-bitoperand1,highword Multiply+accumulate/ MAC32L 0148h 32-bitoperand1,lowword Multiplysigned/32-bitoperand1,highword MPYS32H 0146h Multiplysigned/32-bitoperand1,lowword MPYS32L 0144h Multiplyunsigned/32-bitoperand1,highword MPY32H 0142h Multiplyunsigned/32-bitoperand1,lowword MPY32L 0140h 22 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 peripheral file map (continued) PERIPHERALSWITHWORDACCESS(CONTINUED) 32-bitHardware Sumextend SUMEXT 013Eh Multiplier Resulthighword RESHI 013Ch Resultlowword RESLO 013Ah Secondoperand OP2 0138h Multiplysigned+accumulate/operand1 MACS 0136h Multiply+accumulate/operand1 MAC 0134h Multiplysigned/operand1 MPYS 0132h Multiplyunsigned/operand1 MPY 0130h USCI_B0 USCI_B0I2Cownaddress UCB0I2COA 016Ch ((sseeee aallssoo:: PPeerriipphheerr-- als with Byte Ac- USCI_B0I2Cslaveaddress UCB0I2CSA 016Eh cess) USCI_B1 USCI_B1I2Cownaddress UCB1I2COA 017Ch ((sseeee aallssoo:: PPeerriipphheerr-- als with Byte Ac- USCI_B1I2Cslaveaddress UCB1I2CSA 017Eh cess) SD16__A GeneralControl SD16CTL 0100h ((see allso: PPeriiphher- Channel0Control SD16CCTL0 0102h aallss wwiitthh BByyttee AAcc-- cess)) Channel1Control SD16CCTL1 0104h Channel2Control SD16CCTL2 0106h Channel3Control SD16CCTL3 0108h Channel4Control SD16CCTL4 010Ah Channel5Control SD16CCTL5 010Ch Channel6Control SD16CCTL6 010Eh Channel0conversionmemory SD16MEM0 0110h Channel1conversionmemory SD16MEM1 0112h Channel2conversionmemory SD16MEM2 0114h Channel3conversionmemory SD16MEM3 0116h Channel4conversionmemory SD16MEM4 0118h Channel5conversionmemory SD16MEM5 011Ah Channel6conversionmemory SD16MEM6 011Ch SD16Interruptvectorwordregister SD16IV 01AEh PortPA PortPAresistorenable PAREN 014h PortPAselection PASEL 03Eh PortPAdirection PADIR 03Ch PortPAoutput PAOUT 03Ah PortPAinput PAIN 038h PortPB PortPBresistorenable PBREN 016h PortPBselection PBSEL 00Eh PortPBdirection PBDIR 00Ch PortPBoutput PBOUT 00Ah PortPBinput PBIN 008h POSTOFFICEBOX655303DALLAS,TEXAS75265 23

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 peripheral file map (continued) PERIPHERALSWITHWORDACCESS(CONTINUED) DMA DMAmodulecontrol0 DMACTL0 0122h DMAmodulecontrol1 DMACTL1 0124h DMAinterruptvector DMAIV 0126h DMAChannel0 DMAchannel0control DMA0CTL 01D0h DMAchannel0sourceaddress DMA0SA 01D2h DMAchannel0destinationaddress DMA0DA 01D6h DMAchannel0transfersize DMA0SZ 01DAh DMAChannel1 DMAchannel1control DMA1CTL 01DCh DMAchannel1sourceaddress DMA1SA 01DEh DMAchannel1destinationaddress DMA1DA 01E2h DMAchannel1transfersize DMA1SZ 01E6h DMAChannel2 DMAchannel2control DMA2CTL 01E8h DMAchannel2sourceaddress DMA2SA 01EAh DMAchannel2destinationaddress DMA2DA 01EEh DMAchannel2transfersize DMA2SZ 01F2h 24 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 peripheral file map (continued) PERIPHERALSWITHBYTEACCESS SD16_A Channel0InputControl SD16INCTL0 0B0h (seealso: Channel1InputControl SD16INCTL1 0B1h Peripheralswith Channel2InputControl SD16INCTL2 0B2h WordAccess) Channel3InputControl SD16INCTL3 0B3h Channel4InputControl SD16INCTL4 0B4h Channel5InputControl SD16INCTL5 0B5h Channel6InputControl SD16INCTL6 0B6h Reserved 0B7h Channel0preload SD16PRE0 0B8h Channel1preload SD16PRE1 0B9h Channel2preload SD16PRE2 0BAh Channel3preload SD16PRE3 0BBh Channel4preload SD16PRE4 0BCh Channel5preload SD16PRE5 0BDh Channel6preload SD16PRE6 0BEh Reserved SD16CONF1 0BFh LCD_A LCDVoltageControl1 LCDAVCTL1 0AFh LCDVoltageControl0 LCDAVCTL0 0AEh LCDVoltagePortControl1 LCDAPCTL1 0ADh LCDVoltagePortControl0 LCDAPCTL0 0ACh LCDmemory20 LCDM20 0A4h : : : LCDmemory16 LCDM16 0A0h LCDmemory15 LCDM15 09Fh : : : LCDmemory1 LCDM1 091h LCDcontrolandmode LCDACTL 090h POSTOFFICEBOX655303DALLAS,TEXAS75265 25

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 peripheral file map (continued) PERIPHERALSWITHBYTEACCESS(CONTINUED) USCI_A0 USCI_A0transmitbuffer UCA0TXBUF 067h USCI_A0receivebuffer UCA0RXBUF 066h USCI_A0status UCA0STAT 065h USCI_A0modulationcontrol UCA0MCTL 064h USCI_A0baudratecontrol1 UCA0BR1 063h USCI_A0baudratecontrol0 UCA0BR0 062h USCI_A0control1 UCA0CTL1 061h USCI_A0control0 UCA0CTL0 060h USCI_A0IrDAreceivecontrol UCA0IRRCTL 05Fh USCI_A0IrDAtransmitcontrol UCA0IRTCTL 05Eh USCI_A0autobaudratecontrol UCA0ABCTL 05Dh USCI_B0 USCI_B0transmitbuffer UCB0TXBUF 06Fh USCI_B0receivebuffer UCB0RXBUF 06Eh USCI_B0status UCB0STAT 06Dh USCI_B1I2Cinterruptenable UCB0I2CIE 06Ch USCI_B0bitratecontrol1 UCB0BR1 06Bh USCI_B0bitratecontrol0 UCB0BR0 06Ah USCI_B0control1 UCB0CTL1 069h USCI_B0control0 UCB0CTL0 068h USCI_A1 USCI_A1transmitbuffer UCA1TXBUF 0D7h USCI_A1receivebuffer UCA1RXBUF 0D6h USCI_A1status UCA1STAT 0D5h USCI_A1modulationcontrol UCA1MCTL 0D4h USCI_A1baudratecontrol1 UCA1BR1 0D3h USCI_A1baudratecontrol0 UCA1BR0 0D2h USCI_A1control1 UCA1CTL1 0D1h USCI_A1control0 UCA1CTL0 0D0h USCI_A1IrDAreceivecontrol UCA1IRRCTL 0CFh USCI_A1IrDAtransmitcontrol UCA1IRTCTL 0CEh USCI_A1autobaudratecontrol UCA1ABCTL 0CDh USCI_A1interruptflag UC1IFG 007h USCI_A1interruptenable UC1IE 006h USCI_B1 USCI_B1transmitbuffer UCB1TXBUF 0DFh USCI_B1receivebuffer UCB1RXBUF 0DEh USCI_B1status UCB1STAT 0DDh USCI_B1I2Cinterruptenable UCB1I2CIE 0DCh USCI_B1bitratecontrol1 UCB1BR1 0DBh USCI_B1bitratecontrol0 UCB1BR0 0DAh USCI_B1control1 UCB1CTL1 0D9h USCI_B1control0 UCB1CTL0 0D8h USCI_A1interruptflag UC1IFG 007h USCI_A1interruptenable UC1IE 006h Compparator__A Comparator_Aportdisable CAPD 05Bh Comparator_Acontrol2 CACTL2 05Ah Comparator_Acontrol1 CACTL1 059h BrownOUT,SVS SVScontrolregister(Resetbybrownoutsignal) SVSCTL 056h 26 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 peripheral file map (continued) PERIPHERALSWITHBYTEACCESS(CONTINUED) FLL+Clock FLL+Control2 FLL_CTL2 055h FLL+Control1 FLL_CTL1 054h FLL+Control0 FLL_CTL0 053h Systemclockfrequencycontrol SCFQCTL 052h Systemclockfrequencyintegrator SCFI1 051h Systemclockfrequencyintegrator SCFI0 050h RTC RealTimeClockYearHighByte RTCYEARH 04Fh (BasicTimer1) RealTimeClockYearLowByte RTCYEARL 04Eh RealTimeClockMonth RTCMON 04Dh RealTimeClockDayofMonth RTCDAY 04Ch BasicTimer1Counter2 BTCNT2 047h BasicTimer1Counter1 BTCNT1 046h RealTimeCounter4 RTCNT4 045h (RealTimeClockDayofWeek) (RTCDOW) RealTimeCounter3 RTCNT3 044h (RealTimeClockHour) (RTCHOUR) RealTimeCounter2 RTCNT2 043h (RealTimeClockMinute) (RTCMIN) RealTimeCounter1 RTCNT1 042h (RealTimeClockSecond) (RTCSEC) RealTimeClockControl RTCCTL 041h BasicTimer1Control BTCTL 040h PortP10 PortP10resistorenable P10REN 017h PortP10selection P10SEL 00Fh PortP10direction P10DIR 00Dh PortP10output P10OUT 00Bh PortP10input P10IN 009h PortP9 PortP9resistorenable P9REN 016h PortP9selection P9SEL 00Eh PortP9direction P9DIR 00Ch PortP9output P9OUT 00Ah PortP9input P9IN 008h PortP8 PortP8resistorenable P8REN 015h PortP8selection P8SEL 03Fh PortP8direction P8DIR 03Dh PortP8output P8OUT 03Bh PortP8input P8IN 039h PortP7 PortP7resistorenable P7REN 014h PortP7selection P7SEL 03Eh PortP7direction P7DIR 03Ch PortP7output P7OUT 03Ah PortP7input P7IN 038h POSTOFFICEBOX655303DALLAS,TEXAS75265 27

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 peripheral file map (continued) PERIPHERALSWITHBYTEACCESS(CONTINUED) PortP5 PortP5resistorenable P5REN 012h PortP5selection P5SEL 033h PortP5direction P5DIR 032h PortP5output P5OUT 031h PortP5input P5IN 030h PortP4 PortP4resistorenable P4REN 011h PortP4selection P4SEL 01Fh PortP4direction P4DIR 01Eh PortP4output P4OUT 01Dh PortP4input P4IN 01Ch PortP3 PortP3resistorenable P3REN 010h PortP3selection P3SEL 01Bh PortP3direction P3DIR 01Ah PortP3output P3OUT 019h PortP3input P3IN 018h PortP2 PortP2resistorenable P2REN 02Fh PortP2selection P2SEL 02Eh PortP2interruptenable P2IE 02Dh PortP2interrupt-edgeselect P2IES 02Ch PortP2interruptflag P2IFG 02Bh PortP2direction P2DIR 02Ah PortP2output P2OUT 029h PortP2input P2IN 028h PortP1 PortP1resistorenable P1REN 027h PortP1selection P1SEL 026h PortP1interruptenable P1IE 025h PortP1interrupt-edgeselect P1IES 024h PortP1interruptflag P1IFG 023h PortP1direction P1DIR 022h PortP1output P1OUT 021h PortP1input P1IN 020h SppecialFunctions SFRinterruptflag2 IFG2 003h SFRinterruptflag1 IFG1 002h SFRinterruptenable2 IE2 001h SFRinterruptenable1 IE1 000h 28 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 absolute maximum ratings (see Note 1) VoltageappliedatV toV ...................................................... --0.3Vto4.1V CC SS Voltageappliedtoanypin(seeNote2) ....................................... --0.3VtoV +0.3V CC Diodecurrentatanydeviceterminal. ...................................................... 2mA Storagetemperature,T : Unprogrammeddevice(seeNote3) ....................... --55Cto150C stg Programmeddevice(seeNote3) .......................... --40Cto85C NOTES: 1. Stressesbeyondthoselistedunder“absolutemaximumratings”maycausepermanentdamagetothedevice.Thesearestress ratingsonly,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder“recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. AllvoltagesreferencedtoVSS.TheJTAGfuse-blowvoltage,VFB,isallowedtoexceedtheabsolutemaximumrating.Thevoltage isappliedtotheTDI/TCLKpinwhenblowingtheJTAGfuse. 3. HighertemperaturemaybeappliedduringboardsolderingprocessaccordingtothecurrentJEDECJ--STD--020specificationwith peakreflowtemperaturesnothigherthanclassifiedonthedevicelabelontheshippingboxesorreels. POSTOFFICEBOX655303DALLAS,TEXAS75265 29

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 recommended operating conditions MIN NOM MAX UNIT Supplyvoltageduringprogramexecution, 1.8 3.6 V VCC(AVCC=DVCC=VCC)(seeNote1) Supplyvoltageduringprogramexecution,SVSenabled,PORON=1, 2.0 3.6 V VCC(AVCC=DVCC=VCC)(seeNotes1,2) Supplyvoltageduringprogram/eraseflashmemory, 2.2 3.6 V VCC(AVCC=DVCC=VCC)(seeNote1) Supplyvoltage,VSS 0 V Operatingfree-airtemperaturerange,TA --40 85 C VCC=1.8V, dc 4.15 MHz Dutycycle=50%10% VCC=2.2V, dc 7.5 MHz PPrroocceessssoorrffrreeqquueennccyyffSSYYSSTTEEMM((MMaaxxiimmuummMMCCLLKKffrreeqquueennccyy)) Dutycycle=50%10% (seeNotes3,4andFigure1) VCC=2.7V, dc 12 Dutycycle=50%10% MMHHzz VCC3.3V, dc 16 Dutycycle=50%10% NOTES: 1. ItisrecommendedtopowerAVCCandDVCCfromthesamesource.Amaximumdifferenceof0.3VbetweenAVCCandDVCCcan betoleratedduringpowerupandoperation. 2. TheminimumoperatingsupplyvoltageisdefinedaccordingtothetrippointwherePORisgoingactivebydecreasingsupplyvoltage. PORisgoinginactivewhenthesupplyvoltageisraisedaboveminimumsupplyvoltageplusthehysteresisoftheSVScircuitry. 3. TheMSP430CPUisclockeddirectlywithMCLK. BoththehighandlowphaseofMCLKmustnotexceedthepulsewidthofthespecifiedmaximumfrequency. 4. Modulesmighthaveadifferentmaximuminputclockspecification.Refertothespecificationoftherespectivemoduleinthisdata sheet. Legend: 16MHz Supplyvoltagerange, duringflashmemory z H programming M -- 12MHz y c n e Supplyvoltagerange, u q duringprogramexecution e Fr 7.5MHz m e st y S 4.15MHz 1.8V 2.2V 2.7V 3.3V 3.6V SupplyVoltage--V NOTE: Minimumprocessorfrequencyisdefinedbysystemclock.FlashprogramoreraseoperationsrequireaminimumVCCof2.2V. Figure1.OperatingArea 30 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) supplycurrentintoAV +DV excludingexternalcurrent CC CC PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT Activemode,(seeNote1) 2.2V 350 400 f((MCLK))=f((SMCLK))=1MHz, II(AM) ff(ACLK)=3322776688HHzz TTA=--4400CCttoo8855CC AA XTS=0,SELM=(0,1) 3V 500 560 (Programexecutesfromflash) LLooww-ppoowweerrmmooddee,,((LLPPMM00)) 2.2V 45 70 II(LPM0) (seeNotes1,4) TTA=--4400CCttoo8855CC 3V 75 110 AA Low-powermode,(LPM2), 2.2V 11 14 II(LPM2) ff((MMCCLLKK))=ff((SSMMCCLLKK))=00MMHHzz, TTA=--4400CCttoo8855CC AA f(ACLK)=32768Hz,SCG0=0(seeNotes2,4) 3V 17 22 TA=--40C 0.7 2.0 LLooww-ppoowweerrmmooddee,((LLPPMM33)) ff((MMCCLLKK))==ff((SSMMCCLLKK))==00MMHHzz,, TA=25C 22.22VV 0.8 2.0 AA ff((AACCLLKK))=3322776688HHzz,,SSCCGG00=11 TA=60C 2.0 3.5 BasicTimer1andRTCenabled,ACLKselected TA=85C 5.0 9.5 II(LPM3) LLCCDD_AAeennaabblleedd,LLCCDDCCPPEENN=00:: ((ssttaattiiccmmooddee,,ffLLCCDD==ff((AACCLLKK))//3322)) TA=--40C 1.1 3.0 ((sseeeeNootteess2,,33,,aandd4)) TA=25C 1.2 3.0 33VV AA TA=60C 2.5 4.0 TA=85C 6.0 10.0 TA=--40C 3.5 5.5 LLooww-ppoowweerrmmooddee,((LLPPMM33)) ff((MMCCLLKK))==ff((SSMMCCLLKK))==00MMHHzz,, TA=25C 22.22VV 3.5 5.5 AA ff((AACCLLKK))=3322776688HHzz,,SSCCGG00=11 TA=60C 5.5 7.0 BasicTimer1andRTCenabled,ACLKselected TA=85C 11.0 17.0 II(LPM3) LLCCDD_AAeennaabblleedd,LLCCDDCCPPEENN=00:: ((44--mmuuxxmmooddee,,ffLLCCDD==ff((AACCLLKK))//3322)) TA=--40C 4.0 6.5 ((sseeeeNootteess2,,33,,aandd4)) TA=25C 4.0 6.5 33VV AA TA=60C 6.0 8.0 TA=85C 13.0 20.0 TA=--40C 0.1 1.0 TA=25C 0.2 1.0 22.22VV AA TA=60C 1.0 2.5 Low-powermode,(LPM4) TA=85C 4.5 8.5 II(LPM4) ff(MCLK)=00MMHHzz,ff(SMCLK)=00MMHHzz, ff((AACCLLKK))==00HHzz,,SSCCGG00==11((sseeeeNNootteess22aanndd44)) TA=--40C 0.1 2.0 TA=25C 0.2 2.0 33VV AA TA=60C 1.5 3.0 TA=85C 5.0 9.0 NOTES: 1. Timer_Aisclockedbyf(DCOCLK)=f(DCO)=1MHz.Allinputsaretiedto0VortoVCC.Outputsdonotsourceorsinkanycurrent. 2. Allinputsaretiedto0VortoVCC.Outputsdonotsourceorsinkanycurrent. 3. TheLPM3currentsarecharacterizedwithaMicroCrystalCC4V--T1A(9pF)crystalandOSCCAPx=01h. 4. Currentforbrownoutincluded. POSTOFFICEBOX655303DALLAS,TEXAS75265 31

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 typicalcharacteristics -- activemodesupplycurrent(intoV ) CC 11.0 fDCO=16MHz TA=85C 10.0 6.0 TA=25C 9.0 mA 8.0 fDCO=12MHz mA 5.0 -- -- Current 67..00 fDCO=8MHz Current 4.0 Mode 5.0 Mode 3.0 VCC=3V TA=85C Active 34..00 Active 2.0 TA=25C 2.0 VCC=2.2V 1.0 1.0 fDCO=1MHz 0.0 0.0 1.5 2.0 2.5 3.0 3.5 4.0 0.0 4.0 8.0 12.0 16.0 VCC--SupplyVoltage--V fDCO--DCOFrequency--MHz Figure2.ActiveModeCurrentvsV ,T =25C Figure3.ActiveModeCurrentvsDCOFrequency CC A 32 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) Schmitt-triggerinputs -- PortsP1toP5,P7toP10,RST/NMI,JTAG(TCK,TMS,TDI/TCLK,TDO/TDI) PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT 0.45 0.75 VCC PPosiittiive-goiingiinputttthhreshholldd VVIITT++ vvoollttaaggee 2.2V 1.00 1.65 VV 3V 1.35 2.25 0.25 0.55 VCC NNegattiive-goiingiinputttthhreshholldd VVIITT---- vvoollttaaggee 2.2V 0.55 1.20 VV 3V 0.75 1.65 VVhys IIVnnIppTuu--)ttvvoollttaaggeehhyysstteerreessiiss((VVIITT++-- 23.2VV 00..23 11..00 VV RPull P(nuoltluRpS/pTu/lNldMowIannrdesJiTsAtoGr pins) FFoorrppuullllduopw:VnI:NV=INV=SSV,CC 20 35 50 kΩ CI Inputcapacitance VIN=VSSorVCC 5 pF inputs -- PortsP1,P2 PARAMETER TESTCONDITIONS VCC MIN MAX UNIT PortP1,P2:P1.xtoP2.x,external t(int) Externalinterrupttiming triggerpulswidthtosetinterruptflag 2.2V/3V 20 ns (seeNote1) NOTES: 1. Anexternalsignalsetstheinterruptflageverytimetheminimuminterruptpulswidtht(int)ismet.Itmaybesetevenwithtriggersignals shorterthant(int). leakagecurrent -- PortsP1toP5,P7toP10 PARAMETER TESTCONDITIONS VCC MIN MAX UNIT Ilkg(Px.x) High-impedanceleakagecurrent SeeNotes1and2 2.2V/3V 50 nA NOTES: 1. TheleakagecurrentismeasuredwithVSSorVCCappliedtothecorrespondingpin(s),unlessotherwisenoted. 2. Theleakageofthedigitalportpinsismeasuredindividually.Theportpinisselectedforinputandthepullup/pulldownresistoris disabled. POSTOFFICEBOX655303DALLAS,TEXAS75265 33

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) outputs -- PortsP1toP5,P7toP10 PARAMETER TESTCONDITIONS VCC MIN MAX UNIT I(OHmax)=--1.5mA(seeNote1) 2.2V VCC--0.25 VCC I(OHmax)=--6mA(seeNote2) 2.2V VCC--0.6 VCC VVOH HHiigghh-lleevveelloouuttppuuttvvoollttaaggee VV I(OHmax)=--1.5mA(seeNote1) 3V VCC--0.25 VCC I(OHmax)=--6mA(seeNote2) 3V VCC--0.6 VCC I(OLmax)=1.5mA(seeNote1) 2.2V VSS VSS+0.25 I(OLmax)=6mA(seeNote2) 2.2V VSS VSS+0.6 VVOL LLooww-lleevveelloouuttppuuttvvoollttaaggee I(OLmax)=1.5mA(seeNote1) 3V VSS VSS+0.25 VV I(OLmax)=6mA(seeNote2) 3V VSS VSS+0.6 NOTES: 1. Themaximumtotalcurrent,IOHmaxandIOLmax,foralloutputscombined,shouldnotexceed12mAtoholdthemaximum voltagedropspecified. 2. Themaximumtotalcurrent,IOHmaxandIOLmax,foralloutputscombined,shouldnotexceed48mAtoholdthemaximum voltagedropspecified. outputfrequency -- PortsP1toP5,P7toP10 PARAMETER TESTCONDITIONS VCC MIN MAX UNIT P1.4/TBCLK/SMCLK, 2.2V 10 MHz ffPx.y PPoorrttoouuttppuuttffrreeqquueennccyy((wwiitthhllooaadd)) CCL=2200ppFF,RRL=11kkΩΩaaggaaiinnssttVVCC//22 (seeNotes1and2) 3V 12 MHz P1.1/TA0/MCLK,P1.5/TACLK/ACLK, 2.2V 12 MHz ffPort_CLK CClloocckkoouuttppuuttffrreeqquueennccyy PP11.44//TTBBCCLLKK//SSMMCCLLKK, CL=20pF(seeNote2) 3V 16 MHz NOTES: 1. Alternativelyaresistivedividerwith2times2kΩbetweenVCCandVSSisusedasload.Theoutputisconnectedtothecentertap ofthedivider. 2. Theoutputvoltagereachesatleast10%and90%VCCatthespecifiedtogglefrequency. 34 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) typicalcharacteristics -- outputs TYPICALLOW-LEVELOUTPUTCURRENT TYPICALLOW-LEVELOUTPUTCURRENT vs vs LOW-LEVELOUTPUTVOLTAGE LOW-LEVELOUTPUTVOLTAGE 30.0 50.0 mA VP1C.C6=2.2V TA=25C mA VP1C.C6=3V TA=25C -- -- ent 25.0 ent 40.0 Curr TA=85C Curr TA=85C ut 20.0 ut p p ut ut 30.0 O O el 15.0 el v v e e L L w- w- 20.0 o o L 10.0 L al al c c pi pi Ty 5.0 Ty 10.0 -- -- L L O O I I 0.0 0.0 0.0 0.5 1.0 1.5 2.0 2.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VOL--Low-LevelOutputVoltage--V VOL--Low-LevelOutputVoltage--V Figure4 Figure5 TYPICALHIGH-LEVELOUTPUTCURRENT TYPICALHIGH-LEVELOUTPUTCURRENT vs vs HIGH-LEVELOUTPUTVOLTAGE HIGH-LEVELOUTPUTVOLTAGE 0.0 0.0 mA VP1C.C6=2.2V mA VCC=3V -- P1.6 ent --5.0 nt-- --10.0 urr rre C u C put --10.0 ut --20.0 Out utp O evel --15.0 vel --30.0 L e gh- h-L Hi --20.0 Hig --40.0 ypical TA=85C pical TA=85C T --25.0 y -- T --50.0 H -- IO TA=25C OH TA=25C --30.0 I --60.0 0.0 0.5 1.0 1.5 2.0 2.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VOH--High-LevelOutputVoltage--V VOH--High-LevelOutputVoltage--V Figure6 Figure7 NOTE: Oneoutputloadedatatime. POSTOFFICEBOX655303DALLAS,TEXAS75265 35

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) POR/brownoutreset(BOR)(seeNotes1and2) PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT VCC(start) (SeeFigure8) dVCC/dt3V/s 0.7V(B_IT--) V V(B_IT--) (SeeFigure8throughFigure10) dVCC/dt3V/s 1.71 V Vhys(B_IT--) (SeeFigure8) dVCC/dt3V/s 70 130 180 mV td(BOR) (SeeFigure8) 2000 s PulselengthneededatRST/NMIpin t(reset) toacceptedresetinternally 2.2V/3V 2 s NOTES: 1. ThecurrentconsumptionofthebrownoutmoduleisalreadyincludedintheICCcurrentconsumptiondata. ThevoltagelevelV(B_IT--)+Vhys(B_IT--)is1.8V. 2. Duringpowerup,theCPUbeginscodeexecutionfollowingaperiodoftd(BOR)afterVCC=V(B_IT--)+Vhys(B_IT--).ThedefaultFLL+ settingsmustnotbechangeduntilVCCVCC(min),whereVCC(min)istheminimumsupplyvoltageforthedesiredoperatingfrequency. SeetheMSP430x4xxFamilyUser’sGuide(SLAU056)formoreinformationonthebrownout/SVScircuit. V CC V hys(B_IT--) V (B_IT--) VCC(start) 1 0 td(BOR) Figure8.POR/BrownoutReset(BOR)vsSupplyVoltage 36 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) typicalcharacteristics -- POR/brownoutreset(BOR) 2 VCC tpw VCC=3V 3V TypicalConditions V 1.5 -- p) o r 1 d C( C VCC(drop) V 0.5 0 0.001 1 1000 1ns 1ns tpw--PulseWidth--s tpw--PulseWidth--s Figure9.V LevelWithaSquareVoltageDroptoGenerateaPOR/BrownoutSignal CC(drop) VCC tpw 2 3V VCC=3V V 1.5 TypicalConditions -- p) o dr 1 C( C VCC(drop) V 0.5 tf=tr 0 0.001 1 1000 tf tr tpw--PulseWidth--s tpw--PulseWidth--s Figure10.V LevelWithaTriangleVoltageDroptoGenerateaPOR/BrownoutSignal CC(drop) POSTOFFICEBOX655303DALLAS,TEXAS75265 37

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) SVS(supplyvoltagesupervisor/monitor)(seeNote1) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT dVCC/dt30V/ms(seeFigure11) 5 150 s tt(SVSR) dVCC/dt30V/ms 2000 s td(SVSon) SVSon,switchfromVLD=0toVLD0,VCC=3V 150 300 s tsettle VLD0(seeNote2) 12 s V(SVSstart) VLD0,VCC/dt3V/s(seeFigure11) 1.55 1.7 V VLD=1 70 120 155 mV VCC/dt3V/s(seeFigure11) VLD=2to14 V(SVS_IT--) V(SVS_IT--) VVhhyyss((SSVVSS_IITT----)) 0.001 0.016 VCC/dt3V/s(seeFigure11), VLD=15 4.4 10.4 mV ExternalvoltageappliedonA7 VLD=1 1.8 1.9 2.05 VLD=2 1.94 2.1 2.25 VLD=3 2.05 2.2 2.37 VLD=4 2.14 2.3 2.48 VLD=5 2.24 2.4 2.6 VLD=6 2.33 2.5 2.71 VLD=7 2.46 2.65 2.86 VVCC//ddtt33VV//ss((sseeeeFFiigguurree1111)) VLD=8 2.58 2.8 3 VV((SSVVSS_IITT--)) VV VLD=9 2.69 2.9 3.13 VLD=10 2.83 3.05 3.29 VLD=11 2.94 3.2 3.42 VLD=12 3.11 3.35 3.61† VLD=13 3.24 3.5 3.76† VLD=14 3.43 3.7† 3.99† VCC/dt3V/s(seeFigure11), VLD=15 1.1 1.2 1.3 ExternalvoltageappliedonA7 I(CseCe(SNVSo)te1) VLD0,VCC=2.2V/3V 10 15 A †Therecommendedoperatingvoltagerangeislimitedto3.6V. NOTES: 1. ThecurrentconsumptionoftheSVSmoduleisnotincludedintheICCcurrentconsumptiondata. 2. tsettleisthesettlingtimethatthecomparatoroutputneedstohaveastablelevelafterVLDisswitchedVLD0toadifferentVLD valuesomewherebetween2and15.Theoverdriveisassumedtobe>50mV. 38 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 typical characteristics SoftwareSetsVLD>0: SVSisActive V CC V hys(SVS_IT--) V (SVS_IT--) V (SVSstart) Vhys(B_IT--) V(B_IT--) V CC(start) Brown- Brownout Out Region Brownout Region 1 0 SVSOut td(BOR) td(BOR) SVSCircuitisActiveFromVLD>toVCC<V(B_IT--) 1 0 td(SVSon) td(SVSR) SetPOR 1 undefined 0 Figure11.SVSReset(SVSR)vsSupplyVoltage V CC t pw 3V 2 RectangularDrop V CC(min) 1.5 V TriangularDrop -- n) mi 1 C( C 1ns 1ns V V 0.5 CC tpw 3V 0 1 10 100 1000 tpw--PulseWidth--s V CC(min) tf=tr tf tr t--PulseWidth--s Figure12.V WithaSquareVoltageDropandaTriangleVoltageDroptoGenerateanSVSSignal CC(min) POSTOFFICEBOX655303DALLAS,TEXAS75265 39

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) DCO PARAMETER TESTCONDITIONS MIN TYP MAX UNIT f(DCOCLK) DNC(DOCOP)L=US01=E0h,FN_8=FN_4=FN_3=FN_2=0,D=2, VCC=2.2V/3V 1 MHz VCC=2.2V 0.3 0.65 1.25 ff(DCO=2) FFNN_88=FFNN_44=FFNN_33=FFNN_22=00,DDCCOOPPLLUUSS=11 MMHHzz VCC=3V 0.3 0.7 1.3 VCC=2.2V 2.5 5.6 10.5 ff(DCO=27) FFNN_88=FFNN_44=FFNN_33=FFNN_22=00,DDCCOOPPLLUUSS=11 MMHHzz VCC=3V 2.7 6.1 11.3 FFNN__88==FFNN__44==FFNN__33==00,,FFNN__22==11,,DDCCOOPPLLUUSS==11 VCC=2.2V 0.7 1.3 2.3 ff(DCO=2) MMHHzz VCC=3V 0.8 1.5 2.5 VCC=2.2V 5.7 10.8 18 ff(DCO=27) FFNN_88=FFNN_44=FFNN_33=00,FFNN_22=11,DDOOPPLLUUSS=11 MMHHzz VCC=3V 6.5 12.1 20 VCC=2.2V 1.2 2 3 ff(DCO=2) FFNN_88=FFNN_44=00,FFNN_33=11,FFNN_22=xx,DDCCOOPPLLUUSS=11 MMHHzz VCC=3V 1.3 2.2 3.5 VCC=2.2V 9 15.5 25 ff(DCO=27) FFNN_88=FFNN_44=00,FFNN_33=11,FFNN_22=xx,DDCCOOPPLLUUSS=11 MMHHzz VCC=3V 10.3 17.9 28.5 VCC=2.2V 1.8 2.8 4.2 ff(DCO=2) FFNN_88=00,FFNN_44=11,FFNN_33=FFNN_22=xx,DDCCOOPPLLUUSS=11 MMHHzz VCC=3V 2.1 3.4 5.2 VCC=2.2V 13.5 21.5 33 ff(DCO=27) FFNN_88=00,FFNN_44=11,FFNN_33=FFNN_22=xx,DDCCOOPPLLUUSS=11 MMHHzz VCC=3V 16 26.6 41 VCC=2.2V 2.8 4.2 6.2 ff(DCO=2) FFNN_88=11,FFNN_44=FFNN_33=FFNN_22=xx,DDCCOOPPLLUUSS=11 MMHHzz VCC=3V 4.2 6.3 9.2 VCC=2.2V 21 32 46 ff(DCO=27) FFNN_88=11,FFNN_44=FFNN_33=FFNN_22=xx,DDCCOOPPLLUUSS=11 MMHHzz VCC=3V 30 46 70 SStteeppssiizzeebbeettwweeeennaaddjjaacceennttDDCCOOttaappss:: 1<TAP20 1.06 1.11 SSn Sn=fDCO(Tapn+1)/fDCO(Tapn),(seeFigure14fortaps21to27) TAP=27 1.07 1.17 DDtt TTeemmppeerraattuurreeddrriifftt,,NN((DDCCOO))==0011EEhh,,FFNN__88==FFNN__44==FFNN__33==FFNN__22==00 VCC=2.2V –0.2 –0.4 –0.6 %%__CC D=2,DCOPLUS=0 VCC=3V –0.2 –0.4 –0.6 DV DFNrif_t2w=ith0,VDCC=v2a,rDiaCtioOnP,LNU(DSC=O)0=01Eh,FN_8=FN_4=FN_3= VCC=2.2V/3V 0 5 15 %/V f f (DCO) (DCO) f f (DCO3V) (DCO25C) 1.0 1.0 0 1.8 2.4 3.0 3.6 --40 --20 0 20 40 60 85 VCC--V TA--C Figure13.DCOFrequencyvsSupplyVoltageV andvsAmbientTemperature CC 40 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) s p a 1.17 T O C D n e e w et b o Max ati 1.11 R e z si p e St - 1.07 n S 1.06 Min 1 20 27 DCOTap Figure14.DCOTapStepSize Legend O) C D f( ToleranceatTap27 DCOFrequency AdjustedbyBits 9 5 2 to2 inSCFI1{N } (DCO) ToleranceatTap2 OverlappingDCORanges: uninterruptedfrequencyrange FN_2=0 FN_2=1 FN_2=x FN_2=x FN_2=x FN_3=0 FN_3=0 FN_3=1 FN_3=x FN_3=x FN_4=0 FN_4=0 FN_4=0 FN_4=1 FN_4=x FN_8=0 FN_8=0 FN_8=0 FN_8=0 FN_8=1 Figure15.FiveOverlappingDCORangesControlledbyFN_xBits POSTOFFICEBOX655303DALLAS,TEXAS75265 41

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) crystaloscillator,LFXT1,low-frequencymode(seeNote4) PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT LFXT1oscillatorcrystal fLFXT1,LF frequency,LFmode XTS=0 1.8Vto3.6V 32768 Hz XTS=0,LFXT1Sx=0, fLFXT1,LF=32768Hz, 500 kΩ OOsscciillllaattiioonnaalllloowwaanncceeffoorrLLFF CL,eff=6pF OOAALF crystals XTS=0,LFXT1Sx=0, fLFXT1,LF=32768Hz, 200 kΩ CL,eff=12pF XTS=0,XCAPxPF=0 1 pF Integratedeffectiveload XTS=0,XCAPxPF=1 5.5 pF CCL,eff ccaappaacciittaannccee,LLFFmmooddee XTS=0,XCAPxPF=2 8.5 pF ((sseeeeNNoottee11)) XTS=0,XCAPxPF=3 11 pF DutyCycle LFmode XTS=0,fLFXT1,LF=32768Hz 2.2V/3V 30 50 70 % MeasuredatP1.5/TACLK/ACLK Oscillatorfaultfrequency, fFault,LF LFmode(seeNote3) XTS=0(seeNote2) 2.2V/3V 10 10,000 Hz NOTES: 1. Includesparasiticbondandpackagecapacitance(approximately2pFperpin). SincethePCBaddsadditionalcapacitanceitisrecommendedtoverifythecorrectloadbymeasuringtheACLKfrequency.Fora correctsetuptheeffectiveloadcapacitanceshouldalwaysmatchthespecificationoftheusedcrystal. 2. Measuredwithlogiclevelinputfrequencybutalsoappliestooperationwithcrystals. 3. FrequenciesbelowtheMINspecificationwillsetthefaultflag,frequenciesabovetheMAXspecificationwillnotsetthefaultflag. Frequenciesinbetweenmightsettheflag. 4. ToimproveEMIontheLFXT1oscillatorthefollowingguidelinesshouldbeobserved. -- Keepthetracebetweenthedeviceandthecrystalasshortaspossible. -- Designagoodgroundplanearoundtheoscillatorpins. -- PreventcrosstalkfromotherclockordatalinesintooscillatorpinsXINandXOUT. -- AvoidrunningPCBtracesunderneathoradjacenttotheXINandXOUTpins. -- UseassemblymaterialsandpraxistoavoidanyparasiticloadontheoscillatorXINandXOUTpins. -- Ifconformalcoatingisused,ensurethatitdoesnotinducecapacitive/resistiveleakagebetweentheoscillatorpins. -- DonotroutetheXOUTlinetotheJTAGheadertosupporttheserialprogrammingadapterasshowninother documentation.Thissignalisnolongerrequiredfortheserialprogrammingadapter. crystaloscillator,LFXT1,high-frequencymode PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT fXT1 XT1oscillatorcrystalfrequency XTS=1,Ceramicresonator 1.8Vto3.6V 0.45 6 MHz fXT1 XT1oscillatorcrystalfrequency XTS=1,Crystal 1.8Vto3.6V 1 6 MHz Integratedeffectiveload CL,eff capacitance(seeNote1) (seeNote2) 1 pF DutyCycle MeasuredatP1.5/TACLK/ACLK 2.2V/3V 40 50 60 % NOTES: 1. Includesparasiticbondandpackagecapacitance(approximately2pFperpin). SincethePCBaddsadditionalcapacitanceitisrecommendedtoverifythecorrectloadbymeasuringtheACLKfrequency.Fora correctsetuptheeffectiveloadcapacitanceshouldalwaysmatchthespecificationoftheusedcrystal. 2. Requiresexternalcapacitorsatbothterminals.Valuesarespecifiedbycrystalmanufacturers. 42 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) crystaloscillator,XT2oscillator(seeNote5) PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT XT2oscillatorcrystalfrequency, fXT2,0 mode0 XT2Sx=0 1.8Vto3.6V 0.4 1 MHz XT2oscillatorcrystalfrequency, fXT2,1 mode1 XT2Sx=1 1.8Vto3.6V 1 4 MHz 1.8Vto3.6V 2 10 MHz XXTT22osciillllattorcrysttallffrequency, ffXXTT22,,22 mmooddee22 XXTT22SSxx=22 2.2Vto3.6V 2 12 MHz 3.0Vto3.6V 2 16 MHz 1.8Vto3.6V 0.4 10 MHz XXTT22osciillllattorllogiicllevellsquare ffXXTT22,,llooggiicc wwaavveeiinnppuuttffrreeqquueennccyy XXTT22SSxx=33 2.2Vto3.6V 0.4 12 MHz 3.0Vto3.6V 0.4 16 MHz XT2Sx=0, 2700 Ω fXT2=1MHz,CL,eff=15pF OscillationallowanceforHF XT2Sx=1 OAXT2 ccrryyssttaallss((sseeeeFFiigguurree1166)) fXT2=4MHz,CL,eff=15pF 800 Ω XT2Sx=2 300 Ω fXT2=16MHz,CL,eff=15pF Integratedeffectiveload CL,eff capacitance(seeNote1) (seeNote2) 1 pF MeasuredatP1.5/TACLK/ACLK, 2.2V/3V 40 50 60 % fXT2=10MHz DDuuttyyccyyccllee MeasuredatP1.5/TACLK/ACLK, 2.2V/3V 40 50 60 % fXT2=16MHz Oscillatorfaultfrequency fFault,XT2 (seeNote4) XT2Sx=3(seeNotes3) 2.2V/3V 30 300 kHz NOTES: 1. Includesparasiticbondandpackagecapacitance(approximately2pFperpin). SincethePCBaddsadditionalcapacitanceitisrecommendedtoverifythecorrectloadbymeasuringthefrequency.Foracorrect setuptheeffectiveloadcapacitanceshouldalwaysmatchthespecificationoftheusedcrystal. 2. Requiresexternalcapacitorsatbothterminals.Valuesarespecifiedbycrystalmanufacturers. 3. Measuredwithlogiclevelinputfrequencybutalsoappliestooperationwithcrystals. 4. FrequenciesbelowtheMINspecificationwillsetthefaultflag,frequenciesabovetheMAXspecificationwillnotsetthefaultflag. Frequenciesinbetweenmightsettheflag. 5. ToimproveEMIontheXT2oscillatorthefollowingguidelinesshouldbeobserved. -- Keepthetracebetweenthedeviceandthecrystalasshortaspossible. -- Designagoodgroundplanearoundtheoscillatorpins. -- PreventcrosstalkfromotherclockordatalinesintooscillatorpinsXT2INandXT2OUT. -- AvoidrunningPCBtracesunderneathoradjacenttotheXT2INandXT2OUTpins. -- UseassemblymaterialsandpraxistoavoidanyparasiticloadontheoscillatorXT2INandXT2OUTpins. -- Ifconformalcoatingisused,ensurethatitdoesnotinducecapacitive/resistiveleakagebetweentheoscillatorpins. POSTOFFICEBOX655303DALLAS,TEXAS75265 43

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) typicalcharacteristics -- XT2oscillator 100000.00 s m h 10000.00 O -- e c n a w o 1000.00 All n o ati XT2Sx=2 cill s 100.00 O XT2Sx=0 XT2Sx=1 10.00 0.10 1.00 10.00 100.00 CrystalFrequency--MHz Figure16.OscillationAllowancevsCrystalFrequency,C =15pF,T =25C L,eff A 44 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) wake-upLPM3 PARAMETER TESTCONDITIONS VCC MIN MAX UNIT f=1MHz 6 ttdd((LLPPMM33)) DDeellaayyttiimmee f=2MHz 22..22VV//33VV 6 ss f=3MHz 6 LCD_A PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT Chargepumpenabled VCC(LCD) Supplyvoltagerange (LCDCPEN=1,VLCDx>0000) 2.2 3.6 V Chargepumpenabled CLCD CapacitoronLCDCAP(seeNote1) (LCDCPEN=1,VLCDx>0000) 4.7 F VLCD(typ)=3V,LCDCPEN=1, VLCDx=1000,allsegmentson, ICC(LCD) Supplycurrent fLCD= fACLK/32 2.2V 3.8 A noLCDconnected(seeNote2), TA=25C fLCD LCDfrequency 1.1 kHz VLCD LCDvoltage VLCDx=0000 VCC V VLCD LCDvoltage VLCDx=0001 2.60 V VLCD LCDvoltage VLCDx=0010 2.66 V VLCD LCDvoltage VLCDx=0011 2.72 V VLCD LCDvoltage VLCDx=0100 2.78 V VLCD LCDvoltage VLCDx=0101 2.84 V VLCD LCDvoltage VLCDx=0110 2.90 V VLCD LCDvoltage VLCDx=0111 2.96 V VLCD LCDvoltage VLCDx=1000 3.02 V VLCD LCDvoltage VLCDx=1001 3.08 V VLCD LCDvoltage VLCDx=1010 3.14 V VLCD LCDvoltage VLCDx=1011 3.20 V VLCD LCDvoltage VLCDx=1100 3.26 V VLCD LCDvoltage VLCDx=1101 3.32 V VLCD LCDvoltage VLCDx=1110 3.38 V VLCD LCDvoltage VLCDx=1111 3.44 3.60 V RLCD LCDdriveroutputimpedance VVLLCCDD=x3=V1,0L0C0D,ICLOPAEDN==110, A 2.2V 10 k NOTES: 1. Enablingtheinternalchargepumpwithanexternalcapacitorsmallerthantheminimumspecifiedmightdamagethedevice. 2. ConnectinganactualdisplaywillincreasethecurrentconsumptiondependingonthesizeoftheLCD. POSTOFFICEBOX655303DALLAS,TEXAS75265 45

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) Comparator_A(seeNote1) PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT 2.2V 25 40 II(CC) CCAAOONN=11,CCAARRSSEELL=00,CCAARREEFF=00 AA 3V 45 60 CCAAOONN==11,,CCAARRSSEELL==00,,CCAARREEFF==11//22//33,, 2.2V 30 50 II(Refladder/RefDiode) NoloadatP2.6/CA0andP2.7/CA1 3V 45 80 AA Voltage@0.25VCCnode PCA0=1,CARSEL=1,CAREF=1, V(Ref025) V NoloadatP2.6/CA0andP2.7/CA1 2.2V/3V 0.23 0.24 0.25 CC Voltage@0.5VCCnode PCA0=1,CARSEL=1,CAREF=2, V(Ref050) V NoloadatP2.6/CA0andP2.7/CA1 2.2V/3V 0.47 0.48 0.5 CC PCA0=1,CARSEL=1,CAREF=3, 2.2V 390 480 540 SSeeeeFFiigguurree1177aanndd VV(RefVT) Figure18 NNoollooaaddaattPP22.66//CCAA00aannddPP22.77//CCAA11, mmVV TA=85C 3V 400 490 550 Common-modeinput VIC voltagerange CAON=1 2.2V/3V 0 VCC--1 V Vp--VS Offsetvoltage SeeNote2 2.2V/3V --30 30 mV Vhys Inputhysteresis CAON=1 2.2V/3V 0 0.7 1.4 mV TTAA==2255CC,, 2.2V 80 165 300 nnss Overdrive10mV,withoutfilter:CAF=0 3V 70 120 240 tt(responseLHandHL)((SSeeeeNNoottee33)) TTAA==2255CC 2.2V 1.4 1.9 2.8 ss Overdrive10mV,withfilter:CAF=1 3V 0.9 1.5 2.2 NOTES: 1. TheleakagecurrentfortheComparator_AterminalsisidenticaltoIlkg(Px.x)specification. 2. TheinputoffsetvoltagecanbecancelledbyusingtheCAEXbittoinverttheComparator_Ainputsonsuccessivemeasurements. Thetwosuccessivemeasurementsarethensummedtogether. 3. TheresponsetimeismeasuredatP2.6/CA0withaninputvoltagestepandtheComparator_Aalreadyenabled(CAON=1).IfCAON issetatthesametime,asettlingtimeofupto300nsisaddedtotheresponsetime. 46 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) typical characteristics REFERENCEVOLTAGE REFERENCEVOLTAGE vs vs FREE-AIRTEMPERATURE FREE-AIRTEMPERATURE 650 650 VCC=3V VCC=2.2V V 600 V 600 m m -- -- ge Typical ge Typical Volta 550 Volta 550 nce nce Refere 500 Refere 500 -- -- F F E E VR 450 VR 450 400 400 --45 --25 --5 15 35 55 75 95 --45 --25 --5 15 35 55 75 95 TA--Free-AirTemperature--C TA--Free-AirTemperature--C Figure17.V vsTemperature Figure18.V vsTemperature (RefVT) (RefVT) 0V VCC CAF 0 1 CAON Low-PassFilter ToInternal Modules 0 0 V+ + _ V-- 1 1 CAOUT SetCAIFG Flag 2s Figure19.BlockDiagramofComparator_AModule Overdrive VCAOUT V-- 400mV V+ t(response) Figure20.OverdriveDefinition POSTOFFICEBOX655303DALLAS,TEXAS75265 47

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) Timer_A PARAMETER TESTCONDITIONS VCC MIN MAX UNIT Internal:SMCLK,ACLK, 2.2V 10 ffTA TTiimmeerr_AAcclloocckkffrreeqquueennccyy EExxtteerrnnaall::TTAACCLLKK,IINNCCLLKK, MMHHzz Dutycycle=50%10% 3V 16 tTA,cap Timer_A,capturetiming TA0,TA1,TA2 2.2V/3V 20 ns Timer_B PARAMETER TESTCONDITIONS VCC MIN MAX UNIT Internal:SMCLK,ACLK, 2.2V 10 ffTB TTiimmeerr_BBcclloocckkffrreeqquueennccyy EExxtteerrnnaall::TTBBCCLLKK, MMHHzz Dutycycle=50%10% 3V 16 tTB,cap Timer_B,capturetiming TB0,TB1,TB2 2.2V/3V 20 ns 48 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) USCI(UARTmode) -- recommendedoperatingconditions PARAMETER CONDITIONS MIN MAX UNIT Internal:SMCLK,ACLK fUSCI USCIinputclockfrequency External:UCLK fSYSTEM MHz Dutycycle=50%10% BITCLKclockfrequency fBITCLK (equalsbaudrateinMBaud) 1 MHz USCI(UARTmode) PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT UUAARRTTrreecceeiivveeddeegglliittcchhttiimmee 2.2V 50 150 600 ns tt (seeNote1) 3V 50 100 600 ns NOTES: 1. PulsesontheUARTreceiveinput(UCxRX)shorterthantheUARTreceivedeglitchtimearesuppressed.Toensurethatpulsesare correctlyrecognizedtheirwidthshouldexceedthemaximumspecificationofthedeglitchtime. USCI(SPImastermode) -- recommendedoperatingconditions PARAMETER CONDITIONS MIN MAX UNIT SMCLK,ACLK fUSCI USCIinputclockfrequency Dutycycle=50%10% fSYSTEM MHz USCI(SPImastermode)(seeNote1,Figure21,andFigure22) PARAMETER TESTCONDITIONS VCC MIN MAX UNIT SMCLK,ACLK fUSCI USCIinputclockfrequency Dutycycle=50%10% fSYSTEM MHz 2.2V 110 ns ttSU,MI SSOOMMIIiinnppuuttddaattaasseettuuppttiimmee 3V 75 ns 2.2V 0 ns ttHD,MI SSOOMMIIiinnppuuttddaattaahhoollddttiimmee 3V 0 ns UUCCLLKKeeddggeettooSSIIMMOOvvaalliidd,, 2.2V 30 ns ttVALID,MO SSIIMMOOoouuttppuuttddaattaavvaalliiddttiimmee((NNoottee22)) CL=20pF 3V 20 ns 2.2V 0 ns ttHD,MO SSIIMMOOoouuttppuuttddaattaahhoollddttiimmee((NNoottee33)) CCL=2200ppFF 3V 0 ns 1 NOTES: 1. fUCxCLK=2t with tLO∕HI≥max(tVALID,MO(USCI)+tSU,SI(Slave),tSU,MI(USCI)+tVALID,SO(Slave)). LO∕HI Fortheslave’sparameterstSU,SI(Slave)andtVALID,SO(Slave)refertotheSPIparametersoftheattachedslave. 2. SpecifiesthetimetodrivethenextvaliddatatotheSIMOoutputaftertheoutputchangingUCLKclockedge.Refertothetiming diagramsinFigure21andFigure22. 3. SpecifieshowlongdataontheSIMOoutputisvalidaftertheoutputchangingUCLKclockedge.Negativevaluesindicatethatthe dataontheSIMOoutputcanbecomeinvalidbeforetheoutputchangingclockedgeobservedonUCLK.Refertothetimingdiagrams inFigure21andFigure22. POSTOFFICEBOX655303DALLAS,TEXAS75265 49

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tSU,MI tHD,MI SOMI tHD,MO tVALID,MO SIMO Figure21.SPIMasterMode,CKPH=0 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tHD,MI tSU,MI SOMI tHD,MO tVALID,MO SIMO Figure22.SPIMasterMode,CKPH=1 50 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) USCI(SPIslavemode)(seeNote1,Figure23,andFigure24) PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT STEleadtime tSTE,LEAD STElowtoclock 2.2V/3V 50 ns STElagtime tSTE,LAG LastclocktoSTEhigh 2.2V/3V 10 ns STEaccesstime tSTE,ACC STElowtoSOMIdataout 2.2V/3V 50 ns STEdisabletime tSTE,DIS STEhightoSOMIhighimpedance 2.2V/3V 50 ns 2.2V 20 ns ttSU,SI SSIIMMOOiinnppuuttddaattaasseettuuppttiimmee 3V 15 ns 2.2V 10 ns ttHD,SI SSIIMMOOiinnppuuttddaattaahhoollddttiimmee 3V 10 ns UUCCLLKKeeddggeettooSSOOMMIIvvaalliidd,, 2.2V 75 110 ns ttVALID,SO SSOOMMIIoouuttppuuttddaattaavvaalliiddttiimmee((NNoottee22)) CL=20pF 3V 50 75 ns 2.2V 0 ns ttHD,MO SSOOMMIIoouuttppuuttddaattaahhoollddttiimmee((NNoottee33)) CCL=2200ppFF 3V 0 ns 1 NOTES: 1. fUCxCLK=2t with tLO∕HI≥max(tVALID,MO(Master)+tSU,SI(USCI),tSU,MI(Master)+tVALID,SO(USCI)). LO∕HI Forthemaster’sparameterstSU,MI(Master)andtVALID,MO(Master)refertotheSPIparametersoftheattachedmaster. 2. SpecifiesthetimetodrivethenextvaliddatatotheSOMIoutputaftertheoutputchangingUCLKclockedge.Refertothetiming diagramsinFigure23andFigure24. 3. SpecifieshowlongdataontheSOMIoutputisvalidaftertheoutputchangingUCLKclockedge.Negativevaluesindicatethatthe dataontheSOMIoutputcanbecomeinvalidbeforetheoutputchangingclockedgeobservedonUCLK.Refertothetimingdiagrams inFigure23andFigure24. POSTOFFICEBOX655303DALLAS,TEXAS75265 51

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) tSTE,LEAD tSTE,LAG STE 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tSU,SI tHD,SI SIMO tHD,SO tSTE,ACC tVALID,SO tSTE,DIS SOMI Figure23.SPISlaveMode,CKPH=0 tSTE,LEAD tSTE,LAG STE 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tHD,SI tSU,SI SIMO tHD,SO tSTE,ACC tVALID,SO tSTE,DIS SOMI Figure24.SPISlaveMode,CKPH=1 52 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) USCI(I2Cmode)(seeFigure25) PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT Internal:SMCLK,ACLK fUSCI USCIinputclockfrequency External:UCLK fSYSTEM MHz Dutycycle=50%10% fSCL SCLclockfrequency 2.2V/3V 0 400 kHz fSCL100kHz(standardmode) 2.2V/3V 4.0 s ttHD,STA HHoollddttiimmee((rreeppeeaatteedd))SSTTAARRTT fSCL>100kHz(fastmode) 2.2V/3V 0.6 s fSCL100kHz(standardmode) 2.2V/3V 4.7 s ttSU,STA SSeettuppttiimmeeffoorraarreeppeeaatteeddSSTTAARRTT fSCL>100kHz(fastmode) 2.2V/3V 0.6 s tHD,DAT Dataholdtime 2.2V/3V 0 ns tSU,DAT Datasetuptime 2.2V/3V 250 ns fSCL100kHz(standardmode) 2.2V/3V 4.0 s ttSU,STO SSeettuuppttiimmeeffoorrSSTTOOPP fSCL>100kHz(fastmode) 2.2V/3V 0.6 s PPuullsseewwiiddtthhooffssppiikkeessssuupppprreesssseeddbbyy 2.2V 50 150 600 ns ttSP inputfilter 3V 50 100 600 ns tHD,STA tSU,STA tHD,STA SDA 1/fSCL tSP SCL tSU,DAT tSU,STO tHD,DAT Figure25.I2CModeTiming POSTOFFICEBOX655303DALLAS,TEXAS75265 53

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) SD16_A,powersupplyandrecommendedoperatingconditions PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT AVCC Analogsupplyvoltage AAVVCSSC==DDVVSCSC=0V 2.5 3.6 V GAIN:1,2 3V 800 1100 SSDD1166LLPP==00,, ffSSDD1166=11MMHHzz,, GAIN:4,8,16 3V 900 1200 AAnnaallooggssuppppllyccurrrreenntt:11aaccttiivee SD16OSR=256 GAIN:32 3V 1200 1700 IISSDD1166 SSDD1166_AAcchhaannnneelliinncclluuddiinngg AA internalreference SD16LP=1, GAIN:1 3V 800 1100 ffSD16=00.55MMHHzz, SD16OSR=256 GAIN:32 3V 900 1200 AAnnaallooggffrroonntt-eennddiinnppuuttcclloocckk SD16LP=0(low-powermodedisabled) 3V 0.03 1 1.1 ffSD16 frequency SD16LP=1(low-powermodeenabled) 3V 0.03 0.5 MMHHz SD16_A,inputrange(seeNote1) PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT DDiiffffeerreennttiiaallffuullllssccaallee Bipolarmode,SD16UNI=0 --VREF/2GAIN +VREF/2GAIN mV VVID,FSR inputvoltagerange Unipolarmode,SD16UNI=1 0 +VREF/2GAIN mV SD16GAINx=1 500 DDiiffffeerreennttiiaalliinnppuutt SD16GAINx=2 250 voltagerangefor SSDD1166RREEFFOONN= SD16GAINx=4 125 VVID ssppeecciiffiieedd 1 SD16GAINx=8 62 mmVV ppeerrffoorrmmaannccee ((sseeeeNNoottee22)) SD16GAINx=16 31 SD16GAINx=32 15 Inputimpedance SD16GAINx=1 3V 200 ZZI ((oonneeiinnppuuttppiinnttoo ffSD16=11MMHHzz kk AVSS) SD16GAINx=32 3V 75 Differentialinput SD16GAINx=1 3V 300 400 ZZID iimmppeeddaannccee ffSD16=11MMHHzz kk (IN+toIN--) SD16GAINx=32 3V 100 150 Absoluteinput VI voltagerange AVSS-1V AVCC V Common-mode VIC inputvoltagerange AVSS-1V AVCC V NOTES: 1. AllparameterspertaintoeachSD16_Achannel. 2. Thefull-scalerangeisdefinedbyVFSR+=+(VREF/2)/GAINandVFSR--=--(VREF/2)/GAIN. IfVREFissourcedexternally,theanaloginputrangeshouldnotexceed80%ofVFSR+orVFSR--;i.e.,VID=0.8VFSR--to0.8VFSR+. IfVREFissourcedinternally,thegivenVIDrangesapply. 54 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) SD16_A,performance(f =1MHz,SD16OSRx=256,SD16REFON=1) SD16 PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT SD16GAINx=1, 3V 83 85 SignalamplitudeVPP=500mV SD16GAINx=2, 3V 81 84 SignalamplitudeVPP=250mV SD16GAINx=4, SSiiggnnaall-ttoo-nnooiissee++ddiissttoorrttiioonn SignalamplitudeVPP=125mV fIN=50Hz, 3V 76 79 SSIINNAADD 110000HHzz ddBB ratio SD16GAINx=8, (seeNote1) 3V 73 76 SignalamplitudeVPP=62mV SD16GAINx=16, 3V 69 73 SignalamplitudeVPP=31mV SD16GAINx=32, 3V 62 69 SignalamplitudeVPP=15mV SD16GAINx=1 3V 0.97 1.00 1.02 SD16GAINx=2 3V 1.90 1.96 2.02 SD16GAINx=4 3V 3.76 3.86 3.96 GG Nominalgain SD16GAINx=8 3V 7.36 7.62 7.84 SD16GAINx=16 3V 14.56 15.04 15.52 SD16GAINx=32 3V 27.20 28.35 29.76 SD16GAINx=1 3V 0.2 EEOS OOffffsseetteerrrroorr %%FFSSRR SD16GAINx=32 3V 1.5 OOffffsseetteerrrroorrtteemmppeerraattuurree SD16GAINx=1 3V 4 20 ppppmm ddEEOS//ddTT coefficient SD16GAINx=32 3V 20 100 FSR/_C SD16GAINx=1,Common-modeinputsignal: 3V 90 CCoommmmoonn-mmooddeerreejjeeccttiioonn VID=500mV,fIN=50Hz,100Hz CCMMRRRR ddBB ratio SD16GAINx=32,Common-modeinputsignal: 3V 75 VID=16mV,fIN=50Hz,100Hz ACpowersupplyrejection ACPSRR ratio SD16GAINx=1,VCC=3V100mV,fVCC=50Hz 3V 80 dB XT Crosstalk SD16GAINx=1,VID=500mV,fIN=50Hz,100Hz 3V <--100 dB NOTE1: ThefollowingvoltageswereappliedtotheSD16_Ainputs: VIN,A+(t)=0V+VPP/2sin(2fINt) VIN,A--(t)=0V--VPP/2sin(2fINt) resultinginadifferentialvoltageofVdiff=VIN,A+(t)--VIN,A--(t)=VPPsin(2fINt) POSTOFFICEBOX655303DALLAS,TEXAS75265 55

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) typicalcharacteristics -- SD16_ASINADperformanceoverOSR 100.0 95.0 90.0 85.0 B 80.0 d D-- 75.0 A N SI 70.0 65.0 60.0 55.0 50.0 10.00 100.00 1000.00 OSR Figure26.SINADperformanceoverOSR,f =1MHz,SD16REFON=1,SD16GAINx=1 SD16 SD16_A,temperaturesensorandbuilt--inV sense CC PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT Sensortemperature TCSensor coefficient 1.18 1.32 1.46 mV/K VOffset,sensor Sensoroffsetvoltage --100 100 mV TemperaturesensorvoltageatTA=85C 3V 435 475 515 SSensorouttputtvollttage VVSSeennssoorr ((sseeeeNNoottee22)) TemperaturesensorvoltageatTA=25C 3V 355 395 435 mmVV TemperaturesensorvoltageatTA=0C 3V 320 360 400 VCC,Sense VCCdivideratinput5 fSD16=1MHz,SD16OSRx=256,SD16REFON=1 0.08 1/11 0.1 VCC Sourceresistanceof RSource,VCC VCCdivideratinput5 20 k NOTES: 1. Thefollowingformulacanbeusedtocalculatethetemperaturesensoroutputvoltage: VSensor,typ=TCSensor(273+T[C])+VOffset,sensor[mV] 2. Resultsbasedoncharacterizationand/orproductiontest,notTCSensororVOffset,sensor. MeasuredwithfSD16=1MHz,SD16OSRx=256,SD16REFON=1. 56 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) SD16_A,built-involtagereference PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT Internalreference VREF voltage SD16REFON=1,SD16VMIDON=0 3V 1.14 1.20 1.26 V Referencesupply IREF current SD16REFON=1,SD16VMIDON=0 3V 175 260 A TC Temperaturecoefficient SD16REFON=1,SD16VMIDON=0(seeNote1) 3V 18 50 ppm/C CREF VREFloadcapacitance SD16REFON=1,SD16VMIDON=0(seeNote2) 100 nF ILOAD VcuRrEreFn(I)tmaximumload SD16REFON=1,SD16VMIDON=0 3V 200 nA SD16REFON=0-->1,SD16VMIDON=0, tON Turn-ontime CREF=100nF 3V 5 ms DCpowersupply SD16REFON=1,SD16VMIDON=0, DCPSR 100 uV/V rejectionVREF/VCC VCC=2.5Vto3.6V NOTES: 1. Calculatedusingtheboxmethod:(MAX(-40...85C)--MIN(-40...85C))/MIN(--40...85C)/(85C--(-40C)) 2. ThereisnocapacitancerequiredonVREF.However,acapacitanceofatleast100nFisrecommendedtoreduceanyreference voltagenoise. SD16_A,referenceoutputbuffer PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT Referencebufferoutput VREF,BUF voltage SD16REFON=1,SD16VMIDON=1 3V 1.2 V Referencesupply+ IREF,BUF referenceoutputbuffer SD16REFON=1,SD16VMIDON=1 3V 385 600 A quiescentcurrent Requiredload CREF(O) capacitanceonVREF SD16REFON=1,SD16VMIDON=1 470 nF Maximumloadcurrent ILOAD,Max onVREF SD16REFON=1,SD16VMIDON=1 3V 1 mA Maximumvoltage variationvsloadcurrent |ILOAD|=0to1mA 3V --15 +15 mV SD16REFON=0-->1,SD16VMIDON=0-->1, tON Turn-ontime CREF=470nF 3V 100 s SD16_A,externalreferenceinput PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT VREF(I) Inputvoltagerange SD16REFON=0 3V 1.0 1.25 1.5 V IREF(I) Inputcurrent SD16REFON=0 3V 50 nA POSTOFFICEBOX655303DALLAS,TEXAS75265 57

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) flashmemory PARAMETER TESTCONDITIONS VCC MIN TYP MAX UNIT VCC(PGM/ Programanderasesupplyvoltage 2.2 3.6 V ERASE) fFTG Flashtiminggeneratorfrequency 257 476 kHz IPGM SupplycurrentfromVCCduringprogram 2.2V/3.6V 3 5 mA IERASE SupplycurrentfromVCCduringerase 2.2V/3.6V 3 7 mA tCPT Cumulativeprogramtime(seeNote1) 2.2V/3.6V 10 ms tCMErase Cumulativemasserasetime 2.2V/3.6V 20 ms Program/Eraseendurance 104 105 cycles tRetention Dataretentionduration TJ=25C 100 years tWord Wordorbyteprogramtime 30 tFTG tBlock,0 Blockprogramtimefor1stbyteorword 25 tFTG tBlock,1-63 Blockprogramtimeforeachadditionalbyteorword 18 tFTG sseeeeNNoottee22 tBlock,End Blockprogramend-sequencewaittime 6 tFTG tMassErase Masserasetime 10593 tFTG tSegErase Segmenterasetime 4819 tFTG MCLKfrequencyinmarginalreadmode fMCLK,MGR (FCTL4.MGR0=1orFCTL4.MGR1=1) 0 1 MHz NOTES: 1. Thecumulativeprogramtimemustnotbeexceededwhenwritingtoa64-byteflashblock.Thisparameterappliestoallprogramming methods:individualword/bytewriteandblockwritemodes. 2. ThesevaluesarehardwiredintotheFlashController’sstatemachine(tFTG=1/fFTG). RAM PARAMETER TESTCONDITIONS MIN MAX UNIT V(RAMh) RAMretentionsupplyvoltage(seeNote1) CPUhalted 1.6 V NOTE1: ThisparameterdefinestheminimumsupplyvoltageVCCwhenthedatainRAMremainsunchanged.Noprogramexecutionshould happenduringthissupplyvoltagecondition. JTAGinterface TEST PARAMETER CONDITIONS VCC MIN TYP MAX UNIT 2.2V 0 5 MHz ffTCK TTCCKKiinnpputtffrreeqqueennccy SSeeeeNNoottee11 3V 0 10 MHz RInternal InternalpullupresistanceonTMS,TCK,TDI/TCLK SeeNote2 2.2V/3V 25 40 90 k NOTES: 1. fTCKmayberestrictedtomeetthetimingrequirementsofthemoduleselected. 2. TMS,TDI/TCLK,andTCKpull-upresistorsareimplementedinallversions. JTAGfuse(seeNote1) TEST PARAMETER CONDITIONS VCC MIN NOM MAX UNIT VCC(FB) Supplyvoltageduringfuse-blowcondition TA=25C 2.5 V VFB VoltagelevelonTDI/TCLKforfuse-blow:Fversions 6 7 V IFB SupplycurrentintoTDI/TCLKduringfuseblow 100 mA tFB Timetoblowfuse 1 ms NOTES: 1. Oncethefuseisblown,nofurtheraccesstotheMSP430JTAG/testandemulationfeaturesispossible.TheJTAGblockisswitched tobypassmode. 58 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 APPLICATION INFORMATION input/output schematics PortP1,P1.0toP1.5,input/outputwithSchmitttrigger DVSS P1REN.x DVSS 0 DVCC 1 1 P1DIR.x 0 Direction 1 0:Input 1:Output P1OUT.x 0 ModuleXOUT 1 P1.0/TA0 P1.1/TA0/MCLK P1SEL.x Bus P1.2/TA1 Keeper P1.3/TBOUTH/SVSOUT P1IN.x EN P1.4/TBCLK/SMCLK P1.5/TACLK/ACLK EN ModuleXIN D P1IE.x EN P1IRQ.x Q Set P1IFG.x P1SEL.x Interrupt Edge P1IES.x Select POSTOFFICEBOX655303DALLAS,TEXAS75265 59

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP1(P1.0toP1.5)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP11.XX)) XX FFUUNNCCTTIIOONN P1DIR.x P1SEL.x P1.0//TA0 0 P1.0(I/O) I:0,O:1 0 Timer_A3.CCI0A 0 1 Timer_A3.TA0 1 1 P1.1//TA0//MCLK 1 P1.1(I/O) I:0,O:1 0 Timer_A3.CCI0B 0 1 MCLK 1 1 P1.2//TA1 2 P1.2(I/O) I:0,O:1 0 Timer_A3.CCI1A 0 1 Timer_A3.TA1 1 1 P1.3// 3 P1.3(I/O) I:0,O:1 0 TBOUTH/SVSOUT Timer_B7.TBOUTH 0 1 SVSOUT 1 1 P1.4//TBCLK//SMCLK 4 P1.4(I/O) I:0,O:1 0 Timer_B7.TBCLK 0 1 SMCLK 1 1 P1.5//TACLK//ACLK 5 P1.5(I/O) I:0,O:1 0 Timer_A3.TACLK 0 1 ACLK 1 1 NOTES: 1. X:Don’tcare 60 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP1,P1.6andP1.7,input/outputwithSchmitttrigger DVSS P1REN.x DVSS 0 DVCC 1 1 P1DIR.x 0 Direction USCIDirection 1 0:Input Control 1:Output P1OUT.x 0 ModuleXOUT 1 P1.6/UCA1TXD/UCA1SIMO P1.7/UCA1RXD/UCA1SOMI P1SEL.x Bus Keeper P1IN.x EN EN ModuleXIN D P1IE.x EN P1IRQ.x Q Set P1IFG.x P1SEL.x Interrupt Edge P1IES.x Select PortP1(P1.6andP1.7)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP11.XX)) XX FFUUNNCCTTIIOONN P1DIR.x P1SEL.x P1.6// 4 P1.6(I/O) I:0,O:1 0 UCA1TXD/UCA1SIMO UCA1TXD/UCA1SIMO(seeNote1,2) X 1 P1.7// 5 P1.7(I/O) I:0,O:1 0 UCA1RXD/UCA1SOMI UCA1RXD/UCA1SOMI(seeNote1,2) X 1 NOTES: 1. X:Don’tcare 2. ThepindirectioniscontrolledbytheUSCImodule. POSTOFFICEBOX655303DALLAS,TEXAS75265 61

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP2,P2.0toP2.5,input/outputwithSchmitttrigger CAPD.x P2REN.x DVSS 0 DVCC 1 1 P2DIR.x 0 Direction USCIDirection 1 0:Input Control 1:Output P2OUT.x 0 ModuleXOUT 1 P2.0/UCB1STE/UCA1CLK P2.1/UCB1SIMO/UCB1SDA P2SEL.x Bus P2.2/UCB1SOMI/UCB1SCL Keeper P2.3/UCB1CLK/UCA1STE P2IN.x EN P2.4/UCA0TXD/UCA0SIMO P2.5/UCA0RXD/UCA0SOMI EN ModuleXIN D P2IE.x EN P2IRQ.x Q Set P2IFG.x P2SEL.x Interrupt Edge P2IES.x Select 62 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP2(P2.0toP2.5)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP22.XX)) XX FFUUNNCCTTIIOONN P2DIR.x P2SEL.x CAPD.x P2.0// 4 P2.0(I/O) I:0,O:1 0 0 UCB1STE/UCA1CLK UCB1STE/UCA1CLK(seeNote1,2,3) X 1 0 Inputbufferdisabled(seeNote6) X X 1 P2.1// 4 P2.1(I/O) I:0,O:1 0 0 UCB1SIMO/UCB1SDA UCB1SIMO/UCB1SDA(seeNote1,2,4) X 1 0 Inputbufferdisabled(seeNote6) X X 1 P2.2// 4 P2.2(I/O) I:0,O:1 0 0 UCB1SOMI/UCB1SCL UCB1SOMI/UCB1SCL(seeNote1,2,4) X 1 0 Inputbufferdisabled(seeNote6) X X 1 P2.3// 4 P2.3(I/O) I:0,O:1 0 0 UCB1CLK/UCA1STE UCB1CLK/UCA1STE(seeNote1,2,5) X 1 0 Inputbufferdisabled(seeNote6) X X 1 P2.4// 4 P2.4(I/O) I:0,O:1 0 0 UCA0TXD/UCA0SIMO UCA0TXD/UCA0SIMO(seeNote1,2) X 1 0 Inputbufferdisabled(seeNote6) X X 1 P2.5// 5 P2.5(I/O) I:0,O:1 0 0 UCA0RXD/UCA0SOMI UCA0RXD/UCA0SOMI(seeNote1,2) X 1 0 Inputbufferdisabled(seeNote6) X X 1 NOTES: 1. X:Don’tcare 2. ThepindirectioniscontrolledbytheUSCImodule. 3. UCA1CLKfunctiontakesprecedenceoverUCB1STEfunction.IfthepinisrequiredasUCA1CLKinputoroutputUSCI_B1willbe forcedto3-wireSPImodeevenif4-wireSPImodeisselected. 4. IncasetheI2Cfunctionalityisselectedtheoutputdrivesonlythelogical0toVSSlevel. 5. UCB1CLKfunctiontakesprecedenceoverUCA1STEfunction.IfthepinisrequiredasUCB1CLKinputoroutputUSCI_A1willbe forcedto3-wireSPImodeevenif4-wireSPImodeisselected. 6. SettingtheCAPD.xbitdisablestheoutputdriveraswellastheinputschmitttriggertopreventparasiticcrosscurrentswhenapplying analogsignals. POSTOFFICEBOX655303DALLAS,TEXAS75265 63

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP2,P2.6andP2.7,input/outputwithSchmitttrigger PadLogic ToComparator_A FromComparator_A (internalsignal) CAPD.x P2REN.x DVSS 0 DVCC 1 1 P2DIR.x 0 Direction 1 0:Input 1:Output P2OUT.x 0 ModuleXOUT 1 P2.6/CA0 P2.7/CA1 P2SEL.x Bus Keeper P2IN.x EN EN ModuleXIN D P2IE.x EN P2IRQ.x Q Set P2IFG.x P2SEL.x Interrupt Edge P2IES.x Select PortP2(P2.6andP2.7)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP22.XX)) XX FFUUNNCCTTIIOONN P2DIR.x P2SEL.x CAPD.x P2.6//CA0 6 P2.6(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 CA0(seeNote3) X X 1 P2.7//CA1 7 P2.7(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 CA1(seeNote3) X X 1 NOTES: 1. X:Don’tcare 2. N/A:Notavailableornotapplicable. 3. SettingtheCAPD.xbitdisablestheoutputdriveraswellastheinputschmitttriggertopreventparasiticcrosscurrentswhenapplying analogsignals. 64 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP3,P3.0toP3.3,input/outputwithSchmitttrigger DVSS PadLogic P3REN.x DVSS 0 DVCC 1 1 P3DIR.x 0 Direction USCIDirection 1 0:Input Control 1:Output P3OUT.x 0 ModuleXOUT 1 P3.0/UCB0STE/UCA0CLK P3.1/UCB0SIMO/UCB0SDA P3SEL.x Bus P3.2/UCB0SOMI/UCB0SCL Keeper P3.3/UCB0CLK/UCA0STE P3IN.x EN EN ModuleXIN D PortP3(P3.0toP3.3)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP33.XX)) XX FFUUNNCCTTIIOONN P3DIR.x P3SEL.x P3.0// 0 P3.0(I/O) I:0,O:1 0 UCA0CLK/UCB0STE UCA0CLK/UCB0STE(seeNotes1,2,3) X 1 P3.1/ 1 P3.1(I/O) I:0,O:1 0 UUCCBB00SSIIMMOO// UCB0SDA UCB0SIMO/UCB0SDA(seeNotes1,2,4) X 1 P3.2/ 2 P3.2(I/O) I:0,O:1 0 UUCCBB00SSOOMMII// UCB0SCL UCB0SOMI/UCB0SCL(seeNotes1,2,4) X 1 P3.3// 3 P3.3(I/O) I:0,O:1 0 UCB0CLK/UCA0STE UCB0CLK/UCA0STE(seeNotes1,2,5) X 1 NOTES: 1. X:Don’tcare 2. ThepindirectioniscontrolledbytheUSCImodule. 3. UCA0CLKfunctiontakesprecedenceoverUCB0STEfunction.IfthepinisrequiredasUCA0CLKinputoroutputUSCI_B0willbe forcedto3-wireSPImodeevenif4-wireSPImodeisselected. 4. IncasetheI2Cfunctionalityisselectedtheoutputdrivesonlythelogical0toVSSlevel. 5. UCB0CLKfunctiontakesprecedenceoverUCA0STEfunction.IfthepinisrequiredasUCB0CLKinputoroutputUSCI_A0willbe forcedto3-wireSPImodeevenif4-wireSPImodeisselected. POSTOFFICEBOX655303DALLAS,TEXAS75265 65

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP3,P3.4,input/outputwithSchmitttrigger PadLogic SegmentS39 LCDS36 P3REN.4 DVSS 0 DVCC 1 1 P3DIR.4 0 Direction 1 0:Input 1:Output P3OUT.4 0 ModuleXOUT 1 P3.4/TA2/S39 P3SEL.4 Bus Keeper P3IN.4 EN EN ModuleXIN D PortP3(P3.4)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP33.XX)) XX FFUUNNCCTTIIOONN P3DIR.x P3SEL.x LCDS36 P3.4//TA2//S39 4 P3.4(I/O) I:0,O:1 0 0 Timer_A3.CCI2A 0 1 0 Timer_A3.TA2 1 1 0 S39 X X 1 NOTES: 1. X:Don’tcare 66 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP3,P3.5toP3.7,input/outputwithSchmitttrigger Timer_BOutputTristateLogic P1.3/TBOUTH/SVSOUT P1SEL.3 P1DIR.3 PadLogic SegmentSz LCDS36 P3REN.x DVSS 0 DVCC 1 1 P3DIR.x 0 Direction 1 0:Input 1:Output P3OUT.x 0 ModuleXOUT 1 P3.5/TB0/S38 P3.6/TB1/S37 P3SEL.x Bus P3.7/TB2/S36 Keeper P3IN.x EN EN ModuleXIN D PortP3(P3.5toP3.7)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP33.XX)) XX FFUUNNCCTTIIOONN P3DIR.x P3SEL.x LCDS36 P3.5//TB0//S38 5 P3.5(I/O) I:0,O:1 0 0 Timer_B3.CCI0AandTimer_B3.CCI0B 0 1 0 Timer_B3.TB0(seeNote2) 1 1 0 S38 X X 1 P3.6//TB1//S37 6 P3.6(I/O) I:0,O:1 0 0 Timer_B3.CCI1AandTimer_B3.CCI1B 0 1 0 Timer_B3.TB1(seeNote2) 1 1 0 S37 X X 1 P3.7//TB2//S36 7 P3.7(I/O) I:0,O:1 0 0 Timer_B3.CCI2AandTimer_B3.CCI2B 0 1 0 Timer_B3.TB3(seeNote2) 1 1 0 S36 X X 1 NOTES: 1. X:Don’tcare 2. SettingTBOUTHcausesallTimer_Boutputstobesettohighimpedance. POSTOFFICEBOX655303DALLAS,TEXAS75265 67

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP4,P4.0andP4.1,input/outputwithSchmitttrigger PadLogic SegmentSz LCDS32 P4REN.x DVSS 0 DVCC 1 1 P4DIR.x 0 Direction 1 0:Input 1:Output P4OUT.x 0 ModuleXOUT 1 P4.0/CAOUT/S35 P4.1/DMAE0/S34 P4SEL.x Bus Keeper P4IN.x EN EN ModuleXIN D PortP4(P4.0andP4.1)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP44.XX)) XX FFUUNNCCTTIIOONN P4DIR.x P4SEL.x LCDS32 P4.0//CAOUT//S35 0 P4.0(I/O) I:0,O:1 0 0 N/A 0 1 0 CAOUT 1 1 0 S35 X X 1 P4.1//DMAE0//S34 1 P4.1(I/O) I:0,O:1 0 0 DMAE0 0 1 0 DVSS 1 1 0 S34 X X 1 NOTES: 1. X:Don’tcare 2. N/A:Notavailableornotapplicable. 68 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP4,P4.2toP4.7,input/outputwithSchmitttrigger PadLogic SegmentSz LCDS... P4REN.x DVSS 0 DVCC 1 1 P4DIR.x 0 Direction 1 0:Input 1:Output P4OUT.x 0 ModuleXOUT 1 P4.2/S33 P4.3/S32 P4SEL.x Bus P4.4/S31 Keeper P4.5/S30 P4IN.x EN P4.6/S29 P4.7/S28 EN ModuleXIN D POSTOFFICEBOX655303DALLAS,TEXAS75265 69

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP4(P4.2andP4.3)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP44.XX)) XX FFUUNNCCTTIIOONN P4DIR.x P4SEL.x LCDS32 P4.2//S33 2 P4.2(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S33 X X 1 P4.3//S32 3 P4.3(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S32 X X 1 NOTES: 1. X:Don’tcare 2. N/A:Notavailableornotapplicable. PortP4(P4.4toP4.7)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP44.XX)) XX FFUUNNCCTTIIOONN P4DIR.x P4SEL.x LCDS28 P4.4//S31 4 P4.4(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S31 X X 1 P4.5//S30 5 P4.5(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S30 X X 1 P4.6//S29 5 P4.6(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S29 X X 1 P4.7//S28 5 P4.7(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S28 X X 1 NOTES: 1. X:Don’tcare 2. N/A:Notavailableornotapplicable. 70 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP5,P5.0,input/outputwithSchmitttrigger PadLogic ToSVS SVSCTL.VLDx=15 P5REN.0 DVSS 0 DVCC 1 1 P5DIR.0 0 Direction 1 0:Input 1:Output P5OUT.0 0 DVSS 1 P5.0/SVSIN P5SEL.0 Bus Keeper P5IN.0 EN PortP5(P5.0)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP55.XX)) XX FFUUNNCCTTIIOONN P5DIR.x P5SEL.x P5.0//SVSIN 0 P5.0(I/O)(seeNote1) I:0,O:1 0 SVSIN(seeNotes1and3) X 1 NOTES: 1. X:Don’tcare 2. N/A:Notavailableornotapplicable. 3. SettingtheP5SEL.xbitdisablestheoutputdriveraswellastheinputSchmitttriggertopreventparasiticcrosscurrentswhen applyinganalogsignals.ToenabletheSVSINfunctiontheSVSinputalsoneedstobeselectedintheSVSmodulebysettingthe VLDxbitsto15. POSTOFFICEBOX655303DALLAS,TEXAS75265 71

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP5,P5.1toP5.7,input/outputwithSchmitttrigger PadLogic LCDSignal P5REN.x DVSS 0 DVCC 1 1 P5DIR.x 0 Direction 1 0:Input 1:Output P5OUT.x 0 DVSS 1 P5.1/COM0 P5.2/COM1 P5SEL.x Bus P5.3/COM2 Keeper P5.4/COM3 P5IN.x EN P5.5/R03 P5.6/LCDREF/R13 P5.7/R23 PortP5(P5.1toP5.7)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP55.XX)) XX FFUUNNCCTTIIOONN P5DIR.x P5SEL.x P5.1/COM0 2 P5.1(I/O) I:0,O:1 0 COM0(seeNote2) X 1 P5.2//COM1 2 P5.2(I/O) I:0,O:1 0 COM1(seeNote2) X 1 P5.3//COM2 3 P5.3(I/O) I:0,O:1 0 COM2(seeNote2) X 1 P5.4//COM3 4 P5.4(I/O) I:0,O:1 0 COM3(seeNote2) X 1 P5.5//R03 5 P5.5(I/O) I:0,O:1 0 R03(seeNote2) X 1 P5.6//LCDREF//R13 6 P5.6(I/O) I:0,O:1 0 R13orLCDREF(seeNotes2and3) X 1 P5.7//R23 7 P5.7(I/O) I:0,O:1 0 R23(seeNote2) X 1 NOTES: 1. X:Don’tcare 2. SettingtheP5SEL.xbitdisablestheoutputdriveraswellastheinputSchmitttriggertopreventparasiticcrosscurrentswhen applyinganalogsignals. 3. ExternalreferencefortheLCD_AchargepumpisappliedwhenVLCDREFx=01.OtherwiseR13isselected. 72 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP7toportP10,input/outputwithSchmitttrigger PadLogic SegmentSz LCDS... PyREN.x DVSS 0 DVCC 1 1 PyDIR.x 0 Direction 1 0:Input 1:Output PyOUT.x 0 ModuleXOUT 1 Py.x/Sz PySEL.x Bus Keeper PyIN.x EN EN ModuleXIN D POSTOFFICEBOX655303DALLAS,TEXAS75265 73

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP7(P7.0toP7.3)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP77.XX)) XX FFUUNNCCTTIIOONN P7DIR.x P7SEL.x LCDS24 P7.0//S27 0 P7.0(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S27 X X 1 P7.1//S26 1 P7.1(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S26 X X 1 P7.2//S25 2 P7.2(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S25 X X 1 P7.3//S24 3 P7.3(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S24 X X 1 NOTES: 1. X:Don’tcare 2. N/A:Notavailableornotapplicable. PortP7(P7.4toP7.7)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP77.XX)) XX FFUUNNCCTTIIOONN P7DIR.x P7SEL.x LCDS20 P7.4//S23 4 P7.4(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S23 X X 1 P7.5//S22 5 P7.5(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S22 X X 1 P7.6//S21 6 P7.6(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S21 X X 1 P7.7//S20 7 P7.7(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S20 X X 1 NOTES: 1. X:Don’tcare 2. N/A:Notavailableornotapplicable. 74 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP8(P8.0toP8.3)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP88.XX)) XX FFUUNNCCTTIIOONN P8DIR.x P8SEL.x LCDS16 P8.0/S19 0 P8.0(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S19 X X 1 P8.1/S18 1 P8.0(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S18 X X 1 P8.2/S17 2 P8.2(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S17 X X 1 P8.3/S16 3 P8.3(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S16 X X 1 NOTES: 1. X:Don’tcare 2. N/A:Notavailableornotapplicable. PortP8(P8.4toP8.7)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP88.XX)) XX FFUUNNCCTTIIOONN P8DIR.x P8SEL.x LCDS12 P8.4/S15 4 P8.4(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S15 X X 1 P8.5/S14 5 P8.5(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S14 X X 1 P8.6/S13 6 P8.6(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S13 X X 1 P8.7/S12 7 P8.7(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S12 X X 1 NOTES: 1. X:Don’tcare 2. N/A:Notavailableornotapplicable. POSTOFFICEBOX655303DALLAS,TEXAS75265 75

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP9(P9.0toP9.3)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP99.XX)) XX FFUUNNCCTTIIOONN P9DIR.x P9SEL.x LCDS8 P9.0/S11 0 P9.0(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S11 X X 1 P9.1/S10 1 P9.1(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S10 X X 1 P9.2/S9 2 P9.2(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S9 X X 1 P9.3/S8 3 P9.3(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S8 X X 1 NOTES: 1. X:Don’tcare 2. N/A:Notavailableornotapplicable. PortP9(P9.4toP9.7)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP99.XX)) XX FFUUNNCCTTIIOONN P9DIR.x P9SEL.x LCDS4 P9.4/S7 4 P9.4(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S7 X X 1 P9.5/S6 5 P9.5(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S6 X X 1 P9.6/S5 6 P9.6(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S5 X X 1 P9.7/S4 7 P9.7(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S4 X X 1 NOTES: 1. X:Don’tcare 2. N/A:Notavailableornotapplicable. 76 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 PortP10(P10.0toP10.3)pinfunctions CONTROLBITS/SIGNALS PPIINNNNAAMMEE((PP1100.XX)) XX FFUUNNCCTTIIOONN P10DIR.x P10SEL.x LCDS0 P10.0/S3 0 P10.0(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S3 X X 1 P10.1/S2 1 P10.1(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S2 X X 1 P10.2/S1 2 P10.2(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S1 X X 1 P10.3/S0 3 P10.3(I/O) I:0,O:1 0 0 N/A 0 1 0 DVSS 1 1 0 S0 X X 1 NOTES: 1. X:Don’tcare 2. N/A:Notavailableornotapplicable. POSTOFFICEBOX655303DALLAS,TEXAS75265 77

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 JTAG pins (TMS, TCK, TDI/TCLK, TDO/TDI), input/output with Schmitt trigger or output TDO ControlledbyJTAG ControlledbyJTAG TDO/TDI JTAG Controlled DV byJTAG CC TDI BurnandTest Fuse TDI/TCLK Test DV and CC Emulation TMS Module TMS DV CC TCK TCK RST/NMI Tau~50ns D Brownout G U S D TCK U G S 78 POSTOFFICEBOX655303DALLAS,TEXAS75265

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 JTAG fuse check mode MSP430devicesthathavethefuseontheTDI/TCLKterminalhaveafusecheckmodethatteststhecontinuity ofthefusethefirsttimetheJTAGportisaccessedafterapower-onreset(POR).Whenactivated,afusecheck current(I )of1mAat3VcanflowfromtheTDI/TCLKpintogroundifthefuseisnotburned.Caremustbe (TF) takentoavoidaccidentallyactivatingthefusecheckmodeandincreasingoverallsystempowerconsumption. ActivationofthefusecheckmodeoccurswiththefirstnegativeedgeontheTMSpinafterpoweruporifthe TMSisbeingheldlowduringpowerup.ThesecondpositiveedgeontheTMSpindeactivatesthefusecheck mode.Afterdeactivation,thefusecheckmoderemainsinactiveuntilanotherPORoccurs.AftereachPORthe fusecheckmodehasthepotentialtobeactivated. ThefusecheckcurrentonlyflowswhenthefusecheckmodeisactiveandtheTMSpinisinalowstate(see Figure27). Therefore, the additional current flow can be prevented by holding the TMS pin high (default condition).TheJTAGpinsareterminatedinternallyandthereforedonotrequireexternaltermination. TimeTMSGoesLowAfterPOR TMS I(TF) ITDI/TCLK Figure27.FuseCheckModeCurrentMSP430F471x3/6/7 POSTOFFICEBOX655303DALLAS,TEXAS75265 79

MSP430F471x3, MSP430F471x6, MSP430F471x7 MIXED SIGNAL MICROCONTROLLER SLAS626C--OCTOBER2008--REVISEDMARCH2011 Data Sheet Revision History LITERATURE SUMMARY NUMBER SLAS626 ProductPreviewrelease SLAS626A ProductionDatarelease SLAS626B AddedMSP430F471x3,MSP430F47126,andMSP430F47127devices CorrectedpinnumbersinBSLfunctiontable(page16) SLAS626C Changedlimitsontd(SVSon)parameter(page38) NOTE: Pageandfigurenumbersrefertotherespectivedocumentrevisionandmaydifferinotherrevisions. 80 POSTOFFICEBOX655303DALLAS,TEXAS75265

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) MSP430F47126IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47126 & no Sb/Br) MSP430F47126IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47126 & no Sb/Br) MSP430F47127IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47127 & no Sb/Br) MSP430F47127IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47127 & no Sb/Br) MSP430F47163IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47163 & no Sb/Br) MSP430F47163IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47163 & no Sb/Br) MSP430F47166IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47166 & no Sb/Br) REV # MSP430F47166IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47166 & no Sb/Br) REV # MSP430F47167IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47167 & no Sb/Br) REV # MSP430F47167IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47167 & no Sb/Br) REV # MSP430F47173IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47173 & no Sb/Br) MSP430F47173IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47173 & no Sb/Br) MSP430F47176IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47176 & no Sb/Br) REV # MSP430F47176IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47176 & no Sb/Br) REV # MSP430F47177IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47177 & no Sb/Br) REV # MSP430F47177IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47177 & no Sb/Br) REV # MSP430F47183IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47183 & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) MSP430F47183IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47183 & no Sb/Br) MSP430F47186IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47186 & no Sb/Br) REV # MSP430F47186IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47186 & no Sb/Br) REV # MSP430F47187IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47187 & no Sb/Br) REV # MSP430F47187IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47187 & no Sb/Br) REV # MSP430F47193IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47193 & no Sb/Br) MSP430F47193IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47193 & no Sb/Br) MSP430F47196IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47196 & no Sb/Br) REV # MSP430F47196IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47196 & no Sb/Br) REV # MSP430F47197IPZ ACTIVE LQFP PZ 100 90 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47197 & no Sb/Br) REV # MSP430F47197IPZR ACTIVE LQFP PZ 100 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 M430F47197 & no Sb/Br) REV # (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 15-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) MSP430F47163IPZR LQFP PZ 100 1000 330.0 24.4 17.0 17.0 2.1 20.0 24.0 Q2 MSP430F47173IPZR LQFP PZ 100 1000 330.0 24.4 17.0 17.0 2.1 20.0 24.0 Q2 MSP430F47183IPZR LQFP PZ 100 1000 330.0 24.4 17.0 17.0 2.1 20.0 24.0 Q2 MSP430F47193IPZR LQFP PZ 100 1000 330.0 24.4 17.0 17.0 2.1 20.0 24.0 Q2 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 15-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) MSP430F47163IPZR LQFP PZ 100 1000 350.0 350.0 43.0 MSP430F47173IPZR LQFP PZ 100 1000 350.0 350.0 43.0 MSP430F47183IPZR LQFP PZ 100 1000 350.0 350.0 43.0 MSP430F47193IPZR LQFP PZ 100 1000 350.0 350.0 43.0 PackMaterials-Page2

MECHANICAL DATA MTQF013A – OCTOBER 1994 – REVISED DECEMBER 1996 PZ (S-PQFP-G100) PLASTIC QUAD FLATPACK 0,27 0,50 0,08 M 0,17 75 51 76 50 100 26 0,13 NOM 1 25 12,00 TYP Gage Plane 14,20 SQ 13,80 0,25 16,20 SQ 0,05 MIN 0°–7° 15,80 1,45 0,75 1,35 0,45 Seating Plane 1,60 MAX 0,08 4040149/B 11/96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Falls within JEDEC MS-026 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

None

IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated