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ICGOO电子元器件商城为您提供MRF1550NT1由Freescale Semiconductor设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 MRF1550NT1价格参考。Freescale SemiconductorMRF1550NT1封装/规格:晶体管 - FET,MOSFET - 射频, RF Mosfet LDMOS 12.5V 500mA 175MHz 14.5dB 50W TO-272-6。您可以下载MRF1550NT1参考资料、Datasheet数据手册功能说明书,资料中有MRF1550NT1 详细功能的应用电路图电压和使用方法及教程。

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产品目录

分立半导体产品

描述

IC MOSFET RF N-CHAN TO272-6 WRAP

产品分类

RF FET

品牌

Freescale Semiconductor

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产品型号

MRF1550NT1

rohs

不受无铅要求限制 / 符合限制有害物质指令(RoHS)规范要求

产品系列

-

供应商器件封装

TO-272-6

其它名称

MRF1550NT1CT

功率-输出

50W

包装

剪切带 (CT)

噪声系数

-

增益

14.5dB

封装/外壳

TO-272AA

晶体管类型

LDMOS

标准包装

1

电压-测试

12.5V

电压-额定

40V

电流-测试

500mA

频率

175MHz

额定电流

12A

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Freescale Semiconductor Document Number: MRF1550N Technical Data Rev. 15, 6/2009 RF Power Field Effect Transistors MRF1550NT1 N-Channel Enhancement-Mode Lateral MOSFETs MRF1550FNT1 Designed for broadband commercial and industrial applications with frequen- cies to 175 MHz. The high gain and broadband performance of these devices make them ideal for large-signal, common source amplifier applications in 12.5 volt mobile FM equipment. 175 MHz, 50 W, 12.5 V • Specified Performance @ 175 MHz, 12.5 Volts LATERAL N-CHANNEL Output Power (cid:151) 50 Watts BROADBAND Power Gain (cid:151) 14.5 dB RF POWER MOSFETs Efficiency (cid:151) 55% • Capable of Handling 20:1 VSWR, @ 15.6 Vdc, 175 MHz, 2 dB Overdrive Features • Excellent Thermal Stability • Characterized with Series Equivalent Large-Signal Impedance Parameters • Broadband-Full Power Across the Band: 135-175 MHz • 200(cid:2)C Capable Plastic Package CASE 1264-10, STYLE 1 • N Suffix Indicates Lead-Free Terminations. RoHS Compliant. TO-272-6 WRAP • In Tape and Reel. T1 Suffix = 500 Units per 44 mm, 13 inch Reel. PLASTIC MRF1550NT1 CASE 1264A-03, STYLE 1 TO-272-6 PLASTIC MRF1550FNT1 Table 1. Maximum Ratings Rating Symbol Value Unit Drain-Source Voltage VDSS -0.5, +40 Vdc Gate-Source Voltage VGS ±20 Vdc Drain Current (cid:151) Continuous ID 12 Adc Total Device Dissipation @ TC = 25°C (1) PD 165 W Derate above 25°C 0.50 W/°C Storage Temperature Range Tstg -65 to +150 °C Operating Junction Temperature TJ 200 °C Table 2. Thermal Characteristics Characteristic Symbol Value(2) Unit Thermal Resistance, Junction to Case RθJC 0.75 °C/W Table 3. Moisture Sensitivity Level Test Methodology Rating Package Peak Temperature Unit Per JESD22-A113, IPC/JEDEC J-STD-020 3 260 °C TJ(cid:150)TC 1. Calculated based on the formula PD = RθJC 2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. © Freescale Semiconductor, Inc., 2008-2009. All rights reserved. MRF1550NT1 MRF1550FNT1 RF Device Data Freescale Semiconductor 1

Table 4. Electrical Characteristics (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics Zero Gate Voltage Drain Current IDSS (cid:151) (cid:151) 1 μAdc (VDS = 60 Vdc, VGS = 0 Vdc) Gate-Source Leakage Current IGSS (cid:151) (cid:151) 0.5 μAdc (VGS = 10 Vdc, VDS = 0 Vdc) On Characteristics Gate Threshold Voltage VGS(th) 1 (cid:151) 3 Vdc (VDS = 12.5 Vdc, ID = 800 μA) Drain-Source On-Voltage RDS(on) (cid:151) (cid:151) 0.5 Ω (VGS = 5 Vdc, ID = 1.2 A) Drain-Source On-Voltage VDS(on) (cid:151) (cid:151) 1 Vdc (VGS = 10 Vdc, ID = 4.0 Adc) Dynamic Characteristics Input Capacitance (Includes Input Matching Capacitance) Ciss (cid:151) (cid:151) 500 pF (VDS = 12.5 Vdc, VGS = 0 V, f = 1 MHz) Output Capacitance Coss (cid:151) (cid:151) 250 pF (VDS = 12.5 Vdc, VGS = 0 V, f = 1 MHz) Reverse Transfer Capacitance Crss (cid:151) (cid:151) 35 pF (VDS = 12.5 Vdc, VGS = 0 V, f = 1 MHz) RF Characteristics (In Freescale Test Fixture) Common-Source Amplifier Power Gain Gps (cid:151) 14.5 (cid:151) dB (VDD = 12.5 Vdc, Pout = 50 Watts, IDQ = 500 mA) f = 175 MHz Drain Efficiency η (cid:151) 55 (cid:151) % (VDD = 12.5 Vdc, Pout = 50 Watts, IDQ = 500 mA) f = 175 MHz MRF1550NT1 MRF1550FNT1 RF Device Data 2 Freescale Semiconductor

VGGC10 C9 C8 + R4 + VDD R3 C21 C20 C19 C18 L5 C7 R2 N2 Z6 Z7 Z8 L3 Z9 L4 Z10 Z11 C17 R1 RF N1 Z1 L1 Z2 Z3 L2 Z4 Z5 DUT OUTPUT RF C11 C12 C13 C14 C15 C16 INPUT C6 C1 C2 C3 C4 C5 B1 Ferroxcube #VK200 L4 1 Turn, #26 AWG, 0.240″ ID C1 180 pF, 100 mil Chip Capacitor L5 3 Turn, #24 AWG, 0.180″ ID C2 10 pF, 100 mil Chip Capacitor N1, N2 Type N Flange Mounts C3 33 pF, 100 mil Chip Capacitor R1 5.1 Ω, 1/4 W Chip Resistor C4, C16 24 pF, 100 mil Chip Capacitors R2 39 Ω Chip Resistor (0805) C5 160 pF, 100 mil Chip Capacitor R3 1 kΩ, 1/8 W Chip Resistor C6 240 pF, 100 mil Chip Capacitor R4 33 kΩ, 1/4 W Chip Resistor C7, C17 300 pF, 100 mil Chip Capacitors Z1 1.000″ x 0.080″ Microstrip C8, C18 10 μF, 50 V Electrolytic Capacitors Z2 0.400″ x 0.080″ Microstrip C9, C19 0.1 μF, 100 mil Chip Capacitors Z3 0.200″ x 0.080″ Microstrip C10 470 pF, 100 mil Chip Capacitor Z4 0.200″ x 0.080″ Microstrip C11, C12 200 pF, 100 mil Chip Capacitors Z5, Z6 0.100″ x 0.223″ Microstrip C13 22 pF, 100 mil Chip Capacitor Z7 0.160″ x 0.080″ Microstrip C14 30 pF, 100 mil Chip Capacitor Z8 0.260″ x 0.080″ Microstrip C15 6.8 pF, 100 mil Chip Capacitor Z9 0.280″ x 0.080″ Microstrip C20 1,000 pF, 100 mil Chip Capacitor Z10 0.270″ x 0.080″ Microstrip L1 18.5 nH, Coilcraft #A05T Z11 0.730″ x 0.080″ Microstrip ® L2 5 nH, Coilcraft #A02T Board Glass Teflon , 31 mils L3 1 Turn, #24 AWG, 0.250″ ID Figure 1. 135 - 175 MHz Broadband Test Circuit TYPICAL CHARACTERISTICS 80 0 135 MHz 70 VDD = 12.5 Vdc WATTS) 60 SS (dB) −5 R ( 50 175 MHz LO WE 155 MHz RN 175 MHz PO 40 TU −10 T E U R TP 30 UT 135 MHz U P O N , ut 20 L, I −15 Po IR 155 MHz 10 VDD = 12.5 Vdc 0 −20 0 1.0 2.0 3.0 4.0 5.0 6.0 10 20 30 40 50 60 70 80 Pin, INPUT POWER (WATTS) Pout, OUTPUT POWER (WATTS) Figure 2. Output Power versus Input Power Figure 3. Input Return Loss versus Output Power MRF1550NT1 MRF1550FNT1 RF Device Data Freescale Semiconductor 3

TYPICAL CHARACTERISTICS 16 80 175 MHz 15 70 %) 155 MHz 14 CY ( dB) 155 MHz 135 MHz CIEN 60 175 MHz GAIN ( 13 N EFFI 50 135 MHz 12 RAI D (cid:2), 40 11 VDD = 12.5 Vdc VDD = 12.5 Vdc 10 30 10 20 30 40 50 60 70 80 10 20 30 40 50 60 70 80 Pout, OUTPUT POWER (WATTS) Pout, OUTPUT POWER (WATTS) Figure 4. Gain versus Output Power Figure 5. Drain Efficiency versus Output Power 70 80 155 MHz S) 135 MHz WATT 65 Y (%) 70 175 MHz R ( NC WE 175 MHz CIE 135 MHz T PO 60 EFFI 60 TPU AIN OU 155 MHz DR , ut55 (cid:2), 50 Po VDD = 12.5 Vdc VDD = 12.5 Vdc Pin = 35 dBm Pin = 35 dBm 50 40 200 400 600 800 1000 1200 200 400 600 800 1000 1200 IDQ, BIASING CURRENT (mA) IDQ, BIASING CURRENT (mA) Figure 6. Output Power versus Biasing Current Figure 7. Drain Efficiency versus Biasing Current 90 80 S) 80 155 MHz TT %) WA Y ( 70 R ( 70 NC E E T POW 60 135 MHz 155 MHz EFFICI 60 175 MHz 135 MHz TPU 175 MHz AIN OU 50 DR , ut (cid:2), 50 Po40 IDQ = 500 mA IDQ = 500 mA Pin = 35 dBm Pin = 35 dBm 30 40 10 11 12 13 14 15 10 11 12 13 14 15 VDD, SUPPLY VOLTAGE (VOLTS) VDD, SUPPLY VOLTAGE (VOLTS) Figure 8. Output Power versus Supply Voltage Figure 9. Drain Efficiency versus Supply Voltage MRF1550NT1 MRF1550FNT1 RF Device Data 4 Freescale Semiconductor

TYPICAL CHARACTERISTICS 1011 2S) P M A X 1010 S R U O H R ( O CT 109 A F F T T M 108 90 100 110 120 130 140 150 160 170 180 190 200 210 TJ, JUNCTION TEMPERATURE (°C) This above graph displays calculated MTTF in hours x ampere2 drain current. Life tests at elevated temperatures have correlated to better than ±10% of the theoretical prediction for metal failure. Divide MTTF factor by ID2 for MTTF in a particular application. Figure 10. MTTF Factor versus Junction Temperature MRF1550NT1 MRF1550FNT1 RF Device Data Freescale Semiconductor 5

Zo = 10 Ω f = 175 MHz f = 175 MHz Zin ZOL* f = 135 MHz f = 135 MHz VDD = 12.5 V, IDQ = 500 mA, Pout = 50 W f Zin ZOL* MHz Ω Ω 135 4.1 + j0.5 1.0 + j0.6 155 4.2 + j1.7 1.2 + j0.9 175 3.7 + j2.3 0.7 + j1.1 Zin = Complex conjugate of source impedance. ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and ηD > 50 %. Input Device Output Matching Under Test Matching Network Network Z Z * in OL Figure 11. Series Equivalent Input and Output Impedance MRF1550NT1 MRF1550FNT1 RF Device Data 6 Freescale Semiconductor

Table 5. Common Source Scattering Parameters (V = 12.5 Vdc) DD I = 500 mA DQ S11 S21 S12 S22 ff MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 50 0.93 -178 4.817 80 0.009 -39 0.86 -176 100 0.94 -178 2.212 69 0.009 -3 0.88 -175 150 0.95 -178 1.349 61 0.008 -8 0.90 -174 200 0.95 -178 0.892 54 0.006 -13 0.92 -174 250 0.96 -178 0.648 51 0.005 -7 0.93 -174 300 0.97 -178 0.481 47 0.004 -8 0.95 -174 350 0.97 -178 0.370 46 0.005 4 0.95 -174 400 0.98 -178 0.304 43 0.001 15 0.97 -174 450 0.98 -178 0.245 43 0.005 81 0.97 -174 500 0.98 -178 0.209 43 0.003 84 0.97 -174 550 0.99 -177 0.178 41 0.007 70 0.98 -175 600 0.98 -178 0.149 41 0.010 106 0.96 -175 I = 2.0 mA DQ S11 S21 S12 S22 ff MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 50 0.93 -177 4.81 80 0.003 -119 0.93 -178 100 0.94 -178 2.20 69 0.006 4 0.93 -178 150 0.95 -178 1.35 61 0.003 -1 0.93 -177 200 0.95 -178 0.89 54 0.004 18 0.93 -176 250 0.96 -178 0.65 51 0.001 28 0.94 -176 300 0.97 -178 0.48 47 0.004 77 0.94 -175 350 0.97 -178 0.37 46 0.006 85 0.95 -175 400 0.98 -178 0.30 43 0.007 53 0.96 -174 450 0.98 -178 0.25 43 0.006 74 0.97 -174 500 0.98 -177 0.21 44 0.006 84 0.97 -174 550 0.99 -177 0.18 41 0.002 106 0.97 -175 600 0.98 -178 0.15 41 0.004 116 0.96 -174 I = 4.0 mA DQ S11 S21 S12 S22 ff MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 50 0.97 -179 5.04 87 0.002 -116 0.94 -179 100 0.96 -179 2.43 82 0.006 42 0.94 -178 150 0.96 -179 1.60 77 0.004 13 0.94 -177 200 0.96 -179 1.14 74 0.003 43 0.95 -176 250 0.97 -179 0.89 71 0.004 65 0.95 -175 300 0.97 -179 0.71 68 0.006 68 0.95 -175 350 0.97 -179 0.57 67 0.006 74 0.97 -174 (continued) MRF1550NT1 MRF1550FNT1 RF Device Data Freescale Semiconductor 7

Table 5. Common Source Scattering Parameters (V = 12.5 Vdc) (continued) DD I = 4.0 mA (continued) DQ S11 S21 S12 S22 ff MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 400 0.97 -179 0.49 63 0.005 58 0.97 -173 450 0.98 -178 0.41 63 0.005 73 0.98 -173 500 0.98 -178 0.36 62 0.003 128 0.98 -173 550 0.98 -178 0.32 58 0.004 57 0.99 -174 600 0.98 -178 0.27 58 0.009 83 0.98 -174 MRF1550NT1 MRF1550FNT1 RF Device Data 8 Freescale Semiconductor

APPLICATIONS INFORMATION DESIGN CONSIDERATIONS This device is a common-source, RF power, N-Channel drain-source voltage under these conditions is termed enhancement mode, Lateral Metal-Oxide Semiconductor V . For MOSFETs, V has a positive temperature DS(on) DS(on) Field-Effect Transistor (MOSFET). Freescale Application coefficient at high temperatures because it contributes to the Note AN211A, (cid:147)FETs in Theory and Practice(cid:148), is suggested power dissipation within the device. reading for those not familiar with the construction and char- BV values for this device are higher than normally re- DSS acteristics of FETs. quired for typical applications. Measurement of BV is not DSS This surface mount packaged device was designed pri- recommended and may result in possible damage to the de- marily for VHF and UHF mobile power amplifier applications. vice. Manufacturability is improved by utilizing the tape and reel GATE CHARACTERISTICS capability for fully automated pick and placement of parts. The gate of the RF MOSFET is a polysilicon material, and However, care should be taken in the design process to in- is electrically isolated from the source by a layer of oxide. sure proper heat sinking of the device. The DC input resistance is very high - on the order of 109 Ω The major advantages of Lateral RF power MOSFETs in- (cid:151) resulting in a leakage current of a few nanoamperes. clude high gain, simple bias systems, relative immunity from Gate control is achieved by applying a positive voltage to thermal runaway, and the ability to withstand severely mis- the gate greater than the gate-to-source threshold voltage, matched loads without suffering damage. V . GS(th) MOSFET CAPACITANCES Gate Voltage Rating (cid:151) Never exceed the gate voltage The physical structure of a MOSFET results in capacitors rating. Exceeding the rated VGS can result in permanent between all three terminals. The metal oxide gate structure damage to the oxide layer in the gate region. determines the capacitors from gate-to-drain (C ), and Gate Termination (cid:151) The gates of these devices are es- gd gate-to-source (C ). The PN junction formed during fab- sentially capacitors. Circuits that leave the gate open-cir- gs rication of the RF MOSFET results in a junction capacitance cuited or floating should be avoided. These conditions can from drain-to-source (C ). These capacitances are charac- result in turn-on of the devices due to voltage build-up on ds terized as input (C ), output (C ) and reverse transfer the input capacitor due to leakage currents or pickup. iss oss (Crss) capacitances on data sheets. The relationships be- Gate Protection (cid:151) These devices do not have an internal tween the inter-terminal capacitances and those given on monolithic zener diode from gate-to-source. If gate protec- data sheets are shown below. The C can be specified in tion is required, an external zener diode is recommended. iss two ways: Using a resistor to keep the gate-to-source impedance low also helps dampen transients and serves another important 1. Drain shorted to source and positive voltage at the gate. function. Voltage transients on the drain can be coupled to 2. Positive voltage of the drain in respect to source and zero the gate through the parasitic gate-drain capacitance. If the volts at the gate. gate-to-source impedance and the rate of voltage change In the latter case, the numbers are lower. However, neither on the drain are both high, then the signal coupled to the gate method represents the actual operating conditions in RF ap- may be large enough to exceed the gate-threshold voltage plications. and turn the device on. DC BIAS Since this device is an enhancement mode FET, drain cur- Drain rent flows only when the gate is at a higher potential than the source. RF power FETs operate optimally with a quiescent Cgd drain current (I ), whose value is application dependent. DQ This device was characterized at I = 500 mA, which is the Gate Ciss = Cgd + Cgs DQ suggested value of bias current for typical applications. For Cds Coss = Cgd + Cds Crss = Cgd special applications such as linear amplification, IDQ may have to be selected to optimize the critical parameters. Cgs The gate is a dc open circuit and draws no current. There- fore, the gate bias circuit may generally be just a simple re- Source sistive divider network. Some special applications may require a more elaborate bias system. GAIN CONTROL DRAIN CHARACTERISTICS Power output of this device may be controlled to some de- One critical figure of merit for a FET is its static resistance gree with a low power dc control signal applied to the gate, in the full-on condition. This on-resistance, R , occurs thus facilitating applications such as manual gain control, DS(on) in the linear region of the output characteristic and is speci- ALC/AGC and modulation systems. This characteristic is fied at a specific gate-source voltage and drain current. The very dependent on frequency and load line. MRF1550NT1 MRF1550FNT1 RF Device Data Freescale Semiconductor 9

AMPLIFIER DESIGN Impedance matching networks similar to those used with resistive loading, or output to input feedback. The RF test fix- bipolar transistors are suitable for this device. For examples ture implements a parallel resistor and capacitor in series see Freescale Application Note AN721, (cid:147)Impedance with the gate, and has a load line selected for a higher effi- Matching Networks Applied to RF Power Transistors.(cid:148) ciency, lower gain, and more stable operating region. Large-signal impedances are provided, and will yield a good Two-port stability analysis with this device(cid:146)s first pass approximation. S-parameters provides a useful tool for selection of loading Since RF power MOSFETs are triode devices, they are not or feedback circuitry to assure stable operation. See Free- unilateral. This coupled with the very high gain of this device scale Application Note AN215A, (cid:147)RF Small-Signal Design yields a device capable of self oscillation. Stability may be Using Two-Port Parameters(cid:148) for a discussion of two port achieved by techniques such as drain loading, input shunt network theory and stability. MRF1550NT1 MRF1550FNT1 RF Device Data 10 Freescale Semiconductor

PACKAGE DIMENSIONS MRF1550NT1 MRF1550FNT1 RF Device Data Freescale Semiconductor 11

MRF1550NT1 MRF1550FNT1 RF Device Data 12 Freescale Semiconductor

MRF1550NT1 MRF1550FNT1 RF Device Data Freescale Semiconductor 13

MRF1550NT1 MRF1550FNT1 RF Device Data 14 Freescale Semiconductor

MRF1550NT1 MRF1550FNT1 RF Device Data Freescale Semiconductor 15

MRF1550NT1 MRF1550FNT1 RF Device Data 16 Freescale Semiconductor

PRODUCT DOCUMENTATION, TOOLS AND SOFTWARE Refer to the following documents to aid your design process. Application Notes • AN211A: Field Effect Transistors in Theory and Practice • AN215A: RF Small-Signal Design Using Two-Port Parameters • AN721: Impedance Matching Networks Applied to RF Power Transistors • AN1907: Solder Reflow Attach Method for High Power RF Devices in Plastic Packages • AN3263: Bolt Down Mounting Method for High Power RF Transistors and RFICs in Over-Molded Plastic Packages • AN3789: Clamping of High Power RF Transistors and RFICs in Over-Molded Plastic Packages Engineering Bulletins • EB212: Using Data Sheet Impedances for RF LDMOS Devices Software • Electromigration MTTF Calculator For Software and Tools, do a Part Number search at http://www.freescale.com, and select the (cid:147)Part Number(cid:148) link. Go to the Software & Tools tab on the part(cid:146)s Product Summary page to download the respective tool. REVISION HISTORY The following table summarizes revisions to this document. Revision Date Description 12 Feb. 2008 • Changed DC Bias IDQ value from 150 to 500 to match Functional Test IDQ specification, p. 9 • Replaced Case Outline 1264-09 with 1264-10, Issue L, p. 1, 11-13. Removed Drain-ID label from top view and View Y-Y. Corrected cross hatch pattern and its dimensions (D2 and E2) on source contact. Renamed E2 with E3. Added Pin 7 designation. Corrected positional tolerance for bolt hole radius. Added JEDEC Standard Package Number. • Replaced Case Outline 1264A-02 with 1264A-03, Issue D, p. 1, 14-16. Removed Drain-ID label from View Y-Y. Corrected cross hatch pattern and its dimensions (D2 and E2) on source contact (Changed D2 and E2 dimensions from basic to .604 Min and .162 Min, respectively). Added dimension E3. Added Pin 7 designation. Corrected positional tolerance for bolt hole radius. Added JEDEC Standard Package Number. • Added Product Documentation and Revision History, p. 17 13 June 2008 • Corrected specified performance values for power gain and efficiency on p. 1 to match typical performance values in the functional test table on p. 2 14 Oct. 2008 • Corrected 155 MHz ZOL value and replotted data, Fig. 11, Series Equivalent Input and Output Impedance, p. 6 15 June 2009 • Modified data sheet to reflect MSL rating change from 1 to 3 as a result of the standardization of packing process as described in Product and Process Change Notification number, PCN13516, p. 1 • Added AN3789, Clamping of High Power RF Transistors and RFICs in Over-Molded Plastic Packages to Product Documentation, Application Notes, p. 17 • Added Electromigration MTTF Calculator availability to Product Software, p. 17 MRF1550NT1 MRF1550FNT1 RF Device Data Freescale Semiconductor 17

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