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MM74HCT00MX产品简介:
ICGOO电子元器件商城为您提供MM74HCT00MX由Fairchild Semiconductor设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 MM74HCT00MX价格参考。Fairchild SemiconductorMM74HCT00MX封装/规格:逻辑 - 栅极和逆变器, NAND Gate IC 4 Channel 14-SOIC。您可以下载MM74HCT00MX参考资料、Datasheet数据手册功能说明书,资料中有MM74HCT00MX 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC GATE NAND 4CH 2-INP 14-SO逻辑门 Qd 2-Input NAND Gate |
产品分类 | |
品牌 | Fairchild Semiconductor |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 逻辑集成电路,逻辑门,Fairchild Semiconductor MM74HCT00MX74HCT |
数据手册 | |
产品型号 | MM74HCT00MX |
不同V、最大CL时的最大传播延迟 | 23ns @ 5V,50pF |
产品 | NAND |
产品种类 | 逻辑门 |
传播延迟时间 | 23 ns |
低电平输出电流 | 4.8 mA |
供应商器件封装 | 14-SO |
其它名称 | MM74HCT00MXCT |
包装 | 剪切带 (CT) |
单位重量 | 241 mg |
商标 | Fairchild Semiconductor |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | 14-SOIC(0.154",3.90mm 宽) |
封装/箱体 | SOIC-14 Narrow |
工作温度 | -40°C ~ 85°C |
工厂包装数量 | 2500 |
最大工作温度 | + 85 C |
最小工作温度 | - 40 C |
栅极数量 | 4 Gate |
标准包装 | 1 |
特性 | - |
电压-电源 | 4.5 V ~ 5.5 V |
电流-输出高,低 | 4.8mA,4.8mA |
电流-静态(最大值) | 1µA |
电源电压-最大 | 5.5 V |
电源电压-最小 | 4.5 V |
电路数 | 4 |
系列 | MM74HCT00 |
输入/输出线数量 | 2 / 1 |
输入数 | 2 |
输入线路数量 | 2 |
输出线路数量 | 1 |
逻辑电平-低 | 0.8V |
逻辑电平-高 | 2V |
逻辑类型 | 与非门 |
逻辑系列 | 74HC |
零件号别名 | MM74HCT00MX_NL |
高电平输出电流 | - 4.8 mA |
Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
M M 7 4 February 2008 H C T 0 0 MM74HCT00 — Quad 2 Input NAND Gate Q u a d Features General Description 2 I n ■ TTL, LS pin-out and threshold compatible The MM74HCT00 is a NAND gates fabricated using p ■■ FLoawst psowwitcehr:i n1g0:µ tWPL Ha,t tDPHCL=14ns (typ.) athdev ainnhceedre snitl icboenn-egfaittse CofM COMS OteSc—hnloowlo gqyu wiehsiccehn pt ropvoidweesr ut N and wide power supply range. This device is input and A ■ High fan out, 10 LS-TTL loads N output characteristic and pin-out compatible with stan- D dard 74LS logic families. All inputs are protected from G static discharge damage by internal diodes to V and CC a ground. t e MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs. Ordering InformationOrdering Information Package Order Number Number Package Description MM74HCT00M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74HCT00SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT00MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HCT00N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. Connection Diagram Logic Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP (1 of 4 gates) Top View ©1984 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HCT00 Rev. 1.3.0
M M Absolute Maximum Ratings(1) 7 4 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be H operable above the recommended operating conditions and stressing the parts to these levels is not recommended. C T In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. 0 The absolute maximum ratings are stress ratings only. 0 — Symbol Parameter Rating Q V Supply Voltage –0.5 to +7.0V u CC a V DC Input Voltage –1.5 to V +1.5V d IN CC 2 V DC Output Voltage –0.5 to V +0.5V OUT CC I n I , I Clamp Diode Current ±20mA p IK OK u I DC Output Current, per pin ±25mA t OUT N I DC V or GND Current, per pin ±50mA A CC CC N TSTG Storage Temperature Range –65°C to +150°C D P Power Dissipation G D a Note 2 600mW t e S.O. Package only 500mW T Lead Temperature (Soldering 10 seconds) 260°C L Notes: 1. Unless otherwise specified all voltages are referenced to ground. 2. Power Dissipation temperature derating — plastic “N” package: –12mW/°C from 65°C to 85°C. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Min. Max. Units V Supply Voltage 4.5 5.5 V CC V , V DC Input or Output Voltage 0 V V IN OUT CC T Operating Temperature Range –40 +85 °C A t , t Input Rise or Fall Times 500 ns r f ©1984 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HCT00 Rev. 1.3.0 2
M M DC Electrical Characteristics 7 V = 5V ± 10% (unless otherwise specified) 4 CC H C TA = –40°C TA = –55°C T T = 25°C to 85°C to 125°C 0 A 0 Symbol Parameter Conditions Typ. Guaranteed Limits Units — V Minimum HIGH Level 2.0 2.0 2.0 V Q IH u Input Voltage a d VIL Maximum LOW Level 0.8 0.8 0.8 V 2 Input Voltage I n V Minimum HIGH Level V = V or V , V V – 0.1 V – 0.1 V – 0.1 V p OH IN IH IL CC CC CC CC u Output Voltage |IOUT| = 20µA t N VIN = VIH or VIL, 4.2 3.98 3.84 3.7 A |I | = 4.0mA, N OUT V = 4.5V D CC G V = V or V , 5.2 4.98 4.84 4.7 IN IH IL a |IOUT| = 4.8mA, te V = 5.5V CC V Maximum LOW Level V = V , 0 0.1 0.1 0.1 V OL IN IH Voltage |I | = 20 µA OUT V = V , 0.2 0.26 0.33 0.4 IN IH |I | = 4.0mA, OUT V = 4.5V CC V = V , 0.2 0.26 0.33 0.4 IN IH |I | = 4.8mA, OUT V = 5.5V CC I Maximum Input V = V or GND, ±0.05 ±0.5 ±1.0 µA IN IN CC Current V or V IH IL I Maximum Quiescent V = V or GND, 1.0 10 40 µA CC IN CC Supply Current I = 0 µA OUT V = 2.4V or 0.5V(3) 0.18 0.3 0.4 0.5 mA IN Note: 3. This is measured per input with all other inputs held at V or ground. CC ©1984 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HCT00 Rev. 1.3.0 3
M M AC Electrical Characteristics 7 4 V = 5.0V, t = t = 6ns, C = 15pF, T = 25°C (unless otherwise noted) CC r r L A H C Guaranteed T Symbol Parameter Conditions Typ. Limit Units 0 0 t , t Maximum Propagation Delay 14 18 ns — PLH PHL Q u a d AC Electrical Characteristics 2 VCC = 5.0V ±10%, tr = tf = 6ns, CL = 50pF (unless otherwise noted) In p T = –40°C T = –55°C u A A t TA = 25°C to 85°C to 125°C N A Symbol Parameter Conditions Typ. Guaranteed Limits Units N D t , t Maximum Propagation Delay 18 23 29 35 ns PLH PHL G tTHL, tTLH Maximum Output Rise and 8 15 19 22 ns a Fall Time te C Power Dissipation (4) 30 pF PD Capacitance C Input Capacitance 5 10 10 10 pF IN Note: 4. C determines the no load dynamic power consumption, P = C V 2 f + I V , and the no load dynamic PD D PD CC CC CC current consumption, I = C V f + I . S PD CC CC ©1984 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HCT00 Rev. 1.3.0 4
0.65 (cid:24)(cid:17)(cid:19)(cid:19)(cid:147)(cid:19)(cid:17)(cid:20)(cid:19) A 0.43TYP 14 8 B 6.4 (cid:23)(cid:17)(cid:23)(cid:19)(cid:147)(cid:19)(cid:17)(cid:20)(cid:19) 6.10 3.2 1.65 1 7 0.2 C B A PIN1IDENT TOPVIEW ALLLEADTIPS 0.45 RECOMMENDEDLANDPATTERN 1.2MAX SEEDETAILA +0.15 0.90 -0.10 0.20 (cid:19)(cid:17)(cid:20)(cid:19)(cid:147)(cid:19)(cid:17)(cid:19)(cid:24) 0.09 ALLLEADTIPS 0.30 0.19 C 0.1 C 0.65 0.13 A B C (cid:20)(cid:21)(cid:17)(cid:19)(cid:19)(cid:131)(cid:3)(cid:55)(cid:50)(cid:51)(cid:3)(cid:9)(cid:3)(cid:37)(cid:50)(cid:55)(cid:55)(cid:50)(cid:48) FRONTVIEW 0.09MIN NOTES: GAGEPLANE A.CONFORMSTOJEDECREGISTRATIONMO-153, VARIATIONAB,REFNOTE6 B.DIMENSIONSAREINMILLIMETERS. 0.25 0.09MIN C.DIMENSIONSAREEXCLUSIVEOFBURRS, (cid:19)(cid:131)(cid:16)(cid:3)(cid:27)(cid:131) (cid:19)(cid:17)(cid:25)(cid:147)(cid:19)(cid:17)(cid:20) MOLDFLASH,ANDTIEBAREXTRUSIONS SEATINGPLANE 1.00 D.DIMENSIONINGANDTOLERANCESPERANSI DETAILA Y14.5M,2009. E.LANDPATTERNSTANDARD:SOP65P640X110-14M. F.DRAWINGFILENAME:MKT-MTC14rev7.
8.75 A 8.50 7.62 14 0.65 8 14 8 B 4.00 6.00 5.60 3.80 1.70 1 7 PIN #1 1.27 0.51 1 7 IDENT. 1.27 0.35 (0.33) 0.25 M C B A LAND PATTERN RECOMMENDATION TOP VIEW 1.75 MAX A C 0.25 0.19 1.50 0.10 C 0.25 1.25 0.10 SIDE VIEW FRONT VIEW NOTES: A. CONFORMS TO JEDEC MS-012, VARIATION AB, ISSUE C B. ALL DIMENSIONS ARE IN MILLIMETERS 0.50 0.25 x 45 C. DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS R0.10 GAGE D. LAND PATTERN STANDARD: PLANE SOIC127P600X145-14M R0.10 E. CONFORMS TO ASME Y14.5M, 2009 0.36 D. DRAWING FILENAME: MKT-M14Arev14 8° 0° 0.90 0.50 SEATING PLANE (1.04) DETAIL A SCALE 16 : 1
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