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M M 7 4 H May 2012 C 8 6 — Q u MM74HC86 a d 2 Quad 2-Input Exclusive OR Gate - I n p u t E Description x Features c l The MM74HC86 exclusive OR gate utilizes advanced u  Typical Propagation Delay: 9ns silicon-gate CMOS technology to achieve operating si v  Wide Operating Voltage Range: 2–6V speeds similar to equivalent LS-TTL gates, while e maintaining the low power consumption and high noise O  Low Input Current: 1mA Maximum immunity characteristic of standard CMOS integrated R  Low Quiescent Current: 20mA Max. (74 Series) circuits. These gates are fully buffered and have a G fanout of 10 LS-TTL loads. The 74HC logic family is a  Output Drive Capability: 10 LS-TTL Loads functionally as well as pin-out compatible with the te standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to V and ground. CC Table 1. Truth Table Inputs Outputs A B Y(1) L L L L H H H L H H H L Note: 1. Y ABABAB Figure 1. Pin Assignments (Top View) Ordering Information Operating Part Number Package Packing Method Temperature Range MM74HC86M 14-Lead, Small Outline Integrated Circuit Tube MM74HC86MX (SOIC), JEDEC MS-012, 0.150" Narrow Tape & Reel -40 to +85°C MM74HC86MTC 14-Lead, Thin Shrink Small Outline Package Tube MM74HC86MTCX (TSSOP), JEDEC MO-153, 4.4mm Wide Tape & Reel Note: 2. Pb-Free package per JEDEC J-STD-020B. © 1983 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HC86 • Rev. 1.4.0

M M Absolute Maximum Ratings 7 4 H Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be C operable above the recommended operating conditions and stressing the parts to these levels is not recommended. 8 6 In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. — Absolute maximum ratings are stress ratings only. Unless otherwise specified, all voltages are referenced to ground. Q Symbol Parameter Min. Max. Unit u a d V Supply Voltage -0.5 7.0 V CC 2 V DC Input Voltage -1.5 V +1.5 V - IN CC I n V DC Output Voltage -0.5 V +0.5 V p OUT CC u IIK, IOK Clamp Diode Current ±20 mA t E I DC Output Current, per Pin ±25 mA x OUT c ICC DC VCC or GND Current, per Pin ±50 mA lu s T Storage Temperature Range -65 +150 °C i STG v e TL Lead Temperature (Soldering, 10 Seconds) 260 °C O P Power Dissipation(3, 4) 600 mW R D G Note: a 3. Power dissipation temperature derating — plastic “N” package: -12 mW/°C from 65°C to 85°C. t e 4. S.O. package only 500mW. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Conditions Min. Max. Unit V Supply Voltage 2 6 V CC V , V DC Input or Output Voltage 0 V V IN OUT CC T Operating Temperature Range -40 +85 °C A V = 2.0V 1000 CC t , t Input Rise or Fall Times V = 4.5V 500 ns R F CC V = 6.0V 400 CC © 1983 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HC86 • Rev. 1.4.0 2

M M DC Electrical Characteristics(5) 7 4 H T =-40 to T =-55 to C Symbol Parameter Condition V (V) TA=25°C A+85°C +A125°C Units 86 CC — Typ. Guaranteed Limit Q 2.0 1.5 1.5 1.5 u Minimum HIGH Level a VIH Input Voltage 4.5 3.15 3.15 3.15 V d 6.0 4.2 4.2 4.2 2 - I 2.0 0.5 0.5 0.5 n p Maximum LOW Level u V 4.5 1.35 1.35 1.35 V IL Input Voltage t E 6.0 1.8 1.8 1.8 x c l 2.0 2.0 1.9 1.9 1.9 u s V = V or V , IN IH IL i v |IOUT| ≤ 20µA 4.5 4.5 4.4 4.4 4.4 e VOH MOuintipmuut mVo HltaIGgHe Level 6.0 6.0 5.9 5.9 5.9 V OR VIN = VIH or VIL, 4.5 4.2 3.98 3.84 3.70 G |IOUT| ≤ 4.0mA a t V = V or V , e IN IH IL 6.0 5.7 5.48 5.34 5.20 |I | ≤ 5.2mA OUT 2.0 0 0.1 0.1 0.1 V = V or V , IN IH IL |IOUT| ≤ 20µA 4.5 0 0.1 0.1 0.1 Maximum LOW Level 6.0 0 0.1 0.1 0.1 V V OL Output Voltage V = V or V , IN IH IL 4.5 0.2 0.26 0.33 0.40 |I | ≤ 4.0mA OUT V = V or V , IN IH IL 6.0 0.2 0.26 0.33 0.40 |I | ≤ 5.2mA OUT I Maximum Input Current V = V or GND 6.0 ±0.1 ±1.0 ±1.0 mA IN IN CC Maximum Quiescent V = V or GND, I IN CC 6.0 2.0 20 40 mA CC Supply Current I = 0mA OUT Note: 5. For a power supply of 5V ±10%, the worst-case output voltages (V and V ) occur for HC at 4.5V. Thus, the OH OL 4.5V values should be used when designing with this supply. Worst-case V and V occur at V = 5.5V and IH IL CC 4.5V, respectively. (The V values at 5V and 5.5V are 3.5V and 3.85V, respectively.) The worst-case leakage IH current (I , I , and I ) occurs for CMOS at the higher voltage, so the 6.0V values should be used. IN CC OZ © 1983 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HC86 • Rev. 1.4.0 3

M M AC Electrical Characteristics 7 4 H T =-40 to T =-55 to C Symbol Parameter Conditions V TA=25°C A+85°C +A125°C Unit 86 CC s — Typ. Guaranteed Limit Q tPHL, tPLH Maximum Propagation Delay Ct L = = t 1 5=p 6Fn, s 5.0 12 20 ns ua R F d 2 2.0 60 120 151 179 -I n p u t tPHL, tPLH Maximum Propagation Delay 4.5 12 24 30 36 ns E x c l 6.0 10 20 26 30 u s i v e 2.0 30 75 95 110 O C = 50pF, L R Maximum Output Rise and tR = tF = 6ns G t , t 4.5 8 15 19 22 ns TLH THL Fall Time a t e 6.0 7 13 16 19 Power Dissipation CPD Capacitance (per Gate)(6) 25 pF C Maximum Input Capacitance 5 10 10 10 pF IN Note: 6. C determines the no-load dynamic power consumption, P = C V 2 f + I V , and the no load dynamic PD D PD CC CC CC current consumption, I = C V f + I . S PD CC CC © 1983 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HC86 • Rev. 1.4.0 4

0.65 (cid:24)(cid:17)(cid:19)(cid:19)(cid:147)(cid:19)(cid:17)(cid:20)(cid:19) A 0.43TYP 14 8 B 6.4 (cid:23)(cid:17)(cid:23)(cid:19)(cid:147)(cid:19)(cid:17)(cid:20)(cid:19) 6.10 3.2 1.65 1 7 0.2 C B A PIN1IDENT TOPVIEW ALLLEADTIPS 0.45 RECOMMENDEDLANDPATTERN 1.2MAX SEEDETAILA +0.15 0.90 -0.10 0.20 (cid:19)(cid:17)(cid:20)(cid:19)(cid:147)(cid:19)(cid:17)(cid:19)(cid:24) 0.09 ALLLEADTIPS 0.30 0.19 C 0.1 C 0.65 0.13 A B C (cid:20)(cid:21)(cid:17)(cid:19)(cid:19)(cid:131)(cid:3)(cid:55)(cid:50)(cid:51)(cid:3)(cid:9)(cid:3)(cid:37)(cid:50)(cid:55)(cid:55)(cid:50)(cid:48) FRONTVIEW 0.09MIN NOTES: GAGEPLANE A.CONFORMSTOJEDECREGISTRATIONMO-153, VARIATIONAB,REFNOTE6 B.DIMENSIONSAREINMILLIMETERS. 0.25 0.09MIN C.DIMENSIONSAREEXCLUSIVEOFBURRS, (cid:19)(cid:131)(cid:16)(cid:3)(cid:27)(cid:131) (cid:19)(cid:17)(cid:25)(cid:147)(cid:19)(cid:17)(cid:20) MOLDFLASH,ANDTIEBAREXTRUSIONS SEATINGPLANE 1.00 D.DIMENSIONINGANDTOLERANCESPERANSI DETAILA Y14.5M,2009. E.LANDPATTERNSTANDARD:SOP65P640X110-14M. F.DRAWINGFILENAME:MKT-MTC14rev7.

8.75 A 8.50 7.62 14 0.65 8 14 8 B 4.00 6.00 5.60 3.80 1.70 1 7 PIN #1 1.27 0.51 1 7 IDENT. 1.27 0.35 (0.33) 0.25 M C B A LAND PATTERN RECOMMENDATION TOP VIEW 1.75 MAX A C 0.25 0.19 1.50 0.10 C 0.25 1.25 0.10 SIDE VIEW FRONT VIEW NOTES: A. CONFORMS TO JEDEC MS-012, VARIATION AB, ISSUE C B. ALL DIMENSIONS ARE IN MILLIMETERS 0.50 0.25 x 45 C. DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS R0.10 GAGE D. LAND PATTERN STANDARD: PLANE SOIC127P600X145-14M R0.10 E. CONFORMS TO ASME Y14.5M, 2009 0.36 D. DRAWING FILENAME: MKT-M14Arev14 8° 0° 0.90 0.50 SEATING PLANE (1.04) DETAIL A SCALE 16 : 1

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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: MM74HC86N MM74HC86M MM74HC86SJ MM74HC86MX MM74HC86SJX MM74HC86MTC MM74HC86MTCX