Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

M September 1983 M Revised May 2005 7 4 H C 2 MM74HC245A 4 5 A Octal 3-STATE Transceiver O c t General Description Features a l The MM74HC245A 3-STATE bidirectional buffer utilizes (cid:1) Typical propagation delay: 13 ns 3- advanced silicon-gate CMOS technology, and is intended (cid:1) Wide power supply range: 2–6V ST for two-way asynchronous communication between data (cid:1) Low quiescent current: 80 PA maximum (74 HC) A buses. It has high drive current outputs which enable high T speed operation even when driving large bus capaci- (cid:1) 3-STATE outputs for connection to bus oriented systems E tances. This circuit possesses the low power consumption (cid:1) High output drive: 6 mA (minimum) T and high noise immunity usually associated with CMOS cir- (cid:1) Same as the 645 ra cuitry, yet has speeds comparable to low power Schottky n TTL circuits. s c This device has an active LOW enable input G and a direc- e tion control input, DIR. When DIR is HIGH, data flows from iv the A inputs to the B outputs. When DIR is LOW, data flows e r from the B inputs to the A outputs. The MM74HC245A transfers true data from one bus to the other. This device can drive up to 15 LS-TTL Loads, and does not have Schmitt trigger inputs. All inputs are protected from damage due to static discharge by diodes to VCC and ground. Ordering Code: Order Number Package Number Package Description MM74HC245AWM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide MM74HC245ASJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC245AMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC245AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Truth Table Pin Assignments for DIP, SOIC, SOP and TSSOP Control Inputs Operation G DIR L L B data to A bus L H A data to B bus H X Isolation H HIGH Level L LOW Level X Irrelevant Top View © 2005 Fairchild Semiconductor Corporation DS005165 www.fairchildsemi.com

A 5 Logic Diagram 4 2 C H 4 7 M M www.fairchildsemi.com 2

M Absolute Maximum Ratings(Note 1) Recommended Operating M (Note 2) Conditions 74 H Supply Voltage (VCC) (cid:16)0.5 to (cid:14)7.0V Min Max Units C DC Input Voltage DIR and G pins (VIN) (cid:16)1.5 to VCC (cid:14)1.5V Supply Voltage (VCC) 2 6 V 24 DC Input/Output Voltage (VIN, VOUT) (cid:16)0.5 to VCC (cid:14)0.5V DC Input or Output Voltage 5 A Clamp Diode Current (ICD) r20 mA (VIN, VOUT) 0 VCC V DC Output Current, per pin (IOUT) r35 mA Operating Temperature Range (TA) (cid:16)40 (cid:14)85 qC DC VCC or GND Current, per pin (ICC) r70 mA Input Rise/Fall Times Storage Temperature Range (TSTG) (cid:16)65qC to (cid:14)150qC (tr, tf) VCC 2.0V 1000 ns Power Dissipation (PD) VCC 4.5V 500 ns (Note 3) 600 mW VCC 6.0V 400 ns S.O. Package only 500 mW Note 1: Maximum Ratings are those values beyond which damage to the Lead Temperature (TL) device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. (Soldering 10 seconds) 260qC Note 3: Power Dissipation temperature derating — plastic “N” package: (cid:16) 12 mW/qC from 65qC to 85qC. DC Electrical Characteristics (Note 4) Symbol Parameter Conditions VCC TA 25qC TA (cid:16)40 to 85qC TA (cid:16)55 to 125qC Units Typ Guaranteed Limits VIH Minimum HIGH Level Input 2.0V 1.5 1.5 1.5 V Voltage 4.5V 3.15 3.15 3.15 V 6.0V 4.2 4.2 4.2 V VIL Maximum LOW Level Input 2.0V 0.5 0.5 0.5 V Voltage 4.5V 1.35 1.35 1.35 V 6.0V 1.8 1.8 1.8 V VOH Minimum HIGH Level Output VIN VIH or VIL Voltage |IOUT| d 20 PA 2.0V 2.0 1.9 1.9 1.9 V 4.5V 4.5 4.4 4.4 4.4 V 6.0V 6.0 5.9 5.9 5.9 V VIN VIH or VIL |IOUT| d 6.0 mA 4.5V 4.2 3.98 3.84 3.7 V |IOUT| d 7.8 mA 6.0V 5.7 5.48 5.34 5.2 V VOL Maximum LOW Level Output VIN VIH or VIL Voltage |IOUT| d 20 PA 2.0V 0 0.1 0.1 0.1 V 4.5V 0 0.1 0.1 0.1 V 6.0V 0 0.1 0.1 0.1 V VIN VIH or VIL |IOUT| d 6.0 mA 4.5V 0.2 0.26 0.33 0.4 V |IOUT| d 7.8 mA 6.0V 0.2 0.26 0.33 0.4 V IIN Input Leakage VIN VCC to GND 6.0V r0.1 r1.0 r1.0 PA Current (G and DIR) IOZ Maximum 3-STATE Output VOUT VCC or GND 6.0V r0.5 r5.0 r10 PA Leakage Current Enable G VIH ICC Maximum Quiescent Supply VIN VCC or GND 6.0V 8.0 80 160 PA Current IOUT 0 PA Note 4: For a power supply of 5V r10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage cur- rent (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used. 3 www.fairchildsemi.com

A 5 AC Electrical Characteristics 4 C2 VCC 5V, TA 25qC, tr tf 6ns H Symbol Parameter Conditions Typ Guaranteed Units 4 Limit 7 M tPHL, tPLH Maximum Propagation Delay CL 45 pF 12 17 ns M tPZH, tPZL Maximum Output Enable RL 1 k: 24 35 ns Time CL 45 pF tPHZ, tPLZ Maximum Output Disable RL 1 k: 18 25 ns Time CL 5 pF AC Electrical Characteristics VCC 2.0V to 6.0V, CL 50 pF, tr tf 6ns (unless otherwise specified) Symbol Parameter Conditions VCC TA 25qC TA (cid:16)40 to 85qC TA (cid:16)55 to 125qC Units Typ Guaranteed Limits tPHL, Maximum Propagation CL 50 pF 2.0V 31 90 113 135 ns tPLH Delay CL 150 pF 2.0V 41 96 116 128 ns CL 50 pF 4.5V 13 18 23 27 ns CL 150 pF 4.5V 17 22 28 33 ns CL 50 pF 6.0V 11 15 19 23 ns CL 150 pF 6.0V 14 19 23 28 ns tPZH, Maximum Output Enable RL 1 k: tPZL Time CL 50 pF 2.0V 71 190 240 285 ns CL 150 pF 2.0V 81 240 300 360 ns CL 50 pF 4.5V 26 38 48 57 ns CL 150 pF 4.5V 31 48 60 72 ns CL 50 pF 6.0V 21 32 41 48 ns CL 150 pF 6.0V 25 41 51 61 ns tPHZ, Maximum Output Disable RL 1 k: 2.0V 39 135 169 203 ns tPLZ Time CL 50 pF 4.5V 20 27 34 41 ns 6.0V 18 23 29 34 ns tTLH, tTHL Output Rise and Fall Time CL 50 pF 2.0V 20 60 75 90 ns 4.5V 6 12 15 18 ns 6.0V 5 10 13 15 ns CPD Power Dissipation G VIL 50 pF Capacitance (Note 5) G VIH 5 pF CIN Maximum Input Capacitance 5 10 10 10 pF CIN/OUT Maximum Input/Output 15 20 20 20 pF Capacitance, A or B Note 5: CPD determines the no load dynamic power consumption, PD CPD VCC2 f(cid:14)ICC VCC, and the no load dynamic current consumption, IS CPDVCCf(cid:14)ICC. www.fairchildsemi.com 4

M Physical Dimensions inches (millimeters) unless otherwise noted M 7 4 H C 2 4 5 A 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com

A 5 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 4 2 C H 4 7 M M 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 6

M Physical Dimensions inches (millimeters) unless otherwise noted (Continued) M 7 4 H C 2 4 5 A 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com

r e Physical Dimensions v inches (millimeters) unless otherwise noted (Continued) i e c s n a r T E T A T S - 3 l a t c O A 5 4 2 C H 4 7 M M 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support which, (a) are intended for surgical implant into the device or system whose failure to perform can be rea- body, or (b) support or sustain life, and (c) whose failure sonably expected to cause the failure of the life support to perform when properly used in accordance with device or system, or to affect its safety or effectiveness. instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the www.fairchildsemi.com user. www.fairchildsemi.com 8

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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: MM74HC245AWMX MM74HC245AMTCX MM74HC245ASJX MM74HC245AMTC MM74HC245AWM MM74HC245ASJ MM74HC245AN