MICRF213 ® 3.3V, QwikRadio 315MHz Receiver General Description Features The MICRF213 is a general purpose, 3.3V QwikRadio® • Up to –110dBm sensitivity, 1kbps and BER 10-2 receiver that operates at 315MHz with a typical • Image rejection mixer sensitivity of -110dBm. • Frequency from 300MHz to 350MHz The MICRF213 functions as a super-heterodyne • Low current consumption: 3.9mA @ 315MHz, receiver for OOK and ASK modulation up to 7.2kbps. continuous on data rates to 7.2kbps (Manchester The down-conversion mixer also provides image Encoded) rejection. All post-detection data filtering is provided on • Analog RSSI output the MICRF213. Any one of four filter bandwidths may be selected externally by the user using binary steps (from • No IF filter required 1.18kHz to 9.44kHz, Manchester Encoded). The user • Excellent selectivity and noise rejection need only configure the device with a set of easily • Low external part count determined values, based upon data rate, code modulation format, and desired duty-cycle operation. Datasheets and support documentation are available on Micrel’s website at: www.micrel.com. Typical Application 315MHz, 1kHz Baud Rate Example QwikRadio is a registered trademark of Micrel, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com August 19, 2015 Revision 2.0

Micrel, Inc. MICRF213 Ordering Information Part Number Temperature Range Package MICRF213AYQS –40°C to +105°C 16-Pin QSOP Pin Configuration RO1 1 16 RO2 GNDRF 2 15 NC ANT 3 14 RSSI GNDRF 4 13 CAGC VDD 5 12 CTH SQ 6 11 SEL1 SEL0 7 10 DO SHDN 8 9 GND 16-Pin QSOP (QS) (Top View) Pin Description 16-Pin Pin Pin Function QSOP Name Reference resonator input connection to Colpitts oscillator stage. May also be driven by external reference 1 RO1 signal of 1.5V p-p amplitude maximum. 2 GNDRF Negative supply connection associated with ANT RF input. RF signal input from antenna. Internally AC-coupled. It is recommended that a matching network with an 3 ANT inductor-to-RF ground is used to improve ESD protection. 4 GNDRF Negative supply connection associated with ANT RF input. 5 VDD Positive supply connection for all chip functions. 6 SQ Squelch control logic input with an active internal pull-up when not shut down. Logic control input with active internal pull-up. Used in conjunction with SEL1 to control the demodulator low 7 SEL0 pass filter bandwidth. (See filter table for SEL0 and SEL1 in application section) 8 SHDN Shutdown logic control input. Active internal pull-up. 9 GND Negative supply connection for all chip functions except RF input. 10 DO Demodulated data output. Logic control input with active internal pull-up. Used in conjunction with SEL0 to control the demodulator low 11 SEL1 pass filter bandwidth. (See filter table for SEL0 and SEL1 in application subsection) Demodulation threshold voltage integration capacitor connection. Tie an external capacitor across CTH pin 12 CTH and GND to set the settling time for the demodulation data slicing level. Values above 1nF are recommended and should be optimized for data rate and data profile. AGC filter capacitor connection. CAGC capacitor, normally greater than 0.47uF, is connected from this pin to 13 CAGC GND 14 RSSI Received signal strength indication output. Output is from a buffer with 200 ohms typical output impedance. 15 NC Not Connected (Connect to Ground) Reference resonator input connection to Colpitts oscillator stage, 7pF, in parallel with low resistance MOS 16 RO2 switch-to-GND, during normal operation. Driven by startup excitation circuit during the internal startup control sequence. August 19, 2015 2 Revision 2.0

Micrel, Inc. MICRF213 (1) (2) Absolute Maximum Ratings Operating Ratings Supply Voltage (V ) ................................................. +5V Supply voltage (V ) ............................. +3.0V to +3.6V DD DD Input Voltage ............................................................. +5V Ambient Temperature (T ) ............... –40°C to +105°C A Junction Temperature ......................................... +150ºC Input Voltage (V ) ...................................... 3.6V (Max) IN Lead Temperature (soldering, 10sec.) .................. 260°C Maximum Input RF Power .............................. –20dBm Storage Temperature (T ) ..................... -65°C to +150°C S Maximum Receiver Input Power ........................ +10dBm ESD Rating(3) .................................................. 3KV HBM (4) Electrical Characteristics Specifications apply for 3.0V < VDD < 3.6V, VSS = 0V, CAGC = 4.7µF, CTH = 0.47µF, fRX = 315MHz unless otherwise noted. Bold values indicate –40°C - TA - +105°C. 900bps data rate (Manchester encoded), reference oscillator frequency = 9.81563MHz. Symbol Parameter Condition Min Typ Max Units IDD Operating Supply Current Continuous Operation, fRX = 315MHz 3.9 mA ISHUT Shut down Current 0.33 µA RF/IF Section Image Rejection 20 dB 1st IF Center Frequency fRX = 315MHz 0.86 MHz R1kebcpesiv er Sensitivity @ fRX = 315MHz (matched to 50Ω) BER=10-2 -110 dBm IF Bandwidth fRX = 315MHz 235 kHz Antenna Input Impedance fRX = 315MHz 32.5 – j235 Ω Receive Modulation Duty Note 5 20 80 % Cycle AGC Attack / Decay Ratio tATTACK / tDECAY 0.1 TA = 25ºC ±2 nA AGC pin leakage current TA = +105ºC ±800 nA RFIN @ -50dBm 1.13 V AGC Dynamic Range RFIN @ -110dBm 1.70 V Reference Oscillator Reference Oscillator fRX = 315MHz 9.81563 MHz Frequency Crystal Load Cap = 10pF Reference Oscillator 300 kΩ Input Impedance Reference Oscillator 0.2 1.5 Vp-p Input Range Reference Oscillator V(REFOSC) = 0V 3.5 µA Source Current Notes: 1. Exceeding the absolute maximum rating may damage the device. 2. The device is not guaranteed to function outside of its operating rating. 3. Device is ESD sensitive. Use appropriate ESD precautions. Exceeding the absolute maximum rating may damage the device. 4. Sensitivity is defined as the average signal level measured at the input necessary to achieve 10-2 BER (bit error rate). The input signal is defined as a return-to-zero (RZ) waveform with 50% average duty cycle (Manchester encoded) at a data rate of 1kbps. 5. When data burst does not contain preamble, duty cycle is defined as total duty cycle, including any “quiet” time between data bursts. When data bursts contain preamble sufficient to charge the slice level on capacitor CTH, then duty cycle is the effective duty cycle of the burst alone. [For example, 100msec burst with 50% duty cycle, and 100msec “quiet” time between bursts. If burst includes preamble, duty cycle is Ton/(Ton+Toff) = 50%; without preamble, duty cycle is Ton/(Ton+ Toff + Tquiet) = 50msec/(200msec)=25%. Ton is the (Average number of 1’s/burst) x bit time, and Toff = Tburst -Ton.) August 19, 2015 3 Revision 2.0

Micrel, Inc. MICRF213 (4) Electrical Characteristics Specifications apply for 3.0V < VDD < 3.6V, VSS = 0V, CAGC = 4.7µF, CTH = 0.47µF, fRX = 315MHz unless otherwise noted. Bold values indicate –40°C - TA - +105°C. 900bps data rate (Manchester encoded), reference oscillator frequency = 9.81563MHz. Symbol Parameter Condition Min Typ Max Units Demodulator CTH Source Impedance FREFOSC = 9.81563MHz 165 kΩ CTH Leakage Current TA = 25ºC ±2 nA TA = +105ºC ±800 nA SEL0=0, SEL1=0 1180 Demodulator Filter Bandwidth @ 315MHz SEL0=1, SEL1=0 2360 Hz (Programmable, see SEL0=0, SEL1=1 4720 application section) SEL0=1, SEL1=1 9400 Digital / Control Functions As output source @ 0.8Vdd 260 DO pin output current µA sink @ 0.2Vdd 600 Output rise and fall times CI = 15pF, pin DO, 10-90% 2 µsec RSSI RSSI DC Output Voltage -110dBm 0.4 V Range -50dBm 1.9 V RSSI response slope -110dBm to -50dBm 25 mV/dB RSSI Output Current 400 µA RSSI Output Impedance ±15 200 Ω 50% data duty cycle, input power to Antenna = - RSSI Response Time 0.3 Sec 20dBm August 19, 2015 4 Revision 2.0

Micrel, Inc. MICRF213 Typical Characteristics Sensitivity Graphs DC Current Selectivity vs. Frequency vs. Frequency Response 4.5 0 -10 -20 4.0 -30 -40 -50 3.5 -60 -70 -80 3.0 -90 280 300 320 340 360 304 308 312 316 320 324 FREQUENCY (MHz) FREQUENCY (MHz) Sesitivity AGC Voltage vs. BER vs. Input Power -106 1.8 1.7 -108 1.6 -110 1.5 1.4 -112 1.3 1.2 -114 1.1 -116 1 1.00E-04 1.00E-03 1.00E-02 1.00E-01 -150 -100 -50 0 BER INPUT POWER (dBm) August 19, 2015 5 Revision 2.0

Micrel, Inc. MICRF213 Functional Diagram CAGC IMAGE AGC REJECT FILTER RF IF ANT Detector RSSI RSSI Amp Mixer Amp VDD –f f Control Logic Programmable DemOoOduKlator Mixer Low Pass Filter VSS fLO i IF DO Amp SEL SEL Synthesizer Control DO SQUELCH Logic Slicing CTH SHDN Reference and Control Control Logic Level Reference Oscillator RO1 RO2 Crystal Figure 1. Simplified Block Diagram Functional Description is set to 32 times the crystal reference frequency via a phase-locked loop synthesizer with a fully integrated Figure 1 shows the basic structure of the MICRF213. It loop filter. is made of three sub-blocks: Image Rejection UHF Down-converter, the OOK Demodulator, and Reference Image Reject Filter and Band-Pass Filter and Control Logics. Outside the device, the MICRF213 The IF ports of the mixer produce quadrature down requires only three components to operate; two converted IF signals. These IF signals are low-pass capacitors (CTH, and CAGC) and the reference filtered. This removes higher frequency products prior to frequency device, usually a quartz crystal. An additional the image reject filter where they are combined to reject five components may be used to improve performance. the image frequencies. The IF signal then passes These are: power supply decoupling capacitor, two through a third order band pass filter. The IF center components for the matching network and two frequency is 0.86MHz. The IF BW is 235KHz @ components for the pre-selector band pass filter. 315MHz, this will vary with RF operating frequency. The IF BW can be calculated via direct scaling: Receiver Operation Operating Freq (MHz) BW = BW ×   LNA IF IF@315MHz  315  The RF input signal is AC-coupled into the gate circuit of the grounded source LNA input stage. The LNA is a These filters are fully integrated inside the MICRF213. Cascoded NMOS. After filtering, four active gain controlled amplifier stages enhance the IF signal to proper level for demodulation. Mixers and Synthesizer The LO ports of the Mixers are driven by quadrature OOK Demodulator local oscillator outputs from the synthesizer block. The The demodulator section is comprised of detector, local oscillator signal from the synthesizer is placed on programmable low pass filter, slicer, and AGC the low side of the desired RF signal. This allows comparator. suppression of the image frequency at twice the IF frequency below the wanted signal. The local oscillator August 19, 2015 6 Revision 2.0

Micrel, Inc. MICRF213 Detector and Programmable Low-Pass Filter 1.5µA current is then sourced into the external CAGC The demodulation starts with the detector removing the capacitor. When the output signal is greater than carrier from the IF signal. Post detection, the signal 750mV, a 15µA current sink discharges the CAGC becomes base band information. The programmable capacitor. The voltage, developed on the CAGC low-pass filter further enhances the base band capacitor, acts to adjust the gain of the mixer and the IF information. There are four programmable low-pass filter amplifier to compensate for RF input signal level BW settings: 1180Hz, 2360Hz, 4270Hz, 9400Hz for variation. 315MHz operation. Low pass filter BW will vary with RF Reference Control Operating Frequency. Filter BW values can be easily calculated by direct scaling. See the equation below for There are two components in the Reference Control the filter BW calculation: sub-block: 1) Reference Oscillator and, 2) Control Logic through parallel Inputs: SEL0, SEL1, SHDN. Operating Freq (MHz) BW = BW ×   Operating Freq @315MHz  315  Reference Oscillator V It is very important to choose filter setting that best fits BIAS the intended data rate as this will minimize data R R distortion. 1 2 Demod BW is set at 9700Hz @ 315MHz as default (assuming both SEL0 and SEL1 pins are floating). The low pass filter can be hardware set by external pins RO1 M1 gm SEL0 and SEL1. C01 Startup CC1 IBIAS Circuit SEL0 SEL1 Demod BW (@ 315MHz) 0 0 1180Hz CC2 1 0 2360Hz M2 M3 0 1 4270Hz 1 1 9400Hz - default RO2 C 1 Table 1. Demodulation BW Selection M4 Normallyon Slicer, Slicing Level and Squelch The signal, prior to slicer, is still linear demodulated AM. Figure 2. Reference Oscillator Circuit Data slicer converts this signal into digital “1”s and “0”s by comparing with the threshold voltage built up on the The reference oscillator in the MICRF213 (reference CTH capacitor. This threshold is determined by Figure 2) uses a basic Colpitts crystal oscillator detecting the positive and negative peaks of the data configuration with a MOS transconductor to provide signal and storing the mean value. Slicing threshold negative resistance. All capacitors shown in the figure default is 50%. After the slicer, the signal becomes are integrated inside MICRF213. R01 and R02 are digital OOK data. external pins of MICRF213. The user only need connect the reference oscillation crystal. During long periods of “0”s or no data period at all, threshold voltage on the CTH capacitor may be very Reference oscillator crystal frequency can be calculated low. Large random noise spikes during this time may thus as: cause erroneous “1”s at DO pin. Squelch pin when pull F = F /(32 + 1.1/12) REFOSC RF down low will suppress these errors. For 315MHz, F = 9.81563 MHz. REFOSC AGC Comparator To operate the MICRF213 with minimum offset, crystal frequencies should be specified with 10pF loading The AGC comparator monitors the signal amplitude from the output of the programmable low-pass filter. capacitance. When the output signal is less than 750mV threshold, August 19, 2015 7 Revision 2.0

Micrel, Inc. MICRF213 Application Information Figure 3. QR213HE1 Application Example, 315MHz The MICRF213 can be fully tested by using one of the C9 and place the whip antenna in the hole provided in many evaluation boards designed by Micrel and the PCB. Also, a RF signal can be injected there. intended for use with this device. As an entry level, L1 and C8 form the pass-band-filter front-end. Its the QR213HE1 (reference Figure 3) offers a good purpose is to attenuate undesired outside band noise start for most applications. It has a helical PCB which reduces the receiver performance. It is antenna with its matching network, a band-pass-filter calculated by the parallel resonance equation front-end as a pre-selector filter, matching network f = 1/(2*PI*(SQRT(L1*C8)). Table 3 shows the most and the minimum components required to make the used frequency values. device work. The minimum components are a crystal, Cagc, and Cth capacitors. By removing the matching Freq (MHz) C8 (pF) L1 (nH) network of the helical PCB antenna (C9 and L3), a 303.825 6.8 39 whip antenna (ANT2) or a RF connector (J2) can be 315 6.8 39 used instead. Figure 3 shows the entire schematic for 345 5.6 39 315MHz. Other frequencies can be used and the values needed are listed in the tables below. Table 3. Band-Pass-Filter Front-End Values Capacitor C9 and inductor L3 are the passive There is no need for the band-pass-filter front-end for elements for the helical PCB matching network. It is applications where it is proven the outside band noise recommended that a tight tolerance be used for these does not cause a problem. The MICRF213 has image devices; such as 2% for the inductor and 0.1pF for the reject mixers which improve significantly the selectivity capacitor. PCB variations may require different values and rejection of outside band noise. and optimization. Table 2 shows the matching Capacitor C3 and inductor L2 form the L-shape elements for the device frequency range. For matching network. The capacitor provides additional additional information, reference the: Small PCB attenuation for low frequency outside band noise and Antennas for Micrel RF Products application note. the inductor provides additional ESD protection for the antenna pin. Two ways can be used to find these Freq (MHz) C9 (pF) L3 (nH) values, which are matched close to 50Ω. One method 303.825 1.2 82 is done by calculating the values using the equations 315 1.2 75 below and another by using a Smith chart. The latter 345 1.2 62 is made easier by using software that plots the values of the components C8 and L1, like WinSmith by Noble Table 2. Matching Values for the Helical PCB Antenna Publishing. To use another antenna, such as the whip kind, remove To calculate the matching values, one needs to know August 19, 2015 8 Revision 2.0

Micrel, Inc. MICRF213 the input impedance of the device. Table 4 shows the Second, we plot the shunt inductor (68nH) and the input impedance of the MICRF213 and the suggested series capacitor (1.8pF) for the desired input matching values used for the most frequencies. impedance (Figure 5). We can see the matching Please keep in mind that these suggested values may leading to the center of the Smith Chart or close to be different if the layout is not exactly the same as the 50Ω. one depicted here. Freq (MHz) C3 (pF) L2 (nH) Z device (Ω) 303.825 1.8 72 34.6– j245.1 315 1.8 68 32.5 – j235 345 1.8 56 25.3 – j214 Table 4. Matching Values for the Most Used Frequencies For the frequency of 315MHz, the input impedance is Z = 32.5 – j235Ω, then the matching components are calculated by: Equivalent parallel = B = 1/Z = 0.577 + j4.175 msiemens Rp = 1 / Re (B); Xp = 1 / Im (B) Rp = 1.733 kΩ; Xp = 239.5 Ω Q = SQRT (Rp/50 + 1) Q = 5.972 Xm = Rp / Q Xm = 290.21 Ω Resonance Method For L-shape Matching Network Lc = Xp / (2.Pi.f); Lp = Xm / (2.Pi.f) L2 = (Lc.Lp) / (Lc + Lp); C3 = 1 / (2.Pi.f.Xm) L2 = 66.3nH C3 = 1.74pF Doing the same calculation example with the Smith Chart, it would appear as follows, First, we plot the input impedance of the device, (Z = 32.5 – j235)Ω @ 315MHz.(Figure 4). Figure 5. Plotting the Shunt Inductor and Series Capacitor Crystal Y1 or Y1A (SMT or leaded respectively) is the reference clock for all the device internal circuits. Desired crystal characteristics are: 10pF load capacitance, 30ppm, ESR < 50Ω and a -40ºC to +105ºC temperature range. Table 5 shows the crystal frequencies and one of Micrel’s approved crystal manufactures (www.hib.com.br). The oscillator of the MICRF213 is a Colpitts type. It is very sensitive to stray capacitance loads. Thus, very good care must be taken when laying out the printed Figure 4. Device’s Input Impedance, Z = 32.5 – j235 Ω circuit board. Avoid long traces and ground plane on August 19, 2015 9 Revision 2.0

Micrel, Inc. MICRF213 the top layer close to the REFOSC pins RO1 and according to Table 6. For example, if the pulse period RO2. When care is not taken in the layout, and is 140µsec, 50% duty cycle, then the pulse width will crystals from other vendors are used, the oscillator be 70µsec (PW = (140 µsec * 50%) / 100). So, a may take longer times to start as well as the time to bandwidth of 9.286kHz would be necessary (0.65 / good data in the DO pin to show up. In some cases, if 70µsec). However, if this data stream had a pulse the stray capacitance is too high (>20pF), the period with a 20% duty cycle, then the bandwidth oscillator may not start at all. required would be 23.2kHz (0.65 / 28µsec), which The crystal frequency is calculated by REFOSC = RF exceeds the maximum bandwidth of the demodulator Carrier/(32+(1.1/12)). The local oscillator is low side circuit. If one tries to exceed the maximum bandwidth, injection (32 × 9.81563MHz = 314.1MHz), that is, its the pulse would appear stretched or wider. frequency is below the RF carrier frequency and the SEL0 SEL1 Demod. Shortest Maximum image frequency is below the LO frequency. Refer to JP1 JP2 BW Pulse baud rate for Figure 6. The product of the incoming RF signal and (hertz) (usec) 50% Duty local oscillator signal will yield the IF frequency, which Cycle (hertz) will then be demodulated by the detector of the Short Short 1180 551 908 device. Open Short 2360 275 1815 Short Open 4720 138 3631 Image Desired Open Open 9400 69 7230 Frequency Signal Table 6. JP1 and JP2 Setting, 315MHz Capacitors C6 and C4, Cth and Cagc capacitors respectively, provide the time base reference for the data pattern received. These capacitors are selected according to data profile, pulse duty cycle, dead time fLO f (MHz) between two received data packets and if the data pattern has or not a preamble. See Figure 7 for an Figure 6. Low Side Injection Local Oscillator example of a data profile. Other frequencies will have different demodulator REFOSC Carrier HIB Part Number bandwidth limits, which are derived from the reference (MHz) (MHz) oscillator frequency. Table 7 and Table 8, below, 9.467411 303.825 SA-9.467411-F-10-H-30-30-X show the limits for the other two most used 9.81563 315 SA-9.815630-F-10-H-30-30-X frequencies. 10.75045 345.0 SA-10.750450-F-10-H-30-30-X SEL0 SEL1 Demod. Shortest Maximum Table 5. Crystal Frequency and Vendor Part Number JP1 JP2 BW Pulse baud rate for (hertz) (usec) 50% Duty JP1 and JP2 are the bandwidth selection for the Cycle (hertz) demodulator bandwidth. To set it correctly, it is Short Short 1140 570 8770 necessary to know the shortest pulse width of the Open Short 2280 285 1754 encoded data sent in the transmitter. Reference the example of the data profile, in the Figure 7, below: Short Open 4550 143 3500 Open Open 9100 71 7000 PW1 PW2 Preamble Table 7. JP1 and JP2 Setting, 303.825MHz Header SEL0 SEL1 Demod. Shortest Maximum 1 2 3 4 5 6 7 8 9 10 JP1 JP2 BW Pulse baud rate for t1 t2 PW2 = Narrowest pulse width (hertz) (usec) 50% Duty Cycle (Hertz) t1 & t2 = data period Short Short 1290 504 992 Figure 7. Example of a Data Profile Open Short 2580 252 1985 PW2 is shorter than PW1, so PW2 should be used for Short Open 5170 126 3977 the demodulator bandwidth calculation. The Open Open 10340 63 7954 calculation is found by 0.65/shortest pulse width. After this value is found, the setting should be done Table 8. JP1 and JP2 Setting, 345.0MHz August 19, 2015 10 Revision 2.0

Micrel, Inc. MICRF213 For best results, the values should always be optimized for the data pattern used. As the baud rate increases, the capacitor values decrease. Table 9 shows suggested values for Manchester Encoded data at 50% duty cycle. SEL0 SEL1 Demod. Cth Cagc JP1 JP2 BW (hertz) Short Short 1400 100nF 4.7uF Open Short 2800 47nF 2.2uF Short Open 5300 22nF 1uF DO Pin Open Open 9700 10nF 0.47uF Table 9. Suggested Cth and Cagc Values JP3 is a jumper used to configure the digital squelch function. When it is high, there is no squelch applied to the digital circuits and the DO (data out) pin yields a hash signal. When the pin is low, the DO pin activity is Figure 9. Data Out Pin with Squelch (SQ = 0) considerably reduced. It will have more or less than Other components used include: C5, which is a shown in the figure below depending upon the outside decoupling capacitor for the Vdd line; R4 reserved for band noise. The penalty for using squelch is a delay in future use and not needed for the evaluation board; obtaining a good signal in the DO pin. That is, it takes R3 for the shutdown pin (SHDN = 0, device is longer for the data to show up. The delay is operation), which can be removed if that pin is dependent upon many factors such as RF signal connected to a microcontroller or an external switch; intensity, data profile, data rate, Cth and Cagc and R1 and R2 which form a voltage divider for the capacitor values, and outside band noise. See Figure AGC pin. One can force a voltage in this AGC pin to 8 and 9. purposely decrease the device sensitivity. Special care is needed when doing this operation, as an external control of the AGC voltage may vary from lot to lot and may not work the same in several devices. Three other pins need to be discussed as well. They are the DO, RSSI, and shut down pins. The DO pin has a driving capability of 0.4mA. This is good enough for most of the logic families ICs in the market today. The RSSI pin provides a transfer function of the RF signal intensity vs. voltage. It is very useful to determine the signal to noise ratio of the RF link, DO Pin crude range estimate from the transmitter source and AM demodulation, which requires a low Cagc capacitor value. The shut down pin (SHDN) is useful to save energy. Making its level close to Vdd (SHDN = 1), the device is then not in operation. Its DC current consumption is less than 1µA (do not forget to remove R3). When Figure 8. Data Out Pin with No Squelch (SQ = 1) toggling from high to low, there will be a time required for the device to come to steady state mode, and a time for data to show up in the DO pin. This time will be dependent upon many things such as temperature, crystal used, and if the there is an external oscillator with faster startup time. Crystal vendors suggest that the data will show up in the DO pin around 1msec time, and 2msec over the temperature range of the device. See Figure 10. August 19, 2015 11 Revision 2.0

Micrel, Inc. MICRF213 3.3V MICRF2XX 10 ohm (Vdd) pin MICRF2XX Bias 4.7uF control & POR 2.2uF TeCsirtc Muoitdse Cphcioannn agnneed ct thVioed ndSs Hp tDionN Test Bus (SHDN) pin (SHDN) pin 100K This device turns on, preventing POR from setting operating modes correctly To prevent the erroneous startup, a simple RC network is recommended. The 10Ω resistor and the 4.7µF capacitor provide a delay of about 200µs between the VDD and SHDN during the power up, Figure 10. Time-to-Good Data After Shut Down Cycle, thus ensuring the part to enter to shutdown stage Room Temperature before the part is actually turned on. The 2.2µF capacitor bootstraps the voltage on SHDN, ensuring that SHDN voltage leads the supply voltage on Vdd Important Note A few customers have reported that some MICRF213 during the power up. This gives the POR circuit time receivers do not start up correctly. When the issue to set internal register bits. The SHDN pin can be occurs, DO either chatters or stays at low voltage brought low to turn the chip on once the initialization is level. An unusual operating current is observed and completed. The 2.2µF and 100kΩ network form a RC the part cannot receive or demodulate data even delay of about 200ms before the SHDN pin is brought when a strong OOK signal is present. to low again. The 100kΩ resistor discharges the SHDN pin to turn the chip on. Micrel has confirmed that this is the symptom of incorrect power on reset (POR) of internal register bits. The MICRF213 is designed to start up in shutdown mode (SHDN pin must be in logic high during Vdd ramp up). When the SHDN pin is tied to GND, and if the supply is ramped up slowly, a “test Vdd pin bus pull down” circuit may be activated. Once the chip enters this mode, the POR does not have the chance to set register bits (and hence operating modes) correctly. The test bus pull down acts on the SHDN pin, and can be illustrated as the following diagram. SHDN pin The suggestion provided above will generally serve to prevent the startup issue from happening to the MICRF213 series ASK receiver. However, exact values of the RC network depend on the ramp rate of the supply voltage, and should be determined on a case-by-case basis. August 19, 2015 12 Revision 2.0

Micrel, Inc. MICRF213 PCB Considerations and Layout connection. Do not share vias with ground Figures 11 to 16 show some of the printed circuit connections. Each ground connection = 1 via or more layers for the QR211HE1 board. The MICRF213 vias. Ground plane must be solid and possibly without shares the exact same board with different component interruptions. Avoid ground plane on top next to the values. Use the Gerber files provided (downloadable matching elements. It normally adds additional stray from Micrel Website: www.micrel.com) which have the capacitance which changes the matching. Do not use remaining layers needed to fabricate this board. When phenolic material, only FR4 or better materials. copying or making one’s own boards, be sure and Phenolic material is conductive above 200MHz. The make the traces as short as possible. Long traces RF path should be as straight as possible avoiding alter the matching network and the values suggested loops and unnecessary turns. Separate ground and are no longer valid. Suggested Matching Values may Vdd lines from other circuits (microcontroller, etc). vary due to PCB variations. A PCB trace 100 mills Known sources of noise should be laid out as far as (2.5mm) long has about 1.1nH of inductance. possible from the RF circuits. Avoid thick traces, the Optimization should always be done with exhaustive higher the frequency, the thinner the trace should be range tests. Make individual ground connections to in order to minimize losses in the RF path. the ground plane with a via for each ground Figure 11. QR211/213HE1 Top Layer Figure 12. QR211/213HE1 Bottom Layer, Mirror Image August 19, 2015 13 Revision 2.0

Micrel, Inc. MICRF213 Figure 13. QR211/213HE1 Top Silkscreen Layer Figure 14. QR211/213HE1 Bottom Silkscreen Layer, Mirror Image Figure 15. QR211/213HE1 Dimensions August 19, 2015 14 Revision 2.0

Micrel, Inc. MICRF213 QR213HE1 Bill of Materials, 315MHz Item Part Number Manufacturer Description Qty. ANT1 Helical PCB Antenna Pattern 1 ANT2 (np)50Ω Ant 230mm 20 AWG, rigid wire 1 C3 MuRata(1) 1.8pF, 0402/0603 1 C4 Murata(1) / Vishay(2) 4.7µF, 0603/0805 1 C5 Murata(1) / Vishay(2) 0.1µF, 0402/0603 1 C6 Murata(1) / Vishay(2) 0.47µF, 0402/0603 1 C8 Murata(1) 6.8pF, 0402/0603 1 C9 Murata(1) 1.2pF, 0402/0603 1 JP1,JP Vishay(2) short, 0402, 0Ω resistor 2 2 JP3 open, 0402, not placed 1 J2 (np) not placed 1 J3 CON6 1 L1 Coilcraft(3) / Murata(1) / ACT1(4) 39nH 5%, 0402/0603 1 L2 Coilcraft(3) / Murata(1) / ACT1(4) 68nH 5%, 0402/0603 1 L3 Coilcraft(3) / Murata(1) / ACT1(4) 75nH 2%, 0402/0603 1 R1,R2 (np) 0402, not placed 2 R3 Vishay(2) 100kΩ, 0402 1 Y1 HCM49 HIB(5) (np)9.81563MHz Crystal 1 Y1A HC49 HIB(5) 9.81563MHz Crystal 1 U1 MICRF213AYQS Micrel Inc.(6) 3.3V, QwikRadio® 315MHz Receiver 1 Notes: 1. Murata: www.murata.com 2. Vishay: www.vishay.com 3. Coilcraft: www.coilcraft.com 4. ACT1: www.act1.com 5. HIB: www.hib.com.br 6. Micrel, Inc.: www.micrel.com August 19, 2015 15 Revision 2.0

Micrel, Inc. MICRF213 (1) Package Information and Recommended Land Pattern 16-Pin QSOP (QS) Note: 1. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com. August 19, 2015 16 Revision 2.0

Micrel, Inc. MICRF213 MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com Micrel, Inc. is a leading global manufacturer of IC solutions for the worldwide high performance linear and power, LAN, and timing & communications markets. The Company’s products include advanced mixed-signal, analog & power semiconductors; high-performance communication, clock management, MEMs-based clock oscillators & crystal-less clock generators, Ethernet switches, and physical layer transceiver ICs. Company customers include leading manufacturers of enterprise, consumer, industrial, mobile, telecommunications, automotive, and computer products. Corporation headquarters and state-of-the-art wafer fabrication facilities are located in San Jose, CA, with regional sales and support offices and advanced technology design centers situated throughout the Americas, Europe, and Asia. Additionally, the Company maintains an extensive network of distributors and reps worldwide. Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this datasheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2007 Micrel, Incorporated. August 19, 2015 17 Revision 2.0

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