MIC4123/4124/4125 Micrel, Inc. MIC4123/4124/4125 Dual 3A-Peak Low-Side MOSFET Driver Bipolar/CMOS/DMOS Process General Description Features The MIC4123/4124/4125 family are highly reliable BiC- • Reliable, low-power bipolar/CMOS/DMOS construction MOS/DMOS buffer/driver/MOSFET drivers. They are higher • Latch-up protected to >200mA reverse current output current versions of the MIC4126/4127/4128, which • Logic input withstands swing to –5V are improved versions of the MIC4426/4427/4428. All three • High 3A-peak output current families are pin-compatible. The MIC4123/4124/4125 driv- • Wide 4.5V to 20V operating range ers are capable of giving reliable service in more demanding • Drives 1800pF capacitance in 25ns electrical environments than their predecessors. They will • Short <50ns typical delay time not latch under any conditions within their power and voltage • Delay times consistent with in supply voltage change ratings. They can survive up to 5V of noise spiking, of either • Matched rise and fall times polarity, on the ground pin. They can accept, without either • TTL logic input independent of supply voltage damage or logic upset, up to half an amp of reverse current • Low equivalent 6pF input capacitance (either polarity) forced back into their outputs. • Low supply current 3.5mA with logic-1 input The MIC4123/4124/4125 series drivers are easier to use, more 350µA with logic-0 input flexible in operation, and more forgiving than other CMOS • Low 2.3Ω typical output impedance or bipolar drivers currently available. Their BiCMOS/DMOS • Output voltage swings within 25mV of ground or V . construction dissipates minimum power and provides rail-to- S • ‘426/7/8-, ‘1426/7/8-, ‘4426/7/8-compatible pinout rail voltage swings. • Inverting, noninverting, and differential configurations Primarily intended for driving power MOSFETs, the • Exposed backside pad packaging reduces heat MIC4123/4124/4125 drivers are suitable for driving other loads ePAD SOIC-8L (θ = 58°C/W) JA (capacitive, resistive, or inductive) which require low-imped- 4mm x 4mm MLF™-8L (θ = 45°C/W) JA ance, high peak currents, and fast switching times. Heavily loaded clock lines, coaxial cables, or piezoelectric transducers are some examples. The only known limitation on loading is that total power dissipated in the driver must be kept within the maximum power dissipation limits of the package. Functional Diagram V S Integrated Component Count: 4 Resistors 0.6mA INVERTING 4 Capacitors 0.1mA 52 Transistors OUTA INA 2kΩ NONINVERTING 0.6mA INVERTING 0.1mA OUTB INB 2kΩ NONINVERTING GND Ground Unused Inputs Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com May 2005 1 M9999-052405

MIC4123/4124/4125 Micrel, Inc. Ordering Information Part Number Package Configuration Lead Finish MIC4123YME EPAD 8-Lead SOIC Dual Inverting Pb-Free MIC4123YML 8-Lead MLF Dual Inverting Pb-Free MIC4124YME EPAD 8-Lead SOIC Dual Non-Inverting Pb-Free MIC4124YML 8-Lead MLF Dual Non-Inverting Pb-Free MIC4125YME EPAD 8-Lead SOIC Inverting + Non-Inverting Pb-Free MIC4125YML 8-Lead MLF Inverting + Non-Inverting Pb-Free Pin & Driver Configuration MIC4123 MIC4123 MIC4124 MIC4124 MIC4125 MIC4125 NC 1 8 NC NC 1 8 NC NC 1 8 NC 2 A 7 2 A 7 2 A 7 INA 2 7 OUTA INA 2 7 OUTA INA 2 7 OUTA GND 3 6 V GND 3 6 V GND 3 6 V S S S 4 B 5 4 B 5 4 B 5 INB 4 5 OUTB INB 4 5 OUTB INB 4 5 OUTB Dual Dual Inverting+ Inverting Noninverting Noninverting Pin Description Pin Number Pin Name Function 2 / 4 INA / B Control Input 3 GND Ground: Duplicate pins must be externally connected together 6 V Supply Input: Duplicate pins must be externally connected together S 7 / 5 OUTA / B Output: Duplicate pins must be externally connected together 1, 8 NC Not connected EP GND Ground: Backside Pad M9999-052405 2 May 2005

MIC4123/4124/4125 Micrel, Inc. Absolute Maximum Ratings (Note 1) Operating Ratings (Note 2) Supply Voltage ...........................................................+24V Supply Voltage (V ) ......................................+4.5V to +20V S Input Voltage ..................................V + 0.3V to GND – 5V Junction Temperature Range .....................–40°C to 125°C S Junction Temperature ................................................150°C Package Thermal Resistance Storage Temperature Range ......................–65°C to 150°C 4mm X 4mm MLF θ .........................................45°C/W JA EPAD SOIC-8L θ .............................................58°C/W Lead Temperature (10 sec.) ......................................300°C JA ESD Susceptability, Note 3 MIC4123/4124/4125 Electrical Characteristics (Note 4) 4.5V ≤ V ≤ 20V; T = 25°C, bold values indicate –40°C ≤ T ≤ +125°C; unless noted. Input Voltage slew rate >2.5V/µs. S A J Symbol Parameter Conditions Min Typ Max Units Input V Logic 1 Input Voltage 2.4 1.5 V IH V Logic 0 Input Voltage 1.3 0.8 V IL I Input Current 0V ≤ V ≤ V –1 1 µA IN IN S –10 10 µA Output V High Output Voltage I = 100µA V–0.025 V OH OUT S V Low Output Voltage I = –100µA 0.025 V OL OUT R Output Resistance HI State I = 10mA, V = 20V 2.3 5 Ω O OUT S 8 Ω Output Resistance LO State I = 10mA, V = 20V 2.2 5 Ω OUT S 8 Ω I Peak Output Current 3 A PK I Latch-Up Protection >200 mA Withstand Reverse Current Switching Time t Rise Time test Figure 1, C = 1800pF 11 35 ns R L 60 ns t Fall Time test Figure 1, C = 1800pF 11 35 ns F L 60 ns t Delay Tlme test Ffigure 1, C = 1800pF 44 75 ns D1 L 100 ns t Delay Time test Figure 1, C = 1800pF 59 75 ns D2 L 100 ns Power Supply I Power Supply Current V = 3.0V (both inputs) 1.5 2.5 mA S IN 3.5 mA I Power Supply Current V = 0.0V (both inputs) 0.15 0.25 mA S IN 0.3 mA Note 1. Exceeding the absolute maximum rating may damage the device. Note 2. The device is not guaranteed to function outside its operating rating. Note 3. Devices are ESD sensitive. Handling precautions recommended. ESD tested to human body model, 1.5k in series with 100pF. Note 4. Specification for packaged product only. May 2005 3 M9999-052405

MIC4123/4124/4125 Micrel, Inc. Test Circuit VS = 20V VS = 20V 0.1µF 4.7µF 0.1µF 4.7µF INA A OUTA INA A OUTA 1800pF 1800pF MIC4123 MIC4124 INB B OUTB INB B OUTB 1800pF 1800pF 5V 5V 2.5V 2.5V 90% 90% INPUT INPUT 10% 10% 0V 0V t t PW PW t t t t t t t t V D1 F D2 R V D1 R D2 F S S 90% 90% OUTPUT OUTPUT 10% 10% 0V 0V Figure 1a. Inverting Driver Switching Time Figure 1b. Non-inverting Driver Switching Time M9999-052405 4 May 2005

MIC4123/4124/4125 Micrel, Inc. Typical Characteristic Curves Rise Time Fall Time Output Resistance vs. Capactive Load vs. Capactive Load vs. Supply Voltage 140 140 4.5 120 120 E (Ω)34..50 C s)100 s)100 N3.0 Output High n n A E ( 80 5V E ( 80 5V ST2.5 M M SI E TI 60 12V L TI 60 20V RE2.0 Output Low RIS 40 FAL 40 TPUT 11..05 U 20 20 O0.5 20V 12V 0 0 0 100 1000 10000 100 1000 10000 5 10 15 20 CAPACITIVE LOAD (pF) CAPACITIVE LOAD (pF) INPUT VOLTAGE (V) Propagation Delay Rise and Fall Time vs. Supply Voltage vs. Supply Voltage 100 25 s) 90 n Y ( 80 20 Rise Time LA 70 td2 DE 60 s)15 ATION 4500 td1 TIME (n10 Fall Time G A 30 P O 20 5 R P 10 C =1000pF C =1000pF LOAD LOAD 0 0 5 10 15 20 5 10 15 20 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) May 2005 5 M9999-052405

MIC4123/4124/4125 Micrel, Inc. Application Information the driver affect the rate at which it is possible to turn a load off: The adequacy of the grounding available for the driver, Although the MIC4123/24/25 drivers have been specifically and the inductance of the leads from the driver to the load. constructed to operate reliably under any practical circum- The latter will be discussed in a separate section. stances, there are nonetheless details of usage which will provide better operation of the device. The E-Pad and MLF packages have an exposed pad under the package. It's important for good thermal performance that Supply Bypassing this pad is connected to a ground plane. Charging and discharging large capacitive loads quickly requires large currents. For example, charging 2000pF from Best practice for a ground path is obviously a well laid out 0 to 15 volts in 20ns requires a constant current of 1.5A. In ground plane. However, this is not always practical, and a practice, the charging current is not constant, and will usually poorly-laid out ground plane can be worse than none. Attention peak at around 3A. In order to charge the capacitor, the driver to the paths taken by return currents even in a ground plane must be capable of drawing this much current, this quickly, is essential. In general, the leads from the driver to its load, from the system power supply. In turn, this means that as far the driver to the power supply, and the driver to whatever is as the driver is concerned, the system power supply, as seen driving it should all be as low in resistance and inductance by the driver, must have a VERY low impedance. as possible. Of the three paths, the ground lead from the driver to the logic driving it is most sensitive to resistance or As a practical matter, this means that the power supply bus inductance, and ground current from the load are what is most must be capacitively bypassed at the driver with at least likely to cause disruption. Thus, these ground paths should 100X the load capacitance in order to achieve optimum be arranged so that they never share a land, or do so for as driving speed. It also implies that the bypassing capacitor short a distance as is practical. must have very low internal inductance and resistance at all frequencies of interest. Generally, this means using two To illustrate what can happen, consider the following: The capacitors, one a high-performance low ESR film, the other inductance of a 2cm long land, 1.59mm (0.062") wide on a a low internal resistance ceramic, as together the valleys in PCB with no ground plane is approximately 45nH. Assum- their two impedance curves allow adequate performance over ing a dl/dt of 0.3A/ns (which will allow a current of 3A to flow a broad enough band to get the job done. PLEASE NOTE after 10ns, and is thus slightly slow for our purposes) a volt- that many film capacitors can be sufficiently inductive as to age of 13.5 Volts will develop along this land in response to be useless for this service. Likewise, many multilayer ceramic our postulated ∆Ι. For a 1cm land, (approximately 15nH) 4.5 capacitors have unacceptably high internal resistance. Use Volts is developed. Either way, anyone using TTL-level input capacitors intended for high pulse current service (in-house signals to the driver will find that the response of their driver we use WIMA™ film capacitors and AVX Ramguard™ ceram- has been seriously degraded by a common ground path for ics; several other manufacturers of equivalent devices also input to and output from the driver of the given dimensions. exist). The high pulse current demands of capacitive drivers Note that this is before accounting for any resistive drops in also mean that the bypass capacitors must be mounted the circuit. The resistive drop in a 1.59mm (0.062") land of very close to the driver in order to prevent the effects of lead 2oz. Copper carrying 3A will be about 4mV/cm (10mV/in) at inductance or PCB land inductance from nullifying what you DC, and the resistance will increase with frequency as skin are trying to accomplish. For optimum results the sum of the effect comes into play. lengths of the leads and the lands from the capacitor body to The problem is most obvious in inverting drivers where the the driver body should total 2.5cm or less. input and output currents are in phase so that any attempt Bypass capacitance, and its close mounting to the driver serves to raise the driver’s input voltage (in order to turn the driver’s two purposes. Not only does it allow optimum performance load off) is countered by the voltage developed on the com- from the driver, it minimizes the amount of lead length radiat- mon ground path as the driver attempts to do what it was ing at high frequency during switching, (due to the large Δ I) supposed to. It takes very little common ground path, under thus minimizing the amount of EMI later available for system these circumstances, to alter circuit operation drastically. disruption and subsequent cleanup. It should also be noted Output Lead Inductance that the actual frequency of the EMI produced by a driver is not the clock frequency at which it is driven, but is related to The same descriptions just given for PCB land inductance the highest rate of change of current produced during switch- apply equally well for the output leads from a driver to its load, ing, a frequency generally one or two orders of magnitude except that commonly the load is located much further away higher, and thus more difficult to filter if you let it permeate your from the driver than the driver’s ground bus. system. Good bypassing practice is essential to proper Generally, the best way to treat the output lead inductance operation of high speed driver ICs. problem, when distances greater than 4cm (2") are involved, requires treating the output leads as a transmission line. Un- Grounding fortunately, as both the output impedance of the driver and the Both proper bypassing and proper grounding are necessary input impedance of the MOSFET gate are at least an order of for optimum driver operation. Bypassing capacitance only magnitude lower than the impedance of common coax, using allows a driver to turn the load ON. Eventually (except in rare coax is seldom a cost-effective solution. A twisted pair works circumstances) it is also necessary to turn the load OFF. This about as well, is generally lower in cost, and allows use of a requires attention to the ground path. Two things other than May 2005 6 M9999-052405

MIC4123/4124/4125 Micrel, Inc. wider variety of connectors. The second wire of the twisted is present on the input. Input voltage switching threshold is pair should carry common from as close as possible to the approximately 1.5V which makes the driver directly compat- ground pin of the driver directly to the ground terminal of the ible with TTL signals, or with CMOS powered from any supply load. Do not use a twisted pair where the second wire in the voltage between 3V and 15V. pair is the output of the other driver, as this will not provide a The MIC4123/24/25 drivers can also be driven directly by complete current path for either driver. Likewise, do not use the MIC9130, MIC3808, MIC38C42, and similar switch mode a twisted triad with two outputs and a common return unless power supply ICs. By relocating the main switch drive function both of the loads to be driver are mounted extremely close into the driver rather than using the somewhat limited drive to each other, and you can guarantee that they will never be capabilities of a PWM IC. The PWM IC runs cooler, which switching at the same time. generally improves its performance and longevity, and the For output leads on a printed circuit, the general rule is to make main switches switch faster, which reduces switching losses them as short and as wide as possible. The lands should also and increase system efficiency. be treated as transmission lines: i.e., minimize sharp bends, The input protection circuitry of the MIC4123/24/25, in addi- or narrowings in the land, as these will cause ringing. For a tion to providing 2kV or more of ESD protection, also works to rough estimate, on a 1.59mm (0.062") thick G-10 PCB a pair prevent latchup or logic upset due to ringing or voltage spiking of opposing lands each 2.36mm (0.093") wide translates to a on the logic input terminal. In most CMOS devices when the characteristic impedance of about 50Ω. Half that width suffices logic input rises above the power supply terminal, or descends on a 0.787mm (0.031") thick board. For accurate impedance below the ground terminal, the device can be destroyed or matching with a MIC4123/24/25 driver, on a 1.59mm (0.062") rendered inoperable until the power supply is cycled OFF board a land width of 42.75mm (1.683") would be required, and ON. The MIC4123/24/25 drivers have been designed to due to the low impedance of the driver and (usually) its load. prevent this. Input voltages excursions as great as 5V below This is obviously impractical under most circumstances. ground will not alter the operation of the device. Input excur- Generally the tradeoff point between lands and wires comes sions above the power supply voltage will result in the excess when lands narrower than 3.18mm (0.125") would be required voltage being conducted to the power supply terminal of the on a 1.59mm (0.062") board. IC. Because the excess voltage is simply conducted to the To obtain minimum delay between the driver and the load, it power terminal, if the input to the driver is left in a high state is considered best to locate the driver as close as possible to when the power supply to the driver is turned off, currents as the load (using adequate bypassing). Using matching trans- high as 30mA can be conducted through the driver from the formers at both ends of a piece of coax, or several matched input terminal to its power supply terminal. This may overload lengths of coax between the driver and the load, works in the output of whatever is driving the driver, and may cause theory, but is not optimum. other devices that share the driver’s power supply, as well as the driver, to operate when they are assumed to be off, but Driving at Controlled Rates it will not harm the driver itself. Excessive input voltage will Occasionally there are situations where a controlled rise or also slow the driver down, and result in much longer internal fall time (which may be considerably longer than the normal propagation delays within the drivers. T , for example, may D2 rise or fall time of the driver’s output) is desired for a load. In increase to several hundred nanoseconds. In general, while such cases it is still prudent to employ best possible practice the driver will accept this sort of misuse without damage, in terms of bypassing, grounding and PCB layout, and then proper termination of the line feeding the driver so that line reduce the switching speed of the load (NOT the driver) by spiking and ringing are minimized, will always result in faster adding a noninductive series resistor of appropriate value and more reliable operation of the device, leave less EMI to between the output of the driver and the load. For situations be filtered elsewhere, be less stressful to other components where only rise or only fall should be slowed, the resistor can in the circuit, and leave less chance of unintended modes of be paralleled with a fast diode so that switching in the other operation. direction remains fast. Due to the Schmitt-trigger action of the driver’s input it is not possible to slow the rate of rise (or fall) Power Dissipation of the driver’s input signal to achieve slowing of the output. CMOS circuits usually permit the user to ignore power dis- sipation. Logic families such as 4000 series and 74Cxxx have Input Stage outputs which can only source or sink a few milliamps of cur- The input stage of the MIC4123/24/25 consists of a single- rent, and even shorting the output of the device to ground or MOSFET class A stage with an input capacitance of <8pF. V may not damage the device. CMOS drivers, on the other CC This capacitance represents the maximum load from the hand, are intended to source or sink several Amps of current. driver that will be seen by its controlling logic. The drain load This is necessary in order to drive large capacitive loads at on the input MOSFET is a –2mA current source. Thus, the frequencies into the megahertz range. Package power dis- quiescent current drawn by the driver varies, depending upon sipation of driver ICs can easily be exceeded when driving the logic state of the input. large loads at high frequencies. Care must therefore be paid to device dissipation when operating in this domain. Following the input stage is a buffer stage which provides ~400mV of hysteresis for the input, to prevent oscillations when slowly-changing input signals are used or when noise M9999-052405 7 May 2005

MIC4123/4124/4125 Micrel, Inc. The Supply Current vs Frequency and Supply Current vs P = I2 R D L1 O Load characteristic curves furnished with this data sheet However, in this instance the R required may be either the on aid in estimating power dissipation in the driver. Operating O resistance of the driver when its output is in the high state, or frequency, power supply voltage, and load all affect power its on resistance when the driver is in the low state, depending dissipation. upon how the inductor is connected, and this is still only half Given the power dissipation in the device, and the thermal the story. For the part of the cycle when the inductor is forcing resistance of the package, junction operating temperature current through the driver, dissipation is best described as for any ambient is easy to calculate. For example, the P = I V (1 – D) thermal resistance of the 8-pin E-Pas SOIC package, from L2 D the datasheet, is 58°C/W. In a 25°C ambient, then, using a where V is the forward drop of the clamp diode in the driver D maximum junction temperature of 150°C, this package will (generally around 0.7V). The two parts of the load dissipation dissipate 2.16W. must be summed in to produce P L Accurate power dissipation numbers can be obtained by sum- P = P + P L L1 L2 ming the three sources of power dissipation in the device: Quiescent Power Dissipation • Load power dissipation (P ) L Quiescent power dissipation (P , as described in the input • Quiescent power dissipation (P ) Q Q section) depends on whether the input is high or low. A low • Transition power dissipation (P ) T input will result in a maximum current drain (per driver) of Calculation of load power dissipation differs depending upon ≤0.2mA; a logic high will result in a current drain of ≤2.0mA. whether the load is capacitive, resistive or inductive. Quiescent power can therefore be found from: Resistive Load Power Dissipation P = V [D I + (1 – D) I ] Q S H L Dissipation caused by a resistive load can be calculated as: where: P = I2 R D I = quiescent current with input high L O H I = quiescent current with input low where: L D = fraction of time input is high (duty cycle) I = the current drawn by the load V = power supply voltage S R = the output resistance of the driver when the O Transition Power Dissipation output is high, at the power supply voltage used (See characteristic curves) Transition power is dissipated in the driver each time its D = fraction of time the load is conducting (duty cycle) output changes state, because during the transition, for a very brief interval, both the N- and P-channel MOSFETs in Capacitive Load Power Dissipation the output totem-pole are ON simultaneously, and a current Dissipation caused by a capacitive load is simply the energy is conducted through them from V to ground. The transition S placed in, or removed from, the load capacitance by the power dissipation is approximately: driver. The energy stored in a capacitor is described by the P = f V (A•s) equation: T S where (A•s) is a time-current factor derived from Figure 2. E = 1/2 C V2 Total power (PD) then, as previously described is just As this energy is lost in the driver each time the load is charged or discharged, for power dissipation calculations the 1/2 is P = P + P +P D L Q T removed. This equation also shows that it is good practice not to place more voltage in the capacitor than is necessary, Examples show the relative magnitude for each term. as dissipation increases as the square of the voltage applied EXAMPLE 1: A MIC4123 operating on a 12V supply driving to the capacitor. For a driver with a capacitive load: two capacitive loads of 3000pF each, operating at 250kHz, P = f C (V )2 with a duty cycle of 50%, in a maximum ambient of 60°C. L S where: First calculate load power loss: f = Operating Frequency P = f x C x (V )2 L S C = Load Capacitance P = 250,000 x (3 x 10–9 + 3 x 10–9) x 122 L V = Driver Supply Voltage = 0.2160W S Inductive Load Power Dissipation Then transition power loss: For inductive loads the situation is more complicated. For P = f x V x (A•s) T S the part of the cycle in which the driver is actively forcing = 250,000 • 12 • 2.2 x 10–9 = 6.6mW current into the inductor, the situation is the same as it is in the resistive case: Then quiescent power loss: May 2005 8 M9999-052405

MIC4123/4124/4125 Micrel, Inc. P = V x [D x I + (1 – D) x I ] In a MLF with an θ of 60°C/W, this amount of power results Q S H L JA = 12 x [(0.5 x 0.0035) + (0.5 x 0.0003)] in a junction temperature given the maximum 40°C ambient = 0.0228W of: Total power dissipation, then, is: (0.213 x 100) + 40 = 52.8°C P = 0.2160 + 0.0066 + 0.0228 The actual junction temperature will be lower than calculated D = 0.2454W both because duty cycle is less than 100% and because the graph lists R at a T of 125°C and the R at 52.8°C T Assuming an E-Pad SOIC package, with an θ of 58°C/W, DS(on) J DS(on) J JA will be somewhat lower. this will result in the junction running at: Definitions 0.2454 x 58 = 14.2°C C = Load Capacitance in Farads. L above ambient, which, given a maximum ambient tempera- D = Duty Cycle expressed as the fraction of time the ture of 60°C, will result in a maximum junction temperature input to the driver is high. of 89.4°C. f = Operating Frequency of the driver in Hertz. EXAMPLE 2: A MIC4124 operating on a 15V input, with one driver driving a 50Ω resistive load at 1MHz, with a duty cycle I = Power supply current drawn by a driver when both of 67%, and the other driver quiescent, in a maximum ambi- H inputs are high and neither output is loaded. ent temperature of 40°C: I = Power supply current drawn by a driver when both P = I2 x R x D L inputs are low and neither output is loaded. L O First, I must be determined. I = Output current from a driver in Amps. O D I = V / (R + R ) P = Total power dissipated in a driver in Watts. O S O LOAD D Given R from the characteristic curves then, P = Power dissipated in the driver due to the driver’s O L load I = 15 / (3.3 + 50) O in Watts. I = 0.281A O P = Power dissipated in a quiescent driver in Watts. Q and: P = Power dissipated in a driver when the output T P = (0.281)2 x 3.3 x 0.67 changes L = 0.174W states (“shoot-through current”) in Watts. P = F x V x (A•s)/2 NOTE: The “shoot-through” current from a dual T S transition (once up, once down) for both drivers is (because only one side is operating) stated in the graph on the following page in ampere- = (1,000,000 x 15 x 3.3 x 10–9) / 2 nanoseconds. This figure must be multiplied by the = 0.025 W number of repetitions per second (frequency to find Watts). and: R = Output resistance of a driver in Ohms. O P = 15 x [(0.67 x 0.00125) + (0.33 x 0.000125) + V = Power supply voltage to the IC in Volts. Q (1 x 0.000125)] S (this assumes that the unused side of the driver has its input grounded, which is more efficient) = 0.015W then: P = 0.174 + 0.025 + 0.0150 D = 0.213W M9999-052405 9 May 2005

MIC4123/4124/4125 Micrel, Inc. Crossover Energy Loss 10-8 ) s d n o c e -s10-9 e r e p m A ( s • A 10-10 0 2 4 6 8 10 12 14 16 18 20 V IN NOTE: THE VALUES ON THIS GRAPH REPRESENT THE LOSS SEEN BY BOTH DRIVERS IN A PACKAGE DURING ONE COMPLETE CYCLE. FOR A SINGLE DRIVER DIVIDE THE STATED VALUES BY 2. FOR A SINGLE TRANSITION OF A SINGLE DRIVER, DIVIDE THE STATED VALUE BY 4. Figure 2. May 2005 10 M9999-052405

MIC4123/4124/4125 Micrel, Inc. Package Information A D A1 5 D1 A2 A3 1 N DIMENSION 32 A M-IN. (mN0.O8m5M). M1.0A0X. E1 E A1 0.00 0.01 0.05 A2 - 0.65 0.80 A3 0.20 REF. D 4.00 BSC D1 3.75 BSC D2 2.25 2.40 2.55 E 4.00 BSC E1 3.75 BSC TOP VIEW 0 PSELAATNINEG E02 3.05 3.20 3.1325° P 0.24 0.42 0.60 e 0.65 BSC N 8 4X P D2 0P.I2N01 RID. bL 00..2330 00..2485 00..3650 4X P 1N. O ATLEL: DIMENSIONS ARE IN MILLIMETERS. N 1 2. N IST THHEE N NUUMMBBEERR O OFF T TEERRMMININAALLSS P.ER SIDE IS N/4. e 32 3. THEOF PEFIANPTA#U1CR KIEDA EOGNFET PBIFAYIC RUKESA MINGUGES BITDO BEDENY TE.IXFIISCTAETDIO ONN M THAERKT OORP OSUTHRFEARCE E2 4.PACKAGEWARPAGE MAX 0.05mm. b 5. APPLIED FOR EXPOSEDPAD AND TERMINALS. L BOTTOM VIEW 8-Pin 4x4 MLF (ML) 8-Pin Exposed Pad SOIC (ME) MICREL INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com This information furnished by Micrel in this data sheet is believed to be accurate and reliable. However no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2004 Micrel Incorporated M9999-052405 11 May 2005

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: M icrel: MIC4124YML TR MIC4124YME TR M icrochip: MIC4123YME MIC4124YME MIC4125YME MIC4123YME-TR MIC4125YML-TR MIC4125YME-TR MIC4124YME- TR MIC4124YML-TR MIC4123YML-TR