MCP6546/6R/6U/7/8/9 Open-Drain Output Sub-Microamp Comparators Features Description • Low Quiescent Current: 600nA/Comparator (typical) The Microchip Technology Inc. MCP6546/6R/6U/7/8/9 • Rail-to-Rail Input: V - 0.3V to V + 0.3V family of comparators, is offered in single (MCP6546, SS DD MCP6546R, MCP6546U), single with chip select (CS) • Open-Drain Output: V ≤10V OUT (MCP6548), dual (MCP6547) and quad (MCP6549) • Propagation Delay: 4µs (typical, 100mV Overdrive) configurations. The outputs are open-drain and are • Wide Supply Voltage Range: 1.6V to 5.5V capable of driving heavy DC or capacitive loads. • Single Available in SOT-23-5, SC-70-5* Packages These comparators are optimized for low power, • Available in Single, Dual and Quad single-supply application with greater than rail-to-rail • Chip Select (CS) with MCP6548 input operation. The output limits supply current surges • Low Switching Current and dynamic power consumption while switching. The • Internal Hysteresis: 3.3mV (typical) open-drain output of the MCP6546/6R/6U/7/8/9 family can be used as a level-shifter for up to 10V using a pull- • Temperature Range: up resistor. It can also be used as a wired-OR logic. - Industrial: -40°C to +85°C The internal Input hysteresis eliminates output switch- - Extended: -40°C to +125°C ing due to internal noise voltage, reducing current draw. These comparators operate with a single-supply Typical Applications voltage as low as 1.6V and draw a quiescent current of less than 1µA/comparator. • Laptop Computers • Mobile Phones The related MCP6541/2/3/4 family of comparators from Microchip has a push-pull output that supports rail-to- • Metering Systems rail output swing and interfaces with CMOS/TTL logic. • Hand-held Electronics * SC-70-5 E-Temp parts are not available at this • RC Timers release of the data sheet. • Alarm and Monitoring Circuits MCP6546U SOT-23-5 is E-Temp only. • Windowed Comparators • Multi-vibrators Related Devices • CMOS/TTL-Compatible Output: MCP6541/2/3/4 Package Types MCP6546 MCP6546R MCP6547 MCP6549 PDIP, SOIC, TSSOP PDIP, SOIC, MSOP SOT-23-5 PDIP, SOIC, MSOP OUTA 1 14OUTD NC 1 8 NC OUT 1 5 VSS OUTA 1 8 VDD VVVIINNS+–S 234 +- 765 VONDCUDT VVINDD+ 23 + - 4 VIN– VVIIVNNAAS+–S 234 - ++ - 765 OVVIIUNNBBT–+B VVIIVNNDAAD+– 234 - + + - 111132VVVSIINNSDD–+ V +5 10V + INB INC V –6 - + +- 9 V – INB INC MCP6546 MCP6546U MCP6548 OUTB7 8 OUTC SC-70-5, SOT23-5 SC-70-5, SOT-23-5 PDIP, SOIC, MSOP OUT 1 5 VDD VIN+ 1 5 VDD NC 1 8 CS + VSS 2 + - VSS 2 - VIN– 2 - 7 VDD VIN+ 3 4 VIN– VIN– 3 4 OUT VIN+ 3 + 6 OUT VSS 4 5 NC © 2002-2012 Microchip Technology Inc. DS21714G-page 1

MCP6546/6R/6U/7/8/9 1.0 ELECTRICAL † Notice: Stresses above those listed under “Absolute CHARACTERISTICS Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional Absolute Maximum Ratings † operation of the device, at those or any other conditions above those indicated in the operational listings of this V - V .........................................................................7.0V DD SS specification, is not implied. Exposure to maximum rat- Open-Drain Output..............................................VSS +10.5V ing conditions for extended periods may affect device Analog Input (VIN+, VIN-)††.............VSS - 1.0V to VDD + 1.0V reliability. All Other Inputs and Outputs .........V –0.3V to V +0.3V SS DD Difference Input Voltage ......................................|V – V | DD SS †† See Section4.1.2 “Input Voltage and Current Output Short-Circuit Current .................................continuous Limits” Current at Input Pins ....................................................±2mA Current at Output and Supply Pins ............................±30mA Storage Temperature.....................................-65°C to +150°C Maximum Junction Temperature (T )..........................+150°C J ESD Protection on All Pins: (HBM;MM).....................................2kV;200V (MCP6546U) (HBM;MM)................................4kV; 200V (all other parts) DC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, V = +1.6V to +5.5V, V = GND, T = 25°C, V + = V /2, DD SS A IN DD V – = V , R =2.74kΩ to V = V (Refer to Figure1-3). IN SS PU PU DD Parameters Sym Min Typ Max Units Conditions Power Supply Supply Voltage V 1.6 — 5.5 V V ≥ V DD PU DD Quiescent Current I 0.3 0.6 1 µA I = 0 Q OUT (per comparator) Input Input Voltage Range V V − — V + 0.3 V CMR SS DD 0.3 Common Mode Rejection Ratio CMRR 55 70 — dB V = 5V, V = -0.3V to 5.3V DD CM Common Mode Rejection Ratio CMRR 50 65 — dB V = 5V, V = 2.5V to 5.3V DD CM Common Mode Rejection Ratio CMRR 55 70 — dB V = 5V, V = -0.3V to 2.5V DD CM Power Supply Rejection Ratio PSRR 63 80 — dB V = V CM SS Input Offset Voltage V -7.0 ±1.5 +7.0 mV V = V (Note1) OS CM SS Drift with Temperature ΔV /ΔT — ±3 — µV/°C T = -40°C to +125°C, V = V OS A A CM SS Input Hysteresis Voltage V 1.5 3.3 6.5 mV V = V (Note1) HYST CM SS Linear Temp. Co. TC — 6.7 — µV/°C T = -40°C to +125°C, V = V 1 A CM SS (Note2) Quadratic Temp. Co. TC — -0.035 — µV/°C2 T = -40°C to +125°C, V = V 2 A CM SS (Note2) Input Bias Current I — 1 — pA V =V B CM SS At Temperature (I-Temp parts) I — 25 100 pA T = +85°C, V = V (Note3) B A CM SS At Temperature (E-Temp parts) I — 1200 5000 pA T = +125°C, V = V (Note3) B A CM SS Input Offset Current I — ±1 — pA V =V OS CM SS Note 1: The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. 2: V at differential temperatures is estimated using: HYST V (T ) = V + (T -25°C) TC + (T - 25°C)2TC . HYST A HYST A 1 A 2 3: Input bias current at temperature is not tested for the SC-70-5 package. 4: Do not short the output above V + 10V. Limit the output current to Absolute Maximum Rating of 30mA. SS The minimum V test limit was V before Dec. 2004 (week code 52). PU DD DS21714G-page 2 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, V = +1.6V to +5.5V, V = GND, T = 25°C, V + = V /2, DD SS A IN DD V – = V , R =2.74kΩ to V = V (Refer to Figure1-3). IN SS PU PU DD Parameters Sym Min Typ Max Units Conditions Common Mode Input Impedance Z — 1013||4 — Ω||pF CM Differential Input Impedance Z — 1013||2 — Ω||pF DIFF Open-Drain Output Output Pull-Up Voltage V 1.6 — 10 V (Note4) PU High-Level Output Current I -100 — — nA V = 1.6V to 5.5V, V = 10V OH DD PU (Note4) Low-Level Output Voltage V V — V + 0.2 V I = 2mA, V = V = 5V OL SS SS OUT PU DD Short-Circuit Current I — ±1.5 — mA V = V = 1.6V (Note4) SC PU DD I – 30 — mA V = V = 5.5V (Note4) SC PU DD Output Pin Capacitance C — 8 — pF OUT Note 1: The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. 2: V at differential temperatures is estimated using: HYST V (T ) = V + (T -25°C) TC + (T - 25°C)2TC . HYST A HYST A 1 A 2 3: Input bias current at temperature is not tested for the SC-70-5 package. 4: Do not short the output above V + 10V. Limit the output current to Absolute Maximum Rating of 30mA. SS The minimum V test limit was V before Dec. 2004 (week code 52). PU DD AC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, V = +1.6V to +5.5V, V = GND, T = 25°C, V + = V /2, DD SS A IN DD Step = 200mV, Overdrive = 100mV, R =2.74kΩ to V = V , and C = 36pF PU PU DD L (Refer to Figure1-2 and Figure1-3). Parameters Sym Min Typ Max Units Conditions Fall Time t — 0.7 — µs (Note1) F Propagation Delay (High-to-Low) t — 4.0 8.0 µs PHL Propagation Delay (Low-to-High) t — 3.0 8.0 µs (Note1) PLH Propagation Delay Skew t — -1.0 — µs (Notes1 and2) PDS Maximum Toggle Frequency f — 225 — kHz V = 1.6V MAX DD f — 165 — kHz V = 5.5V MAX DD Input Noise Voltage E — 200 — µV 10Hz to 100kHz ni P-P Note 1: t and t depend on the load (R and C ); these specifications are valid for the indicated load only. R PLH L L 2: Propagation Delay Skew is defined as: t = t - t . PDS PLH PHL © 2002-2012 Microchip Technology Inc. DS21714G-page 3

MCP6546/6R/6U/7/8/9 MCP6548 CHIP SELECT (CS) CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, V = +1.6V to +5.5V, V = GND, T = 25°C, V + = V /2, DD SS A IN DD V – = V , R =2.74kΩ to V = V , and C = 36pF (Refer to Figures1-1 and1-3). IN SS PU PU DD L Parameters Sym Min Typ Max Units Conditions CS Low Specifications CS Logic Threshold, Low VIL VSS — 0.2 V V DD CS Input Current, Low ICSL — 5 — pA CS = VSS CS High Specifications CS Logic Threshold, High VIH 0.8 VDD — VDD V CS Input Current, High ICSH — 1 — pA CS = VDD CS Input High, VDD Current IDD — 18 — pA CS = VDD CS Input High, GND Current ISS — -20 — pA CS = VDD Comparator Output Leakage IO(LEAK) — 1 — pA VOUT = VSS+10V, CS = VDD CS Dynamic Specifications CS Low to Comparator Output tON — 2 50 ms CS = 0.2VDD to VOUT = VDD/2, Low Turn-on Time V – = V IN DD CS High to Comparator Output tOFF — 10 — µs CS = 0.8VDD to VOUT = VDD/2, High Z Turn-off Time V – = V IN DD CS Hysteresis VCS_HYST — 0.6 — V VDD = 5V CS VIL VIH V – IN 100mV t tON OFF VIN+ = VDD/2 100mV tPHL VOUT High-Z High-Z t PLH V OH ISS -20 pA (typ.) -0.6 µA (typ.) -20 pA (typ.) VOUT V V OL OL ICS 1 pA (typ.) 5 pA (typ.) 1 pA (typ.) FIGURE 1-2: Propagation Delay Timing Diagram. FIGURE 1-1: Timing Diagram for the CS pin on the MCP6548. DS21714G-page 4 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, V = +1.6V to +5.5V and V = GND. DD SS Parameters Sym Min Typ Max Units Conditions Temperature Ranges Specified Temperature Range T -40 — +85 °C A Operating Temperature Range T -40 — +125 °C Note A Storage Temperature Range T -65 — +150 °C A Thermal Package Resistances Thermal Resistance, 5L-SC-70 θ — 331 — °C/W JA Thermal Resistance, 5L-SOT-23 θ — 220.7 — °C/W JA Thermal Resistance, 8L-MSOP θ — 211 — °C/W JA Thermal Resistance, 8L-PDIP θ — 89.3 — °C/W JA Thermal Resistance, 8L-SOIC θ — 149.5 — °C/W JA Thermal Resistance, 14L-PDIP θ — 70 — °C/W JA Thermal Resistance, 14L-SOIC θ — 95.3 — °C/W JA Thermal Resistance, 14L-TSSOP θ — 100 — °C/W JA Note: The MCP6546/6R/6U/7/8/9 I-temp family operates over this extended temperature range, but with reduced performance. In any case, the Junction Temperature (T ) must not exceed the absolute maximum J specification of +150°C. 1.1 Test Circuit Configuration This test circuit configuration is used to determine the AC and DC specifications. V DD V = V PU DD 200kΩ R = MCP654X PU (2 mA)/ V DD 200kΩ VOUT 100kΩ 36pF V = 0V V = V SS IN SS FIGURE 1-3: AC and DC Test Circuit for the Open-Drain Output Comparators. © 2002-2012 Microchip Technology Inc. DS21714G-page 5

MCP6546/6R/6U/7/8/9 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, V = +1.6V to +5.5V, V = GND, T = +25°C, V + = V /2, V – = GND, DD SS A IN DD IN R = 2.74kΩ to V =V , and C = 36pF. PU PU DD L 14% 18% urrences 1102%% 1V2C0M0 = S VaSmSples urrences 111246%%% 1V2C0M0 = S VaSmSples Occ 8% Occ 10% of 6% of 8% ge ge 6% a 4% a nt nt 4% erce 2% erce 2% P 0% P 0% -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0 Input Offset Voltage (mV) Input Hysteresis Voltage (mV) FIGURE 2-1: Input Offset Voltage at FIGURE 2-4: Input Hysteresis Voltage at V =V . V =V . CM SS CM SS 16% s 25% ccurrences111024%%% 1VT2AC 0M=0 =- 4S V0aS°mSCp tloe s+125°C Occurrence 1250%% TA = -405°C96 t VoSC a+Mm1 =2p 5Vl°eSCsS of O 8% e of 10% VDD = 5.5V VDD = 1.6V age 6% ntag 5% ercent 24%% Perce 0% P 0% 4.6 5.0 5.4 5.8 6.2 6.6 7.0 7.4 7.8 8.2 8.6 9.0 9.4 14 12 10 -8 -6 -4 -2 0 2 4 6 8 10 12 14 Input Hysteresis Voltage – - - - Input Offset Voltage Drift (µV/°C) Linear Temp. Co.; TC1 (µV/°C) FIGURE 2-2: Input Offset Voltage Drift at FIGURE 2-5: Input Hysteresis Voltage V =V . Linear Temp. Co. (TC ) at V =V . CM SS 1 CM SS utput 567 VDD = 5.5V VOUT currences1111224680%%%%% 5VT9AC 6M= S=-4 aV0mS°SpCl etos +125°C Inverting Input, OVoltage (V) 01234 VIN– Percentage of Oc1002468%%%%%% 060VDD056 = 1.6052V 048 044 040 036 032 028 V024DD =020 5.5V016 -1 -0. -0. -0. -0. -0. -0. -0. -0. -0. -0. -0. -0. 0 1 2 3 4 5 6 7 8 9 10 Input Hysteresis Voltage – Time (1 ms/div) Quadratic Temp. Co.; TC2 (µV/°C2) FIGURE 2-3: The MCP6546/6R/6U/7/8/9 FIGURE 2-6: Input Hysteresis Voltage Comparators Show No Phase Reversal. Quadratic Temp. Co. (TC ) at V =V . 2 CM SS DS21714G-page 6 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 Note: Unless otherwise indicated, V =+1.6V to +5.5V, V =GND, T =+25°C, V +=V /2, V –=GND, DD SS A IN DD IN R =2.74kΩ to V =V , and C =36pF. PU PU DD L V) 01..80 VCM = VSS mV) 66..05 VCM = VSS Offset Voltage (m --000000......420246 VVDDDD == 15..65VV steresis Voltage ( 334455......050505 VDD = 1.6V nput --00..86 ut Hy 22..05 VDD = 5.5V I p -1.0 n 1.5 I -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Ambient Temperature (°C) Ambient Temperature (°C) FIGURE 2-7: Input Offset Voltage vs. FIGURE 2-10: Input Hysteresis Voltage vs. Ambient Temperature at V =V . Ambient Temperature at V =V . CM SS CM SS 2.0 V) 6.5 Offset Voltage (mV) --001110......050505 VDDT =A 1=. 6+V125°C TTTTAAA ==== +++-41820552°°°5CCC°C steresis Voltage (m 3344556.......0505050 VDD = 1.6V TTAA == ++8152°5C°C Input --21..05 A nput Hy 122...505 TA = +125°C TTAA == +-4205°°CC 4 2 0 2 4 6 8 0 2 4 6 8 0 I 4 2 0 2 4 6 8 0 2 4 6 8 0 0. 0. 0. 0. 0. 0. 0. 1. 1. 1. 1. 1. 2. 0. 0. 0. 0. 0. 0. 0. 1. 1. 1. 1. 1. 2. - - - - Common Mode Input Voltage (V) Common Mode Input Voltage (V) FIGURE 2-8: Input Offset Voltage vs. FIGURE 2-11: Input Hysteresis Voltage vs. Common Mode Input Voltage at V =1.6V. Common Mode Input Voltage at V =1.6V. DD DD 2.0 V) 6.5 Offset Voltage (mV) --001110......050505 VDD = 5.5V TTTAAA === + +-824550°°°CCC steresis Voltage (m 3344556.......0505050 VDD = 5.5V TTTTAAAA ==== +++-41820552°°°5CCC°C nput -1.5 TA = +125°C ut Hy 22..05 I -2.0 np 1.5 5 0 5 0 5 0 5 0 5 0 5 0 5 0 I 5 0 5 0 5 0 5 0 5 0 5 0 5 0 0. 0. 0. 1. 1. 2. 2. 3. 3. 4. 4. 5. 5. 6. 0. 0. 0. 1. 1. 2. 2. 3. 3. 4. 4. 5. 5. 6. - - Common Mode Input Voltage (V) Common Mode Input Voltage (V) FIGURE 2-9: Input Offset Voltage vs. FIGURE 2-12: Input Hysteresis Voltage vs. Common Mode Input Voltage at V = 5.5V. Common Mode Input Voltage at V =5.5V. DD DD © 2002-2012 Microchip Technology Inc. DS21714G-page 7

MCP6546/6R/6U/7/8/9 Note: Unless otherwise indicated, V =+1.6V to +5.5V, V =GND, T =+25°C, V +=V /2, V –=GND, DD SS A IN DD IN R =2.74kΩ to V =V , and C =36pF. PU PU DD L 90 1001000n 85 Input Referred nts IB, TA = +125°C VDD = 5.5V R, PSRR (dB) 778050 PSRR, VIN+ = VSS, VDD = 1.6V to 5.5V s, Offset Curre(A)111001010001000ppn IB, TA = +85°C MR 65 Bia IOS, TA = +125°C C 60 CMRR, VIN+ = -0.3 to 5.3V, VDD = 5.0V put 11p IOS, TA = +85°C n 55 I 100.01f -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Ambient Temperature (°C) Common Mode Input Voltage (V) FIGURE 2-13: CMRR,PSRR vs. Ambient FIGURE 2-16: Input Bias Current, Input Temperature. Offset Current vs. Common Mode Input Voltage. 1000 0.7 s V = 5.5V put Bias, Offset Current(pA) 110001 VDCDM = VDD IB | IOS | Quiescent Currentper Comparator (µA) 000000......123456 TTTATAA=A == =+ ++1-28245550°°°°CCCC n I 0.1 0.0 55 65 75 85 95 105 115 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Ambient Temperature (°C) Power Supply Voltage (V) FIGURE 2-14: Input Bias Current, Input FIGURE 2-17: Quiescent Current vs. Offset Current vs. Ambient Temperature. Power Supply Voltage. 0.8 0.8 0.7 IQ does not include pull-up resistor current 0.7 IQ does not include pull-up resistor current urrentor (µA) 00..56 VDD = 1.6V urrentor (µA) 00..56 VDD = 5.5V Cat Cat Quiescent er Compar 000...234 Sweep VIN+, VIN– = VDD/2 Quiescent er Compar 000...234 Sweep VIN+, VIN– = VDD/2 p 0.1 p 0.1 Sweep V –, V + = V /2 Sweep V –, V + = V /2 IN IN DD IN IN DD 0.0 0.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) Common Mode Input Voltage (V) FIGURE 2-15: Quiescent Current vs. FIGURE 2-18: Quiescent Current vs. Common Mode Input Voltage at V =1.6V. Common Mode Input Voltage at V =5.5V. DD DD DS21714G-page 8 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 Note: Unless otherwise indicated, V =+1.6V to +5.5V, V =GND, T =+25°C, V +=V /2, V –=GND, DD SS A IN DD IN R =2.74kΩ to V =V , and C =36pF. PU PU DD L 10 10 y Currentparator (µA) 1 IDD spike near VPU = 1.3V VVVVVDDDDDDDDDD ===== 22345.....16666VVVVV ply Currentmparator (µA) 1 VVVVDDDDDDDD ==== 5432....6666VVVV VPU = 1.6V to 10.5V plm po po uC Suer C Sper VVDD == 12..61VV p V = 1.6V DD DD 0.1 0.1 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 10 11 Pull-up to Supply Voltage Difference, Pull-Up Voltage, V (V) V – V (V) PU PU DD FIGURE 2-19: Supply Current vs. Pull-Up FIGURE 2-22: Supply Current vs. Pull-Up Voltage. to Supply Voltage Difference. 10 35 Supply Currentper Comparator (µA) 1 1VIpD0uCD0Ml ld -m=uo peVVs DrO Den/vso2eitsr tidnorcri vlcueudrerent VVDDDD == 51..56VV utput Short Circuit CurrentMagnitude (mA) 11223050505 TTTAT AA=A == =+ ++1-42280555°°°°CCCC O 0.1 0 0.1 1 10 100 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Toggle Frequency (kHz) Power Supply Voltage (V) FIGURE 2-20: Supply Current vs. Toggle FIGURE 2-23: Output Short Circuit Current Frequency. Magnitude vs. Power Supply Voltage. eadroom (V) 0000....5678 VDD = 1.6V VTTTAAO L===– V + ++1SS822:555°°°CCC eadroom (V) 00001.....67890 VDD = 5.5V oltage H 00..34 TAA = -40°C oltage H 000...345 TTAAV ==O L++ –81 52V°5SC°SC: ut V 0.2 ut V 0.2 TA = +25°C utp 0.1 utp 0.1 TA = -40°C O 0.0 O 0.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 5 10 15 20 25 Output Current (mA) Output Current (mA) FIGURE 2-21: Output Voltage Headroom FIGURE 2-24: Output Voltage Headroom vs. Output Current at V =1.6V. vs. Output Current at V =5.5V. DD DD © 2002-2012 Microchip Technology Inc. DS21714G-page 9

MCP6546/6R/6U/7/8/9 Note: Unless otherwise indicated, V =+1.6V to +5.5V, V =GND, T =+25°C, V +=V /2, V –=GND, DD SS A IN DD IN R =2.74kΩ to V =V , and C =36pF. PU PU DD L 50% 65% es 45% 408 Samples es 60% 408 Samples c 100 mV Overdrive c 55% 100 mV Overdrive n 40% n urre 35% VCM = VDD/2 urre 4550%% VCM = VDD/2 of Occ 2350%% of Occ 334050%%% VDD = 1.6V VDD = 5.5V e 20% e 25% centag 1105%% VDD = 1.6V VDD = 5.5V centag 112050%%% er 5% er 5% P 0% P 0% 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 High-to-Low Propagation Delay (µs) Low-to-High Propagation Delay (µs) FIGURE 2-25: High-to-Low Propagation FIGURE 2-28: Low-to-High Propagation Delay. Delay. 50% 8 ccurrences 33440505%%%% VDD = 5.5V 100 m4V0V8 OC MSv ae=mr VdpDrliDev/2se elay (µs) 567 1V0C0M m= VV DOD/v2erdrtiPvHeL VDD = 5.5V O D age of 122505%%% VDD = 1.6V gation 34 ercent 105%% Propa 12 tPLH VDD = 1.6V P 0% 0 0 6 2 8 4 0 4 8 2 6 0 2. 1. 1. 0. 0. 0. 0. 0. 1. 1. 2. -50 -25 0 25 50 75 100 125 - - - - - Propagation Delay Skew (µs) Ambient Temperature (°C) FIGURE 2-26: Propagation Delay Skew. FIGURE 2-29: Propagation Delay vs. Ambient Temperature. 14 100 13 VCM = VDD/2 VCM = VDD/2 s) 12 tPHL s) µ 11 µ y ( 10 y ( Dela 89 Dela n 7 n 10 V = 5.5V atio 56 10 mV Overdrive atio DD tPHL ag 4 ag op 3 op Pr 12 100 mV Overdrive tPLH Pr VDD = 1.6V tPLH 0 1 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 1 10 100 1000 Power Supply Voltage (V) Input Overdrive (mV) FIGURE 2-27: Propagation Delay vs. FIGURE 2-30: Propagation Delay vs. Input Power Supply Voltage. Overdrive. DS21714G-page 10 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 Note: Unless otherwise indicated, V =+1.6V to +5.5V, V =GND, T =+25°C, V +=V /2, V –=GND, DD SS A IN DD IN R =2.74kΩ to V =V , and C =36pF. PU PU DD L 8 8 V = 1.6V V = 5.5V DD DD s) 7 100 mV Overdrive s) 7 100 mV Overdrive µ µ y ( 6 y ( 6 a a el 5 el 5 t D D PHL n 4 t n 4 o PHL o ati 3 ati 3 tPLH g g pa 2 pa 2 o t o Pr 1 PLH Pr 1 0 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) Common Mode Input Voltage (V) FIGURE 2-31: Propagation Delay vs. FIGURE 2-34: Propagation Delay vs. Common Mode Input Voltage at V =1.6V. Common Mode Input Voltage at V =5.5V. DD DD 8 200 y (µs) 67 VVVCIINNM+– === V1VD0CD0M/ 2mV OverdrivVeDD = 5.5V tPLH y (µs) 111468000 1V0C0M m= VV DOD/v2erdrive tPLH a a el 5 el 120 D D n 4 n 100 o o Propagati 123 VDD = 1.6V tPHL Propagati 24680000 VDD = 5.5V VDD = 1.6V tPHL 0 0 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 Pull-up Resistor, RPU (k(cid:2)) Load Capacitance (nF) FIGURE 2-32: Propagation Delay vs. FIGURE 2-35: Propagation Delay vs. Load Pull-up Resistor. Capacitance. 8 1.E+100n4 µs) 7 VVCINM– == V1D0D0/ 2mV Overdrive nt (A)1.E+013n TA = +125°C elay ( 56 VIN+ = VCM V = 5.5V tPHL Curre1.E1+000p2 TA = +85°C n D 4 DD ge CS = VDD o a V + = V /2 opagati 23 ut Leak11..EE++10001p01p VIINN– = VSDSD Pr 1 VDD = 1.6V tPLH utp TA = +25°C 0 O1.E1-0001f 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3 4 5 6 7 8 9 10 11 Pull-up Voltage (V) Output Voltage (V) FIGURE 2-33: Propagation Delay vs. FIGURE 2-36: Output Leakage Current Pull-up Voltage. (CS=V ) vs. Output Voltage (MCP6548 only). DD © 2002-2012 Microchip Technology Inc. DS21714G-page 11

MCP6546/6R/6U/7/8/9 Note: Unless otherwise indicated, V =+1.6V to +5.5V, V =GND, T =+25°C, V +=V /2, V –=GND, DD SS A IN DD IN R =2.74kΩ to V =V , and C =36pF. PU PU DD L 1.E-10m3 1.E-10m3 Comparator Comparator Comparator Comparator Supply Currentper Comparator (A)111111......11EEEEEE0101------000000100001987654nnnµµµ TurnHs iOghn-to-LoCwS CSCL oSHwSyhs-tutoet-rsHe Oisgifshf Supply Currentper Comparator (A)111111......1EEEEEE10101------000000001001987654nnnµµµ TLuorwn-sCto SO-Hnigh HystCeSresHiisgh-to-LoCSwShuts Off 1.1E0-100p 1.1E0-100p V = 1.6V V = 5.5V DD DD 1.E1-101p 1.E1-101p 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Chip Select (CS) Voltage (V) Chip Select (CS) Voltage (V) FIGURE 2-37: Supply Current (Shoot- FIGURE 2-40: Supply Current (Shoot- through Current) vs. Chip Select (CS) Voltage at through Current) vs. Chip Select (CS) Voltage at V =1.6V (MCP6548 only). V =5.5V (MCP6548 only). DD DD Current (µA) 1122305050 VDD = 1C.6hVarging output VOCSIDUtSDTart-up ---01431..06...926Output Voltage, Chip Select Voltage (V), y Currentparator (µA) 1111120246806800000000 VVDODU =T 5C.5SV ChcaaSrptgaairnctgi-tu aopnu cItDepDut -----0369631152Output Voltage, Chip Select Voltage (V) y 5 capacitance -6.5 plm 40 -18 Suppl 0 -8.1 Supper Co 200 --2241 0 1 2 3 4 5 6 7 8 9 1011121314 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Time (1 ms/div) Time (0.5 ms/div) FIGURE 2-38: Supply Current (Charging FIGURE 2-41: Supply Current (Charging Current) vs. Chip Select (CS) pulse at Current) vs. Chip Select (CS) pulse at V =1.6V (MCP6548 only). V =5.5V (MCP6548 only). DD DD 6.0 1.E1-00m2 Chip Select, Output Voltage (V)-0011223344550.............5050505050505 VDD =V 5OC.U5STV Input Current Magnitude (A)1111111111..........EEEEEEEEEE111001101----------11110000000001100001m2109876543pnnpnpµµµ +++1-28245550°°°°CCCC 0 1 2 3 4 5 6 7 8 9 10 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Time (ms) Input Voltage (V) FIGURE 2-39: Chip Select (CS) Step FIGURE 2-42: Input Bias Current vs. Input Response (MCP6548 only). Voltage. DS21714G-page 12 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table3-1. TABLE 3-1: PIN FUNCTION TABLE MCP6546 MCP6546 MCP6546R MCP6546U MCP6547 MCP6548 MCP6549 Symbol Description PDIP, PDIP, PDIP, PDIP, SC-70, SC-70, SOIC, SOT-23-5 SOIC, SOIC, SOIC, SOT-23 SOT-23-5 MSOP MSOP MSOP TSSOP 6 1 1 4 1 6 1 OUT, Digital Output (comparator A) OUTA 2 4 4 3 2 2 2 V –, Inverting Input IN V – (comparator A) INA 3 3 3 1 3 3 3 V +, Non-inverting Input IN V + (comparator A) INA 7 5 2 5 8 7 4 V Positive Power Supply DD — — — — 5 — 5 V + Non-inverting Input INB (comparator B) — — — — 6 — 6 V – Inverting Input (comparator B) INB — — — — 7 — 7 OUTB Digital Output (comparator B) — — — — — — 8 OUTC Digital Output (comparator C) — — — — — — 9 V – Inverting Input (comparator C) INC — — — — — — 10 V + Non-inverting Input INC (comparator C) 4 2 5 2 4 4 11 V Negative Power Supply SS — — — — — — 12 V + Non-inverting Input IND (comparator D) — — — — — — 13 V – Inverting Input (comparator D) IND — — — — — — 14 OUTD Digital Output (comparator D) — — — — — 8 — CS Chip Select 1, 5, 8 — — — — 1, 5 — NC No Internal Connection 3.1 Analog Inputs 3.4 Power Supply (V and V ) SS DD The comparator non-inverting and inverting inputs are The positive power supply pin (V ) is 1.6V to 5.5V DD high-impedance CMOS inputs with low bias currents. higher than the negative power supply pin (V ). For SS normal operation, the other pins are at voltages 3.2 CS Digital Input between VSS and VDD, except the output pins which can be as high as 10V above V . SS This is a CMOS, Schmitt-triggered input that places the Typically, these parts are used in a single (positive) part into a low power mode of operation. supply configuration. In this case, V is connected to SS ground and V is connected to the supply. V will 3.3 Digital Outputs DD DD need a local bypass capacitor (typically 0.01µF to The comparator outputs are CMOS, open-drain digital 0.1µF) within 2mm of the VDD pin. These can share a outputs. They are designed to make level shifting and bulk capacitor with nearby analog parts (within wired-OR easy to implement. 100mm), but it is not required. © 2002-2012 Microchip Technology Inc. DS21714G-page 13

MCP6546/6R/6U/7/8/9 NOTES: DS21714G-page 14 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 4.0 APPLICATIONS INFORMATION V The MCP6546/6R/6U/7/8/9 family of push-pull output DD comparators are fabricated on Microchip’s state-of-the- art CMOS process. They are suitable for a wide range D 1 of applications requiring very low power consumption. V + 1 4.1 Comparator Inputs R1 MCP6G0X VOUT – D 4.1.1 PHASE REVERSAL 2 V The MCP6546/6R/6U/7/8/9 comparator family uses 2 R R CMOS transistors at the input. They are designed to 2 3 prevent phase inversion when the input pins exceed V –(minimum expected V ) SS 1 the supply voltages. Figure2-3 shows an input voltage R ≥ 1 2mA exceeding both supplies with no resulting phase inversion. V –(minimum expected V ) SS 2 R ≥ 2 2mA 4.1.2 INPUT VOLTAGE AND CURRENT LIMITS FIGURE 4-2: Protecting the Analog Inputs. The ESD protection on the inputs can be depicted as shown in Figure4-1. This structure was chosen to pro- It is also possible to connect the diodes to the left of tect the input transistors, and to minimize input bias resistors R and R . In this case, the currents through 1 2 current (IB). The input ESD diodes clamp the inputs diodes D and D need to be limited by some other 1 2 when they try to go more than one diode drop below mechanism. The resistor then serves as in-rush current VSS. They also clamp any voltages that go too far limiter; the DC current into the input pins (VIN+ and above VDD; their breakdown voltage is high enough to VIN–) should be very small. allow normal operation, and low enough to bypass ESD A significant amount of current can flow out of the events within the specified limits. inputs when the common mode voltage (V ) is below CM ground (V ); see Figure2-42. Applications that are SS high impedance may need to limit the usable voltage Bond VDD range. Pad 4.1.3 NORMAL OPERATION The input stage of this family of devices uses two V + Bond Input Bond V – differential input stages in parallel, one operates at low IN Pad Stage Pad IN input voltages, and the other at high input voltages. With this topology, the input voltage is 0.3V above V DD and 0.3V below V . The input offset voltage is SS V Bond measured at both VSS - 0.3V and VDD + 0.3V to ensure SS Pad proper operation. The MCP6546/6R/6U/7/8/9 family has internally-set FIGURE 4-1: Simplified Analog Input ESD hysteresis that is small enough to maintain input offset Structures. accuracy (<7mV), and large enough to eliminate output chattering caused by the comparator’s own In order to prevent damage and/or improper operation input noise voltage (200µV ). Figure4-3 illustrates of these amplifiers, the circuits they are in must limit the P-P this capability. currents (and voltages) at the V + and V – pins (see IN IN Absolute Maximum Ratings † at the beginning of Section1.0 “Electrical Characteristics”). Figure4-3 shows the recommended approach to protecting these inputs. The internal ESD diodes prevent the input pins (V + and V –) from going too far below ground, and IN IN the resistors R and R limit the possible current drawn 1 2 out of the input pin. Diodes D and D prevent the input 1 2 pin (V + and V –) from going too far above V . IN IN DD When implemented as shown, resistors R and R also 1 2 limit the current through D and D . 1 2 © 2002-2012 Microchip Technology Inc. DS21714G-page 15

MCP6546/6R/6U/7/8/9 4.4.1 INVERTING CIRCUIT 8 25 Figure4-4 shows an inverting circuit for a single-supply V = 5.0V 7 DD 20 application using three resistors, besides the pull-up V) 56 VIN– 1105V/div) resistor. The resulting hysteresis diagram is shown in ge ( 4 VOUT 50 m Figure4-5. olta 3 0e (1 V 2 -5g Output 01 Hysteresis --11ut Volta50 VDD I VPU -1 -2np0 VIN PU RPU -2 -2I5 -3 -30 V MCP654X VOUT Time (100 ms/div) DD I OL R I FIGURE 4-3: The MCP6546/6R/6U/7/8/9 2 RF Comparators’ Internal Hysteresis Eliminates Output Chatter Caused By Input Noise Voltage. R R F 3 4.2 Open-Drain Output The open-drain output is designed to make level- shifting and wired-OR logic easy to implement. The FIGURE 4-4: Inverting Circuit with output can go as high as 10V for 9V battery-powered Hysteresis. applications. The output stage minimizes switching cur- rent (shoot-through current from supply-to-supply) when the output changes state. See Figures2-15,2-18 V OUT and 2-37 through2-41, for more information. V PU V 4.3 MCP6548 Chip Select (CS) OH Low-to-High High-to-Low The MCP6548 is a single comparator with a Chip Select (CS) pin. When CS is pulled high, the total current consumption drops to 20pA (typical). 1pA VOL VIN V (typical) flows through the CS pin, 1pA (typical) flows SS V V V V through the output pin and 18pA (typical) flows through SS TLH THL DD the V pin, as shown in Figure1-1. When this DD V = trip voltage from low to high happens, the comparator output is put into a high- TLH impedance state. By pulling CS low, the comparator is VTHL = trip voltage from high to low enabled. If the CS pin is left floating, the comparator will FIGURE 4-5: Hysteresis Diagram for the not operate properly. Figure1-1 shows the output Inverting Circuit. voltage and supply current response to a CS pulse. The internal CS circuitry is designed to minimize In order to determine the trip voltages (VTHL and VTLH) glitches when cycling the CS pin. This helps conserve for the circuit shown in Figure4-4, R2 and R3 can be power, which is especially important in battery-powered simplified to the Thevenin equivalent circuit with applications. respect to VDD, as shown in Figure4-6. 4.4 Externally Set Hysteresis V PU Greater flexibility in selecting hysteresis, or input trip R points, is achieved by using external resistors. - PU Input offset voltage (VOS) is the center (average) of the MCP654X VOUT (input-referred) low-high and high-low trip points. Input + hysteresis voltage (V ) is the difference between HYST the same trip points. Hysteresis reduces output chattering when one input is slowly moving past the V 23 other, thus reducing dynamic supply current. It also R R 23 F helps in systems where it is best not to cycle between FIGURE 4-6: Thevenin Equivalent Circuit. states too frequently (e.g., air conditioner thermostatic control). DS21714G-page 16 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 EQUATION 4-1: 4.6 Capacitive Loads R R Reasonable capacitive loads (e.g., logic gates) have R = --------2------3----- 23 R +R little impact on propagation delay (see Figure2-27). 2 3 The supply current increases with increasing toggle R frequency (Figure2-30), especially with higher 3 V23 = R--------+------R-----×VDD capacitive loads. 2 3 4.7 Battery Life Using this simplified circuit, the trip voltage can be In order to maximize battery life in portable calculated using the following equation: applications, use large resistors and small capacitive loads. Avoid toggling the output more than necessary. EQUATION 4-2: Do not use Chip Select (CS) too frequently, in order to ⎛ R ⎞ R +R conserve power. Capacitive loads will draw additional 23 ⎛ F PU ⎞ VTHL = VPU⎝⎜R----2---3----+-----R----F-----+------R----P---U--⎠⎟ +V23⎝R----2---3----+-----R----F----+------R----P---U--⎠ power at start-up. ⎛ R ⎞ R 4.8 PCB Surface Leakage V = V ⎜------------2--3---------⎟ +V ⎛------------F----------⎞ TLH OL⎝R23+RF⎠ 23⎝R23+RF⎠ In applications where low input bias current is critical, PCB (Printed Circuit Board) surface leakage effects VTLH = trip voltage from low to high need to be considered. Surface leakage is caused by V = trip voltage from high to low humidity, dust or other contamination on the board. THL Under low-humidity conditions, a typical resistance between nearby traces is 1012Ω. A 5V difference Figures2-21 and 2-24 can be used to determine typi- would cause 5pA of current to flow. This is greater cal values for V . This voltage is dependent on the OL than the MCP6546/6R/6U/7/8/9 family’s bias current at output current I as shown in Figure4-4. This current OL 25°C (1pA, typical). can be determined using the equation below: The easiest way to reduce surface leakage is to use a EQUATION 4-3: guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. IOL = IPU+IRF An example of this type of layout is shown in Figure4-7. V –V V –V I = ⎛----P----U-------------O----L-⎞ +⎛----2---3------------O----L-⎞ OL ⎝ R ⎠ ⎝R +R ⎠ PU 23 F V - V + IN IN V SS V can be calculated using the equation below: OH EQUATION 4-4: R +R V = (V –V )×⎛-------------2---3-------------F----------⎞ OH PU 23 ⎝R +R +R ⎠ 23 F PU As explained in Section4.1 “Comparator Inputs”, it Guard Ring is important to keep the non-inverting input below FIGURE 4-7: Example Guard Ring Layout V +0.3V when V > V . DD PU DD for Inverting Circuit. 4.5 Supply Bypass 1. For the Inverting Configuration (Figures4-4 and 4-7): With this family of comparators, the power supply pin (V for single supply) should have a local bypass a) Connect the guard ring to the non-inverting DD capacitor (i.e., 0.01µF to 0.1µF) within 2mm for good input pin (VIN+). This biases the guard ring edge-rate performance. to the same reference voltage as the comparator (e.g., V /2 or ground). DD b) Connect the inverting pin (V –) to the input IN pad, without touching the guard ring. © 2002-2012 Microchip Technology Inc. DS21714G-page 17

MCP6546/6R/6U/7/8/9 4.9 Unused Comparators 4.10 Typical Applications An unused amplifier in a quad package (MCP6549) 4.10.1 PRECISE COMPARATOR should be configured as shown in Figure4-8. This circuit prevents the output from toggling and causing Some applications require higher DC precision. An crosstalk. It uses the minimum number of components easy way to solve this problem is to use an amplifier and draws minimal current (see Figure2-15 and (such as the MCP6041) to gain-up the input signal Figure2-18). before it reaches the comparator. Figure4-9 shows an example of this approach. ¼ MCP6549 V DD V DD V REF MCP6041 V V DD PU – R V PU IN + R1 R2 MCP6546 VOUT V REF FIGURE 4-9: Precise Inverting Comparator. FIGURE 4-8: Unused Comparators. 4.10.2 WINDOWED COMPARATOR Figure4-10 shows one approach to designing a windowed comparator. The wired-OR connection produces a high output (logic 1) when the input voltage is between V and V (where V > V ). RB RT RT RB V PU 1/2 VRT MCP6547 RPU V OUT V IN VRB 1/2 MCP6547 FIGURE 4-10: Windowed Comparator. DS21714G-page 18 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 5-Lead SC-70 (MCP6546, MCP6546U) Example: (I-temp) Example: (I-temp) I-Temp E-Temp Device Code Code MCP6546 ACNN Note2 AC25 (Front) AC25 MCP6546U BBNN Note2 148 (Back) OR Note 1: I-Temp parts prior to March 2005 are marked “ACN” 2: SC-70-5 E-Temp parts not available at this release of the data sheet. 5-Lead SOT-23 (MCP6546, MCP6546R, MCP6546U) Example: (I-temp) I-Temp E-Temp Device Code Code MCP6546 ACNN GWNN AACC2255 MCP6546R AHNN GXNN MCP6546U — AWNN Note: Applies to 5-Lead SOT-23 8-Lead PDIP (300 mil) (MCP6546, MCP6547, MCP6548, MCP6549) Examples: MCP6546 MCP6546 I/P256 OR I/P^e^3256 1148 1148 8-Lead SOIC (150 mil) (MCP6546, MCP6547, MCP6548, MCP6549) MCP6547 MCP6547 I/SN1148 OR SN e^3^1148 256 256 Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e 3 Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2002-2012 Microchip Technology Inc. DS21714G-page 19

MCP6546/6R/6U/7/8/9 Package Marking Information (Continued) 8-Lead MSOP (MCP6546, MCP6547, MCP6548) Example: 6546I 148256 14-Lead PDIP (300 mil) (MCP6549) Example: MCP6549-I/P 1148256 MCP6549-E/Pe3 OR 1148256 MCP6549 OR I/P^e^3 1148256 Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e 3 Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. DS21714G-page 20 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 Package Marking Information (Continued) 14-Lead SOIC (150 mil) (MCP6549) Example: MCP6549ISL XXXXXXXXXX 1148256 MCP6549 OR E/SL^e^3 1148256 14-Lead TSSOP (MCP6549) Example: MCP6549I 1148 256 Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e 3 Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2002-2012 Microchip Technology Inc. DS21714G-page 21

MCP6546/6R/6U/7/8/9 (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:20)(cid:21)(cid:6)(cid:19)(cid:11)(cid:13)(cid:11)(cid:12)(cid:22)(cid:21)(cid:8)(cid:23)(cid:4)(cid:20)(cid:24)(cid:8)(cid:25)(cid:15)(cid:26)(cid:27)(cid:28)(cid:29) (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) D b 3 2 1 E1 E 4 5 e e A A2 c A1 L 3(cid:15)(cid:7)# (cid:6)(cid:19)44(cid:19)(cid:6)"(cid:13)"(cid:26)(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 ( 1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)9((cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2):(cid:14)(cid:7)(cid:17)(cid:11)# (cid:25) (cid:4)(cid:20);(cid:4) < (cid:30)(cid:20)(cid:30)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:3) (cid:4)(cid:20);(cid:4) < (cid:30)(cid:20)(cid:4)(cid:4) (cid:22)#(cid:28)(cid:15)!(cid:10)%% (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:4) < (cid:4)(cid:20)(cid:30)(cid:4) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)=(cid:7)!#(cid:11) " (cid:30)(cid:20);(cid:4) (cid:3)(cid:20)(cid:30)(cid:4) (cid:3)(cid:20)(cid:23)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)=(cid:7)!#(cid:11) "(cid:30) (cid:30)(cid:20)(cid:30)( (cid:30)(cid:20)(cid:3)( (cid:30)(cid:20)(cid:29)( 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:30)(cid:20);(cid:4) (cid:3)(cid:20)(cid:4)(cid:4) (cid:3)(cid:20)(cid:3)( .(cid:10)(cid:10)#(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) 4 (cid:4)(cid:20)(cid:30)(cid:4) (cid:4)(cid:20)(cid:3)(cid:4) (cid:4)(cid:20)(cid:23)9 4(cid:14)(cid:28)!(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:8) (cid:4)(cid:20)(cid:4); < (cid:4)(cid:20)(cid:3)9 4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8 (cid:4)(cid:20)(cid:30)( < (cid:4)(cid:20)(cid:23)(cid:4) (cid:30)(cid:22)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15) (cid:2)(cid:21)(cid:2)(cid:28)(cid:15)!(cid:2)"(cid:30)(cid:2)!(cid:10)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)$!(cid:14)(cid:2)(cid:31)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:20)(cid:2)(cid:6)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:2) (cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:14)&(cid:8)(cid:14)(cid:14)!(cid:2)(cid:4)(cid:20)(cid:30)(cid:3)(cid:5)(cid:2)(cid:31)(cid:31)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2) (cid:7)!(cid:14)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+ )(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)9(cid:30)) DS21714G-page 22 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) © 2002-2012 Microchip Technology Inc. DS21714G-page 23

MCP6546/6R/6U/7/8/9 (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:20)(cid:21)(cid:6)(cid:19)(cid:11)(cid:13)(cid:11)(cid:12)(cid:22)(cid:21)(cid:8)(cid:23)(cid:17)(cid:20)(cid:24)(cid:8)(cid:25)(cid:15)(cid:17)(cid:20)(cid:3) !(cid:29) (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) b N E E1 1 2 3 e e1 D A A2 c φ A1 L L1 3(cid:15)(cid:7)# (cid:6)(cid:19)44(cid:19)(cid:6)"(cid:13)"(cid:26)(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 ( 4(cid:14)(cid:28)!(cid:2)1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)(cid:24)((cid:2))(cid:22)* 6$# (cid:7)!(cid:14)(cid:2)4(cid:14)(cid:28)!(cid:2)1(cid:7)#(cid:8)(cid:11) (cid:14)(cid:30) (cid:30)(cid:20)(cid:24)(cid:4)(cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2):(cid:14)(cid:7)(cid:17)(cid:11)# (cid:25) (cid:4)(cid:20)(cid:24)(cid:4) < (cid:30)(cid:20)(cid:23)( (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:3) (cid:4)(cid:20);(cid:24) < (cid:30)(cid:20)(cid:29)(cid:4) (cid:22)#(cid:28)(cid:15)!(cid:10)%% (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:4) < (cid:4)(cid:20)(cid:30)( 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)=(cid:7)!#(cid:11) " (cid:3)(cid:20)(cid:3)(cid:4) < (cid:29)(cid:20)(cid:3)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)=(cid:7)!#(cid:11) "(cid:30) (cid:30)(cid:20)(cid:29)(cid:4) < (cid:30)(cid:20);(cid:4) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:3)(cid:20)(cid:5)(cid:4) < (cid:29)(cid:20)(cid:30)(cid:4) .(cid:10)(cid:10)#(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) 4 (cid:4)(cid:20)(cid:30)(cid:4) < (cid:4)(cid:20)9(cid:4) .(cid:10)(cid:10)#(cid:12)(cid:9)(cid:7)(cid:15)# 4(cid:30) (cid:4)(cid:20)(cid:29)( < (cid:4)(cid:20);(cid:4) .(cid:10)(cid:10)#(cid:2)(cid:25)(cid:15)(cid:17)(cid:16)(cid:14) (cid:3) (cid:4)> < (cid:29)(cid:4)> 4(cid:14)(cid:28)!(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:8) (cid:4)(cid:20)(cid:4); < (cid:4)(cid:20)(cid:3)9 4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8 (cid:4)(cid:20)(cid:3)(cid:4) < (cid:4)(cid:20)((cid:30) (cid:30)(cid:22)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15) (cid:2)(cid:21)(cid:2)(cid:28)(cid:15)!(cid:2)"(cid:30)(cid:2)!(cid:10)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)$!(cid:14)(cid:2)(cid:31)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:20)(cid:2)(cid:6)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:2) (cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:14)&(cid:8)(cid:14)(cid:14)!(cid:2)(cid:4)(cid:20)(cid:30)(cid:3)(cid:5)(cid:2)(cid:31)(cid:31)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2) (cid:7)!(cid:14)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+ )(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)(cid:24)(cid:30)) DS21714G-page 24 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2002-2012 Microchip Technology Inc. DS21714G-page 25

MCP6546/6R/6U/7/8/9 "(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)#(cid:18)(cid:6)(cid:10)(cid:8)$(cid:19)(cid:3)(cid:4)(cid:13)(cid:19)(cid:5)(cid:8)(cid:23)(cid:9)(cid:24)(cid:8)%(cid:8)!(cid:28)(cid:28)(cid:8)(cid:16)(cid:13)(cid:10)(cid:8)&(cid:22)(cid:7)’(cid:8)(cid:25)(cid:9)#$(cid:9)(cid:29) (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) N NOTE1 E1 1 2 3 D E A A2 L A1 c e eB b1 b 3(cid:15)(cid:7)# (cid:19)5*:"(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 ; 1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:20)(cid:30)(cid:4)(cid:4)(cid:2))(cid:22)* (cid:13)(cid:10)(cid:12)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)#(cid:7)(cid:15)(cid:17)(cid:2)1(cid:16)(cid:28)(cid:15)(cid:14) (cid:25) < < (cid:20)(cid:3)(cid:30)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:3) (cid:20)(cid:30)(cid:30)( (cid:20)(cid:30)(cid:29)(cid:4) (cid:20)(cid:30)(cid:24)( )(cid:28) (cid:14)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)#(cid:7)(cid:15)(cid:17)(cid:2)1(cid:16)(cid:28)(cid:15)(cid:14) (cid:25)(cid:30) (cid:20)(cid:4)(cid:30)( < < (cid:22)(cid:11)(cid:10)$(cid:16)!(cid:14)(cid:9)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:11)(cid:10)$(cid:16)!(cid:14)(cid:9)(cid:2)=(cid:7)!#(cid:11) " (cid:20)(cid:3)(cid:24)(cid:4) (cid:20)(cid:29)(cid:30)(cid:4) (cid:20)(cid:29)(cid:3)( (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)=(cid:7)!#(cid:11) "(cid:30) (cid:20)(cid:3)(cid:23)(cid:4) (cid:20)(cid:3)((cid:4) (cid:20)(cid:3);(cid:4) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:20)(cid:29)(cid:23); (cid:20)(cid:29)9( (cid:20)(cid:23)(cid:4)(cid:4) (cid:13)(cid:7)(cid:12)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)#(cid:7)(cid:15)(cid:17)(cid:2)1(cid:16)(cid:28)(cid:15)(cid:14) 4 (cid:20)(cid:30)(cid:30)( (cid:20)(cid:30)(cid:29)(cid:4) (cid:20)(cid:30)((cid:4) 4(cid:14)(cid:28)!(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:8) (cid:20)(cid:4)(cid:4); (cid:20)(cid:4)(cid:30)(cid:4) (cid:20)(cid:4)(cid:30)( 3(cid:12)(cid:12)(cid:14)(cid:9)(cid:2)4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8(cid:30) (cid:20)(cid:4)(cid:23)(cid:4) (cid:20)(cid:4)9(cid:4) (cid:20)(cid:4)(cid:5)(cid:4) 4(cid:10)-(cid:14)(cid:9)(cid:2)4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8 (cid:20)(cid:4)(cid:30)(cid:23) (cid:20)(cid:4)(cid:30); (cid:20)(cid:4)(cid:3)(cid:3) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)(cid:26)(cid:10)-(cid:2)(cid:22)(cid:12)(cid:28)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:2)? (cid:14)) < < (cid:20)(cid:23)(cid:29)(cid:4) (cid:30)(cid:22)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) 1(cid:7)(cid:15)(cid:2)(cid:30)(cid:2),(cid:7) $(cid:28)(cid:16)(cid:2)(cid:7)(cid:15)!(cid:14)&(cid:2)%(cid:14)(cid:28)#$(cid:9)(cid:14)(cid:2)(cid:31)(cid:28)(cid:18)(cid:2),(cid:28)(cid:9)(cid:18)0(cid:2)8$#(cid:2)(cid:31)$ #(cid:2)8(cid:14)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)-(cid:7)#(cid:11)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:11)(cid:28)#(cid:8)(cid:11)(cid:14)!(cid:2)(cid:28)(cid:9)(cid:14)(cid:28)(cid:20) (cid:3)(cid:20) ?(cid:2)(cid:22)(cid:7)(cid:17)(cid:15)(cid:7)%(cid:7)(cid:8)(cid:28)(cid:15)#(cid:2)*(cid:11)(cid:28)(cid:9)(cid:28)(cid:8)#(cid:14)(cid:9)(cid:7) #(cid:7)(cid:8)(cid:20) (cid:29)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15) (cid:2)(cid:21)(cid:2)(cid:28)(cid:15)!(cid:2)"(cid:30)(cid:2)!(cid:10)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)$!(cid:14)(cid:2)(cid:31)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:20)(cid:2)(cid:6)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:2) (cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:14)&(cid:8)(cid:14)(cid:14)!(cid:2)(cid:20)(cid:4)(cid:30)(cid:4)@(cid:2)(cid:12)(cid:14)(cid:9)(cid:2) (cid:7)!(cid:14)(cid:20) (cid:23)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+(cid:2))(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)(cid:30);) DS21714G-page 26 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2002-2012 Microchip Technology Inc. DS21714G-page 27

MCP6546/6R/6U/7/8/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21714G-page 28 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 "(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:23)(cid:15)(cid:30)(cid:24)(cid:8)%(cid:8)(cid:30)(cid:6)(cid:21)(cid:21)(cid:22)()(cid:8)!*+(cid:28)(cid:8)(cid:16)(cid:16)(cid:8)&(cid:22)(cid:7)’(cid:8)(cid:25)(cid:15)(cid:17)$(cid:26)(cid:29) (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) © 2002-2012 Microchip Technology Inc. DS21714G-page 29

MCP6546/6R/6U/7/8/9 Note: For the mostcurrent package drawings,please seetheMicrochip Packaging Specification located at http://www.microchip.com/packaging DS21714G-page 30 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 Note: For the mostcurrent package drawings,please seetheMicrochip Packaging Specification located at http://www.microchip.com/packaging © 2002-2012 Microchip Technology Inc. DS21714G-page 31

MCP6546/6R/6U/7/8/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21714G-page 32 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2002-2012 Microchip Technology Inc. DS21714G-page 33

MCP6546/6R/6U/7/8/9 (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) DS21714G-page 34 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2002-2012 Microchip Technology Inc. DS21714G-page 35

MCP6546/6R/6U/7/8/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21714G-page 36 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2002-2012 Microchip Technology Inc. DS21714G-page 37

MCP6546/6R/6U/7/8/9 NOTES: DS21714G-page 38 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 APPENDIX A: REVISION HISTORY Revision C (May 2003) • Undocumented changes. Revision G (February 2012) Revision B (December 2002) The following is the list of modifications: 1. Updated the Package Types drawing to correct • Undocumented changes. the device representation of the SC-70 package. 2. Updated package temperatures in the Revision A (February 2002) Temperature Characteristics table. • Original Release of this Document. 3. Corrected the marking information table for the 5-Lead SC-70 package (MCP6546 and MCP6546U) in Section5.1, Package Marking Information. 4. Updated the package outline drawings in Section5.1 “Package Marking Information”, to show all views for each package. 5. Minor editorial changes. Revision F (September 2007) The following is the list of modifications: 1. Corrected polarity of MCP6546U SOT-23-5 pin- out diagram on the first page. 2. Updated package outline drawings in Section5.1 “Package Marking Information” per Marcom. Revision E (September 2006) The following is the list of modifications: 1. Added MCP6546U pinout for the SOT-23-5 package. 2. Clarified Absolute Maximum Analog Input Voltage and Current Specifications. 3. Added application information on unused comparators. 4. Added disclaimer to package outline drawings. Revision D (May 2006) The following is the list of modifications: 1. Added E-temp parts. 2. Changed minimum pull-up voltage specification (V ) to 1.6V for parts starting Dec. 2004 (week PU code 52); previous parts are specified at a minimum of V . DD 3. Changed V temperature specifications to HYST linear and quadratic temperature coefficients. 4. Changed specifications and plots to include E- Temp parts. 5. Added Section3.0 “Pin Descriptions”. 6. Corrected package markings (Section5.1 “Package Marking Information”). 7. Added Appendix A: “Revision History”. © 2002-2012 Microchip Technology Inc. DS21714G-page 39

MCP6546/6R/6U/7/8/9 NOTES: DS21714G-page 40 © 2002-2012 Microchip Technology Inc.

MCP6546/6R/6U/7/8/9 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. –X /XX Examples: a) MCP6546T-I/LT: Tape and Reel, Device Temperature Package Industrial Temperature, Range 5LD SC-70. b) MCP6546T-I/OT: Tape and Reel, Industrial Temperature, 5LD SOT-23. Device: MCP6546: Single Comparator c) MCP6546-I/MS: Tape and Reel, MCP6546T: Single Comparator (Tape and Reel) Industrial Temperature, (SC-70, SOT-23, SOIC, MSOP) 8LD MSOP. MCP6546RT:Single Comparator (Rotated - Tape and Reel) (SOT-23 only) d) MCP6546-E/P: Extended Temperature, MCP6546UT:Single Comparator (Tape and Reel) 8LD PDIP. (SC-70, SOT-23)(SOT-23-5 is E-Temp only) e) MCP6546-E/SN: Extended Temperature, MCP6547: Dual Comparator 8LD SOIC. MCP6547T: Dual Comparator (Tape and Reel for SOIC and MSOP) MCP6548: Single Comparator with CS a) MCP6546RT-I/OT: Tape and Reel, MCP6548T: Single Comparator with CS Industrial Temperature, (Tape and Reel for SOIC and MSOP) 5LD SOT23. MCP6549: Quad Comparator MCP6549T: Quad Comparator (Tape and Reel for SOIC and TSSOP) a) MCP6546UT-E/LT: Tape and Reel, Industrial Temperature, 5LD SC-70 Temperature Range: I = -40°C to +85°C b) MCP6546UT-E/OT: Tape and Reel, E * = -40°C to +125°C Extended Temperature, * SC-70-5 E-Temp parts not available at this release of the 5LD SOT23. data sheet. Package: LT = Plastic Package (SC-70), 5-lead a) MCP6547-I/MS: Industrial Temperature, OT = Plastic Small Outline Transistor (SOT-23), 5-lead 8LD MSOP. MS = Plastic MSOP, 8-lead b) MCP6547T-I/MS: Tape and Reel, P = Plastic DIP (300 mil Body), 8-lead, 14-lead Industrial Temperature, SN = Plastic SOIC (150 mil Body), 8-lead 8LD MSOP. SL = Plastic SOIC (150 mil Body), 14-lead (MCP6549) c) MCP6547-I/P: Industrial Temperature, ST = Plastic TSSOP (4.4mm Body), 14-lead (MCP6549) 8LD PDIP. d) MCP6547-E/SN: Extended Temperature, 8LD SOIC. a) MCP6548-I/SN: Industrial Temperature, 8LD SOIC. b) MCP6548T-I/SN: Tape and Reel, Industrial Temperature, 8LD SOIC. c) MCP6548-I/P: Industrial Temperature, 8LD PDIP. d) MCP6548-E/SN: Extended Temperature, 8LD SOIC. a) MCP6549T-I/SL: Tape and Reel, Industrial Temperature, 14LD SOIC. b) MCP6549T-E/SL: Tape and Reel, Extended Temperature, 14LD SOIC. c) MCP6549-I/P: Industrial Temperature, 14LD PDIP. d) MCP6549-E/ST: Extended Temperature, 14LD TSSOP. © 2002-2012 Microchip Technology Inc. DS21714G-page 41

MCP6546/6R/6U/7/8/9 NOTES: DS21714G-page 42 © 2002-2012 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC, and may be superseded by updates. It is your responsibility to KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PIC32 logo, rfPIC and UNI/O are registered trademarks of MICROCHIP MAKES NO REPRESENTATIONS OR Microchip Technology Incorporated in the U.S.A. and other WARRANTIES OF ANY KIND WHETHER EXPRESS OR countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, INCLUDING BUT NOT LIMITED TO ITS CONDITION, MXDEV, MXLAB, SEEVAL and The Embedded Control QUALITY, PERFORMANCE, MERCHANTABILITY OR Solutions Company are registered trademarks of Microchip FITNESS FOR PURPOSE. Microchip disclaims all liability Technology Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, chipKIT, devices in life support and/or safety applications is entirely at chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, the buyer’s risk, and the buyer agrees to defend, indemnify and dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, hold harmless Microchip from any and all damages, claims, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, suits, or expenses resulting from such use. No licenses are Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, conveyed, implicitly or otherwise, under any Microchip MPLINK, mTouch, Omniscient Code Generation, PICC, intellectual property rights. PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002-2012, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-62076-019-2 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2002-2012 Microchip Technology Inc. DS21714G-page 43

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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: M icrochip: MCP6548-I/P MCP6549T-I/SL MCP6549T-I/ST MCP6548T-I/SN MCP6547-I/P MCP6548T-I/MS MCP6547-I/MS MCP6547-I/SN MCP6549-I/P MCP6546RT-I/OT MCP6549-I/ST MCP6549-I/SL MCP6546-I/P MCP6546-I/MS MCP6546-I/SN MCP6546T-I/LT MCP6546T-I/SN MCP6547T-I/SN MCP6546T-I/OT MCP6546T-I/MS MCP6547T- I/MS MCP6548-I/MS MCP6548-I/SN MCP6546-E/MS MCP6546-E/P MCP6546-E/SN MCP6546RT-E/OT MCP6546T-E/LT MCP6546T-E/MS MCP6546T-E/OT MCP6546T-E/SN MCP6546UT-E/OT MCP6546UT-I/LT MCP6547-E/MS MCP6547-E/P MCP6547-E/SN MCP6547T-E/MS MCP6547T-E/SN MCP6548-E/MS MCP6548-E/P MCP6548-E/SN MCP6548T-E/MS MCP6548T-E/SN MCP6549-E/P MCP6549-E/SL MCP6549-E/ST MCP6549T- E/SL MCP6549T-E/ST