MCP6541/1R/1U/2/3/4 Push-Pull Output Sub-Microamp Comparators Features: Description: • Low Quiescent Current: 600nA/Comparator (typ.) The Microchip Technology Inc. MCP6541/1R/1U/2/3/4 • Rail-to-Rail Input: V - 0.3V to V + 0.3V family of comparators is offered in single (MCP6541, SS DD MCP6541R, MCP6541U), single with Chip Select (CS) • CMOS/TTL-Compatible Output (MCP6543), dual (MCP6542) and quad (MCP6544) • Propagation Delay: 4µs configurations. The outputs are push-pull (CMOS/TTL- (typical, 100mV Overdrive) compatible) and are capable of driving heavy DC or • Wide Supply Voltage Range: 1.6V to 5.5V capacitive loads. • Available in Single, Dual and Quad These comparators are optimized for low-power, • Single Available in SOT-23-5, SC-70-5 * Packages single-supply operation with greater than rail-to-rail • Chip Select (CS) with MCP6543 input operation. The push-pull output of the • Low Switching Current MCP6541/1R/1U/2/3/4 family supports rail-to-rail out- • Internal Hysteresis: 3.3mV (typ.) put swing and interfaces with TTL/CMOS logic. The internal input hysteresis eliminates output switching • Temperature Ranges: due to internal input noise voltage, reducing current - Industrial: -40°C to +85°C draw. The output limits supply current surges and - Extended: -40°C to +125°C dynamic power consumption while switching. This product family operates with a single-supply voltage as Typical Applications: low as 1.6V and draws less than 1µA/comparator of quiescent current. • Laptop Computers • Mobile Phones The related MCP6546/7/8/9 family of comparators from Microchip has an open-drain output. Used with a pull- • Metering Systems up resistor, these devices can be used as level-shifters • Hand-held Electronics for any desired voltage up to 10V and in wired-OR • RC Timers logic. • Alarm and Monitoring Circuits * SC-70-5 E-Temp parts not available at this release of • Windowed Comparators the data sheet. • Multivibrators MCP6541U SOT-23-5 is E-Temp only. Related Devices: • Open-Drain Output: MCP6546/7/8/9 Package Types MCP6541 MCP6541R MCP6542 PDIP, SOIC, MSOP SOT-23-5 PDIP, SOIC, MSOP MCP6544 NC 1 8 NC OUT 1 5 VSS OUTA 1 8 VDD PDIP, SOIC, TSSOP VIN– 2 -- 7 VDD VDD 2 + - VINA– 2 - + 7 OUTB VINA+ 3 ++ 6 OUT VIN+ 3 4 VIN– VINA+ 3 + - 6 VINB– OUTA 1 14OUTD VSS 4 5 NC VSS 4 5 VINB+ VINA– 2 -+ +- 13VIND– V + 3 12V + INA IND MCP6541 MCP6541U MCP6543 VDD 4 11VSS SC-70-5, SOT-23-5 SC-70-5, SOT-23-5 PDIP, SOIC, MSOP VINB+ 5 10VINC+ OUT 1 5 VDD VIN+ 1 + 5 VDD NC 1 8 CS OVUINTBB– 67 - + +- 98 VOIUNCT-C VVINS+S 23 + - 4 VIN– VVINS–S23 - 4 OUT VVIINN+– 23 +- 76 VODUDT VSS 4 5 NC © 2002-2011 Microchip Technology Inc. DS21696H-page 1

MCP6541/1R/1U/2/3/4 NOTES: DS21696H-page 2 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 1.0 ELECTRICAL † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the CHARACTERISTICS device. This is a stress rating only and functional operation of the device at those or any other conditions above those Absolute Maximum Ratings † indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended VDD - VSS.........................................................................7.0V periods may affect device reliability. Current at Analog Input Pin (VIN+, VIN-.........................±2mA †† See Section4.1.2 “Input Voltage and Current Analog Input (V ) ††......................V - 1.0V to V + 1.0V Limits” IN SS DD All other Inputs and Outputs...........V - 0.3V to V + 0.3V SS DD Difference Input Voltage .......................................|V - V | DD SS Output Short-Circuit Current ................................Continuous Current at Input Pins ....................................................±2mA Current at Output and Supply Pins ............................±30mA Storage Temperature....................................-65°C to +150°C Maximum Junction Temperature (T )..........................+150°C J ESD Protection on all Pins (HBM;MM)..................4kV; 400V DC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, V = +1.6V to +5.5V, V = GND, T = +25°C,V + = V /2, DD SS A IN DD VIN– = VSS, and RL=100kΩ to VDD/2 (Refer to Figure1-3). Parameters Sym Min Typ Max Units Conditions Power Supply Supply Voltage V 1.6 — 5.5 V DD Quiescent Current per comparator I 0.3 0.6 1.0 µA I = 0 Q OUT Input Input Voltage Range V V −0.3 — V +0.3 V CMR SS DD Common Mode Rejection Ratio CMRR 55 70 — dB V = 5V, V = -0.3V to 5.3V DD CM Common Mode Rejection Ratio CMRR 50 65 — dB V = 5V, V = 2.5V to 5.3V DD CM Common Mode Rejection Ratio CMRR 55 70 — dB V = 5V, V = -0.3V to 2.5V DD CM Power Supply Rejection Ratio PSRR 63 80 — dB V = V CM SS Input Offset Voltage V -7.0 ±1.5 +7.0 mV V = V (Note1) OS CM SS Drift with Temperature ΔV /ΔT — ±3 — µV/°C T = -40°C to +125°C, V = V OS A A CM SS Input Hysteresis Voltage V 1.5 3.3 6.5 mV V = V (Note1) HYST CM SS Linear Temp. Co. (Note2) TC — 6.7 — µV/°C T = -40°C to +125°C, V = V 1 A CM SS Quadratic Temp. Co. (Note2) TC — -0.035 — µV/°C2 T = -40°C to +125°C, V = V 2 A CM SS Input Bias Current I — 1 — pA V =V B CM SS At Temperature (I-Temp parts) I — 25 100 pA T = +85°C, V = V (Note3) B A CM SS At Temperature (E-Temp parts) I — 1200 5000 pA T = +125°C, V = V (Note3) B A CM SS Input Offset Current I — ±1 — pA V =V OS CM SS Common Mode Input Impedance Z — 1013||4 — Ω||pF CM Differential Input Impedance Z — 1013||2 — Ω||pF DIFF Note 1: The input offset voltage is the center (average) of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. 2: V at different temperatures is estimated using V (T ) = V + (T - 25°C) TC + (T - 25°C)2 TC . HYST HYST A HYST A 1 A 2 3: Input bias current at temperature is not tested for SC-70-5 package. 4: Limit the output current to Absolute Maximum Rating of 30mA. © 2002-2011 Microchip Technology Inc. DS21696H-page 3

MCP6541/1R/1U/2/3/4 DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, V = +1.6V to +5.5V, V = GND, T = +25°C,V + = V /2, DD SS A IN DD VIN– = VSS, and RL=100kΩ to VDD/2 (Refer to Figure1-3). Parameters Sym Min Typ Max Units Conditions Push-Pull Output High-Level Output Voltage V V −0.2 — — V I = -2mA, V = 5V OH DD OUT DD Low-Level Output Voltage V — — V +0.2 V I = 2mA, V = 5V OL SS OUT DD Short-Circuit Current I — -2.5, +1.5 — mA V = 1.6V (Note4) SC DD I — ±30 — mA V = 5.5V (Note4) SC DD Note 1: The input offset voltage is the center (average) of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. 2: V at different temperatures is estimated using V (T ) = V + (T - 25°C) TC + (T - 25°C)2 TC . HYST HYST A HYST A 1 A 2 3: Input bias current at temperature is not tested for SC-70-5 package. 4: Limit the output current to Absolute Maximum Rating of 30mA. AC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, V = +1.6V to +5.5V, V = GND, T = +25°C, DD SS A V + = V /2, Step = 200mV, Overdrive = 100mV, and C = 36pF (Refer to Figure1-2 and Figure1-3). IN DD L Parameters Sym Min Typ Max Units Conditions Rise Time t — 0.85 — µs R Fall Time t — 0.85 — µs F Propagation Delay (High-to-Low) t — 4 8 µs PHL Propagation Delay (Low-to-High) t — 4 8 µs PLH Propagation Delay Skew t — ±0.2 — µs (Note1) PDS Maximum Toggle Frequency f — 160 — kHz V = 1.6V MAX DD f — 120 — kHz V = 5.5V MAX DD Input Noise Voltage E — 200 — µV 10Hz to 100kHz ni P-P Note 1: Propagation Delay Skew is defined as: t = t - t . PDS PLH PHL DS21696H-page 4 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 MCP6543 CHIP SELECT (CS) CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, V = +1.6V to +5.5V, V = GND, T = +25°C, V + = DD SS A IN V /2, V – = V , and C = 36pF (Refer to Figures1-1 and 1-3). DD IN SS L Parameters Sym Min Typ Max Units Conditions CS Low Specifications CS Logic Threshold, Low V V — 0.2V V IL SS DD CS Input Current, Low I — 5.0 — pA CS = V CSL SS CS High Specifications CS Logic Threshold, High V 0.8V — V V IH D DD D CS Input Current, High I — 1 — pA CS = V CSH DD CS Input High, V Current I — 18 — pA CS = V DD DD DD CS Input High, GND Current I — –20 — pA CS = V SS DD Comparator Output Leakage I — 1 — pA V = V ,CS = V O(LEAK) OUT DD DD CS Dynamic Specifications CS Low to Comparator Output t — 2 50 ms CS = 0.2V to V = V /2, ON DD OUT DD Low Turn-on Time V – = V IN DD CS High to Comparator Output t — 10 — µs CS = 0.8V to V = V /2, OFF DD OUT DD High Z Turn-off Time V – = V IN DD CS Hysteresis V — 0.6 — V V = 5V CS_HYS DD T CS V V IL IH V – IN 100mV t t ON OFF VIN+ = VDD/2 100mV tPHL VOUT Hi-Z Hi-Z t PLH V OH -20pA (typ.) -0.6µA (typ.) -20pA (typ.) I SS V OUT 1pA (typ.) 1pA (typ.) V V I OL OL CS FIGURE 1-1: Timing Diagram for the CS FIGURE 1-2: Propagation Delay Timing Pin on the MCP6543. Diagram. © 2002-2011 Microchip Technology Inc. DS21696H-page 5

MCP6541/1R/1U/2/3/4 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, V = +1.6V to +5.5V and V = GND. DD SS Parameters Sym Min Typ Max Units Conditions Temperature Ranges Specified Temperature Range T -40 — +85 °C A Operating Temperature Range T -40 — +125 °C Note A Storage Temperature Range T -65 — +150 °C A Thermal Package Resistances Thermal Resistance, 5L-SC-70 θ — 331 — °C/W JA Thermal Resistance, 5L-SOT-23 θ — 220.7 — °C/W JA Thermal Resistance, 8L-PDIP θ — 89.3 — °C/W JA Thermal Resistance, 8L-SOIC θ — 149.5 — °C/W JA Thermal Resistance, 8L-MSOP θ — 211 — °C/W JA Thermal Resistance, 14L-PDIP θ — 70 — °C/W JA Thermal Resistance, 14L-SOIC θ — 95.3 — °C/W JA Thermal Resistance, 14L-TSSOP θ — 100 — °C/W JA Note: The MCP6541/1R/1U/2/3/4 I-Temp parts operate over this extended temperature range, but with reduced performance. In any case, the Junction Temperature (T ) must not exceed the Absolute Maximum J specification of +150°C. 1.1 Test Circuit Configuration This test circuit configuration is used to determine the AC and DC specifications. V DD 200kΩ MCP654X 200kΩ 200kΩ VOUT 200kΩ 36pF V = 0V V = V SS IN SS FIGURE 1-3: AC and DC Test Circuit for the Push-Pull Output Comparators. DS21696H-page 6 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND, R = 100kΩ to V /2, and C = 36pF. L DD L 14% 18% s 1200 Samples s 1200 Samples nce 12% VCM = VSS nce 16% VCM = VSS e e 14% curr 10% curr 12% Oc 8% Oc 10% Percentage of 246%%% Percentage of 2468%%%% 0% 0% -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0 Input Offset Voltage (mV) Input Hysteresis Voltage (mV) FIGURE 2-1: Input Offset Voltage at FIGURE 2-4: Input Hysteresis Voltage at V =V . V =V . CM SS CM SS 16% es25% 596 Samples s 1200 Samples c ce14% V = V en20% VCM = VSS urren12% TAC=M -40°SCS to +125°C ccurr15% TA = -40°C to +125°C c10% O e of Oc 68%% age of 10% VDD = 5.5V VDD = 1.6V ntag 4% cent 5% erce 2% Per 0% P 0% 6 0 4 8 2 6 0 4 8 2 6 0 4 4 2 0 8 6 4 2 0 2 4 6 8 0 2 4 4. 5. 5. 5. 6. 6. 7. 7. 7. 8. 8. 9. 9. -1 -1 -1 - - - - 1 1 1 Input Hysteresis Voltage – Input Offset Voltage Drift (µV/°C) Linear Temp. Co.; TC (µV/°C) 1 FIGURE 2-2: Input Offset Voltage Drift at FIGURE 2-5: Input Hysteresis Voltage V =V . Linear Temp. Co. (TC ) at V =V . CM SS 1 CM SS ut, Output Voltage (V) 34567 VDD = 5.5V VOUT age of Occurrences11111202468068%%%%%%%% 5VTV9ACD 6MD= S==-4 a V10mS.°6SpCVl etos +125°C VDD = 5.5V p 2 nt 4% ng In 1 erce 02%% erti 0 VIN– P 60 56 52 48 44 40 36 32 28 24 20 16 v 0 0 0 0 0 0 0 0 0 0 0 0 In -1 -0. -0. -0. -0. -0. -0. -0. -0. -0. -0. -0. -0. 0 1 2 3 4 5 6 7 8 9 10 Input Hysteresis Voltage – Time (1 ms/div) Quadratic Temp. Co.; TC2 (µV/°C2) FIGURE 2-3: The MCP6541/1R/1U/2/3/4 FIGURE 2-6: Input Hysteresis Voltage Comparators Show No Phase Reversal. Quadratic Temp. Co. (TC ) at V =V . 2 CM SS © 2002-2011 Microchip Technology Inc. DS21696H-page 7

MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, V =+1.6V to +5.5V, V =GND, T =+25°C, V +=V /2, V –=GND, DD SS A IN DD IN R =100kΩ to V /2, and C =36pF. L DD L 1.0 6.5 V) 0.8 VCM = VSS mV) 6.0 VCM = VSS m 0.6 e ( 5.5 Offset Voltage ( --00000.....02442 VVDDDD == 15..65VV steresis Voltag 33445.....05050 VDD = 1.6V Input --00..86 put Hy 22..05 VDD = 5.5V -1.0 In 1.5 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Ambient Temperature (°C) Ambient Temperature (°C) FIGURE 2-7: Input Offset Voltage vs. FIGURE 2-10: Input Hysteresis Voltage vs. Ambient Temperature at V =V . Ambient Temperature at V =V . CM SS CM SS 2.0 V) 6.0 et Voltage (mV) 0011....0505 VDD T=A 1 =.6 +V125°C TTAA == ++18255°C°C esis Voltage (m 34455.....50505 VDD = 1.6V TTTAAA === +++1822555°°CC°C Input Offs ---110...505 TTAA == +-4205°°CC put Hyster 223...050 TA = -40°C -2.0 In 1.5 4 2 0 2 4 6 8 0 2 4 6 8 0 4 2 0 2 4 6 8 0 2 4 6 8 0 0. 0. 0. 0. 0. 0. 0. 1. 1. 1. 1. 1. 2. 0. 0. 0. 0. 0. 0. 0. 1. 1. 1. 1. 1. 2. - - - - Common Mode Input Voltage (V) Common Mode Input Voltage (V) FIGURE 2-8: Input Offset Voltage vs. FIGURE 2-11: Input Hysteresis Voltage vs. Common Mode Input Voltage at V =1.6V. Common Mode Input Voltage at V =1.6V. DD DD 2.0 V) 6.0 et Voltage (mV) 0011....0505 VDD = 5.5V TTAA == +-2450°°CC esis Voltage (m 34455.....50505 VDD = 5.5V TTTTAAAA ==== +++-41820255°5°°CCC°C Input Offs ----2110....0505 TTA A= = + +12855°°CC Input Hyster 1223....5050 5 0 5 0 5 0 5 0 5 0 5 0 5 0 5 0 5 0 5 0 5 0 5 0 5 0 5 0 0. 0. 0. 1. 1. 2. 2. 3. 3. 4. 4. 5. 5. 6. 0. 0. 0. 1. 1. 2. 2. 3. 3. 4. 4. 5. 5. 6. - - Common Mode Input Voltage (V) Common Mode Input Voltage (V) FIGURE 2-9: Input Offset Voltage vs. FIGURE 2-12: Input Hysteresis Voltage vs. Common Mode Input Voltage at V = 5.5V. Common Mode Input Voltage at V =5.5V. DD DD DS21696H-page 8 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, V =+1.6V to +5.5V, V =GND, T =+25°C, V +=V /2, V –=GND, DD SS A IN DD IN R =100kΩ to V /2, and C =36pF. L DD L B) 8950 Input Referred ents (A)101001001000nn IB, TA = +125°C VDD = 5.5V R, PSRR (d 778050 PSRR, VIN+ = VSS, VDD = 1.6V to 5.5V Offset Curr1101010000pp IB, TA = +85°C MR 65 as, IOS, TA = +125°C C 60 CMRR, VIN+ = -0.3 to 5.3V, VDD = 5.0V ut Bi 11p IOS, TA = +85°C p 55 In 100.01f -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Ambient Temperature (°C) Common Mode Input Voltage (V) FIGURE 2-13: CMRR, PSRR vs. Ambient FIGURE 2-16: Input Bias Current, Input Temperature. Offset Current vs. Common Mode Input Voltage. 1000 0.7 s V = 5.5V nput Bias, Offset Current(pA) 110001 VDCDM = VDD IB | IOS | Quiescent Currentper Comparator (µA) 000000......123456 TTTAT AA=A == =+ ++1-24825055°°°°CCCC I 0.1 0.0 55 65 75 85 95 105 115 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Ambient Temperature (°C) Power Supply Voltage (V) FIGURE 2-14: Input Bias Current, Input FIGURE 2-17: Quiescent Current vs. Offset Current vs. Ambient Temperature. Power Supply Voltage. 0.7 0.7 V = 1.6V V = 5.5V DD DD 0.6 0.6 urrentor (µA) 0.5 urrentor (µA) 0.5 cent Cmparat 00..34 cent Cmparat 00..34 Quieser co 0.2 Sweep VIN+, VIN– = VDD/2 Quieser Co 0.2 Sweep VIN+, VIN– = VDD/2 p 0.1 p 0.1 Sweep V –, V + = V /2 Sweep V –, V + = V /2 IN IN DD IN IN DD 0.0 0.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) Common Mode Input Voltage (V) FIGURE 2-15: Quiescent Current vs. FIGURE 2-18: Quiescent Current vs. Common Mode Input Voltage at V =1.6V. Common Mode Input Voltage at V =5.5V. DD DD © 2002-2011 Microchip Technology Inc. DS21696H-page 9

MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, V =+1.6V to +5.5V, V =GND, T =+25°C, V +=V /2, V –=GND, DD SS A IN DD IN R =100kΩ to V /2, and C =36pF. L DD L 10 35 upply Current (µA) 1 1VR0CL0 M= m= in VVf iDnODi/vt2yerdrive VVDDDD == 51..56VV ut Short Circuit CurrentMagnitude (mA) 1122305050 TTTATAA=A == =+ ++1-24285055°°°°CCCC S p ut 5 O 0.1 0 0.1 1 10 100 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Toggle Frequency (kHz) Power Supply Voltage (V) FIGURE 2-19: Supply Current vs. Toggle FIGURE 2-22: Output Short Circuit Current Frequency. Magnitude vs. Power Supply Voltage. droom (V) 000...678 VTTAAO L==– V + +1SS82:55°°CC VDD = 1.6V droom (V) 0001....7890 TTTAVA=O== L+ ++1–282 V555S°°°SCCC: Hea 0.5 TA = +25°C Hea 0.6 TAA = -40°C Voltage 00..34 TA = -40°C TTAA ==V D++D18–52V°5CO°HC: Voltage 000...345 TTAAV ==D D++ –18 25V5°OC°HC: ut 0.2 TA = +25°C ut 0.2 TA = +25°C utp 0.1 TA = -40°C utp 0.1 VDD = 5.5V TA = -40°C O O 0.0 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 5 10 15 20 25 Output Current (mA) Output Current (mA) FIGURE 2-20: Output Voltage Headroom FIGURE 2-23: Output Voltage Headroom vs. Output Current at V =1.6V. vs. Output Current at V =5.5V. DD DD 45% 45% s 600 Samples s 600 Samples e 40% e 40% nc 100 mV Overdrive nc 100 mV Overdrive urre 3305%% VCM = VDD/2 urre 3305%% VCM = VDD/2 c c c c O 25% O 25% e of 20% e of 20% entag 1105%% VDD = 1.6V VDD = 5.5V entag 1105%% VDD = 1.6V VDD = 5.5V c c er 5% er 5% P P 0% 0% 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 High-to-Low Propagation Delay (µs) Low-to-High Propagation Delay (µs) FIGURE 2-21: High-to-Low Propagation FIGURE 2-24: Low-to-High Propagation Delay. Delay. DS21696H-page 10 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, V =+1.6V to +5.5V, V =GND, T =+25°C, V +=V /2, V –=GND, DD SS A IN DD IN R =100kΩ to V /2, and C =36pF. L DD L 45% 8 s 600 Samples 100 mV Overdrive Occurrence 23345050%%%% 1V0C0M m= VV DOD/v2erdrive Delay (µs) 567 VCM = tVPLDHD /@2 VDD = 5.5V tPHL @ VDD = 5.5V of 20% on 4 ercentage 11055%%% VDD = 5.5V VDD = 1.6V Propagati 123 tPLH @ VDD = 1.6V tPHL @ VDD = 1.6V P 0% 0 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 -50 -25 0 25 50 75 100 125 Propagation Delay Skew (µs) Ambient Temperature (°C) FIGURE 2-25: Propagation Delay Skew. FIGURE 2-28: Propagation Delay vs. Ambient Temperature. 14 100 13 VCM = VDD/2 VCM = VDD/2 Delay (µs) 11101289 tPLH @ 10 mV Overdrive Delay (µs) tttPPPHHLHLL @@@ VVVDDDDDD === 511...566VVV gation 567 ttPPLHHL @@ 11000 m mVV O Ovveerrddrrivivee gation 10 opa 34 opa tPLH @ VDD = 5.5V Pr 2 tPHL @ 100 mV Overdrive Pr 1 0 1 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 1 10 100 1000 Power Supply Voltage (V) Input Overdrive (mV) FIGURE 2-26: Propagation Delay vs. FIGURE 2-29: Propagation Delay vs. Input Power Supply Voltage. Overdrive. 8 8 Delay (µs) 567 V10D0D =m 1V. 6OVverdrive Delay (µs) 567 V10D0D =m 5V. 5OVverdrive tPHL n 4 tPLH n 4 pagatio 23 tPHL pagatio 23 tPLH o o Pr 1 Pr 1 0 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) Common Mode Input Voltage (V) FIGURE 2-27: Propagation Delay vs. FIGURE 2-30: Propagation Delay vs. Common Mode Input Voltage at V =1.6V. Common Mode Input Voltage at V =5.5V. DD DD © 2002-2011 Microchip Technology Inc. DS21696H-page 11

MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, V =+1.6V to +5.5V, V =GND, T =+25°C, V +=V /2, V –=GND, DD SS A IN DD IN R =100kΩ to V /2, and C =36pF. L DD L Propagation Delay (µs) 1122334450505050505 1V0C0MttPP mHL=HL VV @@ DOD VV/v2DDeDDr d==r i11v..e66VV ttPPLHHL @@ VVDDDD == 55..55VV hip Select, Output Voltage (V) 0011223344556.............0505050505050 VDD =V 5OC.U5STV 0 C -0.5 0 10 20 30 40 50 60 70 80 90 0 1 2 3 4 5 6 7 8 9 10 Load Capacitance (nF) Time (ms) FIGURE 2-31: Propagation Delay vs. Load FIGURE 2-34: Chip Select (CS) Step Capacitance. Response (MCP6543 only). 1.E-10m3 1.E-10m3 Comparator Comparator Comparator Comparator Supply Currentper Comparator (A)111111......11EEEEEE0110------000000100010987654nnnµµµ TurnsH iOgnh-to-LoCwS CSCL oHSwSyhs-ttuoet-rsHe Oisgifshf Supply Currentper Comparator (A)111111......EEEEEE111001------000000001001987654nnnµµµ TLuorwn-sCto SO-Hnigh HysCteSreHsiisgh-to-LoCSwShuts Off 1.1E0-100p VDD = 1.6V 1.E10-100p VDD = 5.5V 1.E1-101p 1.E1-101p 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Chip Select (CS) Voltage (V) Chip Select (CS) Voltage (V) FIGURE 2-32: Supply Current (shoot FIGURE 2-35: Supply Current (shoot through current) vs. Chip Select (CS) Voltage at through current) vs. Chip Select (CS) Voltage at V =1.6V (MCP6543 only). V =5.5V (MCP6543 only). DD DD upply Current (µA) 11223050505 VDD = 1C.6hcVaarpgaincgit aonucteput VOSICDUtSDTart-up ----016431..06....5926Output Voltage, Chip Select Voltage (V), Supply Currenter Comparator (µA)11111202468024680000000000 VVDODU T= 5C.5SV ChcaaSrptgaairnctgi-tu aopnu cItDepDut -------03621119631852Output Voltage, Chip Select Voltage (V) S 0 -8.1 p 0 -24 0 1 2 3 4 5 6 7 8 9 1011121314 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Time (1 ms/div) Time (0.5 ms/div) FIGURE 2-33: Supply Current (charging FIGURE 2-36: Supply Current (charging current) vs. Chip Select (CS) pulse at V =1.6V current) vs. Chip Select (CS) pulse at V =5.5V DD DD (MCP6543 only). (MCP6543 only). DS21696H-page 12 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, V =+1.6V to +5.5V, V =GND, T =+25°C, V +=V /2, V –=GND, DD SS A IN DD IN R =100kΩ to V /2, and C =36pF. L DD L 1.E1-00m2 A)1.E-10m3 de (1.E10-004µ nitu1.E1-005µ g1.E-016µ a M1.E10-007n nt 1.E1-008n urre1.E-019n ++12855°°CC put C11..EE101--110010pp +-2405°°CC n I1.E-112p -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Input Voltage (V) FIGURE 2-37: Input Bias Current vs. Input Voltage. © 2002-2011 Microchip Technology Inc. DS21696H-page 13

MCP6541/1R/1U/2/3/4 NOTES: DS21696H-page 14 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table3-1. TABLE 3-1: PIN FUNCTION TABLE MMCSPOPSD6OIICP5P,,41 SMSOCCTP--762053-4-551, MCP6541R MSSCOCPT-6-725034--515U MCP6542 MCP6543 MCP6544 Symbol Description 6 1 1 4 1 6 1 OUT, OUTA Digital Output (comparator A) 2 4 4 3 2 2 2 V –, V – Inverting Input (comparator A) IN INA 3 3 3 1 3 3 3 V +, V + Non-inverting Input (comparator A) IN INA 7 5 2 5 8 7 4 V Positive Power Supply DD — — — — 5 — 5 V + Non-inverting Input (comparator B) INB — — — — 6 — 6 V – Inverting Input (comparator B) INB — — — — 7 — 7 OUTB Digital Output (comparator B) — — — — — — 8 OUTC Digital Output (comparator C) — — — — — — 9 V – Inverting Input (comparator C) INC — — — — — — 10 V + Non-inverting Input (comparator C) INC 4 2 5 2 4 4 11 V Negative Power Supply SS — — — — — — 12 V + Non-inverting Input (comparator D) IND — — — — — — 13 V – Inverting Input (comparator D) IND — — — — — — 14 OUTD Digital Output (comparator D) — — — — — 8 — CS Chip Select 1, 5, 8 — — — — 1, 5 — NC No Internal Connection 3.1 Analog Inputs 3.4 Power Supply (V and V ) SS DD The comparator non-inverting and inverting inputs are The positive power supply pin (V ) is 1.6V to 5.5V DD high-impedance CMOS inputs with low bias currents. higher than the negative power supply pin (V ). For SS normal operation, the other pins are at voltages 3.2 CS Digital Input between VSS and VDD. Typically, these parts are used in a single (positive) This is a CMOS, Schmitt-triggered input that places the supply configuration. In this case, V is connected to part into a low-power mode of operation. SS ground and V is connected to the supply. V will DD DD need a local bypass capacitor (typically 0.01µF to 3.3 Digital Outputs 0.1µF) within 2mm of the V pin. These can share a DD The comparator outputs are CMOS, push-pull digital bulk capacitor with nearby analog parts (within outputs. They are designed to be compatible with 100mm), but it is not required. CMOS and TTL logic and are capable of driving heavy DC or capacitive loads. © 2002-2011 Microchip Technology Inc. DS21696H-page 15

MCP6541/1R/1U/2/3/4 NOTES: DS21696H-page 16 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 4.0 APPLICATIONS INFORMATION V The MCP6541/1R/1U/2/3/4 family of push-pull output DD comparators are fabricated on Microchip’s state-of-the- art CMOS process. They are suitable for a wide range D 1 of applications requiring very low-power consumption. V + 1 4.1 Comparator Inputs R1 MCP654X VOUT – D 4.1.1 PHASE REVERSAL 2 V The MCP6541/1R/1U/2/3/4 comparator family uses 2 R R CMOS transistors at the input. They are designed to 2 3 prevent phase inversion when the input pins exceed V –(minimum expected V ) the supply voltages. Figure2-3 shows an input voltage SS 1 R ≥ exceeding both supplies with no resulting phase 1 2mA inversion. V –(minimum expected V ) SS 2 R ≥ 4.1.2 INPUT VOLTAGE AND CURRENT 2 2mA LIMITS FIGURE 4-2: Protecting the Analog The ESD protection on the inputs can be depicted as Inputs. shown in Figure4-1. This structure was chosen to It is also possible to connect the diodes to the left of the protect the input transistors, and to minimize input bias resistors R and R . In this case, the currents through current (IB). The input ESD diodes clamp the inputs 1 2 the diodes D and D need to be limited by some other when they try to go more than one diode drop below 1 2 mechanism. The resistor then serves as in-rush current V . They also clamp any voltages that go too far SS limiter; the DC current into the input pins (V + and above V ; their breakdown voltage is high enough to IN DD V –) should be very small. allow normal operation, and low enough to bypass ESD IN events within the specified limits. A significant amount of current can flow out of the inputs when the common mode voltage (V ) is below CM ground (V ); see Figure2-37. Applications that are SS Bond high-impedance may need to limit the usable voltage V DD Pad range. 4.1.3 NORMAL OPERATION Bond Input Bond The input stage of this family of devices uses two V + V – IN Pad Stage Pad IN differential input stages in parallel: one operates at low input voltages and the other at high input voltages. With this topology, the input voltage is 0.3V above V and DD 0.3V below V . Therefore, the input offset voltage is Bond SS VSS Pad measured at both VSS - 0.3V and VDD + 0.3V to ensure proper operation. FIGURE 4-1: Simplified Analog Input ESD The MCP6541/1R/1U/2/3/4 family has internally-set Structures. hysteresis that is small enough to maintain input offset accuracy (<7mV) and large enough to eliminate output In order to prevent damage and/or improper operation chattering caused by the comparator’s own input noise of these amplifiers, the circuits they are in must limit the voltage (200µV ). Figure4-3 depicts this behavior. p-p currents (and voltages) at the V + and V – pins (see IN IN Absolute Maximum Ratings † at the beginning of Section1.0 “Electrical Characteristics”). Figure4-3 shows the recommended approach to protecting these inputs. The internal ESD diodes prevent the input pins (V + and V –) from going too far below ground, and IN IN the resistors R and R , limit the possible current drawn 1 2 out of the input pin. Diodes D and D prevent the input 1 2 pin (V + and V –) from going too far above V . IN IN DD When implemented as shown, resistors R and R also 1 2 limit the current through D and D . 1 2 © 2002-2011 Microchip Technology Inc. DS21696H-page 17

MCP6541/1R/1U/2/3/4 4.4 Externally Set Hysteresis 8 25 V = 5.0V Greater flexibility in selecting hysteresis (or input trip 7 DD 20 V) 56 VIN– 11V/div)05 pInopinutts o) fifss eatc vhoieltvaegde b(Vy us)i nisg tehxet ecrennatel rre (saivsetorarsg.e) of the ge ( 4 VOUT 50 m (input-referred) low-higOhS and high-low trip points. Input a 1 olt 3 0e ( hysteresis voltage (VHYST) is the difference between Output V 012 Hysteresis ---ut Voltag11550 tcohhtheae ttres aarinmndge t hwuthrsiep nr e dopunoceine tsisn .dp yuHnt ayissm tesicrlo eswsuilspy p mlrye ocdvuuirncrgee snp t.a oIstut attplhsueot -1 -Inp20 helps in systems where it is best not to cycle between -2 -25 states too frequently (e.g., air conditioner thermostatic -3 -30 Time (100 ms/div) control). FIGURE 4-3: The MCP6541/1R/1U/2/3/4 4.4.1 NON-INVERTING CIRCUIT comparators’ internal hysteresis eliminates Figure4-4 shows a non-inverting circuit for single- output chatter caused by input noise voltage. supply applications using just two resistors. The resulting hysteresis diagram is shown in Figure4-5. 4.2 Push-Pull Output The push-pull output is designed to be compatible with V DD CMOS and TTL logic, while the output transistors are configured to give rail-to-rail output performance. They V - REF are driven with circuitry that minimizes any switching current (shoot-through current from supply-to-supply) MCP654X VOUT when the output is transitioned from high-to-low, or from + low-to-high (see Figures2-15,2-18, and 2-32 —2-36 for more information). V IN 4.3 MCP6543 Chip Select (CS) R R 1 F FIGURE 4-4: Non-inverting Circuit with The MCP6543 is a single comparator with Chip Select (CS). When CS is pulled high, the total current Hysteresis for Single-supply. consumption drops to 20pA (typ.); 1pA (typ.) flows through the CS pin, 1pA (typ.) flows through the out- V OUT put pin and 18pA (typ.) flows through the V pin, as DD V shown in Figure1-1. When this happens, the DD V comparator output is put into a high-impedance state. OH By pulling CS low, the comparator is enabled. If the CS High-to-Low Low-to-High pin is left floating, the comparator will not operate properly. Figure1-1 shows the output voltage and supply current response to a CS pulse. VOL VIN V SS The internal CS circuitry is designed to minimize V V V V SS THL TLH DD glitches when cycling the CS pin. This helps conserve FIGURE 4-5: Hysteresis Diagram for the power, which is especially important in battery-powered Non-Inverting Circuit. applications. The trip points for Figures4-4 and4-5 are: EQUATION 4-1: ⎛ R1⎞ ⎛R1⎞ V = V ⎜1+-------⎟ –V ⎜-------⎟ TLH REF⎝ RF⎠ OL⎝RF⎠ ⎛ R1⎞ ⎛R1⎞ V = V ⎜1+-------⎟ –V ⎜-------⎟ THL REF⎝ RF⎠ OH⎝RF⎠ V = trip voltage from low-to-high TLH V = trip voltage from high-to-low THL DS21696H-page 18 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 4.4.2 INVERTING CIRCUIT Using this simplified circuit, the trip voltage can be calculated using the following equation: Figure4-6 shows an inverting circuit for single-supply using three resistors. The resulting hysteresis diagram EQUATION 4-2: is shown in Figure4-7. ⎛ R ⎞ R VDD VTHL = VOH⎝⎜R----2---3----+-2--3--R----F---⎠⎟ +V23⎝⎛R----2---3----+-F----R----F--⎠⎞ VIN V = V ⎜⎛--------R----2--3---------⎟⎞ +V ⎛--------R----F----------⎞ VDD MCP654X VOUT TLH OL⎝R23+RF⎠ 23⎝R23+RF⎠ V = trip voltage from low-to-high TLH R 2 V = trip voltage from high-to-low THL R Figure2-20 and Figure2-23 can be used to determine R F 3 typical values for V and V . OH OL 4.5 Bypass Capacitors FIGURE 4-6: Inverting Circuit With Hysteresis. With this family of comparators, the power supply pin (V for single supply) should have a local bypass DD V capacitor (i.e., 0.01µF to 0.1µF) within 2mm for good OUT edge rate performance. V DD VOH 4.6 Capacitive Loads Low-to-High High-to-Low Reasonable capacitive loads (e.g., logic gates) have little impact on propagation delay (see Figure2-31). V V The supply current increases with increasing toggle OL IN V frequency (Figure2-19), especially with higher SS VSS VTLH VTHL VDD capacitive loads. FIGURE 4-7: Hysteresis Diagram for the 4.7 Battery Life Inverting Circuit. In order to maximize battery life in portable In order to determine the trip voltages (V and V ) THL TLH applications, use large resistors and small capacitive for the circuit shown in Figure4-6, R and R can be 2 3 loads. Avoid toggling the output more than necessary. simplified to the Thevenin equivalent circuit with Do not use Chip Select (CS) frequently to conserve respect to V , as shown in Figure4-8. DD start-up power. Capacitive loads will draw additional power at start-up. V DD 4.8 PCB Surface Leakage - In applications where low input bias current is critical, MCP654X VOUT PCB (Printed Circuit Board) surface leakage effects need to be considered. Surface leakage is caused by + V humidity, dust or other contamination on the board. SS Under low humidity conditions, a typical resistance V between nearby traces is 1012Ω. A 5V difference would 23 R R cause 5pA of current to flow. This is greater than the 23 F MCP6541/1R/1U/2/3/4 family’s bias current at 25°C FIGURE 4-8: Thevenin Equivalent Circuit. (1pA, typ.). Where: R R 2 3 R = ------------------- 23 R +R 2 3 R 3 V = -------------------×V 23 R +R DD 2 3 © 2002-2011 Microchip Technology Inc. DS21696H-page 19

MCP6541/1R/1U/2/3/4 The easiest way to reduce surface leakage is to use a 4.10 Typical Applications guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. 4.10.1 PRECISE COMPARATOR An example of this type of layout is shown in Some applications require higher DC precision. An Figure4-9. easy way to solve this problem is to use an amplifier (such as the MCP6041) to gain-up the input signal V - V + IN IN V before it reaches the comparator. Figure4-11 shows an SS example of this approach. V DD V REF MCP6041 V Guard Ring DD V FIGURE 4-9: Example Guard Ring Layout IN for Inverting Circuit. R1 R2 MCP654X VOUT V 1. Inverting Configuration (Figures4-6 and4-9): REF a.Connect the guard ring to the non-inverting FIGURE 4-11: Precise Inverting input pin (V +). This biases the guard ring IN Comparator. to the same reference voltage as the comparator (e.g., V /2 or ground). DD 4.10.2 WINDOWED COMPARATOR b.Connect the inverting pin (V –) to the input IN Figure4-12 shows one approach to designing a win- pad without touching the guard ring. dowed comparator. The AND gate produces a logic ‘1’ 2. Non-inverting Configuration (Figure4-4): when the input voltage is between V and V (where RB RT a.Connect the non-inverting pin (V +) to the IN V > V ). RT RB input pad without touching the guard ring. b.Connect the guard ring to the inverting input V RT pin (V –). IN 1/2 4.9 Unused Comparators MCP6542 V IN An unused amplifier in a quad package (MCP6544) should be configured as shown in Figure4-10. This circuit prevents the output from toggling and causing crosstalk. It uses the minimum number of components VRB 1/2 and draws minimal current (see Figure2-15 and MCP6542 Figure2-18). FIGURE 4-12: Windowed Comparator. 4.10.3 ASTABLE MULTIVIBRATOR ¼ MCP6544 A simple astable multivibrator design is shown in V DD Figure4-13. V needs to be between the power REF supplies (V =GND and V ) to achieve oscillation. SS DD The output duty cycle changes with V . REF – R1 R2 V REF V + DD MCP6541 VOUT FIGURE 4-10: Unused Comparators. C R 1 3 FIGURE 4-13: Astable Multivibrator. DS21696H-page 20 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 5-Lead SC-70 (MCP6541, MCP6541U) Example: E-Temp Device I-Temp Code Code XXNN Front) BA25 Front) YWW (Back) MCP6541T-I/LT ABNN Note2 146 (Back) MCP6541UT-I/LT BANN Note2 Note 1: I-Temp parts prior to March 2005 are marked “BAN” 2: SC-70-5 E-Temp parts not available at this release of this data sheet. 5-Lead SOT-23 (MCP6541, MCP6541R, MCP6541U) Example: I-Temp E-Temp Device Code Code XXNN MCP6541 ABNN GTNN AB25 MCP6541R AGNN GUNN MCP6541U — ATNN Note: Applies to 5-Lead SOT-23 8-Lead PDIP (300 mil) (MCP6541, MCP6542, MCP6543, MCP6544) Example: XXXXXXXX MCP6541 MCP6541 XXXXXNNN I/P256 OR E/P^e3^256 YYWW 1146 1146 8-Lead SOIC (150 mil) (MCP6541, MCP6542, MCP6543, MCP6544) Example: XXXXXXXX MCP6542 MCP6541E XXXXYYWW I/SN1146 SN^e^31146 OR NNN 256 256 8-Lead MSOP (MCP6541, MCP6542, MCP6543) Example: XXXXXX 6543I 6543E YWWNNN 146256 OR 146256 Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e3 Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2002-2011 Microchip Technology Inc. DS21696H-page 21

MCP6541/1R/1U/2/3/4 Package Marking Information (Continued) 14-Lead PDIP (300 mil) (MCP6544) Example: XXXXXXXXXXXXXX XXXXXXXXXXXXXX MCP6544-I/P YYWWNNN 114656 MCP6544E/Pe3 OR 1146256 MCP6544 OR I/P e3 1146256 14-Lead SOIC (150 mil) (MCP6544) Example: XXXXXXXXXX MCP6544ISL XXXXXXXXXX YYWWNNN 1146256 MCP6544 OR E/SL^e^3 1146256 MCP6544 OR I/SL^e^3 1146256 14-Lead TSSOP (MCP6544) Example: MCP6544I MCP6544E XXXXXXXX 1146 1146 OR YYWW 256 256 NNN DS21696H-page 22 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:20)(cid:21)(cid:6)(cid:19)(cid:11)(cid:13)(cid:11)(cid:12)(cid:22)(cid:21)(cid:8)(cid:23)(cid:4)(cid:20)(cid:24)(cid:8)(cid:25)(cid:15)(cid:26)(cid:27)(cid:28)(cid:29) (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) D b 3 2 1 E1 E 4 5 e e A A2 c A1 L 3(cid:15)(cid:7)# (cid:6)(cid:19)44(cid:19)(cid:6)"(cid:13)"(cid:26)(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 ( 1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)9((cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2):(cid:14)(cid:7)(cid:17)(cid:11)# (cid:25) (cid:4)(cid:20);(cid:4) < (cid:30)(cid:20)(cid:30)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:3) (cid:4)(cid:20);(cid:4) < (cid:30)(cid:20)(cid:4)(cid:4) (cid:22)#(cid:28)(cid:15)!(cid:10)%% (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:4) < (cid:4)(cid:20)(cid:30)(cid:4) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)=(cid:7)!#(cid:11) " (cid:30)(cid:20);(cid:4) (cid:3)(cid:20)(cid:30)(cid:4) (cid:3)(cid:20)(cid:23)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)=(cid:7)!#(cid:11) "(cid:30) (cid:30)(cid:20)(cid:30)( (cid:30)(cid:20)(cid:3)( (cid:30)(cid:20)(cid:29)( 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:30)(cid:20);(cid:4) (cid:3)(cid:20)(cid:4)(cid:4) (cid:3)(cid:20)(cid:3)( .(cid:10)(cid:10)#(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) 4 (cid:4)(cid:20)(cid:30)(cid:4) (cid:4)(cid:20)(cid:3)(cid:4) (cid:4)(cid:20)(cid:23)9 4(cid:14)(cid:28)!(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:8) (cid:4)(cid:20)(cid:4); < (cid:4)(cid:20)(cid:3)9 4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8 (cid:4)(cid:20)(cid:30)( < (cid:4)(cid:20)(cid:23)(cid:4) (cid:30)(cid:22)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15) (cid:2)(cid:21)(cid:2)(cid:28)(cid:15)!(cid:2)"(cid:30)(cid:2)!(cid:10)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)$!(cid:14)(cid:2)(cid:31)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:20)(cid:2)(cid:6)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:2) (cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:14)&(cid:8)(cid:14)(cid:14)!(cid:2)(cid:4)(cid:20)(cid:30)(cid:3)(cid:5)(cid:2)(cid:31)(cid:31)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2) (cid:7)!(cid:14)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+ )(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)9(cid:30)) © 2002-2011 Microchip Technology Inc. DS21696H-page 23

MCP6541/1R/1U/2/3/4 (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) DS21696H-page 24 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:20)(cid:21)(cid:6)(cid:19)(cid:11)(cid:13)(cid:11)(cid:12)(cid:22)(cid:21)(cid:8)(cid:23)(cid:17)(cid:20)(cid:24)(cid:8)(cid:25)(cid:15)(cid:17)(cid:20)(cid:3) !(cid:29) (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) b N E E1 1 2 3 e e1 D A A2 c φ A1 L L1 3(cid:15)(cid:7)# (cid:6)(cid:19)44(cid:19)(cid:6)"(cid:13)"(cid:26)(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 ( 4(cid:14)(cid:28)!(cid:2)1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)(cid:24)((cid:2))(cid:22)* 6$# (cid:7)!(cid:14)(cid:2)4(cid:14)(cid:28)!(cid:2)1(cid:7)#(cid:8)(cid:11) (cid:14)(cid:30) (cid:30)(cid:20)(cid:24)(cid:4)(cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2):(cid:14)(cid:7)(cid:17)(cid:11)# (cid:25) (cid:4)(cid:20)(cid:24)(cid:4) < (cid:30)(cid:20)(cid:23)( (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:3) (cid:4)(cid:20);(cid:24) < (cid:30)(cid:20)(cid:29)(cid:4) (cid:22)#(cid:28)(cid:15)!(cid:10)%% (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:4) < (cid:4)(cid:20)(cid:30)( 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)=(cid:7)!#(cid:11) " (cid:3)(cid:20)(cid:3)(cid:4) < (cid:29)(cid:20)(cid:3)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)=(cid:7)!#(cid:11) "(cid:30) (cid:30)(cid:20)(cid:29)(cid:4) < (cid:30)(cid:20);(cid:4) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:3)(cid:20)(cid:5)(cid:4) < (cid:29)(cid:20)(cid:30)(cid:4) .(cid:10)(cid:10)#(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) 4 (cid:4)(cid:20)(cid:30)(cid:4) < (cid:4)(cid:20)9(cid:4) .(cid:10)(cid:10)#(cid:12)(cid:9)(cid:7)(cid:15)# 4(cid:30) (cid:4)(cid:20)(cid:29)( < (cid:4)(cid:20);(cid:4) .(cid:10)(cid:10)#(cid:2)(cid:25)(cid:15)(cid:17)(cid:16)(cid:14) (cid:3) (cid:4)> < (cid:29)(cid:4)> 4(cid:14)(cid:28)!(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:8) (cid:4)(cid:20)(cid:4); < (cid:4)(cid:20)(cid:3)9 4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8 (cid:4)(cid:20)(cid:3)(cid:4) < (cid:4)(cid:20)((cid:30) (cid:30)(cid:22)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15) (cid:2)(cid:21)(cid:2)(cid:28)(cid:15)!(cid:2)"(cid:30)(cid:2)!(cid:10)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)$!(cid:14)(cid:2)(cid:31)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:20)(cid:2)(cid:6)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:2) (cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:14)&(cid:8)(cid:14)(cid:14)!(cid:2)(cid:4)(cid:20)(cid:30)(cid:3)(cid:5)(cid:2)(cid:31)(cid:31)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2) (cid:7)!(cid:14)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+ )(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)(cid:24)(cid:30)) © 2002-2011 Microchip Technology Inc. DS21696H-page 25

MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21696H-page 26 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 "(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)#(cid:18)(cid:6)(cid:10)(cid:8)$(cid:19)(cid:3)(cid:4)(cid:13)(cid:19)(cid:5)(cid:8)(cid:23)(cid:9)(cid:24)(cid:8)%(cid:8)!(cid:28)(cid:28)(cid:8)(cid:16)(cid:13)(cid:10)(cid:8)&(cid:22)(cid:7)’(cid:8)(cid:25)(cid:9)#$(cid:9)(cid:29) (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) N NOTE1 E1 1 2 3 D E A A2 L A1 c e eB b1 b 3(cid:15)(cid:7)# (cid:19)5*:"(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 ; 1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:20)(cid:30)(cid:4)(cid:4)(cid:2))(cid:22)* (cid:13)(cid:10)(cid:12)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)#(cid:7)(cid:15)(cid:17)(cid:2)1(cid:16)(cid:28)(cid:15)(cid:14) (cid:25) < < (cid:20)(cid:3)(cid:30)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:3) (cid:20)(cid:30)(cid:30)( (cid:20)(cid:30)(cid:29)(cid:4) (cid:20)(cid:30)(cid:24)( )(cid:28) (cid:14)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)#(cid:7)(cid:15)(cid:17)(cid:2)1(cid:16)(cid:28)(cid:15)(cid:14) (cid:25)(cid:30) (cid:20)(cid:4)(cid:30)( < < (cid:22)(cid:11)(cid:10)$(cid:16)!(cid:14)(cid:9)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:11)(cid:10)$(cid:16)!(cid:14)(cid:9)(cid:2)=(cid:7)!#(cid:11) " (cid:20)(cid:3)(cid:24)(cid:4) (cid:20)(cid:29)(cid:30)(cid:4) (cid:20)(cid:29)(cid:3)( (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)=(cid:7)!#(cid:11) "(cid:30) (cid:20)(cid:3)(cid:23)(cid:4) (cid:20)(cid:3)((cid:4) (cid:20)(cid:3);(cid:4) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:20)(cid:29)(cid:23); (cid:20)(cid:29)9( (cid:20)(cid:23)(cid:4)(cid:4) (cid:13)(cid:7)(cid:12)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)#(cid:7)(cid:15)(cid:17)(cid:2)1(cid:16)(cid:28)(cid:15)(cid:14) 4 (cid:20)(cid:30)(cid:30)( (cid:20)(cid:30)(cid:29)(cid:4) (cid:20)(cid:30)((cid:4) 4(cid:14)(cid:28)!(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:8) (cid:20)(cid:4)(cid:4); (cid:20)(cid:4)(cid:30)(cid:4) (cid:20)(cid:4)(cid:30)( 3(cid:12)(cid:12)(cid:14)(cid:9)(cid:2)4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8(cid:30) (cid:20)(cid:4)(cid:23)(cid:4) (cid:20)(cid:4)9(cid:4) (cid:20)(cid:4)(cid:5)(cid:4) 4(cid:10)-(cid:14)(cid:9)(cid:2)4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8 (cid:20)(cid:4)(cid:30)(cid:23) (cid:20)(cid:4)(cid:30); (cid:20)(cid:4)(cid:3)(cid:3) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)(cid:26)(cid:10)-(cid:2)(cid:22)(cid:12)(cid:28)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:2)? (cid:14)) < < (cid:20)(cid:23)(cid:29)(cid:4) (cid:30)(cid:22)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) 1(cid:7)(cid:15)(cid:2)(cid:30)(cid:2),(cid:7) $(cid:28)(cid:16)(cid:2)(cid:7)(cid:15)!(cid:14)&(cid:2)%(cid:14)(cid:28)#$(cid:9)(cid:14)(cid:2)(cid:31)(cid:28)(cid:18)(cid:2),(cid:28)(cid:9)(cid:18)0(cid:2)8$#(cid:2)(cid:31)$ #(cid:2)8(cid:14)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)-(cid:7)#(cid:11)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:11)(cid:28)#(cid:8)(cid:11)(cid:14)!(cid:2)(cid:28)(cid:9)(cid:14)(cid:28)(cid:20) (cid:3)(cid:20) ?(cid:2)(cid:22)(cid:7)(cid:17)(cid:15)(cid:7)%(cid:7)(cid:8)(cid:28)(cid:15)#(cid:2)*(cid:11)(cid:28)(cid:9)(cid:28)(cid:8)#(cid:14)(cid:9)(cid:7) #(cid:7)(cid:8)(cid:20) (cid:29)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15) (cid:2)(cid:21)(cid:2)(cid:28)(cid:15)!(cid:2)"(cid:30)(cid:2)!(cid:10)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)$!(cid:14)(cid:2)(cid:31)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:20)(cid:2)(cid:6)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:2) (cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:14)&(cid:8)(cid:14)(cid:14)!(cid:2)(cid:20)(cid:4)(cid:30)(cid:4)@(cid:2)(cid:12)(cid:14)(cid:9)(cid:2) (cid:7)!(cid:14)(cid:20) (cid:23)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+(cid:2))(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)(cid:30);) © 2002-2011 Microchip Technology Inc. DS21696H-page 27

MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21696H-page 28 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2002-2011 Microchip Technology Inc. DS21696H-page 29

MCP6541/1R/1U/2/3/4 "(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:23)(cid:15)(cid:30)(cid:24)(cid:8)%(cid:8)(cid:30)(cid:6)(cid:21)(cid:21)(cid:22)()(cid:8)!*+(cid:28)(cid:8)(cid:16)(cid:16)(cid:8)&(cid:22)(cid:7)’(cid:8)(cid:25)(cid:15)(cid:17)$(cid:26)(cid:29) (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) DS21696H-page 30 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 Note: For the mostcurrent package drawings,please seetheMicrochip Packaging Specification located at http://www.microchip.com/packaging © 2002-2011 Microchip Technology Inc. DS21696H-page 31

MCP6541/1R/1U/2/3/4 Note: For the mostcurrent package drawings,please seetheMicrochip Packaging Specification located at http://www.microchip.com/packaging DS21696H-page 32 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2002-2011 Microchip Technology Inc. DS21696H-page 33

MCP6541/1R/1U/2/3/4 ,-(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)#(cid:18)(cid:6)(cid:10)(cid:8)$(cid:19)(cid:3)(cid:4)(cid:13)(cid:19)(cid:5)(cid:8)(cid:23)(cid:9)(cid:24)(cid:8)%(cid:8)!(cid:28)(cid:28)(cid:8)(cid:16)(cid:13)(cid:10)(cid:8)&(cid:22)(cid:7)’(cid:8)(cid:25)(cid:9)#$(cid:9)(cid:29) (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) N NOTE1 E1 1 2 3 D E A A2 L c A1 b1 b e eB 3(cid:15)(cid:7)# (cid:19)5*:"(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 (cid:30)(cid:23) 1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:20)(cid:30)(cid:4)(cid:4)(cid:2))(cid:22)* (cid:13)(cid:10)(cid:12)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)#(cid:7)(cid:15)(cid:17)(cid:2)1(cid:16)(cid:28)(cid:15)(cid:14) (cid:25) < < (cid:20)(cid:3)(cid:30)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:3) (cid:20)(cid:30)(cid:30)( (cid:20)(cid:30)(cid:29)(cid:4) (cid:20)(cid:30)(cid:24)( )(cid:28) (cid:14)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)#(cid:7)(cid:15)(cid:17)(cid:2)1(cid:16)(cid:28)(cid:15)(cid:14) (cid:25)(cid:30) (cid:20)(cid:4)(cid:30)( < < (cid:22)(cid:11)(cid:10)$(cid:16)!(cid:14)(cid:9)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:11)(cid:10)$(cid:16)!(cid:14)(cid:9)(cid:2)=(cid:7)!#(cid:11) " (cid:20)(cid:3)(cid:24)(cid:4) (cid:20)(cid:29)(cid:30)(cid:4) (cid:20)(cid:29)(cid:3)( (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)=(cid:7)!#(cid:11) "(cid:30) (cid:20)(cid:3)(cid:23)(cid:4) (cid:20)(cid:3)((cid:4) (cid:20)(cid:3);(cid:4) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:20)(cid:5)(cid:29)( (cid:20)(cid:5)((cid:4) (cid:20)(cid:5)(cid:5)( (cid:13)(cid:7)(cid:12)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)#(cid:7)(cid:15)(cid:17)(cid:2)1(cid:16)(cid:28)(cid:15)(cid:14) 4 (cid:20)(cid:30)(cid:30)( (cid:20)(cid:30)(cid:29)(cid:4) (cid:20)(cid:30)((cid:4) 4(cid:14)(cid:28)!(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:8) (cid:20)(cid:4)(cid:4); (cid:20)(cid:4)(cid:30)(cid:4) (cid:20)(cid:4)(cid:30)( 3(cid:12)(cid:12)(cid:14)(cid:9)(cid:2)4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8(cid:30) (cid:20)(cid:4)(cid:23)( (cid:20)(cid:4)9(cid:4) (cid:20)(cid:4)(cid:5)(cid:4) 4(cid:10)-(cid:14)(cid:9)(cid:2)4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8 (cid:20)(cid:4)(cid:30)(cid:23) (cid:20)(cid:4)(cid:30); (cid:20)(cid:4)(cid:3)(cid:3) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)(cid:26)(cid:10)-(cid:2)(cid:22)(cid:12)(cid:28)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:2)? (cid:14)) < < (cid:20)(cid:23)(cid:29)(cid:4) (cid:30)(cid:22)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) 1(cid:7)(cid:15)(cid:2)(cid:30)(cid:2),(cid:7) $(cid:28)(cid:16)(cid:2)(cid:7)(cid:15)!(cid:14)&(cid:2)%(cid:14)(cid:28)#$(cid:9)(cid:14)(cid:2)(cid:31)(cid:28)(cid:18)(cid:2),(cid:28)(cid:9)(cid:18)0(cid:2)8$#(cid:2)(cid:31)$ #(cid:2)8(cid:14)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)-(cid:7)#(cid:11)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:11)(cid:28)#(cid:8)(cid:11)(cid:14)!(cid:2)(cid:28)(cid:9)(cid:14)(cid:28)(cid:20) (cid:3)(cid:20) ?(cid:2)(cid:22)(cid:7)(cid:17)(cid:15)(cid:7)%(cid:7)(cid:8)(cid:28)(cid:15)#(cid:2)*(cid:11)(cid:28)(cid:9)(cid:28)(cid:8)#(cid:14)(cid:9)(cid:7) #(cid:7)(cid:8)(cid:20) (cid:29)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15) (cid:2)(cid:21)(cid:2)(cid:28)(cid:15)!(cid:2)"(cid:30)(cid:2)!(cid:10)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)$!(cid:14)(cid:2)(cid:31)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:20)(cid:2)(cid:6)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:2) (cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:14)&(cid:8)(cid:14)(cid:14)!(cid:2)(cid:20)(cid:4)(cid:30)(cid:4)@(cid:2)(cid:12)(cid:14)(cid:9)(cid:2) (cid:7)!(cid:14)(cid:20) (cid:23)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+(cid:2))(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)(cid:4)() DS21696H-page 34 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2002-2011 Microchip Technology Inc. DS21696H-page 35

MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21696H-page 36 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) © 2002-2011 Microchip Technology Inc. DS21696H-page 37

MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21696H-page 38 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2002-2011 Microchip Technology Inc. DS21696H-page 39

MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21696H-page 40 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 APPENDIX A: REVISION HISTORY Revision D (May 2006) The following is the list of modifications: Revision H (December 2011) 1. Added E-temp parts. The following is the list of modifications: 2. Changed V temperature specification to HYST 1. Updated Package Types drawings to correctly linear and quadratic temperature coefficients. show the device representation for the SC-70 3. Changed specifications and plots for E-Temp. package. 4. Added section 3.0 “Pin Descriptions”. 1. Updated package’s temperatures in the Temper- 5. Corrected package marking (See Section5.1 ature Characteristics table. “Package Marking Information”). 2. Corrected the marking information table for the 6. Added Appendix A: “Revision History”. 5-Lead SC-70 package (MCP6541 and MCP6541U) in Section5.1 “Package Marking Revision C (September 2003) Information”. 3. Updated package outline drawings in • Undocumented changes. Section5.1 “Package Marking Information” to show all views for each package. Revision B (November 2002) 4. Minor editorial changes. • Undocumented changes. Revision G (March 2011) Revision A (March 2002) The following is the list of modifications: • Original Release of this Document. 1. Updated the marking information for the 5-Lead SC-70 package in Section5.1 “Package Marking Information”. Revision F (September 2007) 1. Corrected polarity of MCP6541U SOT-23-5 pin out diagram on front page. 2. Section5.0 “Packaging Information”: Updated package outline drawings per MarCom. Revision E (September 2006) The following is the list of modifications: 1. Added MCP6541U pinout for the SOT-23-5 package. 2. Clarified Absolute Maximum Analog Input Voltage and Current Specifications. 3. Added applications write-ups on unused comparators. 4. Added disclaimer to package outline drawings. © 2002-2011 Microchip Technology Inc. DS21696H-page 41

MCP6541/1R/1U/2/3/4 NOTES: DS21696H-page 42 © 2002-2011 Microchip Technology Inc.

MCP6541/1R/1U/2/3/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. -X /XX Examples: a) MCP6541T-I/LT: Tape and Reel, Device Temperature Package Industrial Temperature, Range 5LD SC-70. b) MCP6541T-I/OT: Tape and Reel, Industrial Temperature, 5LD SOT-23. Device: MCP6541: Single Comparator MCP6541T: Single Comparator (Tape and Reel) c) MCP6541-I/MS: Tape and Reel, (SC-70, SOT-23, SOIC, MSOP) Industrial Temperature, MCP6541RT: Single Comparator (Rotated - Tape and 8LD MSOP. Reel) (SOT-23 only) d) MCP6541-E/P: Extended Temperature, MCP6541UT: Single Comparator (Tape and Reel) 8LD PDIP. (SC-70, SOT-23; SOT-23-5 is E-Temp e) MCP6541-E/SN: Extended Temperature, only) 8LD SOIC. MCP6542: Dual Comparator MCP6542T: Dual Comparator (Tape and Reel for SOIC and MSOP) MCP6543: Single Comparator with CS f) MCP6541RT-I/OT: Tape and Reel, MCP6543T: Single Comparator with CS Industrial Temperature, (Tape and Reel for SOIC and MSOP) 5LD SOT23. MCP6544: Quad Comparator MCP6544T: Quad Comparator (Tape and Reel for SOIC and TSSOP) g) MCP6541UT-E/LT: Tape and Reel, Industrial Temperature, Temperature Range: I = -40°C to +85°C 5LD SC-70 E * = -40°C to +125°C h) MCP6541UT-E/OT:Tape and Reel, * SC-70-5 E-Temp parts not available at this release of the Extended Temperature, data sheet. 5LD SOT23. Package: LT = Plastic Package (SC-70), 5-lead OT = Plastic Small Outline Transistor (SOT-23), 5-lead a) MCP6542-I/MS: Industrial Temperature, MS = Plastic MSOP, 8-lead 8LD MSOP. P = Plastic DIP (300 mil Body), 8-lead, 14-lead b) MCP6542T-I/MS: Tape and Reel, SN = Plastic SOIC (150 mil Body), 8-lead Industrial Temperature, SL = Plastic SOIC (150 mil Body), 14-lead (MCP6544) 8LD MSOP. ST = Plastic TSSOP (4.4mm Body), 14-lead (MCP6544) c) MCP6542-I/P: Industrial Temperature, 8LD PDIP. d) MCP6542-E/SN: Extended Temperature, 8LD SOIC. a) MCP6543-I/SN: Industrial Temperature, 8LD SOIC. b) MCP6543T-I/SN: Tape and Reel, Industrial Temperature, 8LD SOIC. c) MCP6543-I/P: Industrial Temperature, 8LD PDIP. d) MCP6543-E/SN: Extended Temperature, 8LD SOIC. a) MCP6544T-I/SL: Tape and Reel, Industrial Temperature, 14LD SOIC. b) MCP6544T-E/SL: Tape and Reel, Extended Temperature, 14LD SOIC. c) MCP6544-I/P: Industrial Temperature, 14LD PDIP. d) MCP6544T-E/ST: Tape and Reel, Extended Temperature, 14LD TSSOP. © 2002-2011 Microchip Technology Inc. DS21696H-page 43

MCP6541/1R/1U/2/3/4 NOTES: DS21696H-page 44 © 2002-2011 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC, and may be superseded by updates. It is your responsibility to KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PIC32 logo, rfPIC and UNI/O are registered trademarks of MICROCHIP MAKES NO REPRESENTATIONS OR Microchip Technology Incorporated in the U.S.A. and other WARRANTIES OF ANY KIND WHETHER EXPRESS OR countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, INCLUDING BUT NOT LIMITED TO ITS CONDITION, MXDEV, MXLAB, SEEVAL and The Embedded Control QUALITY, PERFORMANCE, MERCHANTABILITY OR Solutions Company are registered trademarks of Microchip FITNESS FOR PURPOSE. Microchip disclaims all liability Technology Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, chipKIT, devices in life support and/or safety applications is entirely at chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, the buyer’s risk, and the buyer agrees to defend, indemnify and dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, hold harmless Microchip from any and all damages, claims, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, suits, or expenses resulting from such use. No licenses are Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, conveyed, implicitly or otherwise, under any Microchip MPLINK, mTouch, Omniscient Code Generation, PICC, intellectual property rights. PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002-2011, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-61341-921-2 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2002-2011 Microchip Technology Inc. DS21696H-page 45

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