M MCP6021/2/3/4 Rail-to-Rail Input/Output, 10 MHz Op Amps Features Description • Rail-to-Rail Input/Output The MCP6021, MCP6022, MCP6023 and MCP6024 • Wide Bandwidth: 10MHz (typ.) from Microchip Technology Inc. are rail-to-rail input and • Low Noise: 8.7nV/√Hz, at 10kHz (typ.) output op amps with high performance. Key specifications include: wide bandwidth (10MHz), low • Low Offset Voltage: noise (8.7nV/√Hz), low input offset voltage and low - Industrial Temperature: ±500µV (max.) distortion (0.00053% THD+N). These features make - Extended Temperature: ±250µV (max.) these op amps well suited for applications requiring • Mid-Supply V : MCP6021 and MCP6023 high performance and bandwidth. The MCP6023 also REF • Low Supply Current: 1mA (typ.) offers a chip select pin (CS) that gives power savings when the part is not in use. • Total Harmonic Distortion: 0.00053% (typ., G = 1) The single MCP6021, single MCP6023 and dual • Unity Gain Stable MCP6022 are available in standard 8-lead PDIP, SOIC • Power Supply Range: 2.5V to 5.5V and TSSOP. The quad MCP6024 is offered in 14-lead • Temperature Range: PDIP, SOIC and TSSOP packages. - Industrial: -40°C to +85°C The MCP6021/2/3/4 family is available in the Industrial - Extended: -40°C to +125°C and Extended temperature ranges. It has a power supply range of 2.5V to 5.5V. Typical Applications • Automotive • Driving A/D Converters • Multi-Pole Active Filters • Barcode Scanners • Audio Processing • Communications • DAC Buffer • Test Equipment • Medical Instrumentation Available Tools • SPICE Macro Model (at www.microchip.com) • FilterLab® software (at www.microchip.com) PACKAGE TYPES MCP6021 MCP6022 MCP6023 MCP6024 PDIP SOIC, TSSOP PDIP SOIC, TSSOP PDIP SOIC, TSSOP PDIP SOIC, TSSOP NC 1 8 NC VOUTA 1 8 VDD NC 1 8 CS VOUTA 1 14VOUTD VIN– 2 7 VDD VINA– 2 7 VOUTB VIN– 2 7 VDD VINA– 2 13VIND– VIN+ 3 6 VOUT VINA+ 3 6 VINB– VIN+ 3 6 VOUT VINA+ 3 12VIND+ VSS 4 5 VREF VSS 4 5 VINB+ VSS 4 5 VREF VDD 4 11VSS VINB+ 5 10VINC+ VINB– 6 9 VINC– VOUTB 7 8 VOUTC  2003 Microchip Technology Inc. DS21685B-page 1

MCP6021/2/3/4 1.0 ELECTRICAL Pin Function Table CHARACTERISTICS Name Function Absolute Maximum Ratings † V +, V +, V +, V +, V + Non-inverting Inputs IN INA INB INC IND V –, V –, V –, V –, V – Inverting Inputs V - V .........................................................................7.0V IN INA INB INC IND DD SS All Inputs and Outputs.....................V -0.3V to V +0.3V V Positive Power Supply SS DD DD Difference Input Voltage .......................................|V -V | DD SS V Negative Power Supply Output Short Circuit Current ..................................continuous SS Current at Input Pins ....................................................±2mA CS Chip Select Current at Output and Supply Pins ............................±30mA V Reference Voltage REF Storage Temperature....................................-65°C to +150°C V , V , V , V , Outputs Junction Temperature..................................................+150°C OUT OUTA OUTB OUTC ESD Protection on all pins (HBM/MM)................≥2kV/200V VOUTD NC No Internal Connection † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Expo- sure to maximum rating conditions for extended periods may affect device reliability. DC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, T = +25°C, V = +2.5V to +5.5V, V = GND, A DD SS V = V /2, V ≈V /2 and R =10kΩ to V /2. CM DD OUT DD L DD Parameters Sym Min Typ Max Units Conditions Input Offset Input Offset Voltage: Industrial Temperature Parts V -500 — +500 µV V = 0V OS CM Extended Temperature Parts V -250 — +250 µV V = 0V, V = 5.0V OS CM DD Extended Temperature Parts V -2.5 — +2.5 mV V = 0V, V = 5.0V OS CM DD T = -40°C to +125°C A Input Offset Voltage Temperature Drift ∆V /∆T — ±3.5 — µV/°C T = -40°C to +125°C OS A A Power Supply Rejection Ratio PSRR 74 90 — dB V = 0V CM Input Current and Impedance Input Bias Current I — 1 — pA B Industrial Temperature Parts I — 30 150 pA T = +85°C B A Extended Temperature Parts I — 640 5,000 pA T = +125°C B A Input Offset Current I — ±1 — pA OS Common-Mode Input Impedance Z — 1013||6 — Ω||pF CM Differential Input Impedance Z — 1013||3 — Ω||pF DIFF Common-Mode Common-Mode Input Range V V -0.3 — V +0.3 V CMR SS DD Common-Mode Rejection Ratio CMRR 74 90 — dB V = 5V, V = -0.3V to 5.3V DD CM CMRR 70 85 — dB V = 5V, V = 3.0V to 5.3V DD CM CMRR 74 90 — dB V = 5V, V = -0.3V to 3.0V DD CM Voltage Reference (MCP6021 and MCP6023 only) V Accuracy (V - V /2) ∆V -50 — +50 mV REF REF DD REF V Temperature Drift ∆V /∆T — ±100 — µV/°C T = -40°C to +125°C REF REF A A Open Loop Gain DC Open Loop Gain (Large Signal) A 90 110 — dB V = 0V, OL CM V = V +0.3V to V -0.3V OUT SS DD DS21685B-page 2  2003 Microchip Technology Inc.

MCP6021/2/3/4 DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, T = +25°C, V = +2.5V to +5.5V, V = GND, A DD SS V = V /2, V ≈V /2 and R =10kΩ to V /2. CM DD OUT DD L DD Parameters Sym Min Typ Max Units Conditions Output Maximum Output Voltage Swing V , V V +15 — V -20 mV 0.5V output overdrive OL OH SS DD Output Short Circuit Current I — ±30 — mA SC Power Supply Supply Voltage V 2.5 — 5.5 V S Quiescent Current per Amplifier I 0.5 1.0 1.35 mA I = 0 Q O AC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, T = 25°C, V = +2.5V to +5.5V, V = GND, V = V /2, V ≈V /2, A DD SS CM DD OUT DD R =10kΩ to V /2 and C = 60 pF. L DD L Parameters Sym Min Typ Max Units Conditions AC Response Gain Bandwidth Product GBWP — 10 — MHz Phase Margin at Unity-Gain PM — 65 — ° G = 1 Settling Time, 0.2% t — 250 — ns G = 1, V = 100mV SETTLE OUT p-p Slew Rate SR — 7.0 — V/µs Total Harmonic Distortion Plus Noise f = 1kHz, G = 1 THD+N — 0.00053 — % V = 0.25V + 3.25V, BW = 22kHz OUT f = 1kHz, G = 1, R = 600Ω@1KHz THD+N — 0.00064 — % V = 0.25V + 3.25V, BW = 22kHz L OUT f = 1kHz, G = +1V/V THD+N — 0.0014 — % V = 4V , V = 5.0V, BW = 22kHz OUT P-P DD f = 1kHz, G = +10V/V THD+N — 0.0009 — % V = 4V , V = 5.0V, BW = 22kHz OUT P-P DD f = 1kHz, G = +100V/V THD+N — 0.005 — % V = 4V , V = 5.0V, BW = 22kHz OUT P-P DD Noise Input Voltage Noise E — 2.9 — µVp-p f = 0.1 Hz to 10 Hz ni Input Voltage Noise Density e — 8.7 — nV/√Hz f = 10 kHz ni Input Current Noise Density i — 3 — fA/√Hz f = 1 kHz ni MCP6023 CHIP SELECT (CS) CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, T = 25°C, V = +2.5V to +5.5V, V = GND, V = V /2, V ≈V /2, A DD SS CM DD OUT DD R =10kΩ to V /2 and C = 60 pF. L DD L Parameters Sym Min Typ Max Units Conditions DC Characteristics CS Logic Threshold, Low V 0 — 0.2V V IL DD CS Input Current, Low I -1.0 0.01 — µA CS = V CSL SS CS Logic Threshold, High V 0.8V — V V IH DD DD CS Input Current, High I — 0.01 2.0 µA CS = V CSH DD CS Input High, GND Current I — 0.05 2.0 µA CS = V SS DD Amplifier Output Leakage — — 0.01 — µA CS = V DD Timing CS Low to Amplifier Output t — 2 10 µs G = 1, V = V , ON IN SS Turn-on Time CS = 0.2VDD to VOUT = 0.45VDD time CS High to Amplifier Output t — 0.01 — µs G = 1, V = V , OFF IN SS High-Z Turn-off Time CS = 0.8VDD to VOUT = 0.05VDD time Hysteresis V — 0.6 — V Internal Switch HYST  2003 Microchip Technology Inc. DS21685B-page 3

MCP6021/2/3/4 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, V = +2.5V to +5.5V and V = GND. DD SS Parameters Symbol Min Typ Max Units Conditions Temperature Ranges Industrial Temperature Range T -40 — +85 °C A Extended Temperature Range T -40 — +125 °C A Operating Temperature Range T -40 — +125 °C Note1 A Storage Temperature Range T -65 — +150 °C A Thermal Package Resistances Thermal Resistance, 8L-PDIP θ — 85 — °C/W JA Thermal Resistance, 8L-SOIC θ — 163 — °C/W JA Thermal Resistance, 8L-TSSOP θ — 124 — °C/W JA Thermal Resistance, 14L-PDIP θ — 70 — °C/W JA Thermal Resistance, 14L-SOIC θ — 120 — °C/W JA Thermal Resistance, 14L-TSSOP θ — 100 — °C/W JA Note 1: The industrial temperature devices operate over this extended temperature range, but with reduced performance. In any case, the internal junction temperature (T ) must not exceed the absolute maximum J specification of 150°C. CS t t ON OFF V Hi-Z Amplifier On Hi-Z OUT 50nA (typ.) 1mA (typ.) 50nA (typ.) I SS I CS 10nA (typ.) 10nA (typ.) 10nA (typ.) FIGURE 1-1: Timing diagram for the CS pin on the MCP6023. DS21685B-page 4  2003 Microchip Technology Inc.

MCP6021/2/3/4 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, T =+25°C, V =+2.5Vto+5.5V, V =GND, V =V /2, R =10kΩtoV /2, A DD SS CM DD L DD V ≈V /2 and C =60 pF. OUT DD L 16% 12% nces 14% 1T1A 9=2 + S2a5m°Cples I-PTaermtsp nces 1101%% 1T1A 9=2 - S40a°mCp tloe s+85°C I-PTaermtsp Occura 1102%% Occura 789%%% of 8% of 6% ge 6% ge 5% a a 4% ent 4% ent 3% Perc 2% Perc 12%% 0% 0% 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 8 6 4 2 0 2 4 6 8 0 2 5 4 3 2 1 1 2 3 4 5 1 1 - - - - 1 1 - - - - - - - Input Offset Voltage (µV) Input Offset Voltage Drift (µV/°C) FIGURE 2-1: Input Offset Voltage, FIGURE 2-4: Input Offset Voltage Drift, (Industrial Temperature Parts). (Industrial Temperature Parts). 24% 26% Occurances 1112246802%%%%% 4VVT3ADC 8DM= =S=+ a250m5.V0°pVCles EP-Taermtsp Occurances 1122268024%%%%% EP-Taermtsp 4VT3AC 8M= S=- 4a00mV°pCl etos +125°C ntage of 110268%%%% ntage of 1110248%%%% erce 24%% erce 46%% P P 2% 0% 0% 0 0 0 0 0 0 0 0 0 0 0 0 6 2 8 4 4 8 2 6 0 0 6 2 8 4 0 4 8 2 6 0 2 1 1 - - 1 1 2 2 1 1 - - 1 1 2 - - - - - - Input Offset Voltage (µV) Input Offset Voltage Drift (µV/°C) FIGURE 2-2: Input Offset Voltage, FIGURE 2-5: Input Offset Voltage Drift, (Extended Temperature Parts). (Extended Temperature Parts). 500 500 Offset Voltage (µV) --1234210000000000000 VDD = 2.5V +++-142820555°°°C°CCC Offset Voltage (µV)--1234210000000000000 VDD = 5.5V +++-142820555°°°C°CCC Input --430000 Input --430000 -500 -500 5 0 5 0 5 0 5 0 5 0 5 0 5 0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0. 0. 0. 1. 1. 2. 2. 3. 3. 4. 4. 5. 5. 6. - Common Mode Input Voltage (V) Common Mode Input Voltage (V) FIGURE 2-3: Input Offset Voltage vs. FIGURE 2-6: Input Offset Voltage vs. Common Mode Input Voltage with V = 2.5V. Common Mode Input Voltage with V = 5.5V. DD DD  2003 Microchip Technology Inc. DS21685B-page 5

MCP6021/2/3/4 Note: Unless otherwise indicated, T =+25°C, V =+2.5Vto+5.5V, V =GND, V =V /2, R =10kΩtoV /2, A DD SS CM DD L DD V ≈V /2 and C =60 pF. OUT DD L 100 200 V = V /2 Offset Voltage (µV) --11-555000000 Offset Voltage (µV) 11-550500000 CM VVDDDDDD == 52..55VV Input --225000 VVDCDM == 50.V0V Input --115000 -300 -200 -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Ambient Temperature (°C) Output Voltage (V) FIGURE 2-7: Input Offset Voltage vs. FIGURE 2-10: Input Offset Voltage vs. Temperature. Output Voltage. 1,000 16 Density Density 1124 fV =DD 1 = k 5H.z0V Noise Voltage (nV/Hz)(cid:151) 11000 Noise Voltage (nV/Hz)(cid:151)14680 Input Input 02 1 01.E.-011 11.E+00 11.E+001 110.E+020 11.E+k03 110.E+04k 101.E+050k 11.EM+06 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Frequency (Hz) Common Mode Input Voltage (V) FIGURE 2-8: Input Noise Voltage Density FIGURE 2-11: Input Noise Voltage Density vs. Frequency. vs. Common Mode Input Voltage. 100 110 PSRR+ 90 105 PSRR- B) 80 B) 100 CMRR d d R ( 70 R ( 95 R R PS 60 CM 90 R, 50 CMRR R, 85 PSRR (VCM = 0V) R R CM 40 PS 80 30 75 70 20 101.E+002 11.E+k03 11.0E+04k 101.E+005k 11M.E+06 -50 -25 0 25 50 75 100 125 Frequency (Hz) Ambient Temperature (°C) FIGURE 2-9: Common Mode, Power FIGURE 2-12: Common Mode, Power Supply Rejection Ratios vs. Frequency. Supply Rejection Ratios vs. Temperature. DS21685B-page 6  2003 Microchip Technology Inc.

MCP6021/2/3/4 Note: Unless otherwise indicated, T =+25°C, V =+2.5Vto+5.5V, V =GND, V =V /2, R =10kΩtoV /2, A DD SS CM DD L DD V ≈V /2 and C =60 pF. OUT DD L A) 10,000 A) 10,000 urrents (p 1,000 VDD = 5.5V IIOBS,, TTAA == ++112255°°CC urrents (p 1,000 VVCDMD == 5V.D5DV C C set 100 IB, TA = +85°C set 100 IB Off Off Bias, 10 IOS, TA = +85°C Bias, 10 IOS ut ut p p n 1 n 1 I I 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 25 35 45 55 65 75 85 95 105115125 Common Mode Input Voltage (V) Ambient Temperature (°C) FIGURE 2-13: Input Bias, Offset Currents FIGURE 2-16: Input Bias, Offset Currents vs. Common Mode Input Voltage. vs. Temperature. 1.2 1.2 1.1 1.1 V = 5.5V Quiescent Current (mA/amplifier) 000000001.........234567890 +++-41820255°5°°CCC°C Quiescent Current (mA/amplifier)000000001.........234567890 DD VDD = 2.5V 0.1 0.1 VCM = VDD - 0.5V 0.0 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -50 -25 0 25 50 75 100 125 Power Supply Voltage (V) Ambient Temperature (°C) FIGURE 2-14: Quiescent Current vs. FIGURE 2-17: Quiescent Current vs. Supply Voltage. Temperature. 35 120 0 nt 110 -15 utput Short Circuit Curre(mA) 11223505050 +++1-82245550°°°°CCCC Open-Loop Gain (dB) 1123456789000000000000 Gain Phase -----------1111119764386532005050050505 Open-Loop Phase (°) O 0 -10 -195 -20 -210 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 11.E+00 11.E+001 101.E+020 11.E+k03 11.0E+04k101.E+005k 11.EM+06 101.E+07M101.0E+08M Supply Voltage (V) Frequency (Hz) FIGURE 2-15: Output Short-Circuit Current FIGURE 2-18: Open-Loop Gain, Phase vs. vs. Supply Voltage. Frequency.  2003 Microchip Technology Inc. DS21685B-page 7

MCP6021/2/3/4 Note: Unless otherwise indicated, T =+25°C, V =+2.5Vto+5.5V, V =GND, V =V /2, R =10kΩtoV /2, A DD SS CM DD L DD V ≈V /2 and C =60 pF. OUT DD L 130 120 ain (dB) 120 VDD = 5.5V Gain (dB) 111105 VDD = 5.5V oop G 110 VDD = 2.5V Loop 105 n-L 100 en- 100 VDD = 2.5V e p p O C O 90 DC 95 D 90 80 101.E+020 11.E+k03 110.E+04k 101.E0+05k -50 -25 0 25 50 75 100 125 Load Resistance ((cid:58)) Ambient Temperature (°C) FIGURE 2-19: DC Open-Loop Gain vs. FIGURE 2-22: DC Open-Loop Gain vs. Load Resistance. Temperature. 120 14 105 DC Open-Loop Gain (dB) 117890100000 VCM = VDD/2 VDD = 5V.5DVD = 2.5V Gain Bandwidth Product (MHz)11246802 VGDaD i=n 5B.a0nVdwPidhtahs eP rMoadrugcint, G = +1 134679505050 Phase Margin, G = +1 (°) 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0 0 Output Voltage Headroom (V); 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VDD - VOH or VOL - VSS Common Mode Input Voltage (V) FIGURE 2-20: Small Signal DC Open-Loop FIGURE 2-23: Gain Bandwidth Product, Gain vs. Output Voltage Headroom. Phase Margin vs. Common Mode Input Voltage. 10 100 14 105 duct 89 8900 1 (°) duct 12 Gain Bandwidth Product 90 1 (°) width ProMHz) 567 GBWP, VDD = 5.5V 567000 gin, G = + width ProMHz) 180 Phase Margin, G = +1 6705 gin, G = + Gain Band( 1234 GPPMMB,,W P , VVVDDDDDD === 252...555VVV 12340000 Phase Mar Gain Band( 246 VVDD == 5V.0V/2 134505 Phase Mar CM DD 0 0 0 0 -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Ambient Temperature (°C) Output Voltage (V) FIGURE 2-21: Gain Bandwidth Product, FIGURE 2-24: Gain Bandwidth Product, Phase Margin vs. Temperature. Phase Margin vs. Output Voltage. DS21685B-page 8  2003 Microchip Technology Inc.

MCP6021/2/3/4 Note: Unless otherwise indicated, T =+25°C, V =+2.5Vto+5.5V, V =GND, V =V /2, R =10kΩtoV /2, A DD SS CM DD L DD V ≈V /2 and C =60 pF. OUT DD L 11 10 10 Falling, VDD = 5.5V e (V/µs) 6789 Rising, VDD = 5.5V put Voltage V)P-P VVDDDD == 25..55VV Slew Rat 2345 FRaislliinngg,, VVDDDD == 22..55VV mum OutSwing ( 1 xi 1 a M 0 0.1 -50 -25 0 25 50 75 100 125 110.E+04k 101.E+005k 11.EM+06 101.E+M07 Ambient Temperature (°C) Frequency (Hz) FIGURE 2-25: Slew Rate vs. Temperature. FIGURE 2-28: Maximum Output Voltage Swing vs. Frequency. 0.1000% 0.1000% f = 1 kHz G = +100 V/V BW = 22 kHz Meas V = 5.0V DD %) 0.0100% G = +100 V/V %) 0.0100% G = +10 V/V N ( N ( + + D G = +10 V/V D TH 0.0010% TH 0.0010% G = +1 V/V f = 20 kHz BW = 80 kHz Meas G = +1 V/V V = 5.0V DD 0.0001% 0.0001% 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Output Voltage (VP-P) Output Voltage (VP-P) FIGURE 2-26: Total Harmonic Distortion FIGURE 2-29: Total Harmonic Distortion plus Noise vs. Output Voltage with f = 1kHz. plus Noise vs. Output Voltage with f = 20kHz. 6 n 135 ut Voltage (V) 345 VOUT VIN VGD =D +=1 5 VV/V hannel Separatio(dB) 111223050 p 2 C ut o 115 ut, O 1 nel t 110 p n In 0 Cha 105 G = +1 V/V -1 11.E+k03 11.0E+04k 101.0E+05k 11M.E+06 0.0E+00 1.0E-05 2.0E-05 3.0E-05 4.0E-05 5.0E-05 6.0E-05 7.0E-05 8.0E-05 9.0E-05 1.0E-04 Time (10 µs/div) Frequency (Hz) FIGURE 2-27: The MCP6021/2/3/4 family FIGURE 2-30: Channel-to-Channel shows no phase reversal under overdrive. Separation vs. Frequency (MCP6022 and MCP6024 only).  2003 Microchip Technology Inc. DS21685B-page 9

MCP6021/2/3/4 Note: Unless otherwise indicated, T =+25°C, V =+2.5Vto+5.5V, V =GND, V =V /2, R =10kΩtoV /2, A DD SS CM DD L DD V ≈V /2 and C =60 pF. OUT DD L 1,000 10 om;V) omV) 9 VOL - VSS om om 8 ge HeadrV-V (OLSS 100 ge HeadrV-V (OLSS 567 VDD - VOH Output VoltaV-V or DDOH 10 VOL - VSS VDD - VOH Output VoltaV-V or DDOH 1234 1 0 0.01 0.1 1 10 -50 -25 0 25 50 75 100 125 Output Current Magnitude (mA) Ambient Temperature (°C) FIGURE 2-31: Output Voltage Headroom FIGURE 2-34: Output Voltage Headroom vs. Output Current. vs. Temperature. 6.E-02 6.E-02 G = +1 V/V G = -1 V/V 5.E-02 5.E-02 div)4.E-02 div) 4.E-02 RF = 1 k(cid:58) V/3.E-02 V/ 3.E-02 m m 0 2.E-02 0 2.E-02 1 1 e (1.E-02 e ( 1.E-02 g0.E+00 g0.E+00 a a olt-1.E-02 olt-1.E-02 ut V-2.E-02 ut V-2.E-02 p-3.E-02 p-3.E-02 Out-4.E-02 Out-4.E-02 -5.E-02 -5.E-02 -6.E-002.E+00 2.E-07 4.E-07 6.E-07 8.E-07 1.E-06 1.E-06 1.E-06 2.E-06 2.E-06 2.E-06 -6.E-002.E+00 2.E-07 4.E-07 6.E-07 8.E-07 1.E-06 1.E-06 1.E-06 2.E-06 2.E-06 2.E-06 Time (200 ns/div) Time (200 ns/div) FIGURE 2-32: Small-Signal Non-inverting FIGURE 2-35: Small-Signal Inverting Pulse Pulse Response. Response. 5.0 5.0 4.5 G = +1 V/V 4.5 G = -1 V/V V) 4.0 V) 4.0 RF = 1 k(cid:58) e ( 3.5 e ( 3.5 ag 3.0 ag 3.0 Volt 2.5 Volt 2.5 ut 2.0 ut 2.0 p p ut 1.5 ut 1.5 O O 1.0 1.0 0.5 0.5 0.0 0.0 0.E+00 5.E-07 1.E-06 2.E-06 2.E-06 3.E-06 3.E-06 4.E-06 4.E-06 5.E-06 5.E-06 0.E+00 5.E-07 1.E-06 2.E-06 2.E-06 3.E-06 3.E-06 4.E-06 4.E-06 5.E-06 5.E-06 Time (500 ns/div) Time (500 ns/div) FIGURE 2-33: Large-Signal Non-inverting FIGURE 2-36: Large-Signal Inverting Pulse Pulse Response. Response. DS21685B-page 10  2003 Microchip Technology Inc.

MCP6021/2/3/4 Note: Unless otherwise indicated, T =+25°C, V =+2.5Vto+5.5V, V =GND, V =V /2, R =10kΩtoV /2, A DD SS CM DD L DD V ≈V /2 and C =60 pF. OUT DD L mV) 4500 mV) 4500 Representative Part V/2 (DD 2300 V/2 (DD 2300 uracy; V-REF --1210000 uracy; V-REF --1210000 VVDDDD == 52..55VV Acc -30 Acc -30 V REF --5400 V REF --5400 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -50 -25 0 25 50 75 100 125 Power Supply Voltage (V) Ambient Temperature (°C) FIGURE 2-37: V Accuracy vs. Supply FIGURE 2-40: V Accuracy vs. REF REF Voltage (MCP6021 and MCP6023 only). Temperature (MCP6021 and MCP6023 only). 1.6 1.6 Op Amp Op Amp Op Amp Op Amp 1.4 turns on here shuts off here 1.4 turns on here shuts off here nt 1.2 nt 1.2 Quiescent Curre(mA/amplifier) 0001....4680 VGD =ChD iS=+g 1hs2 w.Vt5o/eVV plotw HyClsotSwe rs etwos iehspigth Quiescent Curre(mA/amplifier) 0001....4680 VGD =D Ch=+i 1Sg5 .Vhs5 /wVtVoe plotw HyClsoStwe srtewos ehispigth 0.2 VIN = 1.25V 0.2 VIN = 2.75V 0.0 0.0 0.0 0.5 1.0 1.5 2.0 2.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Chip Select Voltage (V) Chip Select Voltage (V) FIGURE 2-38: Chip Select (CS) Hysteresis FIGURE 2-41: Chip Select (CS) Hysteresis (MCP6023 only) with V = 2.5V. (MCP6023 only) with V = 5.5V. DD DD 5.5 5.0 VDD = 5.0V 4.5 CS Voltage G = +1 V/V ge,V) 4.0 VIN = VSS oltage ( 3.5 ct Volta 23..50 VOUT eV Chip SelOutput 112...050 Ouotnput Output High-Z Ouotnput 0.5 0.0 -0.5 0.0E+00 5.0E-06 1.0E-05 1.5E-05 2.0E-05 2.5E-05 3.0E-05 3.5E-05 Time (5 µs/div) FIGURE 2-39: Chip Select (CS) to Amplifier Output Response Time (MCP6023 only).  2003 Microchip Technology Inc. DS21685B-page 11

MCP6021/2/3/4 3.0 APPLICATIONS INFORMATION 3.3 MCP6023 Chip Select (CS) The MCP6021/2/3/4 family of operational amplifiers The MCP6023 is a single amplifier with chip select are fabricated on Microchip’s state-of-the-art CMOS (CS). When CS is high, the supply current is less than process. They are unity-gain stable and suitable for a 10nA (typ) and travels from the CS pin to VSS, with the wide range of general-purpose applications. amplifier output being put into a high-impedance state. When CS is low, the amplifier is enabled. If CS is left 3.1 Rail-to-Rail Input floating, the amplifier will not operate properly. Figure1-1 and Figure2-39 show the output voltage The MCP6021/2/3/4 amplifier family is designed to not and supply current response to a CS pulse. exhibit phase inversion when the input pins exceed the supply voltages. Figure2-27 shows an input voltage 3.4 MCP6021 and MCP6023 Reference exceeding both supplies with no resulting phase Voltage inversion. The single op amps (MCP6021 and MCP6023) have The input stage of the MCP6021/2/3/4 family of devices uses two differential input stages in parallel; one an internal mid-supply reference voltage connected to operates at low common-mode input voltage (V ), the VREF pin (see Figure3-2). The MCP6021 has CS CM while the other operates at high V . With this topology, internally tied to VSS, which always keeps the op amp CM on and always provides a mid-supply reference. With the device operates with V up to 0.3V past either CM the MCP6023, taking the CS pin high conserves power supply rail (V - 0.3V to V + 0.3V) at 25°C. The SS DD by shutting down both the op amp and the V amplifier input behaves linearly as long as VCM is kept REF within the specified V limits. The input offset voltage circuitry. Taking the CS pin low turns on the op amp and CMR is measured at both V =V - 0.3V and V + 0.3V VREF circuitry. CM SS DD to ensure proper operation. Input voltages that exceed the input voltage range VDD (V ) can cause excessive current to flow in or out of CMR the input pins. Current beyond ±2mA introduces 50kΩ possible reliability problems. Thus, applications that exceed this rating must externally limit the input current V with an input resistor (R ), as shown in Figure3-1. REF IN 50kΩ CS MCP602X V R OUT IN V SS V IN (CS tied internally to V for MCP6021) SS RIN ≥ (Maximum ex2pemcAted VIN) - VDD FciIrGcuUitR (EM 3C-P26:021 anSd iMmCplPifi6e0d2 i3n toenrnlya)l. VREF V - (Minimum expected V ) See Figure3-3 for a non-inverting gain circuit using the RIN ≥ SS 2mA IN internal mid-supply reference. The DC-blocking capacitor (C ) also reduces noise by coupling the op B FIGURE 3-1: R limits the current flow amp input to the source. IN into an input pin. R R G F 3.2 Rail-to-Rail Output The Maximum Output Voltage Swing is the maximum swing possible under a particular output load. VOUT According to the specification table, the output can CB VREF reach within 20mV of either supply rail when V IN R =10kΩ. See Figure2-31 and Figure2-34 for more L information concerning typical performance. FIGURE 3-3: Non-inverting gain circuit using V (MCP6021 and MCP6023 only). REF DS21685B-page 12  2003 Microchip Technology Inc.

MCP6021/2/3/4 To use the internal mid-supply reference for an inverting gain circuit, connect the VREF pin to the non- 1,000 inverting input, as shown in Figure3-4. The capacitor )(cid:58) GN (cid:116) +1 CB helps reduce power supply noise on the output. (O S RI d RG RF de 100 n e VIN VOUT mm o c e R 10 V REF 10 100 1,000 10,000 Normalized Capacitance; C/G (pF) L N C B FIGURE 3-6: Recommended R values ISO for capacitive loads. FIGURE 3-4: Inverting gain circuit using After selecting R for your circuit, double-check the ISO V (MCP6021 and MCP6023 only). resulting frequency response peaking and step REF response overshoot. Evaluation on the bench and If you don’t need the mid-supply reference, leave the simulations with the MCP6021/2/3/4 Spice macro V pin open. REF model are very helpful. Modify R ’s value until the ISO response is reasonable. 3.5 Capacitive Loads 3.6 Supply Bypass Driving large capacitive loads can cause stability problems for voltage feedback op amps. As the load With this family of operational amplifiers, the power capacitance increases, the feedback loop’s phase supply pin (V for single supply) should have a local DD margin decreases, and the closed loop bandwidth is bypass capacitor (i.e., 0.01µF to 0.1µF) within 2mm reduced. This produces gain-peaking in the frequency for good, high-frequency performance. It also needs a response, with overshoot and ringing in the step bulk capacitor (i.e., 1µF or larger) within 100mm to response. provide large, slow currents. This bulk capacitor can be When driving large capacitive loads with these op shared with other parts. amps (e.g., > 60pF when G = +1), a small series resistor at the output (RISO in Figure3-5) improves the 3.7 PCB Surface Leakage feedback loop’s phase margin (stability) by making the load resistive at higher frequencies. The bandwidth will In applications where low input bias current is critical, be generally lower than the bandwidth with no PCB (printed circuit board) surface-leakage effects capacitive load. need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance V between nearby traces is 1012Ω. A 5V difference would IN R ISO cause 5pA of current to flow, which is greater than the MCP602X VOUT MCP6021/2/3/4 family’s bias current at 25°C (1pA, typ). C L The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. FIGURE 3-5: Output resistor R ISO An example of this type of layout is shown in Figure3-7. stabilizes large capacitive loads. Figure3-6 gives recommended RISO values for Guard Ring VIN– VIN+ different capacitive laods and gains. The x-axis is the normalized load capacitance (C /G ), where G is the L N N circuit’s noise gain. For non-inverting gains, G and the N gain are equal. For inverting gains, G is 1+|Gain| (e.g., N -1V/V gives G = +2V/V). N FIGURE 3-7: Example guard ring layout.  2003 Microchip Technology Inc. DS21685B-page 13

MCP6021/2/3/4 1. Inverting (Figure3-7) and Transimpedance 3.9 Typical Applications Gain Amplifiers (convert current to voltage, such as photo detectors). 3.9.1 A/D CONVERTER DRIVER AND ANTI-ALIASING FILTER a. Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring Figure3-8 shows a third-order Butterworth filter that to the same reference voltage as the op can be used as an A/D converter driver. It has a band- amp’s input (e.g., VDD/2 or ground). width of 20kHz and a reasonable step response. It will b. Connect the inverting pin (V –) to the input work well for conversion rates of 80ksps and greater (it IN with a wire that does not touch the PCB has 29dB attenuation at 60kHz). surface. 2. Non-inverting Gain and Unity-Gain Buffer 1.0nF a. Connect the guard ring to the inverting input 8.45kΩ 14.7kΩ 33.2kΩ MCP602X pin (V –); this biases the guard ring to the IN common mode input voltage. 1.2nF 100pF b. Connect the non-inverting pin (V +) to the IN input with a wire that does not touch the PCB surface. FIGURE 3-8: A/D converter driver and anti-aliasing filter with a 20kHz cutoff frequency. 3.8 High-Speed PCB Layout This filter can easily be adjusted to another bandwidth Due to their speed capabilities, a little extra care in the by multiplying all capacitors by the same factor. PCB (Printed Circuit Board) layout can make a Alternatively, the resistors can all be scaled by another significant difference in the performance of these op common factor to adjust the bandwidth. amps. Good PC board layout techniques will help you achieve the performance shown in the Electrical 3.9.2 OPTICAL DETECTOR AMPLIFIER Characteristics and Typical Performance Curves, while Figure3-9 shows the MCP6021 op amp used as a also helping you minimize EMC (Electro-Magnetic transimpedance amplifier in a photo detector circuit. Compatibility) issues. The photo detector looks like a capacitive current Use a solid ground plane and connect the bypass local source, so the 100kΩ resistor gains the input signal to capacitor(s) to this plane with minimal length traces. a reasonable level. The 5.6pF capacitor stabilizes this This cuts down inductive and capacitive crosstalk. circuit and produces a flat frequency response with a Separate digital from analog, low-speed from high- bandwidth of 370kHz. speed and low power from high power. This will reduce interference. 5.6pF Photo Keep sensitive traces short and straight. Separating Detector them from interfering components and traces. This is 100kΩ especially important for high-frequency (low rise-time) signals. 100pF Sometimes it helps to place guard traces next to victim traces. They should be on both sides of the victim MCP6021 trace, and as close as possible. Connect the guard trace to ground plane at both ends, and in the middle V /2 for long traces. DD Use coax cables (or low inductance wiring) to route signal and power to and from the PCB. FIGURE 3-9: Transimpedance amplifier for an optical detector. DS21685B-page 14  2003 Microchip Technology Inc.

MCP6021/2/3/4 4.0 DESIGN TOOLS Microchip provides the basic design tools needed for the MCP6021/2/3/4 family of op amps. 4.1 SPICE Macro Model The latest SPICE macro model for the MCP6021/2/3/4 op amps is available on our web site (www.microchip.com). This model is intended as an initial design tool that works well in the op amp’s linear region of operation at room temperature. See the model file for information on its capabilities. Bench testing is a very important part of any design and cannot be replaced with simulations. Also, simulation results using this macro model need to be validated by comparing them to the data sheet specs and plots. 4.2 FilterLab® Software The FilterLab® software is an innovative tool that simplifies analog active filter (using op amps) design. Available at no cost from our web site (at www.micro- chip.com), the FilterLab software active filter design tool provides full schematic diagrams of the filter circuit with component values. It also outputs the filter circuit in SPICE format, which can be used with the Macro Model to simulate actual filter performance.  2003 Microchip Technology Inc. DS21685B-page 15

MCP6021/2/3/4 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 8-Lead PDIP (300 mil) Example: XXXXXXXX MCP6021 XXXXXNNN I/P256 YYWW 0331 8-Lead SOIC (150 mil) Example: XXXXXXXX MCP6021 XXXXYYWW I/SN0331 NNN 256 8-Lead TSSOP Example: XXXX 6021 YWW E331 NNN 256 Legend: XX...X Customer specific information* Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * Standard device marking consists of Microchip part number, year code, week code, and traceability code. DS21685B-page 16  2003 Microchip Technology Inc.

MCP6021/2/3/4 Package Marking Information (Continued) 14-Lead PDIP (300 mil) (MCP6024) Example: XXXXXXXXXXXXXX MCP6024-I/P XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN 0331256 14-Lead SOIC (150 mil) (MCP6024) Example: XXXXXXXXXX MCP6024ISL XXXXXXXXXX XXXXXXXXXX YYWWNNN 0331256 14-Lead TSSOP (MCP6024) Example: XXXXXX 6024E YYWW 0331 NNN 256  2003 Microchip Technology Inc. DS21685B-page 17

MCP6021/2/3/4 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) E1 D 2 n 1 α E A A2 L c A1 β B1 p eB B Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 8 8 Pitch p .100 2.54 Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32 Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68 Base to Seating Plane A1 .015 0.38 Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26 Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60 Overall Length D .360 .373 .385 9.14 9.46 9.78 Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43 Lead Thickness c .008 .012 .015 0.20 0.29 0.38 Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78 Lower Lead Width B .014 .018 .022 0.36 0.46 0.56 Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92 Mold Draft Angle Top α 5 10 15 5 10 15 Mold Draft Angle Bottom β 5 10 15 5 10 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 DS21685B-page 18  2003 Microchip Technology Inc.

MCP6021/2/3/4 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC) E E1 p D 2 B n 1 h α 45° c A A2 φ β L A1 Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 8 8 Pitch p .050 1.27 Overall Height A .053 .061 .069 1.35 1.55 1.75 Molded Package Thickness A2 .052 .056 .061 1.32 1.42 1.55 Standoff § A1 .004 .007 .010 0.10 0.18 0.25 Overall Width E .228 .237 .244 5.79 6.02 6.20 Molded Package Width E1 .146 .154 .157 3.71 3.91 3.99 Overall Length D .189 .193 .197 4.80 4.90 5.00 Chamfer Distance h .010 .015 .020 0.25 0.38 0.51 Foot Length L .019 .025 .030 0.48 0.62 0.76 Foot Angle φ 0 4 8 0 4 8 Lead Thickness c .008 .009 .010 0.20 0.23 0.25 Lead Width B .013 .017 .020 0.33 0.42 0.51 Mold Draft Angle Top α 0 12 15 0 12 15 Mold Draft Angle Bottom β 0 12 15 0 12 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057  2003 Microchip Technology Inc. DS21685B-page 19

MCP6021/2/3/4 8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP) E E1 p D 2 1 n B α A c φ A1 A2 β L Units INCHES MILLIMETERS* Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 8 8 Pitch p .026 0.65 Overall Height A .043 1.10 Molded Package Thickness A2 .033 .035 .037 0.85 0.90 0.95 Standoff § A1 .002 .004 .006 0.05 0.10 0.15 Overall Width E .246 .251 .256 6.25 6.38 6.50 Molded Package Width E1 .169 .173 .177 4.30 4.40 4.50 Molded Package Length D .114 .118 .122 2.90 3.00 3.10 Foot Length L .020 .024 .028 0.50 0.60 0.70 Foot Angle φ 0 4 8 0 4 8 Lead Thickness c .004 .006 .008 0.09 0.15 0.20 Lead Width B .007 .010 .012 0.19 0.25 0.30 Mold Draft Angle Top α 0 5 10 0 5 10 Mold Draft Angle Bottom β 0 5 10 0 5 10 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005” (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-086 DS21685B-page 20  2003 Microchip Technology Inc.

MCP6021/2/3/4 14-Lead Plastic Dual In-line (P) – 300 mil (PDIP) E1 D 2 n 1 α E A A2 c L A1 β B1 eB B p Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 14 14 Pitch p .100 2.54 Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32 Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68 Base to Seating Plane A1 .015 0.38 Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26 Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60 Overall Length D .740 .750 .760 18.80 19.05 19.30 Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43 Lead Thickness c .008 .012 .015 0.20 0.29 0.38 Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78 Lower Lead Width B .014 .018 .022 0.36 0.46 0.56 Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92 Mold Draft Angle Top α 5 10 15 5 10 15 Mold Draft Angle Bottom β 5 10 15 5 10 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-005  2003 Microchip Technology Inc. DS21685B-page 21

MCP6021/2/3/4 14-Lead Plastic Small Outline (SL) – Narrow, 150 mil (SOIC) E E1 p D 2 B n 1 α h 45° c A A2 φ A1 L β Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 14 14 Pitch p .050 1.27 Overall Height A .053 .061 .069 1.35 1.55 1.75 Molded Package Thickness A2 .052 .056 .061 1.32 1.42 1.55 Standoff § A1 .004 .007 .010 0.10 0.18 0.25 Overall Width E .228 .236 .244 5.79 5.99 6.20 Molded Package Width E1 .150 .154 .157 3.81 3.90 3.99 Overall Length D .337 .342 .347 8.56 8.69 8.81 Chamfer Distance h .010 .015 .020 0.25 0.38 0.51 Foot Length L .016 .033 .050 0.41 0.84 1.27 Foot Angle φ 0 4 8 0 4 8 Lead Thickness c .008 .009 .010 0.20 0.23 0.25 Lead Width B .014 .017 .020 0.36 0.42 0.51 Mold Draft Angle Top α 0 12 15 0 12 15 Mold Draft Angle Bottom β 0 12 15 0 12 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-065 DS21685B-page 22  2003 Microchip Technology Inc.

MCP6021/2/3/4 14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP) E E1 p D 2 n 1 B α A c φ β A1 A2 L Units INCHES MILLIMETERS* Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 14 14 Pitch p .026 0.65 Overall Height A .043 1.10 Molded Package Thickness A2 .033 .035 .037 0.85 0.90 0.95 Standoff § A1 .002 .004 .006 0.05 0.10 0.15 Overall Width E .246 .251 .256 6.25 6.38 6.50 Molded Package Width E1 .169 .173 .177 4.30 4.40 4.50 Molded Package Length D .193 .197 .201 4.90 5.00 5.10 Foot Length L .020 .024 .028 0.50 0.60 0.70 Foot Angle φ 0 4 8 0 4 8 Lead Thickness c .004 .006 .008 0.09 0.15 0.20 Lead Width B .007 .010 .012 0.19 0.25 0.30 Mold Draft Angle Top α 0 5 10 0 5 10 Mold Draft Angle Bottom β 0 5 10 0 5 10 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005” (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-087  2003 Microchip Technology Inc. DS21685B-page 23

MCP6021/2/3/4 NOTES: DS21685B-page 24  2003 Microchip Technology Inc.

MCP6021/2/3/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X /XX Examples: a) MCP6021-I/P: Industrial temperature, Device Temperature Package PDIP package. Range b) MCP6021-E/P: Extended temperature, PDIP package. c) MCP6021-E/SN: Extended temperature, SOIC package. Device: MCP6021 CMOS Single Op Amp MCP6021T CMOS Single Op Amp a) MCP6022-I/P: Industrial temperature, (Tape and Reel for SOIC, TSSOP) PDIP package. MCP6022 CMOS Dual Op Amp b) MCP6022-E/P: Extended temperature, MCP6022T CMOS Dual Op Amp PDIP package. (Tape and Reel for SOIC and TSSOP) MCP6023 CMOS Single Op Amp w/ CS Function c) MCP6022T-E/ST: Tape and Reel, MCP6023T CMOS Single Op Amp w/ CS Function Extended temperature, (Tape and Reel for SOIC and TSSOP) TSSOP package. MCP6024 CMOS Quad Op Amp a) MCP6023-I/P: Industrial temperature, MCP6024T CMOS Quad Op Amp PDIP package. (Tape and Reel for SOIC and TSSOP) b) MCP6023-E/P: Extended temperature, PDIP package. Temperature Range: I = -40°C to +85°C c) MCP6023-E/SN: Extended temperature, E = -40×C to +125×C SOIC package. a) MCP6024-I/SL: Industrial temperature, Package: P = Plastic DIP (300 mil Body), 8-lead, 14-lead SOIC package. SN = Plastic SOIC (150mil Body), 8-lead b) MCP6024-E/SL: Extended temperature, SL = Plastic SOIC (150 mil Body), 14-lead SOIC package. ST = Plastic TSSOP, 8-lead, 14-lead c) MCP6024T-E/ST: Tape and Reel, Extended temperature, TSSOP package. Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. Your local Microchip sales office 2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 3. The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  2003 Microchip Technology Inc. DS21685B-page 25

MCP6021/2/3/4 NOTES: DS21685B-page 26  2003 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is intended through suggestion only The Microchip name and logo, the Microchip logo, Accuron, and may be superseded by updates. It is your responsibility to dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PRO MATE and PowerSmart are registered trademarks of No representation or warranty is given and no liability is Microchip Technology Incorporated in the U.S.A. and other assumed by Microchip Technology Incorporated with respect countries. to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER, use or otherwise. Use of Microchip’s products as critical com- SEEVAL and The Embedded Control Solutions Company are ponents in life support systems is not authorized except with registered trademarks of Microchip Technology Incorporated express written approval by Microchip. No licenses are con- in the U.S.A. veyed, implicitly or otherwise, under any intellectual property Application Maestro, dsPICDEM, dsPICDEM.net, ECAN, rights. ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select Mode, SmartSensor, SmartShunt, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2003, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company’s quality system processes and procedures are QS-9000 compliant for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified.  2003 Microchip Technology Inc. DS21685B-page 27

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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: M icrochip: MCP6023-I/SN MCP6023-I/ST MCP6023-E/SN MCP6023-E/ST MCP6024-I/ST MCP6024-I/SL MCP6022-I/P MCP6023T-E/SN MCP6022T-E/ST MCP6024T-E/ST MCP6021T-E/SN MCP6022T-E/SN MCP6024T-E/SL MCP6021T-E/ST MCP6023T-E/ST MCP6022T-I/SN MCP6023T-I/ST MCP6024T-I/SL MCP6021T-I/SN MCP6021T- I/ST MCP6024T-I/ST MCP6022T-I/ST MCP6023T-I/SN MCP6021-I/ST MCP6021-I/SN MCP6021-E/P MCP6024- E/ST MCP6022-E/SN MCP6022-E/ST MCP6023-E/P MCP6024-I/P MCP6021-E/SN MCP6021-E/ST MCP6021-I/P MCP6023-I/P MCP6024-E/P MCP6022-I/SN MCP6022-I/ST MCP6022-E/P MCP6024-E/SL