MCP1827/MCP1827S 1.5A, Low Voltage, Low Quiescent Current LDO Regulator Features Description • 1.5A Output Current Capability The MCP1827/MCP1827S is a 1.5A Low Dropout • Input Operating Voltage Range: 2.3V to 6.0V (LDO) linear regulator that provides high current and low output voltages. The MCP1827 comes in a fixed or • Adjustable Output Voltage Range: 0.8V to 5.0V adjustable output voltage version, with an output (MCP1827 only) voltage range of 0.8V to 5.0V. The 1.5A output current • Standard Fixed Output Voltages: capability, combined with the low output voltage - 0.8V, 1.2V, 1.8V, 2.5V, 3.0V, 3.3V, 5.0V capability, make the MCP1827 a good choice for new • Other Fixed Output Voltage Options Available sub-1.8V output voltage LDO applications that have Upon Request high current demands. The MCP1827S is a 3-pin fixed • Low Dropout Voltage: 330mV Typical at 1.5A voltage version. The MCP1827/MCP1827S is based upon the MCP1727 LDO device. • Typical Output Voltage Tolerance: 0.5% • Stable with 1.0µF Ceramic Output Capacitor The MCP1827/MCP1827S is stable using ceramic output capacitors that inherently provide lower output • Fast response to Load Transients noise and reduce the size and cost of the entire • Low Supply Current: 120µA (typ) regulator solution. Only 1µF of output capacitance is • Low Shutdown Supply Current: 0.1µA (typ) needed to stabilize the LDO. (MCP1827 only) Using CMOS construction, the quiescent current • Fixed Delay on Power Good Output consumed by the MCP1827/MCP1827S is typically (MCP1827 only) less than 120µA over the entire input voltage range, • Short Circuit Current Limiting and making it attractive for portable computing applications Overtemperature Protection that demand high output current. The MCP1827 • 5-Lead Plastic DDPAK, 5-Lead TO-220 Package versions have a Shutdown (SHDN) pin. When shut Options (MCP1827) down, the quiescent current is reduced to less than • 3-Lead Plastic DDPAK, 3-Lead TO-220 Package 0.1µA. Options (MCP1827S) On the MCP1827 fixed output versions the scaled- down output voltage is internally monitored and a Applications power good (PWRGD) output is provided when the output is within 92% of regulation (typical). The • High-Speed Driver Chipset Power PWRGD delay is internally fixed at 200µs (typical). • Networking Backplane Cards The overtemperature and short circuit current-limiting • Notebook Computers provide additional protection for the LDO during system • Network Interface Cards fault conditions. • Palmtop Computers • 2.5V to 1.XV Regulators Package Types 5-LD DDPAK 5-LD TO-220 Fixed/Adjustable 3-LD DDPAK 3-LD TO-220 MCP1827 MCP1827S MCP1827S MCP1827 1 2 3 1 2 3 4 5 SHDNVINGND(TAB)VOUTPWRGD SHDN1VIN2D(TAB)3VOUT4ADJ5 VIN GND(TAB) VOUT V1IN D(TAB)2 V3OUT N N G G © 2006 Microchip Technology Inc. DS22001B-page 1

MCP1827/MCP1827S Typical Application MCP1827 Fixed Output Voltage PWRGD R 1 On 100kΩ Off SHDN 1 2 3 4 5 VIN = 2.3V to 2.8V VIN VOUT VOUT = 1.8V @ 1A GND C 1 C 4.7µF 2 1µF MCP1827 Adjustable Output Voltage VADJ R 2 20kΩ R 1 On 40kΩ Off SHDN 1 2 3 4 5 VIN = 2.3V to 2.8V VIN VOUT VOUT = 1.2V @ 1A GND C 1 C 4.7µF 2 1µF DS22001B-page 2 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S Functional Block Diagram - Adjustable Output PMOS V V IN OUT Undervoltage Lock Out (UVLO) I SNS Cf Rf SHDN ADJ + Driver w/limit and SHDN EA Overtemperature – Sensing SHDN V REF VIN SHDN Reference Soft-Start Comp T DELAY GND 92% of V REF © 2006 Microchip Technology Inc. DS22001B-page 3

MCP1827/MCP1827S Functional Block Diagram - Fixed Output (5 pin) PMOS VIN VOUT Undervoltage Sense Lock Out (UVLO) I SNS Cf Rf SHDN + Driver w/limit and SHDN EA Overtemperature – Sensing SHDN V REF VIN SHDN Reference Soft-Start PWRGD Comp T DELAY GND 92% of V REF DS22001B-page 4 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S Functional Block Diagram - Fixed Output (3-Pin) PMOS VIN VOUT Undervoltage Sense Lock Out (UVLO) I SNS Cf Rf SHDN + Driver w/limit and SHDN EA Overtemperature – Sensing SHDN V REF V IN SHDN Reference Soft-Start Comp T DELAY GND 92% of V REF © 2006 Microchip Technology Inc. DS22001B-page 5

MCP1827/MCP1827S 1.0 ELECTRICAL † Notice: Stresses above those listed under “Maximum Rat- ings” may cause permanent damage to the device. This is a CHARACTERISTICS stress rating only and functional operation of the device at those or any other conditions above those indicated in the Absolute Maximum Ratings † operational listings of this specification is not implied. Expo- sure to maximum rating conditions for extended periods may VIN....................................................................................6.5V affect device reliability. Maximum Voltage on Any Pin..(GND – 0.3V) to (V + 0.3)V DD Maximum Power Dissipation.........Internally-Limited (Note6) Output Short Circuit Duration................................Continuous Storage temperature.....................................-65°C to +150°C Maximum Junction Temperature, T ...........................+150°C J ESD protection on all pins (HBM/MM)........... ≥ 2kV; ≥ 200V AC/DC CHARACTERISTICS Electrical Specifications: Unless otherwise noted, V = V + V Note1, V =1.8V for Adjustable Output, IN OUT(MAX) DROPOUT(MAX) R I = 1mA, C = C = 4.7µF (X7R Ceramic), T = +25°C. Boldface type applies for junction temperatures, T (Note7) of - OUT IN OUT A J 40°C to +125°C Parameters Sym Min Typ Max Units Conditions Input Operating Voltage V 2.3 6.0 V Note1 IN Input Quiescent Current I — 120 220 µA I = 0mA, V = Note1, q L IN V = 0.8V to 5.0V OUT Input Quiescent Current for I — 0.1 3 µA SHDN = GND SHDN SHDN Mode Maximum Output Current I 1.5 — — A V = 2.3V to 6.0V OUT IN V = 0.8V to 5.0V, Note1 R Line Regulation ΔV / — 0.05 0.16 %/V (Note1) ≤ V ≤ 6V OUT IN (V x ΔV ) OUT IN Load Regulation ΔV /V -1.0 ±0.5 1.0 % I = 1mA to 1.5A, OUT OUT OUT V = Note1, (Note4) IN Output Short Circuit Current I — 2.2 — A V = Note1, R <0.1Ω, OUT_SC IN LOAD Peak Current Adjust Pin Characteristics (Adjustable Output Only) Adjust Pin Reference Voltage V 0.402 0.410 0.418 V V = 2.3V to V =6.0V, ADJ IN IN I = 1mA OUT Adjust Pin Leakage Current I -10 ±0.01 +10 nA V = 6.0V, V =0Vto6V ADJ IN ADJ Adjust Temperature Coefficient TCV — 40 — ppm/°C Note3 OUT Fixed-Output Characteristics (Fixed Output Only) Note 1: The minimum V must meet two conditions: V ≥ 2.3V and V ≥ V + V IN IN IN OUT(MAX) DROPOUT(MAX). 2: V is the nominal regulator output voltage for the fixed cases. V = 1.2V, 1.8V, etc. V is the desired set point output R R R voltage for the adjustable cases. V = V ((R /R )+1). Figure4-1. R ADJ* 1 2 3: TCV = (V – V ) *106 / (V * ΔTemperature). V is the highest voltage measured over the OUT OUT-HIGH OUT-LOW R OUT-HIGH temperature range. V is the lowest voltage measured over the temperature range. OUT-LOW 4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested over a load range from 1mA to the maximum specified output current. 5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value that was measured with an input voltage of V V + V . IN = OUTMAX DROPOUT(MAX) 6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e., T , T , θ ). Exceeding the maximum allowable power A J JA dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction temperatures above 150°C can impact device reliability. 7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. The test time is small enough such that the rise in the junction temperature over the ambient temperature is not significant. DS22001B-page 6 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S AC/DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise noted, V = V + V Note1, V =1.8V for Adjustable Output, IN OUT(MAX) DROPOUT(MAX) R I = 1mA, C = C = 4.7µF (X7R Ceramic), T = +25°C. Boldface type applies for junction temperatures, T (Note7) of - OUT IN OUT A J 40°C to +125°C Parameters Sym Min Typ Max Units Conditions Voltage Regulation V V - 2.5% V V + 2.5% V Note2 OUT R R R ±0.5% Dropout Characteristics Dropout Voltage V -V — 330 600 mV Note5, I = 1.5A, IN OUT OUT V =2.3V IN(MIN) Power Good Characteristics PWRGD Input Voltage Operat- V 1.0 — 6.0 V T = +25°C PWRGD_VIN A ing Range 1.2 — 6.0 T = -40°C to +125°C A For V < 2.3V, I =100µA IN SINK PWRGD Threshold Voltage V %V Falling Edge PWRGD_TH OUT (Referenced to V ) OUT 89 92 95 V < 2.5V Fixed, V = Adj. OUT OUT 90 92 94 V >= 2.5V Fixed OUT PWRGD Threshold Hysteresis V 1.0 2.0 3.0 %V PWRGD_HYS OUT PWRGD Output Voltage Low V — 0.2 0.4 V I = 1.2mA, PWRGD_L PWRGDSINK ADJ = 0V PWRGD Leakage P _ — 1 — nA V = V = 6.0V WRGD LK PWRGD IN PWRGD Time Delay T — 200 — µs Rising Edge PG R = 10kΩ PULLUP Detect Threshold to PWRGD T — 200 — µs V or V = V + VDET-PWRGD ADJ OUT PWRGD_TH Active Time Delay 20mV to V - 20mV PWRGD_TH Shutdown Input Logic High Input V 45 %V V = 2.3V to 6.0V SHDN-HIGH IN IN Logic Low Input V 15 %V V = 2.3V to 6.0V SHDN-LOW IN IN SHDN Input Leakage Current SHDN -0.1 ±0.001 +0.1 µA V =6V, SHDN =V , ILK IN IN SHDN = GND AC Performance Output Delay From SHDN T 100 µs SHDN = GND to V OR IN V = GND to 95% V OUT R Output Noise e — 2.0 — µV/√Hz I = 200mA, f = 1kHz, C N OUT OUT = 10µF (X7R Ceramic), V = OUT 2.5V Note 1: The minimum V must meet two conditions: V ≥ 2.3V and V ≥ V + V IN IN IN OUT(MAX) DROPOUT(MAX). 2: V is the nominal regulator output voltage for the fixed cases. V = 1.2V, 1.8V, etc. V is the desired set point output R R R voltage for the adjustable cases. V = V ((R /R )+1). Figure4-1. R ADJ* 1 2 3: TCV = (V – V ) *106 / (V * ΔTemperature). V is the highest voltage measured over the OUT OUT-HIGH OUT-LOW R OUT-HIGH temperature range. V is the lowest voltage measured over the temperature range. OUT-LOW 4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested over a load range from 1mA to the maximum specified output current. 5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value that was measured with an input voltage of V V + V . IN = OUTMAX DROPOUT(MAX) 6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e., T , T , θ ). Exceeding the maximum allowable power A J JA dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction temperatures above 150°C can impact device reliability. 7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. The test time is small enough such that the rise in the junction temperature over the ambient temperature is not significant. © 2006 Microchip Technology Inc. DS22001B-page 7

MCP1827/MCP1827S AC/DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise noted, V = V + V Note1, V =1.8V for Adjustable Output, IN OUT(MAX) DROPOUT(MAX) R I = 1mA, C = C = 4.7µF (X7R Ceramic), T = +25°C. Boldface type applies for junction temperatures, T (Note7) of - OUT IN OUT A J 40°C to +125°C Parameters Sym Min Typ Max Units Conditions Power Supply Ripple Rejection PSRR — 60 — dB f = 100Hz, C = 10µF, OUT Ratio I = 10mA, OUT V = 30mV pk-pk, INAC C = 0µF IN Thermal Shutdown Temperature T — 150 — °C I = 100µA, V = 1.8V, SD OUT OUT V = 2.8V IN Thermal Shutdown Hysteresis ΔT — 10 — °C I = 100µA, V = 1.8V, SD OUT OUT V = 2.8V IN Note 1: The minimum V must meet two conditions: V ≥ 2.3V and V ≥ V + V IN IN IN OUT(MAX) DROPOUT(MAX). 2: V is the nominal regulator output voltage for the fixed cases. V = 1.2V, 1.8V, etc. V is the desired set point output R R R voltage for the adjustable cases. V = V ((R /R )+1). Figure4-1. R ADJ* 1 2 3: TCV = (V – V ) *106 / (V * ΔTemperature). V is the highest voltage measured over the OUT OUT-HIGH OUT-LOW R OUT-HIGH temperature range. V is the lowest voltage measured over the temperature range. OUT-LOW 4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested over a load range from 1mA to the maximum specified output current. 5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value that was measured with an input voltage of V V + V . IN = OUTMAX DROPOUT(MAX) 6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e., T , T , θ ). Exceeding the maximum allowable power A J JA dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction temperatures above 150°C can impact device reliability. 7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. The test time is small enough such that the rise in the junction temperature over the ambient temperature is not significant. TEMPERATURE SPECIFICATIONS Electrical Specifications: Unless otherwise indicated, all limits apply for V = 2.3V to 6.0V. IN Parameters Sym Min Typ Max Units Conditions Temperature Ranges Operating Junction Temperature Range T -40 — +125 °C Steady State J Maximum Junction Temperature T — — +150 °C Transient J Storage Temperature Range T -65 — +150 °C A Thermal Package Resistances Thermal Resistance, 5LD DDPAK θ — 31.2 — °C/W 4-Layer JC51 Standard Board JA Thermal Resistance, 3LD DDPAK θ — 31.4 — °C/W 4-Layer JC51 Standard Board JA Thermal Resistance, 5LD TO-220 θ — 29.3 — °C/W 4-Layer JC51 Standard Board JA Thermal Resistance, 3LD TO-220 θ — 29.4 — °C/W 4-Layer JC51 Standard Board JA DS22001B-page 8 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. NOTE: Unless otherwise indicated, V = V + 0.6V, I = 1mA and T = +25°C. IN OUT OUT A 150 0.1 0.09 VOUT= 1.2V adj nt Current (μA) 111234000 1329050°°°CCC gulation (%/V) 00000.....0000045678 IOUT = 100 mAIOUT = 1 mAIOUT = 1000 mA VIN = 2.3V to 6.0V ce 110 Re 0.03 IOUT = 500 mA Quies 100 -45°C VIOOUUTT = = 0 1 m.2AV Adj Line 00..0012 90 0 2 3 4 5 6 -45 -20 5 30 55 80 105 130 Input Voltage (V) Temperature (°C) FIGURE 2-1: Quiescent Current vs. Input FIGURE 2-4: Line Regulation vs. Voltage (1.2V Adjustable). Temperature (1.2V Adjustable). 200 0.15 Ground Current (µA) 111111111123456789000000000 VIN=3.3V VIN=2.3V VIVN=O5U.T0 =V 1.2V Adj Load Regulation (%) --00000.....1000105050 VOUTV =OU 5T. 0=V 0.8VVOUT = 3.3V IOUT =V 1O.U0T m= A1. 8toV 1500 mA 100 -0.15 0 250 500 750 1000 1250 1500 -45 -20 5 30 55 80 105 130 Load Current (mA) Temperature (°C) FIGURE 2-2: Ground Current vs. Load FIGURE 2-5: Load Regulation vs. Current (1.2V Adjustable). Temperature (Adjstable Version). 140 0.411 IOUT = 0 mA nt Current (μA) 111111223350505 VIN=5.0V VOUT = 1.2VVI NA=d2j.5V Pin Voltage (V) 000...444011900 VIVNV I=NIN =6 = .20 5.V3.0VV Quiesce 110150 VIN=4.0V Adjust 0.409 IOUT = 1.0 mA 100 0.408 -45 -20 5 30 55 80 105 130 -45 -20 5 30 55 80 105 130 Temperature (°C) Temperature (°C) FIGURE 2-3: Quiescent Current vs. FIGURE 2-6: Adjust Pin Voltage vs. Junction Temperature (1.2V Adjustable). Temperature. © 2006 Microchip Technology Inc. DS22001B-page 9

MCP1827/MCP1827S NOTE: Unless otherwise indicated, V = V + 0.6V, I = 1mA and T = +25°C. IN OUT OUT A 0.35 150 ut Voltage (V) 0000....12235050 VOUT = V5O.0UVT =A d2.j5V Adj nt Current (μA) 111112340000 VIOOUUTT = = 0 0 m.8AV +-++148235550°°°°CCCC Dropo 00..0150 uiesce 10900 Q 0.00 80 0 250 500 750 1000 1250 1500 2 3 4 5 6 Load Current (mA) Input Voltage (V) FIGURE 2-7: Dropout Voltage vs. Load FIGURE 2-10: Quiescent Current vs. Input Current (Adjustable Version). Voltage (0.8V Fixed). 0.42 150 IOUT = 1.5A VOUT = 2.5V Voltage (V) 000...334680 VOUT = 5.0V Adj Current (μA) 111234000 IOUT = 0 mA +++1293050°°°CCC Dropout 00..3324 VOUT = 2.5V Adj VOUT = 3.3V Adj uiescent 11019000 -45°C Q 0.30 80 -45 -20 5 30 55 80 105 130 3 3.5 4 4.5 5 5.5 6 Temperature (°C) Input Voltage (V) FIGURE 2-8: Dropout Voltage vs. FIGURE 2-11: Quiescent Current vs. Input Temperature (Adjustable Version). Voltage (2.5V Fixed). 370 250.00 ower Good Time Delay (µs) 333333123456000000 VVIINN V== IN35 ..=90 VV4.5V VOUT = 3.3V Fixed Ground Current (μA) 11205050000....00000000 VOUT=0.8VVOUVVTI=INN2 ==.5 23V..31VV ffoorr VVRR==02..85VV P 300 0.00 -45 -20 5 30 55 80 105 130 0 250 500 750 1000 1250 1500 Temperature (°C) Load Current (mA) FIGURE 2-9: Power Good (PWRGD) FIGURE 2-12: Ground Current vs. Load Time Delay vs. Temperature (Adjustable Current. Version). DS22001B-page 10 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S NOTE: Unless otherwise indicated, V = V + 0.6V, I = 1mA and T = +25°C. IN OUT OUT A 130 0.045 ent (μA) 112205 IOUT = 0 mA n (%/V) 00..003450 IOUT = 1 mA V I N = 3 .V1R t =o 26..50VV Quiescent Curr 111100110505 VOUT = 0.8V Line Regulatio 000...000223050 IOUT =I O1U0T0 =0 1m0A0 mA IOUT = 500 mA VOUT = 2.5V IOUT = 1500 mA 95 0.015 -45 -20 5 30 55 80 105 130 -45 -20 5 30 55 80 105 130 Temperature (°C) Temperature (°C) FIGURE 2-13: Quiescent Current vs. FIGURE 2-16: Line Regulation vs. Temperature. Temperature (2.5V Fixed). 0.30 0.25 VR = 0.8V %) 00..2300 VOUT = 0.8V VIN= 2.3V hdn (μA) 00..1250 VVIINN == 46..00VV gulation ( 00..0100 Is 0.10 VIN = 2.3V d Re -0.10 IOUT = 1 mA to 1500 mA 0.05 oa -0.20 L 0.00 -0.30 -45 -20 5 30 55 80 105 130 -45 -20 5 30 55 80 105 130 Temperature (°C) Temperature (°C) FIGURE 2-14: I vs. Temperature. FIGURE 2-17: Load Regulation vs. SHDN Temperature (V < 2.5V Fixed). OUT 0.10 0.00 -0.05 IOUT = 1 mA to 1500 mA Regulation (%/V) 000...000468 IOUT = 500mIOAUT = 1A IOUITO =UT 1 =0 01 mmAA Regulation (%) -----00000.....3221105050 VVOOUUTT == 52..05VV Line 0.02 VVOINU =T =2 .03.V8 Vto 6.0V Load --00..4305 0.00 -0.45 -45 -20 5 30 55 80 105 130 -45 -20 5 30 55 80 105 130 Temperature (°C) Temperature (°C) FIGURE 2-15: Line Regulation vs. FIGURE 2-18: Load Regulation vs. Temperature (0.8V Fixed). Temperature (V ≥ 2.5V Fixed). OUT © 2006 Microchip Technology Inc. DS22001B-page 11

MCP1827/MCP1827S NOTE: Unless otherwise indicated, V = V + 0.6V, I = 1mA and T = +25°C. IN OUT OUT A 0.40 10.000 Temperature = 25°C V) 00..3305 VOUT = 2.5V VR=0.8V, VIN=2.3V COUT=C1I N(cid:541)=F1 0c e(cid:541)rFa mceicra Xm7iRc Voltage ( 00..2205 VOUT = 5.0V mV/Hz)(cid:165) 1.000 VR=3.3V, VIN=4.1V IOUT=200 mA opout 00..1105 Noise ( 0.100 Dr 0.05 0.00 0.010 0 250 500 750 1000 1250 1500 0.01 0.1 1 10 100 1000 Load Current (mA) Frequency (kHz) FIGURE 2-19: Dropout Voltage vs. Load FIGURE 2-22: Output Noise Voltage Current. Density vs. Frequency. 0.45 0 IOUT = 1.5A -10 e (V) 0.40 -20 ag B) -30 out Volt 0.35 VOUT = 5.0V SRR (d --5400 VCRO=UT1=.21V0 AμFd jceramic X7R Drop 0.30 VOUT = 2.5V P --7600 VCIOIIUNNT===301. 1μ0V FmA 0.25 -80 -45 -20 5 30 55 80 105 130 0.01 0.1 1 10 100 1000 Temperature (°C) Frequency (kHz) FIGURE 2-20: Dropout Voltage vs. FIGURE 2-23: Power Supply Ripple Temperature. Rejection (PSRR) vs. Frequency (V = 1.2V OUT Adj.). 0 3.00 nt (A) 2.50 --2100 urre 2.00 dB)-30 uit C 1.50 RR (-40 VR=1.2V Adj ort Circ 01..5000 VOUT = 2.5V PS--6500 CVCIOINNU==T30=. 21μ2VF μF ceramic X7R Sh Temperature = 25°C -70 IOUT=10 mA 0.00 -80 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0.01 0.1 1 10 100 1000 Input Voltage (V) Frequency (kHz) FIGURE 2-21: Short Circuit Current vs. FIGURE 2-24: Power Supply Ripple Input Voltage. Rejection (PSRR) vs. Frequency (V = 1.2V OUT Adj.). DS22001B-page 12 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S NOTE: Unless otherwise indicated, V = V + 0.6V, I = 1mA and T = +25°C. IN OUT OUT A 0 -10 -20 B)-30 d RR (-40 VR=3.3V Fixed PS--6500 CVIONU=T3=.190V μF ceramic X7R CIN=0 μF -70 IOUT=10 mA -80 0.01 0.1 1 10 100 1000 Frequency (kHz) FIGURE 2-25: Power Supply Ripple FIGURE 2-28: 2.5V (Adj.) Startup from Rejection (PSRR) vs. Frequency (V = 3.3V Shutdown. OUT Fixed). 0 -10 -20 B)-30 d R (-40 R VR=3.3V Fixed PS-50 COUT=22 μF ceramic X7R -60 VIN=3.9V CIN=0 μF -70 IOUT=10 mA -80 0.01 0.1 1 10 100 1000 Frequency (kHz) FIGURE 2-26: Power Supply Ripple FIGURE 2-29: Power Good (PWRGD) Rejection (PSRR) vs. Frequency (V = 3.3V Timing. OUT Fixed). FIGURE 2-27: 2.5V (Adj.) Startup from V . FIGURE 2-30: Dynamic Line Response IN (3.3V Fixed). © 2006 Microchip Technology Inc. DS22001B-page 13

MCP1827/MCP1827S NOTE: Unless otherwise indicated, V = V + 0.6V, I = 1mA and T = +25°C. IN OUT OUT A FIGURE 2-31: Dynamic Load Response FIGURE 2-32: Dynamic Load Response (3.3V Fixed, 10mA to 1500mA). (3.3V Fixed, 100mA to 1500mA). DS22001B-page 14 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S 3.0 PIN DESCRIPTION The descriptions of the pins are listed in Table3-1. TABLE 3-1: PIN FUNCTION TABLE 3-Pin Fixed 5-Pin Fixed Adjustable Name Description Output Output Output — 1 1 SHDN Shutdown Control Input (active-low) 1 2 2 V Input Voltage Supply IN 2 3 3 GND Ground 3 4 4 V Regulated Output Voltage OUT — 5 — PWRGD Power Good Output — — 5 ADJ Voltage Adjust/Sense Input Pad Pad Pad EP Exposed Pad of the Package (ground potential) 3.1 Input Voltage Supply (V ) 3.4 Power Good Output (PWRGD) IN Connect the unregulated or regulated input voltage The PWRGD output is an open-drain output used to source to V . If the input voltage source is located indicate when the LDO output voltage is within 92% IN several inches away from the LDO, or the input source (typically) of its nominal regulation value. The PWRGD is a battery, it is recommended that an input capacitor threshold has a typical hysteresis value of 2%. The be used. A typical input capacitance value of 1µF to PWRGD output is delayed by 200µs (typical) from the 10µF should be sufficient for most applications. time the LDO output is within 92% + 3% (max hysteresis) of the regulated output value on power-up. 3.2 Shutdown Control Input (SHDN) This delay time is internally fixed. The SHDN input is used to turn the LDO output voltage 3.5 Output Voltage Adjust Input (ADJ) on and off. When the SHDN input is at a logic-high level, the LDO output voltage is enabled. When the For adjustable applications, the output voltage is SHDN input is pulled to a logic-low level, the LDO connected to the ADJ input through a resistor divider output voltage is disabled. When the SHDN input is that sets the output voltage regulation value. This pulled low, the PWRGD output also goes low and the provides the user the capability to set the output LDO enters a low quiescent current shutdown state voltage to any value they desire within the 0.8V to 5.0V where the typical quiescent current is 0.1µA. range of the device. 3.3 Ground (GND) 3.6 Regulated Output Voltage (V ) OUT Connect the GND pin of the LDO to a quiet circuit The V pin is the regulated output voltage of the OUT ground. This will help the LDO power supply rejection LDO. A minimum output capacitance of 1.0µF is ratio and noise performance. The ground pin of the required for LDO stability. The MCP1827/MCP1827S is LDO only conducts the quiescent current of the LDO stable with ceramic, tantalum and aluminum-electro- (typically 120µA), so a heavy trace is not required. lytic capacitors. See Section4.3 “Output Capacitor” For applications have switching or noisy inputs tie the for output capacitor selection guidance. GND pin to the return of the output capacitor. Ground 3.7 Exposed Pad (EP) planes help lower inductance and voltage spikes caused by fast transient load currents and are The DDPAK and TO-220 package have an exposed tab recommended for applications that are subjected to on the package. A heat sink may be mount to the tab to fast load transients. aid in the removal of heat from the package during operation. The exposed tab is at the ground potential of the LDO. © 2006 Microchip Technology Inc. DS22001B-page 15

MCP1827/MCP1827S 4.0 DEVICE OVERVIEW EQUATION 4-2: V –V The MCP1827/MCP1827S is a high output current, R = R ⎛----O----U----T------------A----D---J-⎞ 1 2⎝ V ⎠ Low Dropout (LDO) voltage regulator. The low dropout ADJ Where: voltage of 330mV typical at 1.5A of current makes it ideal for battery-powered applications. Unlike other V = LDO Output Voltage OUT high output current LDOs, the MCP1827/MCP1827S V = ADJ Pin Voltage ADJ only draws a maximum of 220µA of quiescent current. (typically 0.41V) The MCP1827 has a shutdown control input and a power good output. 4.2 Output Current and Current 4.1 LDO Output Voltage Limiting The 5-pin MCP1827 LDO is available with either a fixed The MCP1827/MCP1827S LDO is tested and ensured output voltage or an adjustable output voltage. The to supply a minimum of 1.5A of output current. The output voltage range is 0.8V to 5.0V for both versions. MCP1827/MCP1827S has no minimum output load, so The 3-pin MCP1827S LDO is available as a fixed the output load current can go to 0mA and the LDO will voltage device. continue to regulate the output voltage to within tolerance. 4.1.1 ADJUST INPUT The MCP1827/MCP1827S also incorporates an output The adjustable version of the MCP1827 uses the ADJ current limit. If the output voltage falls below 0.7V due pin (pin 5) to get the output voltage feedback for output to an overload condition (usually represents a shorted voltage regulation. This allows the user to set the load condition), the output current is limited to 2.2A output voltage of the device with two external resistors. (typical). If the overload condition is a soft overload, the The nominal voltage for ADJ is 0.41V. MCP1827/MCP1827S will supply higher load currents Figure4-1 shows the adjustable version of the of up to 3A. The MCP1827/MCP1827S should not be MCP1827. Resistors R and R form the resistor operated in this condition continuously as it may result 1 2 divider network necessary to set the output voltage. in failure of the device. However, this does allow for With this configuration, the equation for setting V is: device usage in applications that have higher pulsed OUT load currents having an average output current value of EQUATION 4-1: 1.5A or less. R +R Output overload conditions may also result in an over- VOUT = VADJ⎝⎛----1---R----------2-⎠⎞ temperature shutdown of the device. If the junction Where: 2 temperature rises above 150°C, the LDO will shut down the output voltage. See Section4.8 “Overtem- VOUT = LDO Output Voltage perature Protection” for more information on V = ADJ Pin Voltage overtemperature shutdown. ADJ (typically 0.41V) 4.3 Output Capacitor The MCP1827/MCP1827S requires a minimum output MCP1827-ADJ capacitance of 1µF for output voltage stability. Ceramic VOUT capacitors are recommended because of their size, Off On 1 2 3 4 5 R1 C2 cost and environmental robustness qualities. SHDN ADJ 1µF Aluminum-electrolytic and tantalum capacitors can be used on the LDO output as well. The Equivalent Series VIN Resistance (ESR) of the electrolytic output capacitor 4C.71µF GND R2 must be no greater than 1 ohm. The output capacitor should be located as close to the LDO output as is practical. Ceramic materials X7R and X5R have low temperature coefficients and are well within the FIGURE 4-1: Typical adjustable output acceptable ESR range required. A typical 1µF X7R voltage application circuit. 0805 capacitor has an ESR of 50 milli-ohms. The allowable resistance value range for resistor R2 is Larger LDO output capacitors can be used with the from 10kΩ to 200kΩ. Solving the equation for R1 MCP1827/MCP1827S to improve dynamic yields the following equation: performance and power supply ripple rejection performance. A maximum of 22µF is recommended. Aluminum-electrolytic capacitors are not recom- mended for low-temperature applications of < -25°C. DS22001B-page 16 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S 4.4 Input Capacitor Low input source impedance is necessary for the LDO VPWRGD_TH output to operate properly. When operating from batteries, or in applications with long lead length (> 10 inches) between the input source and the LDO, VOUT TPG some input capacitance is recommended. A minimum of 1.0µF to 4.7µF is recommended for most applications. VOH TVDET_PWRGD For applications that have output step load requirements, the input capacitance of the LDO is very PWRGD important. The input capacitance provides the LDO with a good local low-impedance source to pull the VOL transient currents from in order to respond quickly to the output load step. For good step response performance, the input capacitor should be of equivalent (or higher) value than the output capacitor. FIGURE 4-2: Power Good Timing. The capacitor should be placed as close to the input of the LDO as is practical. Larger input capacitors will also help reduce any high-frequency noise on the input and output of the LDO and reduce the effects of any VIN TOR inductance that exists between the input source voltage and the input capacitance of the LDO. 70µs 30 µs 4.5 Power Good Output (PWRGD) SHDN TPG The PWRGD output is used to indicate when the output voltage of the LDO is within 92% (typical value, see Section1.0 “Electrical Characteristics” for Minimum and Maximum specifications) of its nominal regulation value. VOUT As the output voltage of the LDO rises, the PWRGD output will be held low until the output voltage has exceeded the power good threshold plus the hysteresis value. Once this threshold has been exceeded, the PWRGD power good time delay is started (shown as T in the PG Electrical Characteristics table). The power good time delay is fixed at 200µs (typical). After the time delay FIGURE 4-3: Power Good Timing from period, the PWRGD output will go high, indicating that Shutdown. the output voltage is stable and within regulation limits. If the output voltage of the LDO falls below the power 4.6 Shutdown Input (SHDN) good threshold, the power good output will transition low. The power good circuitry has a 170µs delay when The SHDN input is an active-low input signal that turns detecting a falling output voltage, which helps to the LDO on and off. The SHDN threshold is a increase noise immunity of the power good output and percentage of the input voltage. The typical value of avoid false triggering of the power good output during this shutdown threshold is 30% of V , with minimum IN fast output transients. See Figure4-2 for power good and maximum limits over the entire operating timing characteristics. temperature range of 45% and 15%, respectively. When the LDO is put into Shutdown mode using the The SHDN input will ignore low-going pulses (pulses SHDN input, the power good output is pulled low meant to shut down the LDO) that are up to 400ns in immediately, indicating that the output voltage will be pulse width. If the shutdown input is pulled low for more out of regulation. The timing diagram for the power than 400ns, the LDO will enter Shutdown mode. This good output when using the shutdown input is shown in small bit of filtering helps to reject any system noise Figure4-3. spikes on the shutdown input signal. The power good output is an open-drain output that can On the rising edge of the SHDN input, the shutdown be pulled up to any voltage that is equal to or less than circuitry has a 30µs delay before allowing the LDO the LDO input voltage. This output is capable of sinking output to turn on. This delay helps to reject any false 1.2mA (V < 0.4V maximum). turn-on signals or noise on the SHDN input signal. After PWRGD © 2006 Microchip Technology Inc. DS22001B-page 17

MCP1827/MCP1827S the 30µs delay, the LDO output enters its soft-start 4.8 Overtemperature Protection period as it rises from 0V to its final regulation value. If the SHDN input signal is pulled low during the 30µs The MCP1827/MCP1827S LDO has temperature- delay period, the timer will be reset and the delay time sensing circuitry to prevent the junction temperature will start over again on the next rising edge of the from exceeding approximately 150°C. If the LDO SHDN input. The total time from the SHDN input going junction temperature does reach 150°C, the LDO high (turn-on) to the LDO output being in regulation is output will be turned off until the junction temperature typically 100µs. See Figure4-4 for a timing diagram of cools to approximately 140°C, at which point the LDO the SHDN input. output will automatically resume normal operation. If the internal power dissipation continues to be excessive, the device will again shut off. The junction TOR temperature of the die is a function of power 400ns (typ) dissipation, ambient temperature and package thermal 70µs 30µs resistance. See Section5.0 “Application Circuits/ Issues” for more information on LDO power SHDN dissipation and junction temperature. VOUT FIGURE 4-4: Shutdown Input Timing Diagram. 4.7 Dropout Voltage and Undervoltage Lockout Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below the nominal value that was measured with a V + 0.6V differential applied. The MCP1827/ R MCP1827S LDO has a very low dropout voltage specification of 330mV (typical) at 1.5A of output current. See Section1.0 “Electrical Characteristics” for maximum dropout voltage specifications. The MCP1827/MCP1827S LDO operates across an input voltage range of 2.3V to 6.0V and incorporates input Undervoltage Lockout (UVLO) circuitry that keeps the LDO output voltage off until the input voltage reaches a minimum of 2.18V (typical) on the rising edge of the input voltage. As the input voltage falls, the LDO output will remain on until the input voltage level reaches 2.04V (typical). Since the MCP1827/MCP1827S LDO undervoltage lockout activates at 2.04V as the input voltage is falling, the dropout voltage specification does not apply for output voltages that are less than 1.9V. For high-current applications, voltage drops across the PCB traces must be taken into account. The trace resistances can cause significant voltage drops between the input voltage source and the LDO. For applications with input voltages near 2.3V, these PCB trace voltage drops can sometimes lower the input voltage enough to trigger a shutdown due to undervoltage lockout. DS22001B-page 18 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S 5.0 APPLICATION CIRCUITS/ In addition to the LDO pass element power dissipation, ISSUES there is power dissipation within the MCP1827/ MCP1827S as a result of quiescent or ground current. The power dissipation as a result of the ground current 5.1 Typical Application can be calculated using the following equation: The MCP1827/MCP1827S is used for applications that EQUATION 5-2: require high LDO output current and a power good output. P = V ×I I(GND) IN(MAX) VIN Where: VOUT = 2.5V @ 1.5A P = Power dissipation due to the MCP1827-2.5 I(GND On R1 quiescent current of the LDO Off SHDN 1 2 3 4 5 10kΩ 1C02µF VIN(MAX) = Maximum input voltage I = Current flowing in the V pin VIN VIN IN 3.3V with no LDO output current C1 (LDO quiescent current) 4.7µF GND PWRGD The total power dissipated within the MCP1827/ MCP1827S is the sum of the power dissipated in the FIGURE 5-1: Typical Application Circuit. LDO pass device and the P(I ) term. Because of the GND CMOS construction, the typical I for the MCP1827/ GND 5.1.1 APPLICATION CONDITIONS MCP1827S is 120µA. Operating at a maximum of 3.465V results in a power dissipation of 0.49milli- Package Type = TO-220-5 Watts. For most applications, this is small compared to Input Voltage Range = 3.3V ± 5% the LDO pass device power dissipation and can be VIN maximum = 3.465V neglected. VIN minimum = 3.135V The maximum continuous operating junction V = 0.550V temperature specified for the MCP1827/MCP1827S is DROPOUT (max) V (typical) = 2.5V +125°C. To estimate the internal junction temperature OUT of the MCP1827/MCP1827S, the total internal power I = 1.5A maximum OUT dissipation is multiplied by the thermal resistance from PDISS (typical) = 1.2W junction to ambient (RθJA) of the device. The thermal Temperature Rise = 35.2°C resistance from junction to ambient for the TO-220-5 package is estimated at 29.3°C/W. 5.2 Power Calculations EQUATION 5-3: 5.2.1 POWER DISSIPATION T = P ×Rθ +T J(MAX) TOTAL JA AMAX The internal power dissipation within the MCP1827/ T = Maximum continuous junction MCP1827S is a function of input voltage, output J(MAX) temperature voltage, output current and quiescent current. Equation5-1 can be used to calculate the internal P = Total device power dissipation TOTAL power dissipation for the LDO. Rθ = Thermal resistance from junction to JA ambient EQUATION 5-1: T = Maximum ambient temperature AMAX P = (V –V )×I LDO IN(MAX)) OUT(MIN) OUT(MAX)) Where: P = LDO Pass device internal LDO power dissipation V = Maximum input voltage IN(MAX) V = LDO minimum output voltage OUT(MIN) © 2006 Microchip Technology Inc. DS22001B-page 19

MCP1827/MCP1827S The maximum power dissipation capability for a 5.3 Typical Application package can be calculated given the junction-to- ambient thermal resistance and the maximum ambient Internal power dissipation, junction temperature rise, temperature for the application. Equation5-4 can be junction temperature and maximum power dissipation used to determine the package maximum internal is calculated in the following example. The power power dissipation. dissipation as a result of ground current is small enough to be neglected. EQUATION 5-4: 5.3.1 POWER DISSIPATION EXAMPLE (T –T ) P = ------J---(--M----A---X---)------------A---(--M----A---X---)--- D(MAX) Rθ Package JA Package Type = TO-220-5 P = Maximum device power dissipation D(MAX) Input Voltage T = maximum continuous junction J(MAX) V = 3.3V ± 5% temperature IN LDO Output Voltage and Current T = maximum ambient temperature A(MAX) V = 2.5V Rθ = Thermal resistance from junction to OUT JA I = 1.5A ambient OUT Maximum Ambient Temperature T = 60°C EQUATION 5-5: A(MAX) Internal Power Dissipation T = P ×Rθ J(RISE) D(MAX) JA P = (V – V ) x I LDO(MAX) IN(MAX) OUT(MIN) OUT(MAX) TJ(RISE) = Rise in device junction temperature PLDO = ((3.3V x 1.05) – (2.5V x 0.975)) over the ambient temperature x 1.5A PD(MAX) = Maximum device power dissipation PLDO = 1.54 Watts Rθ = Thermal resistance from junction to JA 5.3.1.1 Device Junction Temperature Rise ambient The internal junction temperature rise is a function of internal power dissipation and the thermal resistance EQUATION 5-6: from junction-to-ambient for the application. The thermal resistance from junction-to-ambient (Rθ ) is T = T +T JA J J(RISE) A derived from EIA/JEDEC standards for measuring thermal resistance. The EIA/JEDEC specification is T = Junction temperature J JESD51. The standard describes the test method and TJ(RISE) = Rise in device junction temperature board specifications for measuring the thermal over the ambient temperature resistance from junction to ambient. The actual thermal T = Ambient temperature resistance for a particular application can vary A depending on many factors such as copper area and thickness. Refer to AN792, “A Method to Determine How Much Power a SOT23 Can Dissipate in an Appli- cation” (DS00792), for more information regarding this subject. T = P x Rθ J(RISE) TOTAL JA TJRISE = 1.54 W x 29.3° C/W TJRISE = 45.12°C DS22001B-page 20 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S 5.3.1.2 Junction Temperature Estimate To estimate the internal junction temperature, the calculated temperature rise is added to the ambient or offset temperature. For this example, the worst-case junction temperature is estimated below: T = T + T J JRISE A(MAX) T = 45.12°C + 60.0°C J T = 105.12°C J As you can see from the result, this application will be operating within the maximum operating junction temperature of 125°C. 5.3.1.3 Maximum Package Power Dissipation at 60°C Ambient Temperature TO-220-5 (29.3° C/W Rθ ): JA P = (125°C – 60°C) / 29.3° C/W D(MAX) P = 2.218W D(MAX) DDPAK-5 (31.2°C/Watt Rθ ): JA P = (125°C – 60°C)/ 31.2° C/W D(MAX) P = 2.083W D(MAX) From this table you can see the difference in maximum allowable power dissipation between the TO-220-5 package and the DDPAK-5 package. © 2006 Microchip Technology Inc. DS22001B-page 21

MCP1827/MCP1827S 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 3-Lead DDPAK (MCP1827S) Example: XXXXXXXXX MCP1827S XXXXXXXXX 0.8EEB^e^3 YYWWNNN 0630256 1 2 3 1 2 3 3-Lead TO-220 (MCP1827S) Example: XXXXXXXXX MCP1827S XXXXXXXXX ADJAB^e^3 YYWWNNN 0630256 1 2 3 1 2 3 5-Lead DDPAK (Fixed) (MCP1827) Example: XXXXXXXXX MCP1827 XXXXXXXXX 1.0EET^e^3 YYWWNNN 0630256 1 2 3 4 5 1 2 3 4 5 5-Lead TO-220 (Adj) (MCP1827) Example: XXXXXXXXX MCP1827 XXXXXXXXX 08EAT^e^3 YYWWNNN 0630256 1 2 3 4 5 1 2 3 4 5 Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e3 Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. DS22001B-page 22 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S 3-Lead Plastic (EB) DDPAK Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E L3 E1 D2 D D1 1 b e BOTTOM VIEW TOP VIEW α b1 (5X) A c2 φ A1 c L Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins 3 3 Pitch e 1.00 BSC 2.54 BSC Overall Height A .170 .177 .183 4.32 4.50 4.65 Standoff § A1 .000 .005 .010 0.00 0.13 0.25 Overall Width E .385 .398 .410 9.78 10.11 10.41 Exposed Pad Width E1 .256 REF 6.50 REF Molded Package Length D .330 .350 .370 8.38 8.89 9.40 Overall Length D1 .549 .577 .605 13.94 14.66 15.37 Exposed Pad Length D2 .303 REF 7.70 REF Lead Thickness c .014 .020 .026 0.36 0.51 0.66 Pad Thickness c2 .045 -- .055 1.14 -- 1.40 Lower Lead Width b .026 .032 .037 0.66 0.81 0.94 Upper Lead Width b1 .049 .050 .051 1.24 1.27 1.30 Foot Length L .068 -- .110 1.73 -- 2.79 Pad Length L3 .045 -- .067 1.14 -- 1.70 Foot Angle φ -- -- 8° -- -- 8° Mold Draft Angle α 3° -- 7° 3° -- 7° * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. BSC: Basic Dimension. Theoretically, exact value shown without tolerances. See ASME Y14.5M REF: Reference Dimension, usually without tolerance, for information purposes only. See ASME Y14.5M JEDEC equivalent: TO-252 Revised 07-19-05 Drawing No. C04-011 © 2006 Microchip Technology Inc. DS22001B-page 23

MCP1827/MCP1827S 3-Lead Plastic Transistor Outline (AB) (TO-220) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E A E/2 φP A1 E1 E3 Q H1 D3 D4 α D2 D 5X D1 L1 BOTTOM: VARIANT A BOTTOM: VARIANT B L b2 PIN 1 PIN n b e c A2 e1 Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 3 3 Pitch e .100 BSC 2.54 BSC Overall Pin Pitch e1 .200 BSC 5.08 BSC Overall Height A .140 - .190 3.56 - 4.83 Tab Thickness A1 .020 - .055 0.51 - 1.40 Base to Lead A2 .080 - .120 2.03 - 3.05 Overall Width E .380 - .420 9.65 - 10.67 Exposed Tab Width E1 .270 - .350 6.86 - 8.89 – (SEE BOTTOM VARIANT B) E3 .251 .256 .261 6.38 6.50 6.63 Hole Center to Tab Edge Q .100 - .120 2.54 - 3.05 Overall Length D .560 - .650 14.22 - 16.51 Molded Package Length D1 .330 - .361 8.38 - 9.17 Exposed Tab Length D2 .480 - .507 12.19 - 12.88 – (SEE BOTTOM VARIANT B) D3 .243 .248 .253 6.17 6.30 6.43 – (SEE BOTTOM VARIANT B) D4 .303 .308 .313 7.70 7.82 7.95 Tab Length H1 .230 - .270 5.84 - 6.86 Mounting Hole Diameter φP .139 - .156 3.53 - 3.96 Lead Length L .500 - .580 12.70 - 14.73 Lead Shoulder L1 - - .250 2.10 - 6.35 Foot Angle α 0 - 8° 0 - 8° Lead Thickness c .012 - .024 0.30 - 0.61 Lead Width b .015 .027 .040 0.38 0.69 1.02 Shoulder Width b2 .045 .057 .070 1.14 1.45 1.78 *Controlling Parameter Notes: Dimensions D1 and E do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M DrawingNo.C04-158 DS22001B-page 24 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S 5-Lead Plastic (ET) DDPAK Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E L3 E1 D2 D D1 1 b ee BOTTOM VIEW TOP VIEW α (5X) A c2 Φ A1 c L Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins 5 5 Pitch e .067 BSC 1.70 BSC Overall Height A .170 .177 .183 4.32 4.50 4.65 Standoff § A1 .000 .005 .010 0.00 0.13 0.25 Overall Width E .385 .398 .410 9.78 10.11 10.41 Exposed Pad Width E1 .256 REF 6.50 REF Molded Package Length D .330 .350 .370 8.38 8.89 9.40 Overall Length D1 .549 .577 .605 13.94 14.66 15.37 Exposed Pad Length D2 .303 REF 7.75 REF Lead Thickness c .014 .020 .026 0.36 0.51 0.66 Pad Thickness c2 .045 -- .055 1.14 -- 1.40 Lead Width b .026 .032 .037 0.66 0.81 0.94 Foot Length L .068 .089 .110 1.73 2.26 2.79 Pad Length L3 .045 -- .067 1.14 -- 1.70 Foot Angle Φ -- -- 8° -- -- 8° Mold Draft Angle α 3° -- 7° 3° -- 7° * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M REF: Reference Dimension, usually without tolerance, for information purposes only. See ASME Y14.5M JEDEC equivalent: TO-252 Drawing No. C04-012 Revised 07-19-05 © 2006 Microchip Technology Inc. DS22001B-page 25

MCP1827/MCP1827S 5-Lead Plastic Transistor Outline (AT) (TO-220) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging L H1 Q β e3 e1 E e EJECTOR PIN ØP α(5°) C1 A J1 F D Units INCHES* MILLIMETERS Dimension Limits MIN MAX MIN MAX Lead Pitch e .060 .072 1.52 1.83 Overall Lead Centers e1 .263 .273 6.68 6.93 Space Between Leads e3 .030 .040 0.76 1.02 Overall Height A .160 .190 4.06 4.83 Overall Width E .385 .415 9.78 10.54 Overall Length D .560 .590 14.22 14.99 Flag Length H1 .234 .258 5.94 6.55 Flag Thickness F .045 .055 1.14 1.40 Through Hole Center Q .103 .113 2.62 2.87 Through Hole Diameter P .146 .156 3.71 3.96 Lead Length L .540 .560 13.72 14.22 Base to Bottom of Lead J1 .090 .115 2.29 2.92 Lead Thickness C1 .014 .022 0.36 0.56 Lead Width β .025 .040 0.64 1.02 Mold Draft Angle α 3° 7° 3° 7° * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC equivalent: TO-220 Drawing No. C04-036 Revised 08-01-05 DS22001B-page 26 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S APPENDIX A: REVISION HISTORY Revision B (September 2006) • Correction to maximum Dropout Voltage in Section 1.0. • Added additional graphs in Section 2.0. • Added disclaimer to package outline drawings. Revision A (July 2006) • Original Release of this Document. © 2006 Microchip Technology Inc. DS22001B-page 27

MCP1827/MCP1827S NOTES: DS22001B-page 28 © 2006 Microchip Technology Inc.

MCP1827/MCP1827S PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. XX X X X/ XX Examples: a) MCP1827-0802E/AT: 0.8V LDO Regulator Device Output Feature Tolerance Temp. Package 5LD TO-220 Voltage Code b) MCP1827-1002E/ET: 1.0V LDO Regulator 5LD DDPAK c) MCP1827-1202E/AT: 1.2V LDO Regulator Device: MCP1827: 1.5A Low Dropout Regulator 5LD TO-220 MCP1827T: 1.5A Low Dropout Regulator Tape and Reel d) MCP1827-1802E/AT: 1.8V LDO Regulator MCP1827S: 1.5A Low Dropout Regulator 5LD TO-220 MCP1827ST:1.5A Low Dropout Regulator e) MCP1827-2502E/ET: 2.5V LDO Regulator Tape and Reel 5LD DDPAK f) MCP1827-3002E/ET: 3.0V LDO Regulator Output Voltage *: 08 = 0.8V “Standard” 5LD DDPAK 12 = 1.2V “Standard” g) MCP1827-3302E/AT 3.3V LDO Regulator 18 = 1.8V “Standard” 5LD TO-220 25 = 2.5V “Standard” 30 = 3.0V “Standard” h) MCP1827-5002E/ET: 5.0V LDO Regulator 33 = 3.3V “Standard” 5LD DDPAK 50 = 5.0V “Standard” i) MCP1827-ADJE/AT: ADJ LDO Regulator *Contact factory for other output voltage options 5LD TO-220 Extra Feature Code: 0 = Fixed a) MCP1827S-0802E/EB:0.8V LDO Regulator 3LD DDPAK Tolerance: 2 = 2.0% (Standard) b) MCP1827S-0802E/AB:0.8V LDO Regulator 3LD TO-220 Temperature: E = -40°C to +125°C c) MCP1827S-1002E/EB:1.0V LDO Regulator 3LD DDPAK Package Type: AB = Plastic Transistor Outline, TO-220, 3-lead d) MCP1827S-1202E/AB1.2V LDO Regulator AT = Plastic Transistor Outline, TO-220, 5-lead 3LD TO-220 EB = Plastic, DDPAK, 3-lead e) MCP1827S-1802E/EB1.8V LDO Regulator ET = Plastic, DDPAK, 5-lead 3LD DDPAK f) MCP1827S-2502E/EB2.5V LDO Regulator 3LD DDPAK g) MCP1827S-2502E/EB3.0V LDO Regulator 3LD DDPAK h) MCP1827S-3302E/AB3.3V LDO Regulator 3LD TO-220 i) MCP1827S-5002E/EB5.0V LDO Regulator 3LD DDPAK j) MCP1827S-ADJE/AB ADJ LDO Regulator 3LD TO-220 © 2006 Microchip Technology Inc. DS22001B-page 29

MCP1827/MCP1827S NOTES: DS22001B-page 30 © 2006 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, Accuron, and may be superseded by updates. It is your responsibility to dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PROMATE, PowerSmart, rfPIC, and SmartShunt are MICROCHIP MAKES NO REPRESENTATIONS OR registered trademarks of Microchip Technology Incorporated WARRANTIES OF ANY KIND WHETHER EXPRESS OR in the U.S.A. and other countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, INCLUDING BUT NOT LIMITED TO ITS CONDITION, SEEVAL, SmartSensor and The Embedded Control Solutions QUALITY, PERFORMANCE, MERCHANTABILITY OR Company are registered trademarks of Microchip Technology FITNESS FOR PURPOSE. Microchip disclaims all liability Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, CodeGuard, devices in life support and/or safety applications is entirely at dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, the buyer’s risk, and the buyer agrees to defend, indemnify and ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, hold harmless Microchip from any and all damages, claims, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active suits, or expenses resulting from such use. No licenses are Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, PICkit, conveyed, implicitly or otherwise, under any Microchip PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, intellectual property rights. PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2006, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2006 Microchip Technology Inc. DS22001B-page 31

WORLDWIDE SALES AND SERVICE AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office Asia Pacific Office India - Bangalore Austria - Wels 2355 West Chandler Blvd. Suites 3707-14, 37th Floor Tel: 91-80-4182-8400 Tel: 43-7242-2244-3910 Chandler, AZ 85224-6199 Tower 6, The Gateway Fax: 91-80-4182-8422 Fax: 43-7242-2244-393 Tel: 480-792-7200 Habour City, Kowloon India - New Delhi Denmark - Copenhagen Fax: 480-792-7277 Hong Kong Tel: 91-11-4160-8631 Tel: 45-4450-2828 Technical Support: Tel: 852-2401-1200 Fax: 91-11-4160-8632 Fax: 45-4485-2829 http://support.microchip.com Web Address: Fax: 852-2401-3431 India - Pune France - Paris www.microchip.com Australia - Sydney Tel: 91-20-2566-1512 Tel: 33-1-69-53-63-20 Tel: 61-2-9868-6733 Fax: 33-1-69-30-90-79 Fax: 91-20-2566-1513 Atlanta Fax: 61-2-9868-6755 Germany - Munich Alpharetta, GA Japan - Yokohama China - Beijing Tel: 49-89-627-144-0 Tel: 770-640-0034 Tel: 81-45-471- 6166 Tel: 86-10-8528-2100 Fax: 49-89-627-144-44 Fax: 770-640-0307 Fax: 81-45-471-6122 Fax: 86-10-8528-2104 Italy - Milan Boston Korea - Gumi Westborough, MA China - Chengdu Tel: 82-54-473-4301 Tel: 39-0331-742611 Tel: 774-760-0087 Tel: 86-28-8665-5511 Fax: 82-54-473-4302 Fax: 39-0331-466781 Fax: 774-760-0088 Fax: 86-28-8665-7889 Korea - Seoul Netherlands - Drunen Chicago China - Fuzhou Tel: 82-2-554-7200 Tel: 31-416-690399 Itasca, IL Tel: 86-591-8750-3506 Fax: 82-2-558-5932 or Fax: 31-416-690340 Tel: 630-285-0071 Fax: 86-591-8750-3521 82-2-558-5934 Spain - Madrid Fax: 630-285-0075 China - Hong Kong SAR Malaysia - Penang Tel: 34-91-708-08-90 Dallas Tel: 852-2401-1200 Tel: 60-4-646-8870 Fax: 34-91-708-08-91 Addison, TX Fax: 852-2401-3431 Fax: 60-4-646-5086 UK - Wokingham Tel: 972-818-7423 China - Qingdao Philippines - Manila Tel: 44-118-921-5869 Fax: 972-818-2924 Tel: 86-532-8502-7355 Tel: 63-2-634-9065 Fax: 44-118-921-5820 Detroit Fax: 86-532-8502-7205 Fax: 63-2-634-9069 Farmington Hills, MI China - Shanghai Singapore Tel: 248-538-2250 Tel: 86-21-5407-5533 Tel: 65-6334-8870 Fax: 248-538-2260 Fax: 86-21-5407-5066 Fax: 65-6334-8850 Kokomo China - Shenyang Taiwan - Hsin Chu Kokomo, IN Tel: 86-24-2334-2829 Tel: 886-3-572-9526 Tel: 765-864-8360 Fax: 86-24-2334-2393 Fax: 886-3-572-6459 Fax: 765-864-8387 China - Shenzhen Taiwan - Kaohsiung Los Angeles Tel: 86-755-8203-2660 Tel: 886-7-536-4818 Mission Viejo, CA Fax: 86-755-8203-1760 Fax: 886-7-536-4803 Tel: 949-462-9523 China - Shunde Taiwan - Taipei Fax: 949-462-9608 Tel: 86-757-2839-5507 Tel: 886-2-2500-6610 Santa Clara Fax: 86-757-2839-5571 Fax: 886-2-2508-0102 Santa Clara, CA China - Wuhan Thailand - Bangkok Tel: 408-961-6444 Tel: 86-27-5980-5300 Tel: 66-2-694-1351 Fax: 408-961-6445 Fax: 86-27-5980-5118 Fax: 66-2-694-1350 Toronto China - Xian Mississauga, Ontario, Tel: 86-29-8833-7250 Canada Fax: 86-29-8833-7256 Tel: 905-673-0699 Fax: 905-673-6509 08/29/06 DS22001B-page 32 © 2006 Microchip Technology Inc.

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: M icrochip: MCP1827S-1202E/EB MCP1827-3002E/AT MCP1827-2502E/ET MCP1827S-3302E/AB MCP1827-1202E/ET MCP1827S-3002E/AB MCP1827-3302E/AT MCP1827S-5002E/AB MCP1827S-2502E/EB MCP1827-5002E/AT MCP1827ST-5002E/EB MCP1827S-3002E/EB MCP1827ST-3302E/EB MCP1827-3002E/ET MCP1827-1802E/AT MCP1827S-2502E/AB MCP1827S-3302E/EB MCP1827-0802E/ET MCP1827-2502E/AT MCP1827-ADJE/AT MCP1827ST-1202E/EB MCP1827ST-1802E/EB MCP1827-ADJE/ET MCP1827S-0802E/EB MCP1827S-1802E/AB MCP1827ST-2502E/EB MCP1827S-1802E/EB MCP1827-1802E/ET MCP1827-0802E/AT MCP1827ST-3002E/EB MCP1827S-0802E/AB MCP1827-5002E/ET MCP1827-1202E/AT MCP1827S-1202E/AB MCP1827S-5002E/EB MCP1827ST-0802E/EB MCP1827T-0802E/ET MCP1827T-1202E/ET MCP1827T-1802E/ET MCP1827T-2502E/ET MCP1827T-3002E/ET MCP1827T-3302E/ET MCP1827T-5002E/ET MCP1827T-ADJE/ET