MCP1802 300 mA, High PSRR, Low Quiescent Current LDO Features: Description: • 300mA Maximum Output Current The MCP1802 is a family of CMOS low dropout (LDO) • Low Dropout Voltage, 200mV typical @ 100mA voltage regulators that can deliver up to 300mA of current while consuming only 25µA of quiescent • 25µA Typical Quiescent Current current (typical). The input operating range is specified • 0.01µA Typical Shutdown Current from 2.0V to 10.0V, making it an ideal choice for two to • Input Operating Voltage Range: 2.0V to10.0V six primary cell battery-powered applications, 9V • Standard Output Voltage Options: alkaline and one or two cell Li-Ion-powered - (0.9V, 1.8V, 2.5V, 3.0V, 3.3V, 5.0V, 6.0V) applications. • Output voltage accuracy: The MCP1802 is capable of delivering 100mA with - ±2% (VR > 1.5V), ±30mV (VR  1.5V) only 200mV (typical) of input to output voltage • Stable with Ceramic output capacitors differential (VOUT=3.0V). The output voltage tolerance of the MCP1802 at +25°C is typically ±0.4% with a • Current Limit Protection maximum of ±2%. Line regulation is ±0.01% typical at • Shutdown pin +25°C. • High PSRR: 70dB typical @ 10kHz The LDO output is stable with a minimum of 1µF of output capacitance. Ceramic, tantalum or aluminum Applications: electrolytic capacitors can all be used for input and • Battery-powered Devices output. Overcurrent limit with current foldback provides short-circuit protection. A shutdown (SHDN) function • Battery-powered Alarm Circuits allows the output to be enabled or disabled. When • Smoke Detectors disabled, the MCP1802 draws only 0.01µA of current • CO2 Detectors (typical). • Pagers and Cellular Phones The MCP1802 is available in a SOT-23-5 package. • Wireless Communications Equipment • Smart Battery Packs Package Types • Low Quiescent Current Voltage Reference SOT-23-5 • PDAs V NC • Digital Cameras OUT • Microcontroller Power 5 4 • Solar-Powered Instruments • Consumer Products • Battery Powered Data Loggers Related Literature: 1 2 3 • AN765, “Using Microchip’s Micropower LDOs”, VIN VSS SHDN DS00765, Microchip Technology Inc., 2002 • AN766, “Pin-Compatible CMOS Upgrades to BiPolar LDOs”, DS00766, Microchip Technology Inc., 2002 • AN792, “A Method to Determine How Much Power a SOT23 Can Dissipate in an Application”, DS00792, Microchip Technology Inc., 2001  2010 Microchip Technology Inc. DS22053C-page 1

MCP1802 Functional Block Diagram MCP1802 +V IN V V IN OUT +V IN SHDN Shutdown Voltage Control Reference - Current Limiter + Error Amplifier GND Typical Application Circuit MCP1802 V IN V OUT 1 V V 5 IN OUT 3.3V @ 40mA SOT-23-5 C mA OUT 1µF Ceramic 2 GND 9V + Battery C 3 SHDN NC 4 IN 1µF Ceramic DS22053C-page 2  2010 Microchip Technology Inc.

MCP1802 1.0 ELECTRICAL † Notice: Stresses above those listed under “Maximum CHARACTERISTICS Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those Absolute Maximum Ratings † indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions Input Voltage ................................................................. +12V for extended periods may affect device reliability. Output Current (Continuous) ..................... P /(V -V )mA D IN OUT Output Current (Peak) ............................................... 500 mA Output Voltage ............................... (V -0.3V) to (V +0.3V) SS IN SHDN Voltage..................................(V -0.3V) to (V +0.3V) SS IN Continuous Power Dissipation: 5-Pin SOT-23-5 .................................................... 250mW ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise specified, all limits are established for V = V + 1.0V, Note1, C = 1µF (X7R), IN R OUT C = 1µF (X7R), V = V , T = +25°C IN SHDN IN A Parameters Sym Min Typ Max Units Conditions Input / Output Characteristics Input Operating Voltage V 2.0 — 10.0 V Note1 IN Input Quiescent Current I — 25 50 µA I = 0mA q L Shutdown Current I — 0.01 0.10 µA SHDN = 0V SHDN Maximum Output Current I 300 — — mA V  2V, V = V +1.0V OUT_mA R IN R 300 — — 1.5V V  2.0V, V =3.0V R IN 260 — — 1.0V V  1.5V, V = V +1.5V R IN R 260 — — 0.9V V  1.0V, V =2.5V R IN Current Limiter I — 380 — mA if V  1.75V, then V = V + 2.0V LIMIT R IN R Output Short Circuit Current I — 50 — mA if V  1.75V, then V = V + 2.0V OUT_SC R IN R Output Voltage Regulation V V -2.0% V V +2.0% V V  1.45V, I = 30 mA, Note2 OUT R R R R OUT V -30 mV V V +30 mV V  1.45V, I = 30 mA R R R R OUT V Temperature TCV — 100 — ppm/°C I = 30mA, -40°C T  +85°C, OUT OUT OUT A Coefficient Note3 Line Regulation V / -0.2 ±0.01 +0.2 %/V (V + 1V) V 10V, Note1 OUT R IN (V XV ) V  1.75V, I = 30mA OUT IN R OUT V  1.75V, I = 10mA R OUT Load Regulation V /V — 15 50 mV I = 1.0mA to 100mA, Note4 OUT OUT L — — 100 I = 1.0mA to 300mA, L Dropout Voltage, Note5 V — 60 90 mV I = 30mA, 3.1V V  6.0V DROPOUT L R — 200 250 I = 100mA, 3.1V V  6.0V L R — 80 120 I = 30mA, 2.0V V  3.1V L R — 240 350 I = 100mA, 2.0V V < 3.1V L R — 2.07 - V 2.10 - V V I = 30mA,V  2.0V R R L R — 2.23 - V 2.33 - V I = 100mA, V < 2.0V R R L R Power Supply Ripple PSRR — 70 — dB f = 10kHz, I = 50mA, V = 1V L INAC Rejection Ratio pk-pk, C = 0µF, IN if V  1.5V, then V = 2.5V R IN Output Noise e — 0.46 — μV/√Hz I = 100mA, f = 1kHz, C = N OUT OUT 1μF (X7R Ceramic), V = 2.5V OUT Note 1: The minimum V must meet two conditions: V 2.0V and V (V + 1.0V). IN IN IN R 2: V is the nominal regulator output voltage. For example: V = 1.8V, 2.5V, 3.0V, 3.3V, or 5.0V. R R The input voltage V = V + 1.0V or Vi = 2.0V (whichever is greater); I = 100µA. IN R IN OUT 3: TCV = (V - V ) *106 / (V * Temperature), V = highest voltage measured over the OUT OUT-HIGH OUT-LOW R OUT-HIGH temperature range. V = lowest voltage measured over the temperature range. OUT-LOW 4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output voltage due to heating effects are determined using thermal regulation specification TCV . OUT 5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its measured value with an applied input voltage of V + 1.0V or 2.0V, whichever is greater. R  2010 Microchip Technology Inc. DS22053C-page 3

MCP1802 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise specified, all limits are established for V = V + 1.0V, Note1, C = 1µF (X7R), IN R OUT C = 1µF (X7R), V = V , T = +25°C IN SHDN IN A Parameters Sym Min Typ Max Units Conditions Shutdown Input Logic High Input V 1.6 — — V — SHDN-HIGH Logic Low Input V — — 0.25 V — SHDN-LOW Note 1: The minimum V must meet two conditions: V 2.0V and V (V + 1.0V). IN IN IN R 2: V is the nominal regulator output voltage. For example: V = 1.8V, 2.5V, 3.0V, 3.3V, or 5.0V. R R The input voltage V = V + 1.0V or Vi = 2.0V (whichever is greater); I = 100µA. IN R IN OUT 3: TCV = (V - V ) *106 / (V * Temperature), V = highest voltage measured over the OUT OUT-HIGH OUT-LOW R OUT-HIGH temperature range. V = lowest voltage measured over the temperature range. OUT-LOW 4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output voltage due to heating effects are determined using thermal regulation specification TCV . OUT 5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its measured value with an applied input voltage of V + 1.0V or 2.0V, whichever is greater. R TEMPERATURE SPECIFICATIONS Parameters Sym Min Typ Max Units Conditions Temperature Ranges Operating Temperature Range T -40 — +85 °C A Storage Temperature Range Tstg -55 — +125 °C Thermal Package Resistance Thermal Resistance, SOT-23-5  — 256 — EIA/JEDEC JESD51-7 JA °C/W  — 81 — FR-4 0.063 4-Layer Board JC DS22053C-page 4  2010 Microchip Technology Inc.

MCP1802 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated: V = 3.3V, C = 1µF Ceramic (X7R), C = 1µF Ceramic (X7R), I = 100µA, R OUT IN L T = +25°C, V = V + 1.0V, SOT-23-5. A IN R Note: Junction Temperature (TJ) is approximated by soaking the device under test to an ambient temperature equal to the desired junction temperature. The test time is small enough such that the rise in Junction temperature over the Ambient temperature is not significant. 26.00 80 A) 25.00 VIOOUUTT == 00 .µ9AV 70 VVOINU =T =2 .00.V9V nt Current (µ 2234..0000 +25°C +90°C Current (µA) 34560000 sce 22.00 ND 20 e G Qui 21.00 0°C -45°C 10 20.00 0 2 4 6 8 10 0 30 60 90 120 150 Input Voltage (V) Load Current (mA) FIGURE 2-1: Quiescent Current vs. Input FIGURE 2-4: Ground Current vs Load Voltage. Current. 29.00 90 VOUT= 3.3V scent Current (µA) 222678...000000 +90°C IOUT= 0 µA ND Current (µA) 4567800000 VVOINU =T =4 .33.V3V VVOINU =T =7 .60.V0V uie 25.00 -45°C G 30 Q +25°C 0°C 24.00 20 4 5 6 7 8 9 10 0 25 50 75 100 125 150 Input Voltage (V) Load Current (mA) FIGURE 2-2: Quiescent Current vs. Input FIGURE 2-5: Ground Current vs Load Voltage. Current. 31.00 30.00 VOUT = 6.0V VOUT = 6.0V IOUT = 0mA µA) 30.00 +90°C IOUT = 0 µA µA) 28.00 VIN = 7.0V nt ( 29.00 +25°C nt ( scent Curre 2278..0000 -45°C 0°C scent Curre 2246..0000 VVOINU =T =4 .33.V3V VVOINU =T =2 .00.V9V uie 26.00 uie 22.00 Q Q 25.00 20.00 7 7.5 8 8.5 9 9.5 10 -45 -22.5 0 22.5 45 67.5 90 Input Voltage (V) Junction Temperature (°C) FIGURE 2-3: Quiescent Current vs. Input FIGURE 2-6: Quiescent Current vs. Voltage. Junction Temperature.  2010 Microchip Technology Inc. DS22053C-page 5

MCP1802 Note: Unless otherwise indicated: V = 3.3V, C = 1µF Ceramic (X7R), C = 1µF Ceramic (X7R), I = 100µA, R OUT IN L T = +25°C, V = V + 1.0V, SOT-23-5. A IN R 0.925 0.920 V) 0.920 ILVOOAUDT = = 1 0 m.9AV V) 00..991105 0°C VOVUINT == 20..09VV e ( 0.915 e ( g g 0.905 olta 0.910 -45°C 0°C olta 0.900 +25 put V 0.905 +25°C put V 0.895 +90°C -45°C ut ut 0.890 O 0.900 O 0.885 +90°C 0.895 0.880 2 3 4 5 6 7 8 9 10 0 25 50 75 100 125 150 Input Voltage (V) Load Current (mA) FIGURE 2-7: Output Voltage vs. Input FIGURE 2-10: Output Voltage vs. Load Voltage. Current. 3.34 3.34 3.33 0°C ILVOOAUDT = = 1 3 m.3AV 3.33 -45°C 0°C VOVUINT == 43..33VV V) 3.32 V) 3.32 e ( e ( 3.31 g 3.31 g olta 3.30 -45°C +25°C olta 3.30 +25°C V V 3.29 Output 33..2289 +90°C Output 33..2278 +90°C 3.27 3.26 3.26 3.25 4 5 6 7 8 9 10 0 25 50 75 100 125 150 Input Voltage (V) Load Current (mA) FIGURE 2-8: Output Voltage vs. Input FIGURE 2-11: Output Voltage vs. Load Voltage. Current. 6.06 6.06 VOUT = 6.0V VIN = 7.0V V) 6.04 0°C ILOAD = 1 mA V) 6.04 0°C +25°C VOUT = 6.0V e ( 6.02 e ( 6.02 oltag 6.00 +25°C oltag 6.00 -45°C V V 5.98 utput 5.98 +90°C -45°C utput 5.96 +90°C O 5.96 O 5.94 5.94 5.92 7 7.5 8 8.5 9 9.5 10 0 25 50 75 100 125 150 Input Voltage (V) Load Current (mA) FIGURE 2-9: Output Voltage vs. Input FIGURE 2-12: Output Voltage vs. Load Voltage. Current. DS22053C-page 6  2010 Microchip Technology Inc.

MCP1802 Note: Unless otherwise indicated: V = 3.3V, C = 1µF Ceramic (X7R), C = 1µF Ceramic (X7R), I = 100µA, R OUT IN L T = +25°C, V = V + 1.0V, SOT-23-5. A IN R 0.30 VOUT = 3.3V V) 0.25 ge ( 0.20 +90°C a Volt 0.15 +25°C ut o 0.10 p o -45°C Dr 0.05 +0°C 0.00 0 25 50 75 100 125 150 Load Current (mA) FIGURE 2-13: Dropout Voltage vs. Load FIGURE 2-16: Dynamic Line Response. Current. 0.30 160 VOUT = 6.0V A) 140 VOUT = 3.3V Dropout Voltage (V) 00000.....0112250505 +25°C-4+59°0C°C +0°C ort Circuit Current (m 11022468000000 ROUT < 0.1Ω h S 0.00 0 0 25 50 75 100 125 150 0 1 2 3 4 5 6 7 8 9 10 Load Current (mA) Input Voltage (V) FIGURE 2-14: Dropout Voltage vs. Load FIGURE 2-17: Short Circuit Current vs. Current. Input Voltage. -1.40 VOUT= 0.9V %) -1.50 IOUT = 0.1 mA to 150 mA n ( atio -1.60 ul eg -1.70 VIN = 10V Load R -1.80 VVVIIINNN === 648VVV VIN = 2V -1.90 -45 -22.5 0 22.5 45 67.5 90 Temperature (°C) FIGURE 2-15: Dynamic Line Response. FIGURE 2-18: Load Regulation vs. Temperature.  2010 Microchip Technology Inc. DS22053C-page 7

MCP1802 Note: Unless otherwise indicated: V = 3.3V, C = 1µF Ceramic (X7R), C = 1µF Ceramic (X7R), I = 100µA, R OUT IN L T = +25°C, V = V + 1.0V, SOT-23-5. A IN R 0.00 0.020 VOUT = 3.3V 150 mA VOUT = 3.3V gulation (%) ---000...321000 VIN = 6V VIN = 8VVIN =IO 1U0T V= 0.1 mA to 150 mA ulation (%/V) 000...000011505 100 mA 50 mA 10 mA VIN = 4.3V to 10V e g R -0.40 e 0.000 ad VIN = 4.3V e R Lo -0.50 Lin -0.005 1 mA -0.60 -0.010 -45 -22.5 0 22.5 45 67.5 90 -45 -22.5 0 22.5 45 67.5 90 Temperature (°C) Temperature (°C) FIGURE 2-19: Load Regulation vs. FIGURE 2-22: Line Regulation vs. Temperature. Temperature. 0.10 0.020 VOUT = 6.0V 150 mA VOUT = 6.0V egulation (%) -00..0100 VIN = 8V VIN = 9V VIN I=O U1T0 =V 0.1 mA to 150 mA gulation (%/V) 0000....000000110505 100 mA 50 mA VIN = 7.0V to 10.0V R e ad -0.20 e R -0.005 Lo VIN = 7V Lin -0.010 1 mA 10 mA -0.30 -0.015 -45 -22.5 0 22.5 45 67.5 90 -45 -22.5 0 22.5 45 67.5 90 Temperature (°C) Temperature (°C) FIGURE 2-20: Load Regulation vs. FIGURE 2-23: Line Regulation vs. Temperature. Temperature. 0.020 0 ulation (%/V) 000...000011505 150 mA 100 mA 50 mA VIN = 2V.0O UtTo = 1 00..90VV R (dB)----43210000 VVVCIORIIIUNNN=T=A==3C40 1.. =330μV V0F1 0µ0A mV p-p e Reg 0.000 PSR--6500 Lin -0.005 -70 1 mA 10 mA -80 -0.010 -90 -45 -22.5 0 22.5 45 67.5 90 0.01 0.1 1 10 100 1000 Temperature (°C) Frequency (KHz) FIGURE 2-21: Line Regulation vs. FIGURE 2-24: PSRR vs. Frequency. Temperature. DS22053C-page 8  2010 Microchip Technology Inc.

MCP1802 Note: Unless otherwise indicated: V = 3.3V, C = 1µF Ceramic (X7R), C = 1µF Ceramic (X7R), I = 100µA, R OUT IN L T = +25°C, V = V + 1.0V, SOT-23-5. A IN R 0 -10 VR= 6.0V VIN= 7.0V -20 VINAC = 100 mV p-p dB)--4300 CIOIUNT== 01 μ00F µA R ( R-50 S P-60 -70 -80 -90 0.01 0.1 1 10 100 1000 Frequency (KHz) FIGURE 2-25: PSRR vs Frequency. FIGURE 2-28: Dynamic Load Response. FIGURE 2-26: Power Up Timing. FIGURE 2-29: Power Up Timing From SHDN. 10 5.0V IOUT = 100 mA z) 1 H  V/ µ 0.1 2.5V e ( s oi N0.01 0.001 0.01 0.1 1 10 100 1000 Frequency (KHz) FIGURE 2-27: Dynamic Load Response. FIGURE 2-30: Noise Graph.  2010 Microchip Technology Inc. DS22053C-page 9

MCP1802 NOTES: DS22053C-page 10  2010 Microchip Technology Inc.

MCP1802 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table3-1. TABLE 3-1: PIN FUNCTION TABLE Pin No. Name Function SOT-23-5 1 V Unregulated Supply Voltage IN 2 GND Ground Terminal 3 SHDN Shutdown 4 NC No connection 5 V Regulated Voltage Output OUT 3.1 Unregulated Input Voltage (V ) 3.3 Shutdown Input (SHDN) IN Connect V to the input unregulated source voltage. The SHDN input is used to turn the LDO output voltage IN Like all low dropout linear regulators, low source on and off. When the SHDN input is at a logic-high impedance is necessary for the stable operation of the level, the LDO output voltage is enabled. When the LDO. The amount of capacitance required to ensure SHDN input is pulled to a logic-low level, the LDO low source impedance will depend on the proximity of output voltage is disabled and the LDO enters a low the input source capacitors or battery type. For most quiescent current shutdown state where the typical applications, 0.1µF of capacitance will ensure stable quiescent current is 0.01µA. The SHDN pin does not operation of the LDO circuit. The type of capacitor used have an internal pull-up or pull-down resistor. The the can be ceramic, tantalum or aluminum electrolytic. The SHDN pin must be connected to either V or GND to IN low ESR characteristics of the ceramic will yield better prevent the device from becoming unstable. noise and PSRR performance at high frequency. 3.4 Regulated Output Voltage (V ) OUT 3.2 Ground Terminal (GND) Connect V to the positive side of the load and the OUT Regulator ground. Tie GND to the negative side of the positive terminal of the output capacitor. The positive output and the negative side of the input capacitor. side of the output capacitor should be physically Only the LDO bias current (25µA typical) flows out of located as close to the LDO V pin as is practical. OUT this pin; there is no high current. The LDO output The current flowing out of this pin is equal to the DC regulation is referenced to this pin. Minimize voltage load current. drops between this pin and the negative side of the load.  2010 Microchip Technology Inc. DS22053C-page 11

MCP1802 NOTES: DS22053C-page 12  2010 Microchip Technology Inc.

MCP1802 4.0 DETAILED DESCRIPTION 4.1 Output Regulation 4.4 Output Capacitor A portion of the LDO output voltage is fed back to the The MCP1802 requires a minimum output capacitance internal error amplifier and compared with the precision of 1µF for output voltage stability. Ceramic capacitors internal bandgap reference. The error amplifier output are recommended because of their size, cost and will adjust the amount of current that flows through the environmental robustness qualities. P-Channel pass transistor, thus regulating the output Aluminum-electrolytic and tantalum capacitors can be voltage to the desired value. Any changes in input used on the LDO output as well. The output capacitor voltage or output current will cause the error amplifier should be located as close to the LDO output as is to respond and adjust the output voltage to the target practical. Ceramic materials X7R and X5R have low voltage (refer to Figure4-1). temperature coefficients and are well within the acceptable ESR range required. A typical 1µF X7R 4.2 Overcurrent 0805 capacitor has an ESR of 50 milli-ohms. The MCP1802 internal circuitry monitors the amount of Larger LDO output capacitors can be used with the current flowing through the P-Channel pass transistor. MCP1802 to improve dynamic performance and power In the event that the load current reaches the current supply ripple rejection performance. Aluminum-electro- limiter level of 380mA (typical), the current limiter lytic capacitors are not recommended for low circuit will operate and the output voltage will drop. As temperature applications of  25°C. the output voltage drops, the internal current foldback circuit will further reduce the output voltage causing the 4.5 Input Capacitor output current to decrease. When the output is shorted, Low input source impedance is necessary for the LDO a typical output current of 50mA flows. output to operate properly. When operating from batteries, or in applications with long lead length 4.3 Shutdown (> 10 inches) between the input source and the LDO, The SHDN input is used to turn the LDO output voltage some input capacitance is recommended. A minimum on and off. When the SHDN input is at a logic-high of 0.1µF to 4.7µF is recommended for most level, the LDO output voltage is enabled. When the applications. SHDN input is pulled to a logic-low level, the LDO For applications that have output step load output voltage is disabled and the LDO enters a low requirements, the input capacitance of the LDO is very quiescent current shutdown state where the typical important. The input capacitance provides the LDO quiescent current is 0.01µA. The SHDN pin does not with a good local low-impedance source to pull the have an internal pull-up or pull-down resistor. Therefore transient currents from in order to respond quickly to the SHDN pin must be pulled either high or low to the output load step. For good step response prevent the device from becoming unstable. The performance, the input capacitor should be of internal device current will increase when the device is equivalent (or higher) value than the output capacitor. operational and current flows through the pull-up or The capacitor should be placed as close to the input of pull-down resistor to the SHDN pin internal logic. The the LDO as is practical. Larger input capacitors will also SHDN pin internal logic is equivalent to an inverter help reduce any high-frequency noise on the input and input. output of the LDO and reduce the effects of any inductance that exists between the input source voltage and the input capacitance of the LDO.  2010 Microchip Technology Inc. DS22053C-page 13

MCP1802 MCP1802 +V IN V V IN OUT +V IN SHDN Shutdown Voltage Control Reference - Current Limiter + Error Amplifier GND FIGURE 4-1: Block Diagram. DS22053C-page 14  2010 Microchip Technology Inc.

MCP1802 5.0 FUNCTIONAL DESCRIPTION 5.2 Output The MCP1802 CMOS low dropout linear regulator is The maximum rated continuous output current for the intended for applications that need the low current MCP1802 is 300mA. consumption while maintaining output voltage A minimum output capacitance of 1.0µF is required for regulation. The operating continuous load range of the small signal stability in applications that have up to MCP1802 is from 0mA to 300mA. The input operating 300mA output current capability. The capacitor type voltage range is from 2.0V to 10.0V, making it capable can be ceramic, tantalum or aluminum electrolytic. of operating from three or more alkaline cells or single and multiple Li-Ion cell batteries. 5.1 Input The input of the MCP1802 is connected to the source of the P-Channel PMOS pass transistor. As with all LDO circuits, a relatively low source impedance (10) is needed to prevent the input impedance from causing the LDO to become unstable. The size and type of the capacitor needed depends heavily on the input source type (battery, power supply) and the output current range of the application. For most applications a 0.1µF ceramic capacitor will be sufficient to ensure circuit stability. Larger values can be used to improve circuit AC performance.  2010 Microchip Technology Inc. DS22053C-page 15

MCP1802 NOTES: DS22053C-page 16  2010 Microchip Technology Inc.

MCP1802 6.0 APPLICATION CIRCUITS & EQUATION 6-2: ISSUES T = P R +T JMAX TOTAL JA AMAX Where: 6.1 Typical Application T = Maximum continuous junction J(MAX) The MCP1802 is most commonly used as a voltage temperature regulator. Its low quiescent current and low dropout P = Total device power dissipation voltage make it ideal for many battery-powered TOTAL applications. RJA = Thermal resistance from junction to ambient T = Maximum ambient temperature MCP1802 AMAX NC SHDN The maximum power dissipation capability for a package can be calculated given the junction-to- V GND ambient thermal resistance and the maximum ambient OUT V temperature for the application. The following equation 1.8V IN V V 2.4V to 5.0V can be used to determine the package maximum OUT IN I internal power dissipation. 5O0UmTA COUT CIN 1µF Ceramic 1µF Ceramic EQUATION 6-3: T –T  FIGURE 6-1: Typical Application Circuit. P = -------J----M----A---X---------------A-----M----A---X------ DMAX R JA 6.1.1 APPLICATION INPUT CONDITIONS Where: Package Type = SOT-23-5 P = Maximum device power D(MAX) Input Voltage Range = 2.4V to 5.0V dissipation VIN maximum = 5.0V TJ(MAX) = Maximum continuous junction temperature V typical = 1.8V OUT T = Maximum ambient temperature I = 50mA maximum A(MAX) OUT R = Thermal resistance from JA junction to ambient 6.2 Power Calculations 6.2.1 POWER DISSIPATION EQUATION 6-4: The internal power dissipation of the MCP1802 is a function of input voltage, output voltage and output T = P R JRISE DMAX JA current. The power dissipation, as a result of the Where: quiescent current draw, is so low, it is insignificant (25.0µA x VIN). The following equation can be used to TJ(RISE) = Rise in device junction calculate the internal power dissipation of the LDO. temperature over the ambient temperature EQUATION 6-1: P = Maximum device power TOTAL P = V –V I dissipation LDO INMAX OUTMIN OUTMAX R = Thermal resistance from Where: JA junction to ambient P = LDO Pass device internal power LDO dissipation EQUATION 6-5: V = Maximum input voltage IN(MAX) T = T +T V = LDO minimum output voltage J JRISE A OUT(MIN) Where: The maximum continuous operating temperature T = Junction Temperature J specified for the MCP1802 is +85°C. To estimate the T = Rise in device junction internal junction temperature of the MCP1802, the total J(RISE) temperature over the ambient internal power dissipation is multiplied by the thermal temperature resistance from junction to ambient (R ). The thermal JA resistance from junction to ambient for the SOT-23-5 TA = Ambient temperature package is estimated at 256°C/W.  2010 Microchip Technology Inc. DS22053C-page 17

MCP1802 6.3 Voltage Regulator Junction Temperature Estimate Internal power dissipation, junction temperature rise, To estimate the internal junction temperature, the junction temperature and maximum power dissipation calculated temperature rise is added to the ambient or are calculated in the following example. The power offset temperature. For this example, the worst-case dissipation, as a result of ground current, is small junction temperature is estimated in the following table. enough to be neglected. T = T + T J JRISE A(MAX) 6.3.1 POWER DISSIPATION EXAMPLE T = 81.42°C J Package Maximum Package Power Dissipation at +25°C Ambient Temperature Package Type = SOT-23-5 Input Voltage SOT-23-5 (256°C/Watt = RJA) VIN = 2.4V to 5.0V PD(MAX) = (85°C - 25°C) / 256°C/W LDO Output Voltages and Currents PD(MAX) = 234 milli-Watts V = 1.8V OUT 6.4 Voltage Reference I = 50mA OUT Maximum Ambient Temperature The MCP1802 can be used not only as a regulator, but T = +40°C also as a low quiescent current voltage reference. In A(MAX) many microcontroller applications, the initial accuracy Internal Power Dissipation of the reference can be calibrated using production test Internal Power dissipation is the product of the LDO equipment or by using a ratio measurement. When the output current times the voltage across the LDO initial accuracy is calibrated, the thermal stability and (VIN to VOUT). line regulation tolerance are the only errors introduced P = (V - V ) x I by the MCP1802 LDO. The low cost, low quiescent LDO(MAX) IN(MAX) OUT(MIN) OUT(MAX) current and small ceramic output capacitor are all P = (5.0V - (0.98 x 1.8V)) x 50mA LDO advantages when using the MCP1802 as a voltage P = 161.8 milli-Watts LDO reference. Device Junction Temperature Rise Ratio Metric Reference The internal junction temperature rise is a function of internal power dissipation and the thermal resistance MCP1802 PIC® 25µA Bias Microcontroller from junction to ambient for the application. The V tdheerrivmeadl rfreosmis taannc eE IfAro/JmE DjuEnCct iostna ntod aarmd bfoiern mt (eRasJuAr)i nigs C1IµNF GINNVDOUT COUT VREF 1µF thermal resistance for small surface mount packages. ADO The EIA/JEDEC specification is JESD51-7, “High AD1 Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages”. The standard describes the test method and board specifications for measuring the Bridge Sensor thermal resistance from junction to ambient. The actual thermal resistance for a particular application can vary FIGURE 6-2: Using the MCP1802 as a depending on many factors, such as copper area and Voltage Reference. thickness. Refer to AN792, “A Method to Determine How Much Power a SOT23 Can Dissipate in an 6.5 Pulsed Load Applications Application”, (DS00792), for more information regarding this subject. For some applications, there are pulsed load current T = P x Rq events that may exceed the specified 300mA J(RISE) TOTAL JA maximum specification of the MCP1802. The internal TJRISE = 161.8 milli-Watts x 256.0°C/Watt current limit of the MCP1802 will prevent high peak TJRISE = 41.42°C load demands from causing non-recoverable damage. The 300mA rating is a maximum average continuous rating. As long as the average current does not exceed 300mA nor the max power dissipation of the packaged device, pulsed higher load currents can be applied to the MCP1802. The typical current limit for the MCP1802 is 380mA (T +25°C). A DS22053C-page 18  2010 Microchip Technology Inc.

MCP1802 7.0 PACKAGING INFORMATION 7.1 Package Marking Information 5-Lead SOT-23 Example: Standard Options for SOT-23 XXNN 9XNN Symbol Voltage * Symbol Voltage * 9X_8# 0.9 9X_Z# 3.0 1 9X_B# 1.2 9B_2# 3.3 1 9X_K# 1.8 9B_M# 5.0 9X_T# 2.5 9B_Z# 6.0 * Custom output voltages available upon request. Contact your local Microchip sales office for more information. Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e3 Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.  2010 Microchip Technology Inc. DS22053C-page 19

MCP1802 (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:20)(cid:21)(cid:6)(cid:19)(cid:11)(cid:13)(cid:11)(cid:12)(cid:22)(cid:21)(cid:8)(cid:23)(cid:17)(cid:20)(cid:24)(cid:8)(cid:25)(cid:15)(cid:17)(cid:20)(cid:3)(cid:26)(cid:27)(cid:28) (cid:29)(cid:22)(cid:12)(cid:5)(cid:30) .(cid:22)(cid:21)(cid:14)#(cid:23)(cid:13)(cid:14)(cid:31)(cid:22) #(cid:14)(cid:20)$(cid:21)(cid:21)(cid:13)(cid:25)#(cid:14)(cid:10)(cid:11)(cid:20)/(cid:11)(cid:12)(cid:13)(cid:14)!(cid:21)(cid:11)-(cid:19)(cid:25)(cid:12) 0(cid:14)(cid:10)(cid:26)(cid:13)(cid:11) (cid:13)(cid:14) (cid:13)(cid:13)(cid:14)#(cid:23)(cid:13)(cid:14)(cid:18)(cid:19)(cid:20)(cid:21)(cid:22)(cid:20)(cid:23)(cid:19)(cid:10)(cid:14)1(cid:11)(cid:20)/(cid:11)(cid:12)(cid:19)(cid:25)(cid:12)(cid:14)(cid:3)(cid:10)(cid:13)(cid:20)(cid:19)%(cid:19)(cid:20)(cid:11)#(cid:19)(cid:22)(cid:25)(cid:14)(cid:26)(cid:22)(cid:20)(cid:11)#(cid:13)!(cid:14)(cid:11)#(cid:14) (cid:23)##(cid:10)+22---(cid:29)(cid:31)(cid:19)(cid:20)(cid:21)(cid:22)(cid:20)(cid:23)(cid:19)(cid:10)(cid:29)(cid:20)(cid:22)(cid:31)2(cid:10)(cid:11)(cid:20)/(cid:11)(cid:12)(cid:19)(cid:25)(cid:12) b N E E1 1 2 3 e e1 D A A2 c φ A1 L L1 3(cid:25)(cid:19)# (cid:18)(cid:28)44(cid:28)(cid:18)"(cid:24)"(cid:8)(cid:3) (cid:2)(cid:19)(cid:31)(cid:13)(cid:25) (cid:19)(cid:22)(cid:25)(cid:14)4(cid:19)(cid:31)(cid:19)# (cid:18)(cid:28)5 56(cid:18) (cid:18)(cid:7)7 5$(cid:31)8(cid:13)(cid:21)(cid:14)(cid:22)%(cid:14)1(cid:19)(cid:25) 5 ( 4(cid:13)(cid:11)!(cid:14)1(cid:19)#(cid:20)(cid:23) (cid:13) (cid:4)(cid:29)(cid:6)((cid:14))(cid:3)* 6$# (cid:19)!(cid:13)(cid:14)4(cid:13)(cid:11)!(cid:14)1(cid:19)#(cid:20)(cid:23) (cid:13)(cid:30) (cid:30)(cid:29)(cid:6)(cid:4)(cid:14))(cid:3)* 6,(cid:13)(cid:21)(cid:11)(cid:26)(cid:26)(cid:14)9(cid:13)(cid:19)(cid:12)(cid:23)# (cid:7) (cid:4)(cid:29)(cid:6)(cid:4) : (cid:30)(cid:29)(cid:5)( (cid:18)(cid:22)(cid:26)!(cid:13)!(cid:14)1(cid:11)(cid:20)/(cid:11)(cid:12)(cid:13)(cid:14)(cid:24)(cid:23)(cid:19)(cid:20)/(cid:25)(cid:13) (cid:7)(cid:16) (cid:4)(cid:29);(cid:6) : (cid:30)(cid:29)(cid:15)(cid:4) (cid:3)#(cid:11)(cid:25)!(cid:22)%% (cid:7)(cid:30) (cid:4)(cid:29)(cid:4)(cid:4) : (cid:4)(cid:29)(cid:30)( 6,(cid:13)(cid:21)(cid:11)(cid:26)(cid:26)(cid:14)<(cid:19)!#(cid:23) " (cid:16)(cid:29)(cid:16)(cid:4) : (cid:15)(cid:29)(cid:16)(cid:4) (cid:18)(cid:22)(cid:26)!(cid:13)!(cid:14)1(cid:11)(cid:20)/(cid:11)(cid:12)(cid:13)(cid:14)<(cid:19)!#(cid:23) "(cid:30) (cid:30)(cid:29)(cid:15)(cid:4) : (cid:30)(cid:29);(cid:4) 6,(cid:13)(cid:21)(cid:11)(cid:26)(cid:26)(cid:14)4(cid:13)(cid:25)(cid:12)#(cid:23) (cid:2) (cid:16)(cid:29)(cid:17)(cid:4) : (cid:15)(cid:29)(cid:30)(cid:4) .(cid:22)(cid:22)#(cid:14)4(cid:13)(cid:25)(cid:12)#(cid:23) 4 (cid:4)(cid:29)(cid:30)(cid:4) : (cid:4)(cid:29)=(cid:4) .(cid:22)(cid:22)#(cid:10)(cid:21)(cid:19)(cid:25)# 4(cid:30) (cid:4)(cid:29)(cid:15)( : (cid:4)(cid:29);(cid:4) .(cid:22)(cid:22)#(cid:14)(cid:7)(cid:25)(cid:12)(cid:26)(cid:13) (cid:3) (cid:4)> : (cid:15)(cid:4)> 4(cid:13)(cid:11)!(cid:14)(cid:24)(cid:23)(cid:19)(cid:20)/(cid:25)(cid:13) (cid:20) (cid:4)(cid:29)(cid:4); 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MCP1802 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2010 Microchip Technology Inc. DS22053C-page 21

MCP1802 NOTES: DS22053C-page 22  2010 Microchip Technology Inc.

MCP1802 APPENDIX A: REVISION HISTORY Revision C (October 2010) The following is the list of modifications: 1. Removed Note1 reference from the Dropout Voltage Parameter in the Electrical Characteris- tics table. 2. Added Land Pattern package outline drawing C04-2091A. Revision B (January 2009) The following is the list of modifications: 1. Added Shutdown Input information to the “Electrical characteristics” table. 2. Added Figure2-30. Revision A (June 2007) • Original Release of this Document.  2010 Microchip Technology Inc. DS22053C-page 23

MCP1802 NOTES: DS22053C-page 24  2010 Microchip Technology Inc.

MCP1802 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X- XX X X X/ XX Examples: a) MCP1802T-0902I/OT: Tape and Reel, 0.9V Device Tape Output Feature Tolerance Temp. Package and Reel Voltage Code b) MCP1802T-1202I/OT: Tape and Reel, 1.2V c) MCP1802T-1802I/OT: Tape and Reel, 1.8V Device: MCP1802: 150mA, Low Quiescent Current LDO d) MCP1802T-2502I/OT: Tape and Reel, 2.5V Tape and Reel: T = Tape and Reel e) MCP1802T-3002I/OT: Tape and Reel, 3.0V f) MCP1802T-3302I/OT: Tape and Reel, 3.3V Output Voltage *: 09 = 0.9V “Standard” 12 = 1.2V “Standard” g) MCP1802T-5002I/OT: Tape and Reel, 5.0V 18 = 1.8V “Standard” 25 = 2.5V “Standard” h) MCP1802T-6002I/OT: Tape and Reel, 6.0V 30 = 3.0V “Standard” 33 = 3.3V “Standard” 50 = 5.0V “Standard” 60 = 6.0V “Standard” *Contact factory for other output voltage options. Extra Feature Code: 0 = Fixed Tolerance: 2 = 2.0% (Standard) Temperature: I = -40C to +85C Package Type: OT = Plastic Small Outline Transistor (SOT-23) 5-lead,  2010 Microchip Technology Inc. DS22053C-page 25

MCP1802 NOTES: DS22053C-page 26  2010 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC, and may be superseded by updates. It is your responsibility to KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PIC32 logo, rfPIC and UNI/O are registered trademarks of MICROCHIP MAKES NO REPRESENTATIONS OR Microchip Technology Incorporated in the U.S.A. and other WARRANTIES OF ANY KIND WHETHER EXPRESS OR countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, INCLUDING BUT NOT LIMITED TO ITS CONDITION, MXDEV, MXLAB, SEEVAL and The Embedded Control QUALITY, PERFORMANCE, MERCHANTABILITY OR Solutions Company are registered trademarks of Microchip FITNESS FOR PURPOSE. Microchip disclaims all liability Technology Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, CodeGuard, devices in life support and/or safety applications is entirely at dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, the buyer’s risk, and the buyer agrees to defend, indemnify and ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial hold harmless Microchip from any and all damages, claims, Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified suits, or expenses resulting from such use. No licenses are logo, MPLIB, MPLINK, mTouch, Omniscient Code conveyed, implicitly or otherwise, under any Microchip Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, intellectual property rights. PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2010, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-60932-573-2 Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.  2010 Microchip Technology Inc. DS22053C-page 27

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