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  • 型号: MCP1755T-1802E/OT
  • 制造商: Microchip
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MCP1755T-1802E/OT产品简介:

ICGOO电子元器件商城为您提供MCP1755T-1802E/OT由Microchip设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 MCP1755T-1802E/OT价格参考¥3.52-¥4.96。MicrochipMCP1755T-1802E/OT封装/规格:PMIC - 稳压器 - 线性, Linear Voltage Regulator IC 正,固定式 1 Output 300mA SOT-23-5。您可以下载MCP1755T-1802E/OT参考资料、Datasheet数据手册功能说明书,资料中有MCP1755T-1802E/OT 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)

描述

IC REG LDO 1.8V 0.3A SOT23-5

产品分类

PMIC - 稳压器 - 线性

品牌

Microchip Technology

数据手册

http://www.microchip.com/mymicrochip/filehandler.aspx?ddocname=en560605

产品图片

产品型号

MCP1755T-1802E/OT

rohs

无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

-

供应商器件封装

SOT-23-5

其它名称

MCP1755T-1802E/OT-ND
MCP1755T-1802E/OTTR

包装

带卷 (TR)

安装类型

表面贴装

封装/外壳

SC-74A,SOT-753

工作温度

-40°C ~ 125°C

标准包装

3,000

电压-跌落(典型值)

0.3V @ 300mA

电压-输入

3.6 V ~ 16 V

电压-输出

1.8V

电流-输出

300mA

电流-限制(最小值)

-

稳压器拓扑

正,固定式

稳压器数

1

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PDF Datasheet 数据手册内容提取

MCP1755/1755S 300 mA, 16V, High-Performance LDO Features: Description: • High PSRR: >70dB@1kHz, typical The MCP1755/1755S is a family of CMOS low-dropout • 68.0µA Typical Quiescent Current (LDO) voltage regulators that can deliver up to 300mA of current while consuming only 68.0µA of quiescent • Input Operating Voltage Range: 3.6V to 16.0V current (typical). The input operating range is specified • 300mA Output Current for all Output Voltages from 3.6V to 16.0V, making it an ideal choice for four to • Low Dropout Voltage, 300mV typical@ 300mA six primary cell battery-powered applications, 12V • Standard Output Voltage Options (1.8V, 2.5V, mobile applications and one to three cell Li-Ion- 2.8V, 3.0V, 3.3V, 4.0V, 5.0V) powered applications. • Output Voltage Range 1.8V to 5.5V in 0.1V The MCP1755/1755S is capable of delivering 300mA Increments (tighter increments are also possible with only 300mV (typical) of input-to-output voltage per design) differential. The output voltage tolerance of the • Output Voltage Tolerances of ±2.0% over entire MCP1755 is typically +0.85% at +25°C and ±2.0% Temperature Range maximum over the operating junction temperature • Stable with Minimum 1.0µF Output Capacitance range of -40°C to +125°C. Line regulation is ±0.01% • Power Good Output typical at +25°C. • Shutdown Input Output voltages available for the MCP1755/1755S • True Current Foldback Protection range from 1.8V to 5.5V. The LDO output is stable when using only 1µF of output capacitance. Ceramic, • Short-Circuit Protection tantalum or aluminum electrolytic capacitors may all be • Overtemperature Protection used for input and output. Overcurrent limit and overtemperature shutdown provide a robust solution for Applications: any application. • Battery-powered Devices The MCP1755/1755S family has a true current foldback • Battery-powered Alarm Circuits feature. When the load impedance decreases beyond the MCP1755/1755S load rating, the output current and • Smoke Detectors voltage will gracefully foldback towards 30mA at about • CO Detectors 2 0V output. When the load impedance increases and • Pagers and Cellular Phones returns to the rated load, the MCP1755/1755S will • Smart Battery Packs follow the same foldback curve as the device comes out • Portable Digital Assistant (PDA) of current foldback. • Digital Cameras Package options for the MCP1755 include the • Microcontroller Power SOT-23-5, SOT-223-5 and 8-lead 2x3 DFN. • Consumer Products Package options for the MCP1755S device include the • Battery-powered Data Loggers SOT-223-3 and 8-lead 2x3 DFN. Related Literature: • AN765, “Using Microchip’s Micropower LDOs” (DS00765), Microchip Technology Inc., 2007 • AN766, “Pin-Compatible CMOS Upgrades to BiPolar LDOs” (DS00766), Microchip Technology Inc., 2003 • AN792, “A Method to Determine How Much Power a SOT-23 Can Dissipate in an Application” (DS00792), Microchip Technology Inc., 2001  2012 Microchip Technology Inc. DS25160A-page 1

MCP1755/1755S Package Types – MCP1755 SOT23-5 VOUT PWRGD SOT-223-5 2x3 DFN* 5 4 EP-6 VOUT 1 8 VIN PWRGD 2 EP 7 NC NC 3 9 6 NC GND 4 5 SHDN 1 2 3 1 2 3 4 5 VIN GND SHDN SHDNVIN GNDVOUTPWRGD * Includes Exposed Thermal Pad (EP); see Table3-1 Package Types – MCP1755S SOT-223-3 2x3 DFN* EP-4 VOUT 1 8 VIN NC 2 EP 7 NC NC 3 9 6 NC GND 4 5 NC 1 2 3 VIN GND VOUT * Includes Exposed Thermal Pad (EP); see Table3-2 DS25160A-page 2  2012 Microchip Technology Inc.

MCP1755/1755S Functional Block Diagrams MCP1755S V V IN OUT Error Amplifier +V IN Voltage - Reference + Over Current Over Temperature GND MCP1755 PMOS V V IN OUT Undervoltage Lock Out Sense (UVLO) I SNS Cf Rf SHDN + Driver w/limit EA and SHDN Overtemperature – Sensing SHDN V REF VIN SHDN Reference Soft-Start PWRGD Comp T DELAY GND 92% of V REF  2012 Microchip Technology Inc. DS25160A-page 3

MCP1755/1755S Typical Application Circuits + 12V CIN V 1µF Ceramic IN MCP1755S G V N O VOUT D U T 5.0V I OUT COUT 30mA 1µF Ceramic DS25160A-page 4  2012 Microchip Technology Inc.

MCP1755/1755S 1.0 ELECTRICAL † Notice: Stresses above those listed under “Maximum CHARACTERISTICS Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of Absolute Maximum Ratings † the device at those or any other conditions above those indicated in the operational listings of this specification Input Voltage, V .........................................................+17.6V IN is not implied. Exposure to maximum rating conditions VIN, PWRGD, SHDN.................(GND–0.3V) to (VIN+0.3V) for extended periods may affect device reliability. V .................................................(GND–0.3V) to (+5.5V) OUT Internal Power Dissipation............Internally-Limited (Note6) Output Short Circuit Current.................................Continuous Storage temperature.....................................-55°C to +150°C Maximum Junction Temperature....................+165°C(Note7) Operating Junction Temperature...................-40°C to +150°C ESD protection on all pinskV HBM and 400VMM AC/DC CHARACTERISTICS Electrical Specifications: Unless otherwise specified, all limits are established for V =V +1V, Note1, IN R I =1mA, C =1µF (X7R), C =1µF (X7R), T =+25°C, t =0.5V/µs, SHDN=V , LOAD OUT IN A r(VIN) IN PWRGD=10K to V . Boldface type applies for junction temperatures, T (Note7) of -40°C to +125°C. OUT J Parameters Sym. Min. Typ. Max. Units Conditions Input/Output Characteristics Input Operating Voltage V 3.6 — 16.0 V IN Output Voltage Operating V 1.8 — 5.5 V OUT-RANGE Range Input Quiescent Current I — 68 100 µA I =0mA q L Input Quiescent Current I — 0.1 4 µA SHDN=GND SHDN for SHDN mode Ground Current I — 300 400 µA I =300mA GND LOAD Maximum Output Current I 300 — — mA OUT_mA Output Soft Current Limit SCL — 450 — mA V 0.1V, OUT V =V , IN IN(MIN) Current measured 10ms after the load is applied Output Pulse Current Limit PCL — 350 — mA Pulse Duration<100ms, Duty Cycle<50%, V 0.1V, Note6 OUT Output Short Circuit I — 30 — mA V =V , OUT_SC IN IN(MIN) Foldback Current V =GND OUT Output Voltage Overshoot V — 0.5 — %V V =0 to 16V, OVER OUT IN on Start-up I =300mA LOAD Note 1: The minimum V must meet two conditions: V 3.6V and V V + V . IN IN IN R DROPOUT(MAX) 2: V is the nominal regulator output voltage when the input voltage V =V +V or V =3.6V (whichever is R IN Rated DROPOUT(MAX) IN greater); I =1mA. OUT 3: TCV =(V –V )x106/(V x ), V =highest voltage measured over the temperature OUT OUT-HIGH OUT-LOW R Temperature OUT-HIGH range. V =lowest voltage measured over the temperature range. OUT-LOW 4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Changes in output voltage due to heating effects are determined using thermal regulation specification TCV . OUT 5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below the output voltage value that was measured with an applied input voltage of V =V +1V or V =3.6V (whichever is greater). IN R IN 6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., T , T ,  ). Exceeding the maximum allowable power A J JA dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability. 7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. The test time is small enough such that the rise in the junction temperature over the ambient temperature is not significant. 8: See Section4.6 “Shutdown Input (SHDN)” and Figure2-34.  2012 Microchip Technology Inc. DS25160A-page 5

MCP1755/1755S AC/DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise specified, all limits are established for V =V +1V, Note1, IN R I =1mA, C =1µF (X7R), C =1µF (X7R), T =+25°C, t =0.5V/µs, SHDN=V , LOAD OUT IN A r(VIN) IN PWRGD=10K to V . Boldface type applies for junction temperatures, T (Note7) of -40°C to +125°C. OUT J Parameters Sym. Min. Typ. Max. Units Conditions Output Voltage Regulation V V – V +0.85% V +2.0 V Note2 OUT R R R 2.0% % V Temperature TCV — 35 ppm/°C Note3 OUT OUT Coefficient Line Regulation V / -0.05 ±0.01 +0.05 %/V V +1VV 16V OUT R IN (V xV ) OUT IN Load Regulation V /V -0.5 ±0.1 +0.5 % I =1.0mA to 300mA, Note4 OUT OUT L Dropout Voltage (Note5) V — 300 500 mV I =300mA DROPOUT L Dropout Current I — 75 120 µA V =0.95V , I =0mA DO IN R OUT Undervoltage Lockout Undervoltage Lockout UVLO — 3.0 — V Rising V IN Undervoltage Lockout UVLO — 300 — mV Falling V HYS IN Hysterisis Shutdown Input Logic High Input V 2.4 — V V SHDN-HIGH IN(MAX) Logic Low Input V 0.0 — 0.8 V SHDN-LOW Shutdown Input Leakage SHDN — 0.02 0.2 µA SHDN=16V ILK Current Power Good Output PWRGD Input V 1.7 — V V I =1mA PWRGD_VIN IN SINK Voltage Operating Range PWRGD Threshold V 90 92 94 %V Falling Edge of V PWRGD_TH OUT OUT Voltage (Referenced to V ) OUT PWRGD Threshold V — 2.0 — %V Rising Edge of V PWRGD_HYS OUT OUT Hysteresis PWRGD Output V — 0.2 0.45 V I =5.0mA, PWRGD_L PWRGD_SINK Voltage Low V =0V OUT PWRGD Output I 5.0 — — mA V 0.45V PWRGD_L PWRGD Sink Current Note 1: The minimum V must meet two conditions: V 3.6V and V V + V . IN IN IN R DROPOUT(MAX) 2: V is the nominal regulator output voltage when the input voltage V =V +V or V =3.6V (whichever is R IN Rated DROPOUT(MAX) IN greater); I =1mA. OUT 3: TCV =(V –V )x106/(V x ), V =highest voltage measured over the temperature OUT OUT-HIGH OUT-LOW R Temperature OUT-HIGH range. V =lowest voltage measured over the temperature range. OUT-LOW 4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Changes in output voltage due to heating effects are determined using thermal regulation specification TCV . OUT 5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below the output voltage value that was measured with an applied input voltage of V =V +1V or V =3.6V (whichever is greater). IN R IN 6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., T , T ,  ). Exceeding the maximum allowable power A J JA dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability. 7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. The test time is small enough such that the rise in the junction temperature over the ambient temperature is not significant. 8: See Section4.6 “Shutdown Input (SHDN)” and Figure2-34. DS25160A-page 6  2012 Microchip Technology Inc.

MCP1755/1755S AC/DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise specified, all limits are established for V =V +1V, Note1, IN R I =1mA, C =1µF (X7R), C =1µF (X7R), T =+25°C, t =0.5V/µs, SHDN=V , LOAD OUT IN A r(VIN) IN PWRGD=10K to V . Boldface type applies for junction temperatures, T (Note7) of -40°C to +125°C. OUT J Parameters Sym. Min. Typ. Max. Units Conditions PWRGD Leakage Current I — 50 200 nA V Pullup=10k to V PWRGD_LK PWRGD IN V = 16V IN PWRGD Time Delay T — 100 — µs Rising Edge of V PG OUT Detect Threshold to T — 200 — µs Falling Edge of V VDET_PWRGD OUT PWRGD Active Time after Transition from Delay V =V +50mV OUT PRWRGD_TH to V –50 mV, PWRGD_TH R =10k to V PULLUP IN AC Performance Output Delay from V T — 200 — µs V =0V to 16V, IN DELAY IN to V = 90% V V =90% V , OUT REG OUT R t =5V/µs, r(VIN) Output Delay From V to T — 80 — µs V =0V to 16V, IN DELAY_START IN V > 0.1V V 0.1V, t =5V/µs, OUT OUT r(VIN) Output Delay From SHDN T — 235 — µs V =6V, V =90%V , DELAY_SHDN IN OUT R (Note8) V =5V,SHDN=GND to V R IN — 940 — µs V =7V, V =90%V , IN OUT R V =5V, SHDN=GND to V R IN — 210 — µs V =16V,V =90%V , IN OUT R V =5V, SHDN=GND to V R IN Output Noise e — 0.3 — µV/(Hz) I =50mA, f=1kHz, N L Power Supply Ripple PSRR — 80 — dB V =5V, f=1kHz, R Rejection Ratio I =100mA, V =1V , L INAC PK-PK C =0µF, IN V V +1.5V3.6V IN R Thermal Shutdown T — 150 — °C Note6 SD Temperature Thermal Shutdown TSD — 10 — °C Hysteresis Note 1: The minimum V must meet two conditions: V 3.6V and V V + V . IN IN IN R DROPOUT(MAX) 2: V is the nominal regulator output voltage when the input voltage V =V +V or V =3.6V (whichever is R IN Rated DROPOUT(MAX) IN greater); I =1mA. OUT 3: TCV =(V –V )x106/(V x ), V =highest voltage measured over the temperature OUT OUT-HIGH OUT-LOW R Temperature OUT-HIGH range. V =lowest voltage measured over the temperature range. OUT-LOW 4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Changes in output voltage due to heating effects are determined using thermal regulation specification TCV . OUT 5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below the output voltage value that was measured with an applied input voltage of V =V +1V or V =3.6V (whichever is greater). IN R IN 6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., T , T ,  ). Exceeding the maximum allowable power A J JA dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability. 7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. The test time is small enough such that the rise in the junction temperature over the ambient temperature is not significant. 8: See Section4.6 “Shutdown Input (SHDN)” and Figure2-34.  2012 Microchip Technology Inc. DS25160A-page 7

MCP1755/1755S TEMPERATURE SPECIFICATIONS (Note 1) Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges Specified Temperature Range T -40 — +125 °C A Operating Temperature Range T -40 — +150 °C J Storage Temperature Range T -55 — +150 °C A Thermal Package Resistance Thermal Resistance, SOT-223-3  — 62 — JA °C/W  — 15 — JC Thermal Resistance, SOT-223-5  — 62 — JA °C/W  — 15 — JC Thermal Resistance, SOT-23-5  — 256 — JA °C/W  — 81 — JC Thermal Resistance, 2x3 DFN-8  — 70 — JA °C/W  — 13.4 — JC Note1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., T , T ,  ). Exceeding the A J JA maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability. DS25160A-page 8  2012 Microchip Technology Inc.

MCP1755/1755S 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note1: Unless otherwise indicatedV =3.3V, C =1µF Ceramic (X7R), C =1µF Ceramic (X7R), I =1mA, T =+25°C, R OUT IN L A V =V +1V or V =3.6V (whichever is greater), SHDN=V , package=SOT-223. IN R IN IN 2: Junction Temperature (T ) is approximated by soaking the device under test to an ambient temperature equal to the J desired junction temperature. The test time is small enough such that the rise in junction temperature over the ambient temperature is not significant. 100 350 90 +130°C µA) 80 A)300 nt Current ( 45670000 -45°C 0°C +25°C +90°C d Current (µ122505000 VOUT= 1.8V VOUT= 5.0V VOUT= 3.3V e n scuies 323000 uGrou100 Q 10 VIOUT== 01 .µ8AV 50 OUT 0 0 0 2 4 6 8 10 12 14 16 0 50 100 150 200 250 300 Input Voltage (V) Load Current (mA) FIGURE 2-1: Quiescent Current vs. FIGURE 2-4: Ground Current vs. Load Input Voltage. Current. 90 90 80 +130°C 80 VOUT= 5.0V µA) 70 µA)70 VOUT= 1.8V nt ( 60 nt (60 Curre 50 0°C +25°C +90°C Curre50 VOUT= 3.3V nt 40 -45°C nt 40 sceuies 3200 ceuies323000 Q 10 VOUT= 3.3V Q10 IOUT= 0 µA 0 0 0 2 4 6 8 10 12 14 16 -40 -25 -10 5 20 35 50 65 80 95 110125 Input Voltage (V) Junction Temperature (°C) FIGURE 2-2: Quiescent Current vs. FIGURE 2-5: Quiescent Current vs. Input Voltage. Junction Temperature. 90 2.5 +130°C 80 A) Current (µ567000 0°C +25°C +90°C oltage (V)12..50 -405°C°C cent 3400 -45°C put V1.0 ++2950°°CC suies20 tOu0.5 ++113300°CC Q10 VIOOUUTT== 05 .µ0AV VIOOUUTT== 1 1 m.8AV 0 0.0 0 2 4 6 8 10 12 14 16 0 2 4 6 8 10 12 14 16 Input Voltage (V) Input Voltage (V) FIGURE 2-3: Quiescent Current vs. FIGURE 2-6: Output Voltage vs. Input Input Voltage. Voltage.  2012 Microchip Technology Inc. DS25160A-page 9

MCP1755/1755S Note1: Unless otherwise indicatedV =3.3V, C =1µF Ceramic (X7R), C =1µF Ceramic (X7R), I =1mA, R OUT IN L T =+25°C, V =V +1V or V =3.6V (whichever is greater), SHDN=V , package=SOT-223 A IN R IN IN 3.330 3.5 3.0 3.320 +130°C +90°C +25°C e (V)2.5 +-4025°5C°°CC ge (V)3.310 oltag2.0 ++19300°°CC Volta3.300 0°C ut V1.5 put 3.290 -45°C tput11.00 utOu O 3.280 VOUT= 3.3V 0.5 VOUT= 3.3V VIN= 4.3V 0.0 IOUT= 1 mA 3.270 0 50 100 150 200 250 300 0 2 4 6 8 10 12 14 16 Load Current (mA) Input Voltage (V) FIGURE 2-7: Output Voltage vs. Input FIGURE 2-10: Output Voltage vs. Load Voltage. Current. 6 5.02 +25°C +90°C 5.01 5 e (V)4 -45°C e (V)5.00 ag 0°C ag4.99 0°C +130°C ut Volt3 +++1293500°°°CCC ut Volt4.98 -45°C p2 p tut tut44.9977 O O 01 VIOOUUTT== 1 5 m.0AV 44..9956 VVOIUNT== 6 5.0.0VV 0 2 4 6 8 10 12 14 16 0 50 100 150 200 250 300 Input Voltage (V) Load Current (mA) FIGURE 2-8: Output Voltage vs. Input FIGURE 2-11: Output Voltage vs. Load Voltage. Current. 1.830 0.6 +130°C +90°C +25°C VOUT= 3.3V 1.820 0.5 V) V) e ( e ( 0.4 ag1.810 ag +25°C Volt -45°C 0°C Volt 0.3 +90°C ut 1.800 ut p o 0.2 +130°C utOu1.790 pDrop 0.1 0°C VVOIUNT== 3 1.6.8VV 0 -45°C 1.780 0 50 100 150 200 250 300 0 50 100 150 200 250 300 Load Current (mA) Load Current (mA) FIGURE 2-9: Output Voltage vs. Load FIGURE 2-12: Dropout Voltage vs. Load Current. Current. DS25160A-page 10  2012 Microchip Technology Inc.

MCP1755/1755S Note1: Unless otherwise indicatedV =3.3V, C =1µF Ceramic (X7R), C =1µF Ceramic (X7R), I =1mA, R OUT IN L T =+25°C, V =V +1V or V =3.6V (whichever is greater), SHDN=V , package=SOT-223 A IN R IN IN 0.50 1.0 0.45 VOUT= 5.0V 0.9 V = 3.3V OUT Voltage (V)0000....23345050 +90°C +25°C urrent (A) 0000....7568 -4+012C5 C HarRd OSUhT o<r t0 .C1i(cid:2)rc(cid:3)uit pout Drop0000....12115005 +130°C 0°C Output C000...234 +25C 0.05 -45°C 0.1 0.00 0.0 0 50 100 150 200 250 300 2 4 6 8 10 12 14 16 Load Current (mA) Input Voltage (V) FIGURE 2-13: Dropout Voltage vs. Load FIGURE 2-16: Short Circuit Current vs. Current. Input Voltage. 0.7 VOUT=3.3V 0.6 VOUT= 3.3V V =4.3V to 5.3V Soft Short Circuit 5.3V IOINUT=10mA nt (A)0.5 ROUT= 5.5(cid:2) VIN 4.3V urre0.4 VOUT (AC coupled, 20mV/Div) put Cutp00..32 +125°C +25°C -40°C O 0.1 Time=10µs/Div 0 2 4 6 8 10 12 14 16 Input Voltage (V) FIGURE 2-14: Dynamic Line Response. FIGURE 2-17: Short Circuit Current vs. Input Voltage. 0.40 VOUT=3.3V 0.35 VIN= 16V 5.3V VIOINU=T=4.130V0 tmo A5.3V on (%) 00..2350 VIN= 12V VIN= 10V VIN 4.3V gulati 00..1250 VIN= 6V V (AC coupled, 20mv/Div) d Red 0.10 VIN= 4.3V VIN= 3.6V OUT a o 0.05 L 0.00 VOUT= 1.8V -0.05 IOUT = 1 mA to 300 mA Time=10µs/Div -40 -25 -10 5 20 35 50 65 80 95 110125 Temperature (ºC) FIGURE 2-15: Dynamic Line Response. FIGURE 2-18: Load Regulation vs. Temperature.  2012 Microchip Technology Inc. DS25160A-page 11

MCP1755/1755S Note1: Unless otherwise indicatedV =3.3V, C =1µF Ceramic (X7R), C =1µF Ceramic (X7R), I =1mA, R OUT IN L T =+25°C, V =V +1V or V =3.6V (whichever is greater), SHDN=V , package=SOT-223 A IN R IN IN 0.40 0.030 0.35 VIN= 16V 0.025 VOUT= 3.3V on (%) 00..2350 VIN= 12V n (%/V) 0.020 150 mA300 m1A00 mA Regulati 000...112050 VIN= 6V VIN= 10V egulatio 00..001105 50 mA 0 mA d d 00.0055 VIN= 4.3V R 00.000055 a e Lo-00..0005 VOUT= 3.3V Lin 0.000 10 mA -0.10 IOUT = 1 mA to 300 mA -0.005 -40 -25 -10 5 20 35 50 65 80 95 110125 -40 -25 -10 5 20 35 50 65 80 95 110125 Temperature (°C) Temperature (°C) FIGURE 2-19: Load Regulation vs. FIGURE 2-22: Line Regulation vs. Temperature. Temperature. 0.35 0.03 0.30 VIN = 16V VOUT = 5.0V on (%) 00..2205 VIN = 12V n (%/V) 00..0023 300 mA ulati 0.15 atio 0.02 150 mA 100 mA 50 mA Reg 0.10 VIN = 10V egul 0.01 10 mA oad 00..0005 VIN = 6V ne R 0.01 L-0.05 VOUT = 5.0V Li 0.00 IOUT = 1 mA to 300 mA 0 mA -0.10 -0.01 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (C) Temperature (C) FIGURE 2-20: Load Regulation vs. FIGURE 2-23: Line Regulation vs. Temperature. Temperature. 0.045 0 0.040 300 mA VOUT= 1.8V -20 VVOINU=T =4 .11.V8V %/V)0.035 -40 VCIINNA=C 0= µ1FVpk-pk n (0.030 150 mA B) o d -60 ulati00..002205 100 mA RR ( -80 IOUT= 300 mA g 50 mA S Re0.015 0 mA P-110000 e Lin00..000150 10 mA -120 IOUT= 10 mA 0.000 -140 -40 -25 -10 5 20 35 50 65 80 95 110125 0.01 0.1 1 10 100 Temperature (°C) Frequency (kHz) FIGURE 2-21: Line Regulation vs. FIGURE 2-24: Power Supply Ripple Temperature. Rejection vs. Frequency. DS25160A-page 12  2012 Microchip Technology Inc.

MCP1755/1755S Note1: Unless otherwise indicatedV =3.3V, C =1µF Ceramic (X7R), C =1µF Ceramic (X7R), I =1mA, R OUT IN L T =+25°C, V =V +1V or V =3.6V (whichever is greater), SHDN=V , package=SOT-223 A IN R IN IN 0 --2100 VVVOIINNUA=TC =6= . 551.VV0Vpk-pk 4.3V VVIONU=T4=.33V.3V -30 CIN= 0 µF dB) -40 IOUT= 10 mA ILOAD=1mA RR ( -50 SHDN 0V 3.3V PWRGD=10K to VOUT S -60 P -7700 IIOOUUTT=330000mmAA 3.3V -80 VOUT 0V -90 PWRGD 0V -100 0.01 0.1 1 10 100 Time=80µs/Div Frequency (kHz) FIGURE 2-25: Power Supply Ripple FIGURE 2-28: Start-up from SHDN. Rejection vs. Frequency. 2.0 10.000 1.8 C = 1 μF, C = 1 μF, I = 50 mA IN OUT OUT V)1.6 se (μV/(cid:2)Hz) 1.000 VOVUITN== 13..86VV ut Voltage (0111....8024 VVIONU=T =3 .16.V8V Noi utpu00.66 ut utpu 00..110000 VVOOVUUITTN== 556..000VVV O00..24 IDneccrereaassiningg L Looaadd O V = 3.3V 0.0 OUT V = 4.3V 0.010 IN 0 0.1 0.2 0.3 0.4 0.5 0.01 0.1 1 10 100 1000 Output Current (A) Frequency (kHz) FIGURE 2-29: Short Circuit Current FIGURE 2-26: Output Noise vs. Frequency Foldback. (3 lines, V =1.8V, 3.3V, 5.0V). R 3.5 3.0 V =3.3V OUT V) 4.3V VIN=0 to 4.3V e (2.5 g ILOAD=1mA Volta2.0 VVIONU=T =4 .33.V3V VIN 0V 3.3V PWRGD=10K to VOUT put 1.5 tut11.00 O 3.3V V 0V 0.5 Increasing Load OUT Decreasing Load 0.0 PWRGD 0V 0 0.1 0.2 0.3 0.4 0.5 Time=80µs/Div Output Current (A) FIGURE 2-30: Short Circuit Current FIGURE 2-27: Start-up from V . Foldback. IN  2012 Microchip Technology Inc. DS25160A-page 13

MCP1755/1755S Note1: Unless otherwise indicatedV =3.3V, C =1µF Ceramic (X7R), C =1µF Ceramic (X7R), I =1mA, R OUT IN L T =+25°C, V =V +1V or V =3.6V (whichever is greater), SHDN=V , package=SOT-223 A IN R IN IN 6.0 1000 V)5.0 µs) 890000 +25 °C VOUT= 5.0V ge (4.0 me ( 700 utput VoltaOu231...000 IDneccrerVVeaIONasUs=iTni n=6gg . 50L .LVo0oVaadd p Delay TiStartup 345612300000000000000 +90 °C -20 °C 0.0 0 +125 °C -40 °C 0 0.1 0.2 0.3 0.4 0.5 6 8 10 12 14 16 Output Current (A) Input Voltage (V) FIGURE 2-31: Short Circuit Current FIGURE 2-34: Start-up Delay From SHDN Foldback. to 90% V . OUT V (AC coupled, 200mV/Div) OUT IOUT (200mA/Div) VOUT=3.3V I =100µA to 300mA OUT Time=20µs/Div FIGURE 2-32: Dynamic Load Response. V (AC coupled, 200mV/Div) OUT IOUT (200mA/Div) VOUT=3.3V I =1mA to 300mA OUT Time=20µs/Div FIGURE 2-33: Dynamic Load Response. DS25160A-page 14  2012 Microchip Technology Inc.

MCP1755/1755S 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table3-1 and Table3-2. TABLE 3-1: MCP1755 PIN FUNCTION TABLE SOT-223-5 SOT-23-5 2x3 DFN Name Function 4 5 1 V Regulated Voltage Output OUT 5 4 2 PWRGD Open Drain Power Good Output — — 3, 6, 7 NC No connection 3 2 4 GND Ground Terminal 1 3 5 SHDN Shutdown Input 2 1 8 V Unregulated Supply Voltage IN 6 — 9 EP Exposed Pad, Connected to GND TABLE 3-2: MCP1755S PIN FUNCTION TABLE SOT-223-3 2x3 DFN Name Function 3 1 V Regulated Voltage Output OUT — 2, 3, 5, 6, 7 NC No connection 2 4 GND Ground Terminal 1 8 V Unregulated Supply Voltage IN 4 9 EP Exposed Pad, Connected to GND 3.1 Regulated Output Voltage (V ) 3.3 Ground Terminal (GND) OUT Connect V to the positive side of the load and the Regulator ground. Tie GND to the negative side of the OUT positive side of the output capacitor. The positive side output capacitor and also to the negative side of the of the output capacitor should be physically located as input capacitor. Only the LDO bias current flows out of close to the LDO V pin as is practical. The current this pin; there is no high current. The LDO output OUT flowing out of this pin is equal to the DC load current. regulation is referenced to this pin. Minimize voltage drops between this pin and the negative side of the 3.2 Power Good Output (PWRGD) load. The PWRGD output is an open-drain output used to 3.4 Shutdown Input (SHDN) indicate when the LDO output voltage is within 92% (typically) of its nominal regulation value. The PWRGD The SHDN input is used to turn the LDO output voltage threshold has a typical hysteresis value of 2%. The on and off. When the SHDN input is at a logic-high PWRGD output is delayed by 100µs (typical) from the level, the LDO output voltage is enabled. When the time the LDO output is within 92%+3% (maximum SHDN input is pulled to a logic-low level, the LDO hysteresis) of the regulated output value on power-up. output voltage is disabled. When the SHDN input is This delay time is internally fixed. The PWRGD pin may pulled low, the PWRGD output also goes low and the be pulled up to V or V . Pulling up to V LDO enters a low quiescent current shutdown state. IN OUT OUT conserves power when the device is in Shutdown (SHDN=0V) mode.  2012 Microchip Technology Inc. DS25160A-page 15

MCP1755/1755S 3.5 Unregulated Input Voltage (V ) IN Connect V to the input unregulated source voltage. IN Like all low dropout linear regulators, low source impedance is necessary for the stable operation of the LDO. The amount of capacitance required to ensure low source impedance will depend on the proximity of the input source capacitors or battery type. For most applications, 1µF of capacitance will ensure stable operation of the LDO circuit. The input capacitor should have a capacitance value equal to or larger than the output capacitor for performance applications. The input capacitor will supply the load current during transients and improve performance. For applications that have load currents below 10mA, the input capacitance requirement can be lowered. The type of capacitor used may be ceramic, tantalum or aluminum electrolytic. The low ESR characteristics of the ceramic will yield better noise and PSRR performance at high frequency. 3.6 Exposed Pad (EP) Some of the packages have an exposed metal pad on the bottom of the package. The exposed metal pad gives the device better thermal characteristics by providing a good thermal path to either the PCB or heatsink to remove heat from the device. The exposed pad of the package is internally connected to GND. DS25160A-page 16  2012 Microchip Technology Inc.

MCP1755/1755S 4.0 DEVICE OVERVIEW 4.3 Output Capacitor The MCP1755/1755S is a 300mA output current, low- The MCP1755/1755S requires a minimum output dropout (LDO) voltage regulator. The low-dropout capacitance of 1µF for output voltage stability. Ceramic voltage of 300mV typical at 300mA of current makes capacitors are recommended because of their size, it ideal for battery-powered applications. The input cost and environmental robustness qualities. voltage range is 3.6V to 16.0V. Unlike other high output Aluminum-electrolytic and tantalum capacitors can be current LDOs, the MCP1755/1755S typically draws used on the LDO output as well. The Equivalent Series only 300µA of quiescent current for a 300mA load. Resistance (ESR) of the electrolytic output capacitor The MCP1755 adds a shutdown control input pin and a should be no greater than 2ohms. The output capacitor power good output pin. The output voltage options are should be located as close to the LDO output as is fixed. practical. Ceramic materials X7R and X5R have low 4.1 LDO Output Voltage temperature coefficients and are well within the acceptable ESR range required. A typical 1µF The MCP1755 LDO has a fixed output voltage. The X7R0805 capacitor has an ESR of 50milli-ohms. output voltage range is 1.8V to 5.5V. The MCP1755S Larger LDO output capacitors can be used with the LDO is available as a fixed voltage device. MCP1755/1755S to improve dynamic performance 4.2 Output Current and and power supply ripple rejection performance. A Current Limiting maximum of 1000µF is recommended. Aluminum- electrolytic capacitors are not recommended for low The MCP1755/1755S LDO is tested and ensured to temperature applications of <-25°C. supply a minimum of 300mA of output current. The MCP1755/1755S has no minimum output load, so the 4.4 Input Capacitor output load current can go to 0mA and the LDO will continue to regulate the output voltage to within Low input source impedance is necessary for the LDO tolerance. output to operate properly. When operating from The MCP1755/1755S also incorporates a true output batteries, or in applications with long lead length (>10inches) between the input source and the LDO, current foldback. If the output load presents an some input capacitance is recommended. A minimum excessive load due to a low-impedance short circuit of 1.0µF to 4.7µF is recommended for most condition, the output current and voltage will fold back applications. towards 30mA and 0V, respectively. The output voltage and current will resume normal levels when the For applications that have output step load excessive load is removed. If the overload condition is requirements, the input capacitance of the LDO is very a soft overload, the MCP1755/1755S will supply higher important. The input capacitance provides the LDO load currents of up to typically 350mA. This allows for with a good local low-impedance source to pull the device usage in applications that have pulsed load transient currents from, in order to respond quickly to currents having an average output current value of the output load step. For good step response 300mA or less. performance, the input capacitor should be of equivalent or higher value than the output capacitor. Output overload conditions may also result in an The capacitor should be placed as close to the input of overtemperature shutdown of the device. If the junction the LDO as is practical. Larger input capacitors will also temperature rises above +150°C (typical), the LDO will shut down the output. See Section4.8, help reduce any high-frequency noise on the input and output of the LDO and reduce the effects of any Overtemperature Protection for more information on overtemperature shutdown. inductance that exists between the input source voltage and the input capacitance of the LDO. 6.0 5.0 V) e (4.0 g a olt3.0 VIN= 6.0V ut V VOUT= 5.0V p2.0 utu O 1.0 Increasing Load Decreasing Load 0.0 0 0.1 0.2 0.3 0.4 0.5 Output Current (A) FIGURE 4-1: Typical Current Foldback.  2012 Microchip Technology Inc. DS25160A-page 17

MCP1755/1755S 4.5 Power Good Output (PWRGD) The open drain PWRGD output is used to indicate when the output voltage of the LDO is within 92% V IN T (typical value, see Section1.0 “Electrical DELAY_SHDN Characteristics” for Minimum and Maximum specifications) of its nominal regulation value. As the output voltage of the LDO rises, the open-drain PWRGD output will actively be held low until the output SHDN TPG voltage has exceeded the power good threshold plus the hysteresis value. Once this threshold has been exceeded, the power good time delay is started (shown as T in the AC/DC Characteristics table). The PG power good time delay is fixed at 100µs (typical). After VOUT the time delay period, the PWRGD open-drain output becomes inactive and may be pulled high by an external pullup resistor, indicating that the output voltage is stable and within regulation limits. The power PWRGD good output is typically pulled up to V or V . Pulling IN OUT the signal up to V conserves power during OUT Shutdown mode. C =1.0µF LOAD If the output voltage of the LDO falls below the power good threshold, the power good output will transition FIGURE 4-3: Power Good Timing from low. The power good circuitry has a 200µs delay when Shutdown. detecting a falling output voltage, which helps to increase noise immunity of the power good output and 4.6 Shutdown Input (SHDN) avoid false triggering of the power good output during fast output transients. See Figure4-2 for power good The SHDN input is an active-low input signal that turns timing characteristics. the LDO on and off. The SHDN threshold is a fixed voltage level. The minimum value of this shutdown When the LDO is put into Shutdown mode using the threshold required to turn the output ON is 2.4V. The SHDN input, the power good output is pulled low maximum value required to turn the output OFF is 0.8V. immediately, indicating that the output voltage will be out of regulation. The timing diagram for the power The SHDN input will ignore low-going pulses (pulses good output when using the shutdown input is shown in meant to shut down the LDO) that are up to 400ns in Figure4-3. pulse width. If the shutdown input is pulled low for more than 400ns, the LDO will enter Shutdown mode. This The power good output is an open-drain output that can small bit of filtering helps to reject any system noise be pulled up to any voltage that is equal to or less than spikes on the shutdown input signal. the LDO input voltage. This output is capable of sinking a minimum of 5mA (V <0.45V). On the rising edge of the SHDN input, the shutdown PWRGD circuitry has a 135µs delay before allowing the LDO output to turn on. This delay helps to reject any false turn-on signals or noise on the SHDN input signal. After V PWRGD_TH the 135µs delay, the LDO output enters its soft-start period as it rises from 0V to its final regulation value. If V OUT the SHDN input signal is pulled low during the 135µs T PG delay period, the timer will be reset and the delay time will start over again on the next rising edge of the VOH SHDN input. The total time from the SHDN input going TV DET_PWRGD high (turn-on) to the LDO output being in regulation is typically 235µs. See Figure4-4 for a timing diagram of PWRGD the SHDN input. V OL FIGURE 4-2: Power Good Timing. DS25160A-page 18  2012 Microchip Technology Inc.

MCP1755/1755S 4.8 Overtemperature Protection T DELAY_SHDN The MCP1755/1755S LDO has temperature-sensing 400ns (typical) circuitry to prevent the junction temperature from 135µs exceeding approximately +150°C. If the LDO junction temperature does reach +150°C, the LDO output will SHDN be turned off until the junction temperature cools to approximately +140°C, at which point the LDO output will automatically resume normal operation. If the internal power dissipation continues to be excessive, the device will again shut off. The junction temperature V of the die is a function of power dissipation, ambient OUT temperature and package thermal resistance. See Section5.0 “Application Circuits and Issues” for CLOAD = 1.0 µF more information on LDO power dissipation and junction temperature. FIGURE 4-4: Shutdown Input Timing Diagram. 4.7 Dropout Voltage and Undervoltage Lockout Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below the nominal value that was measured with a V +1.0V differential applied. The MCP1755/1755S R LDO has a very low dropout voltage specification of 300mV (typical) at 300mA of output current. See Section1.0 “Electrical Characteristics” for maximum dropout voltage specifications. The MCP1755/1755S LDO operates across an input voltage range of 3.6V to 16.0V and incorporates input undervoltage lockout (UVLO) circuitry that keeps the LDO output voltage off until the input voltage reaches a minimum of 3.00V (typical) on the rising edge of the input voltage. As the input voltage falls, the LDO output will remain on until the input voltage level reaches 2.70V (typical). For high-current applications, voltage drops across the PCB traces must be taken into account. The trace resistances can cause significant voltage drops between the input voltage source and the LDO. For applications with input voltages near 3.0V, these PCB trace voltage drops can sometimes lower the input voltage enough to trigger a shutdown due to undervoltage lockout.  2012 Microchip Technology Inc. DS25160A-page 19

MCP1755/1755S NOTES: DS25160A-page 20  2012 Microchip Technology Inc.

MCP1755/1755S 5.0 APPLICATION CIRCUITS The maximum continuous operating junction AND ISSUES temperature specified for the MCP1755/1755S is +150°C. To estimate the internal junction temperature of the MCP1755/1755S, the total internal power 5.1 Typical Application dissipation is multiplied by the thermal resistance from junction to ambient (R ). The thermal resistance from The MCP1755/1755S is most commonly used as a JA junction to ambient for the SOT-23 package is voltage regulator. The low quiescent current and low estimated at 336°C/W. dropout voltage make it ideal for many battery-powered applications. EQUATION 5-2: T = P R +T MCP1755S JMAX TOTAL JA AMAX V IN VOUT GND V 3.6V to 4.8V TJ(MAX) = Maximum continuous junction 1.8V IN C temperature VOUT IN IOUT C 1µF Ceramic PTOTAL = Total device power dissipation 50mA OUT R = Thermal resistance from junction 1µF Ceramic JA to ambient T = Maximum ambient temperature FIGURE 5-1: Typical Application Circuit. AMAX 5.1.1 APPLICATION INPUT CONDITIONS The maximum power dissipation capability for a package can be calculated given the junction-to- Package Type = SOT-23 ambient thermal resistance and the maximum ambient Input Voltage Range = 3.6V to 4.8V temperature for the application. The following equation V maximum = 4.8V can be used to determine the package maximum IN internal power dissipation. V typical = 1.8V OUT I = 50mA maximum OUT EQUATION 5-3: T –T  5.2 Power Calculations P = ------J-----M----A---X---------------A-----M----A---X------ DMAX R JA 5.2.1 POWER DISSIPATION P = Maximum device power dissipation D(MAX) The internal power dissipation of the MCP1755/1755S T = Maximum continuous junction J(MAX) is a function of input voltage, output voltage and output temperature current. The power dissipation, as a result of the T = Maximum ambient temperature quiescent current draw, is so low, it is insignificant A(MAX) R = Thermal resistance from junction (68.0µAxV ). The following equation can be used to JA IN to ambient calculate the internal power dissipation of the LDO. EQUATION 5-1: EQUATION 5-4: P = V –V I T = P R LDO INMAX OUTMIN OUTMAX JRISE DMAX JA T = Rise in device junction temperature J(RISE) PLDO = LDO Pass device internal power over the ambient temperature dissipation P = Maximum device power dissipation D(MAX) V = Maximum input voltage IN(MAX) R = Thermal resistance from junction JA VOUT(MIN) = LDO minimum output voltage to ambient EQUATION 5-5: T = T +T J JRISE A T = Junction temperature J T = Rise in device junction temperature J(RISE) over the ambient temperature T = Ambient temperature A  2012 Microchip Technology Inc. DS25160A-page 21

MCP1755/1755S 5.3 Voltage Regulator 5.3.2 JUNCTION TEMPERATURE ESTIMATE Internal power dissipation, junction temperature rise, To estimate the internal junction temperature, the junction temperature and maximum power dissipation calculated temperature rise is added to the ambient or are calculated in the following example. The power offset temperature. For this example, the worst-case dissipation, as a result of ground current, is small junction temperature is estimated below. enough to be neglected. EXAMPLE 5-3: EXAMPLE 5-1: POWER DISSIPATION T = T +T J JRISE A(MAX) Package T = 91.3°C J Package Type = SOT-23 Maximum Package Power Dissipation Examples at Input Voltage +40°C Ambient Temperature V = 3.6V to 4.8V IN SOT-23 (336.0°C/Watt=R ) JA LDO Output Voltages and Currents P = (125°C–40°C)/336°C/W D(MAX) V = 1.8V OUT P = 253mW D(MAX) I = 50mA OUT SOT-89 (153.3°C/Watt=R ) JA Maximum Ambient Temperature P = (125°C–40°C)/153.3°C/W D(MAX) T = +40°C A(MAX) P = 554mW D(MAX) Internal Power Dissipation 5.4 Voltage Reference Internal Power dissipation is the product of the LDO output current times the voltage across the LDO The MCP1755/1755S can be used not only as a (VIN to VOUT). regulator, but also as a low quiescent current voltage P = (V –V )xI reference. In many microcontroller applications, the LDO(MAX) IN(MAX) OUT(MIN) OUT(MAX) initial accuracy of the reference can be calibrated using P = (4.8V–(0.97 x 1.8V))x50mA LDO production test equipment or by using a ratio P = 152.7mW LDO measurement. When the initial accuracy is calibrated, the thermal stability and line regulation tolerance are 5.3.1 DEVICE JUNCTION the only errors introduced by the MCP1755/1755S TEMPERATURE RISE LDO. The low-cost, low quiescent current and small The internal junction temperature rise is a function of ceramic output capacitor are all advantages when internal power dissipation and the thermal resistance using the MCP1755/1755S as a voltage reference. from junction to ambient for the application. The thermal resistance from junction to ambient (R ) is derived Ratio Metric Reference JA from an EIA/JEDEC standard for measuring thermal MCP1755S PIC® resistance for small surface mount packages. The EIA/ 68 µA Bias Microcontroller V JTEheDrEmCa l sCpoencdifuiccatitvioitny Tise stJ EBSoaDr5d1 -fo7r, L“eHaigdhe d ESffuercfaticvee C1IµNF GINNVDOUT COUT VREF Mount Packages”. The standard describes the test 1µF method and board specifications for measuring the A DO thermal resistance from junction to ambient. The actual AD1 thermal resistance for a particular application can vary depending on many factors, such as copper area and Bridge Sensor thickness. Refer to AN792, “A Method to Determine How Much Power a SOT-23 Can Dissipate in an FIGURE 5-2: Using the MCP1755/1755S Application” (DS00792), for more information regarding as a Voltage Reference. this subject. EXAMPLE 5-2: T = P xR J(RISE) TOTAL JA TJRISE = 152.7mWx336.0°C/Watt TJRISE = 51.3°C DS25160A-page 22  2012 Microchip Technology Inc.

MCP1755/1755S 5.5 Pulsed Load Applications For some applications, there are pulsed load current events that may exceed the specified 300mA maximum specification of the MCP1755/1755S. The internal current limit of the MCP1755/1755S will prevent high peak load demands from causing non- recoverable damage. The 300mA rating is a maximum average continuous rating. As long as the average current does not exceed 300mA, higher pulsed load currents can be applied to the MCP1755/1755S. The typical foldback current limit for the MCP1755/1755S is 350mA (T =+25°C). A  2012 Microchip Technology Inc. DS25160A-page 23

MCP1755/1755S NOTES: DS25160A-page 24  2012 Microchip Technology Inc.

MCP1755/1755S 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 3-Lead SOT-223 (MCP1755S only) Example: First Line Part Number Code MCP1755S-1802E/DB 1755S18 1755S18 EDBY1240 MCP1755ST-1802E/DB 1755S18 256 MCP1755S-3302E/DB 1755S33 MCP1755ST-3302E/DB 1755S33 MCP1755S-5002E/DB 1755S50 MCP1755ST-5002E/DB 1755S50 5-Lead SOT-223 (MCP1755 only) Example: First Line Part Number Code 175518 MCP1755T-1802E/DC 175518 EDCY1240 MCP1755T-3302E/DC 175533 256 MCP1755T-5002E/DC 175550 5-Lead SOT-23 (MCP1755 only) Example: Part Number Code MCP1755T-1802E/OT 2SNN 2S25 MCP1755T-3302E/OT 3CNN MCP1755T-5002E/OT 3DNN Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e3 Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.  2012 Microchip Technology Inc. DS25160A-page 25

MCP1755/1755S Package Marking Information (Continued) 8-Lead DFN (2x3) Example: First Line Part Number Code ALZ MCP1755-1802E/MC ALZ 240 MCP1755T-1802E/MC ALZ 256 MCP1755-3302E/MC AKA MCP1755T-3302E/MC AKA MCP1755-5002E/MC AKB MCP1755T-5002E/MC AKB MCP1755S-1802E/MC AMA MCP1755ST-1802E/MC AMA MCP1755S-3302E/MC AMB MCP1755ST-3302E/MC AMB MCP1755S-5002E/MC AMC MCP1755ST-5002E/MC AMC DS25160A-page 26  2012 Microchip Technology Inc.

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DS25160A-page 27

MCP1755/1755S (cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:15)(cid:9)(cid:16)(cid:17)(cid:7)(cid:11)(cid:11)(cid:9)(cid:18)(cid:19)(cid:13)(cid:11)(cid:14)(cid:20)(cid:6)(cid:9)(cid:21)(cid:22)(cid:7)(cid:20)(cid:12)(cid:14)(cid:12)(cid:13)(cid:23)(cid:22)(cid:9)(cid:24)(cid:25)(cid:26)(cid:27)(cid:9)(cid:28)(cid:16)(cid:18)(cid:21)(cid:4)(cid:29)(cid:29)(cid:3)(cid:30) (cid:31)(cid:23)(cid:13)(cid:6)! .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) DS25160A-page 28  2012 Microchip Technology Inc.

MCP1755/1755S "(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:15)(cid:9)(cid:16)(cid:17)(cid:7)(cid:11)(cid:11)(cid:9)(cid:18)(cid:19)(cid:13)(cid:11)(cid:14)(cid:20)(cid:6)(cid:9)(cid:21)(cid:22)(cid:7)(cid:20)(cid:12)(cid:14)(cid:12)(cid:13)(cid:23)(cid:22)(cid:9)(cid:24)(cid:25)#(cid:27)(cid:9)(cid:28)(cid:16)(cid:18)(cid:21)(cid:4)(cid:29)(cid:29)(cid:3)(cid:30) (cid:31)(cid:23)(cid:13)(cid:6)! .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) D b2 E1 E 1 2 3 4 N e e1 A A2 φ c b A1 L 3(cid:15)(cid:7)# (cid:6)(cid:19)44(cid:19)(cid:6)"(cid:13)"(cid:26)(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)4(cid:14)(cid:28)! 5 ( 4(cid:14)(cid:28)!(cid:2)1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:30)(cid:20)(cid:3)(cid:5)(cid:2))(cid:22)* 6$# (cid:7)!(cid:14)(cid:2)4(cid:14)(cid:28)!(cid:2)1(cid:7)#(cid:8)(cid:11) (cid:14)(cid:30) ((cid:20)(cid:4)<(cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2):(cid:14)(cid:7)(cid:17)(cid:11)# (cid:25) ; ; (cid:30)(cid:20)<(cid:4) (cid:22)#(cid:28)(cid:15)!(cid:10)%% (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:3) (cid:4)(cid:20)(cid:4)9 (cid:4)(cid:20)(cid:30)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2):(cid:14)(cid:7)(cid:17)(cid:11)# (cid:25)(cid:3) (cid:30)(cid:20)(( (cid:30)(cid:20)9(cid:4) (cid:30)(cid:20)9( 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)=(cid:7)!#(cid:11) " 9(cid:20)<9 (cid:5)(cid:20)(cid:4)(cid:4) (cid:5)(cid:20)(cid:3)9 (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)=(cid:7)!#(cid:11) "(cid:30) (cid:29)(cid:20)(cid:23)( (cid:29)(cid:20)((cid:4) (cid:29)(cid:20)(( 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) 9(cid:20)(cid:23)( 9(cid:20)((cid:4) 9(cid:20)(( 4(cid:14)(cid:28)!(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:8) (cid:4)(cid:20)(cid:3)(cid:23) (cid:4)(cid:20)(cid:3)< (cid:4)(cid:20)(cid:29)(cid:3) 4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8 (cid:4)(cid:20)(cid:23)(cid:30) (cid:4)(cid:20)(cid:23)((cid:5) (cid:4)(cid:20)((cid:30) (cid:13)(cid:28)8(cid:2)4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8(cid:3) (cid:3)(cid:20)(cid:24)( (cid:29)(cid:20)(cid:4)(cid:4) (cid:29)(cid:20)(cid:4)( .(cid:10)(cid:10)#(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) 4 (cid:4)(cid:20)(cid:24)(cid:30) ; (cid:30)(cid:20)(cid:30)(cid:23) 4(cid:14)(cid:28)!(cid:2)(cid:25)(cid:15)(cid:17)(cid:16)(cid:14) (cid:3) (cid:4)> (cid:23)> <> (cid:31)(cid:23)(cid:13)(cid:6)(cid:12)! (cid:30)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15) (cid:2)(cid:21)(cid:2)(cid:28)(cid:15)!(cid:2)"(cid:30)(cid:2)!(cid:10)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)$!(cid:14)(cid:2)(cid:31)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:20)(cid:2)(cid:6)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:2) (cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:14)&(cid:8)(cid:14)(cid:14)!(cid:2)(cid:4)(cid:20)(cid:30)(cid:3)(cid:5)(cid:2)(cid:31)(cid:31)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2) (cid:7)!(cid:14)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+ )(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:30)(cid:29)(cid:5))  2012 Microchip Technology Inc. DS25160A-page 29

MCP1755/1755S "(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:15)(cid:9)(cid:16)(cid:17)(cid:7)(cid:11)(cid:11)(cid:9)(cid:18)(cid:19)(cid:13)(cid:11)(cid:14)(cid:20)(cid:6)(cid:9)(cid:21)(cid:22)(cid:7)(cid:20)(cid:12)(cid:14)(cid:12)(cid:13)(cid:23)(cid:22)(cid:9)(cid:24)(cid:25)#(cid:27)(cid:9)(cid:28)(cid:16)(cid:18)(cid:21)(cid:4)(cid:29)(cid:29)(cid:3)(cid:30) (cid:31)(cid:23)(cid:13)(cid:6)! .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) DS25160A-page 30  2012 Microchip Technology Inc.

MCP1755/1755S "(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:15)(cid:9)(cid:16)(cid:17)(cid:7)(cid:11)(cid:11)(cid:9)(cid:18)(cid:19)(cid:13)(cid:11)(cid:14)(cid:20)(cid:6)(cid:9)(cid:21)(cid:22)(cid:7)(cid:20)(cid:12)(cid:14)(cid:12)(cid:13)(cid:23)(cid:22)(cid:9)(cid:24)(cid:18)(cid:21)(cid:27)(cid:9)(cid:28)(cid:16)(cid:18)(cid:21)(cid:4)(cid:29)(cid:3)(cid:30) (cid:31)(cid:23)(cid:13)(cid:6)! .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) b N E E1 1 2 3 e e1 D A A2 c φ A1 L L1 3(cid:15)(cid:7)# (cid:6)(cid:19)44(cid:19)(cid:6)"(cid:13)"(cid:26)(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 ( 4(cid:14)(cid:28)!(cid:2)1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)(cid:24)((cid:2))(cid:22)* 6$# (cid:7)!(cid:14)(cid:2)4(cid:14)(cid:28)!(cid:2)1(cid:7)#(cid:8)(cid:11) (cid:14)(cid:30) (cid:30)(cid:20)(cid:24)(cid:4)(cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2):(cid:14)(cid:7)(cid:17)(cid:11)# (cid:25) (cid:4)(cid:20)(cid:24)(cid:4) ; (cid:30)(cid:20)(cid:23)( (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:3) (cid:4)(cid:20)<(cid:24) ; (cid:30)(cid:20)(cid:29)(cid:4) (cid:22)#(cid:28)(cid:15)!(cid:10)%% (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:4) ; (cid:4)(cid:20)(cid:30)( 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)=(cid:7)!#(cid:11) " (cid:3)(cid:20)(cid:3)(cid:4) ; (cid:29)(cid:20)(cid:3)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)=(cid:7)!#(cid:11) "(cid:30) (cid:30)(cid:20)(cid:29)(cid:4) ; (cid:30)(cid:20)<(cid:4) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:3)(cid:20)(cid:5)(cid:4) ; (cid:29)(cid:20)(cid:30)(cid:4) .(cid:10)(cid:10)#(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) 4 (cid:4)(cid:20)(cid:30)(cid:4) ; (cid:4)(cid:20)9(cid:4) .(cid:10)(cid:10)#(cid:12)(cid:9)(cid:7)(cid:15)# 4(cid:30) (cid:4)(cid:20)(cid:29)( ; (cid:4)(cid:20)<(cid:4) .(cid:10)(cid:10)#(cid:2)(cid:25)(cid:15)(cid:17)(cid:16)(cid:14) (cid:3) (cid:4)> ; (cid:29)(cid:4)> 4(cid:14)(cid:28)!(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:8) (cid:4)(cid:20)(cid:4)< ; (cid:4)(cid:20)(cid:3)9 4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8 (cid:4)(cid:20)(cid:3)(cid:4) ; (cid:4)(cid:20)((cid:30) (cid:31)(cid:23)(cid:13)(cid:6)(cid:12)! (cid:30)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15) (cid:2)(cid:21)(cid:2)(cid:28)(cid:15)!(cid:2)"(cid:30)(cid:2)!(cid:10)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)$!(cid:14)(cid:2)(cid:31)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:20)(cid:2)(cid:6)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:2) (cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:14)&(cid:8)(cid:14)(cid:14)!(cid:2)(cid:4)(cid:20)(cid:30)(cid:3)(cid:5)(cid:2)(cid:31)(cid:31)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2) (cid:7)!(cid:14)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+ )(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)(cid:24)(cid:30))  2012 Microchip Technology Inc. DS25160A-page 31

MCP1755/1755S Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS25160A-page 32  2012 Microchip Technology Inc.

MCP1755/1755S $(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:15)(cid:9)(cid:25)(cid:19)(cid:7)(cid:11)(cid:9)%(cid:11)(cid:7)(cid:13)&(cid:9)(cid:31)(cid:23)(cid:9)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:7)(cid:15)’(cid:7)*(cid:6)(cid:9)(cid:24)+#(cid:27)(cid:9)-(cid:9)(cid:29)2(cid:3)279:(cid:9)(cid:17)(cid:17)(cid:9)(cid:26)(cid:23)(cid:8);(cid:9)(cid:28)(cid:25)%(cid:31)(cid:30) (cid:31)(cid:23)(cid:13)(cid:6)! .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) D e b N N L K E E2 EXPOSEDPAD NOTE1 NOTE1 1 2 2 1 D2 TOPVIEW BOTTOMVIEW A NOTE2 A3 A1 3(cid:15)(cid:7)# (cid:6)(cid:19)44(cid:19)(cid:6)"(cid:13)"(cid:26)(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 < 1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)((cid:4)(cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2):(cid:14)(cid:7)(cid:17)(cid:11)# (cid:25) (cid:4)(cid:20)<(cid:4) (cid:4)(cid:20)(cid:24)(cid:4) (cid:30)(cid:20)(cid:4)(cid:4) (cid:22)#(cid:28)(cid:15)!(cid:10)%%(cid:2) (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:4) (cid:4)(cid:20)(cid:4)(cid:3) (cid:4)(cid:20)(cid:4)( *(cid:10)(cid:15)#(cid:28)(cid:8)#(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:29) (cid:4)(cid:20)(cid:3)(cid:4)(cid:2)(cid:26)". 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:3)(cid:20)(cid:4)(cid:4)(cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)=(cid:7)!#(cid:11) " (cid:29)(cid:20)(cid:4)(cid:4)(cid:2))(cid:22)* "&(cid:12)(cid:10) (cid:14)!(cid:2)1(cid:28)!(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21)(cid:3) (cid:30)(cid:20)(cid:29)(cid:4) ; (cid:30)(cid:20)(( "&(cid:12)(cid:10) (cid:14)!(cid:2)1(cid:28)!(cid:2)=(cid:7)!#(cid:11) "(cid:3) (cid:30)(cid:20)((cid:4) ; (cid:30)(cid:20)(cid:5)( *(cid:10)(cid:15)#(cid:28)(cid:8)#(cid:2)=(cid:7)!#(cid:11) 8 (cid:4)(cid:20)(cid:3)(cid:4) (cid:4)(cid:20)(cid:3)( (cid:4)(cid:20)(cid:29)(cid:4) *(cid:10)(cid:15)#(cid:28)(cid:8)#(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) 4 (cid:4)(cid:20)(cid:29)(cid:4) (cid:4)(cid:20)(cid:23)(cid:4) (cid:4)(cid:20)((cid:4) *(cid:10)(cid:15)#(cid:28)(cid:8)#(cid:27)#(cid:10)(cid:27)"&(cid:12)(cid:10) (cid:14)!(cid:2)1(cid:28)! ? (cid:4)(cid:20)(cid:3)(cid:4) ; ; (cid:31)(cid:23)(cid:13)(cid:6)(cid:12)! (cid:30)(cid:20) 1(cid:7)(cid:15)(cid:2)(cid:30)(cid:2),(cid:7) $(cid:28)(cid:16)(cid:2)(cid:7)(cid:15)!(cid:14)&(cid:2)%(cid:14)(cid:28)#$(cid:9)(cid:14)(cid:2)(cid:31)(cid:28)(cid:18)(cid:2),(cid:28)(cid:9)(cid:18)0(cid:2)8$#(cid:2)(cid:31)$ #(cid:2)8(cid:14)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)-(cid:7)#(cid:11)(cid:7)(cid:15)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:11)(cid:28)#(cid:8)(cid:11)(cid:14)!(cid:2)(cid:28)(cid:9)(cid:14)(cid:28)(cid:20) (cid:3)(cid:20) 1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:31)(cid:28)(cid:18)(cid:2)(cid:11)(cid:28),(cid:14)(cid:2)(cid:10)(cid:15)(cid:14)(cid:2)(cid:10)(cid:9)(cid:2)(cid:31)(cid:10)(cid:9)(cid:14)(cid:2)(cid:14)&(cid:12)(cid:10) (cid:14)!(cid:2)#(cid:7)(cid:14)(cid:2)8(cid:28)(cid:9) (cid:2)(cid:28)#(cid:2)(cid:14)(cid:15)! (cid:20) (cid:29)(cid:20) 1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:7) (cid:2) (cid:28)-(cid:2) (cid:7)(cid:15)(cid:17)$(cid:16)(cid:28)#(cid:14)!(cid:20) (cid:23)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+ )(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:26)".+ (cid:26)(cid:14)%(cid:14)(cid:9)(cid:14)(cid:15)(cid:8)(cid:14)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)0(cid:2)$ $(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)0(cid:2)%(cid:10)(cid:9)(cid:2)(cid:7)(cid:15)%(cid:10)(cid:9)(cid:31)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:12)$(cid:9)(cid:12)(cid:10) (cid:14) (cid:2)(cid:10)(cid:15)(cid:16)(cid:18)(cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:30)(cid:3)(cid:29)*  2012 Microchip Technology Inc. DS25160A-page 33

MCP1755/1755S Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS25160A-page 34  2012 Microchip Technology Inc.

MCP1755/1755S APPENDIX A: REVISION HISTORY Revision A (December 2012) • Original Release of this Document.  2012 Microchip Technology Inc. DS25160A-page 35

MCP1755/1755S NOTES: DS25160A-page 36  2012 Microchip Technology Inc.

MCP1755/1755S PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Examples: PART NO. X- XX X X X/ XX a) MCP1755ST-1802E/DB: Tape and Reel, Device Tape Output Feature Tolerance Temp. Package 1.8V Output Voltage, and Reel Voltage Code Range Fixed, 2% Tolerance, 3LD SOT-223 Package. b) MCP1755ST-3302E/DB: Tape and Reel, Device: MCP1755: 300 mA, 16V, High-Performance LDO 3.3V Output Voltage, MCP1755T: 300 mA, 16V, High-Performance LDO Fixed, 2% Tolerance, (Tape and Reel) 3LD SOT-223 Package. MCP1755S: 300 mA, 16V, High-Performance LDO c) MCP1755ST-5002E/DB: Tape and Reel, MCP1755ST: 300 mA, 16V, High-Performance LDO 5.0V Output Voltage, (Tape and Reel) Fixed, 2% Tolerance, 3LD SOT-223 Package. Tape and Reel: T = Tape and Reel a) MCP1755T-1802E/DC: Tape and Reel, 1.8V Output Voltage, Fixed, 2% Tolerance, Output Voltage*: 18 = 1.8V “Standard” 5LD SOT-223 Package 33 = 3.3V “Standard” b) MCP1755T-3302E/DC: Tape and Reel, 3.3V Output Voltage, 50 = 5.0V “Standard” Fixed, 2% Tolerance, *Contact factory for other voltage options 5LD SOT-223 Package c) MCP1755T-5002E/DC: Tape and Reel, 5.0V Output Voltage, Extra Feature Code: 0 = Fixed Fixed, 2% Tolerance, 5LD SOT-223 Package Tolerance: 2 = 2% (Standard) a) MCP1755T-1802E/OT: Tape and Reel, 1.8V Output Voltage, Fixed, 2% Tolerance, Temperature Range: E = -40°C to +125°C 5LD SOT-23 Package b) MCP1755T-3302E/OT: Tape and Reel, 3.3V Output Voltage, Package: DB = Plastic Small Outline (SOT-223), 3-lead Fixed, 2% Tolerance, DC = Plastic Small Outline (SOT-223), 5-lead 5LD SOT-23 Package OT = Plastic Small Outline (SOT-23), 5-lead c) MCP1755T-5002E/OT: Tape and Reel, MC = Plastic Dual Flat, No Lead (2x3 DFN), 8-lead 5.0V Output Voltage, Fixed, 2% Tolerance, 5LD SOT-23 Package a) MCP1755T-1802E/MC: Tape and Reel, 1.8V Output Voltage, Fixed, 2% Tolerance, 8LD 2x3 DFN Package b) MCP1755T-3302E/MC: Tape and Reel, 3.3V Output Voltage, Fixed, 2% Tolerance, 8LD 2x3 DFN Package c) MCP1755T-5002E/MC: Tape and Reel, 5.0V Output Voltage, Fixed, 2% Tolerance, 8LD 2x3 DFN Package a) MCP1755ST-1802E/MC: Tape and Reel, 1.8V Output Voltage, Fixed, 2% Tolerance, 8LD 2x3 DFN Package  2012 Microchip Technology Inc. DS25160A-page 37

MCP1755/1755S NOTES: DS25160A-page 38  2012 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC, and may be superseded by updates. It is your responsibility to FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, ensure that your application meets with your specifications. PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash MICROCHIP MAKES NO REPRESENTATIONS OR and UNI/O are registered trademarks of Microchip Technology WARRANTIES OF ANY KIND WHETHER EXPRESS OR Incorporated in the U.S.A. and other countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, INCLUDING BUT NOT LIMITED TO ITS CONDITION, MTP, SEEVAL and The Embedded Control Solutions QUALITY, PERFORMANCE, MERCHANTABILITY OR Company are registered trademarks of Microchip Technology FITNESS FOR PURPOSE. Microchip disclaims all liability Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Silicon Storage Technology is a registered trademark of devices in life support and/or safety applications is entirely at Microchip Technology Inc. in other countries. the buyer’s risk, and the buyer agrees to defend, indemnify and Analog-for-the-Digital Age, Application Maestro, BodyCom, hold harmless Microchip from any and all damages, claims, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, suits, or expenses resulting from such use. No licenses are dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, conveyed, implicitly or otherwise, under any Microchip ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial intellectual property rights. Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. & KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2012, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 9781620768181 QUALITY MANAGEMENT SYSTEM Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and CERTIFIED BY DNV Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures == ISO/TS 16949 == are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.  2012 Microchip Technology Inc. DS25160A-page 39

Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office Asia Pacific Office India - Bangalore Austria - Wels 2355 West Chandler Blvd. Suites 3707-14, 37th Floor Tel: 91-80-3090-4444 Tel: 43-7242-2244-39 Chandler, AZ 85224-6199 Tower 6, The Gateway Fax: 91-80-3090-4123 Fax: 43-7242-2244-393 Tel: 480-792-7200 Harbour City, Kowloon India - New Delhi Denmark - Copenhagen Fax: 480-792-7277 Hong Kong Tel: 91-11-4160-8631 Tel: 45-4450-2828 Technical Support: Tel: 852-2401-1200 Fax: 91-11-4160-8632 Fax: 45-4485-2829 http://www.microchip.com/ support Fax: 852-2401-3431 India - Pune France - Paris Web Address: Australia - Sydney Tel: 91-20-2566-1512 Tel: 33-1-69-53-63-20 www.microchip.com Tel: 61-2-9868-6733 Fax: 91-20-2566-1513 Fax: 33-1-69-30-90-79 Atlanta Fax: 61-2-9868-6755 Japan - Osaka Germany - Munich Duluth, GA China - Beijing Tel: 81-6-6152-7160 Tel: 49-89-627-144-0 Tel: 86-10-8569-7000 Fax: 49-89-627-144-44 Tel: 678-957-9614 Fax: 81-6-6152-9310 Fax: 678-957-1455 Fax: 86-10-8528-2104 Japan - Tokyo Italy - Milan China - Chengdu Tel: 39-0331-742611 Boston Tel: 81-3-6880- 3770 Tel: 86-28-8665-5511 Fax: 39-0331-466781 Westborough, MA Fax: 81-3-6880-3771 Tel: 774-760-0087 Fax: 86-28-8665-7889 Korea - Daegu Netherlands - Drunen Fax: 774-760-0088 China - Chongqing Tel: 82-53-744-4301 Tel: 31-416-690399 Chicago Tel: 86-23-8980-9588 Fax: 82-53-744-4302 Fax: 31-416-690340 Itasca, IL Fax: 86-23-8980-9500 Korea - Seoul Spain - Madrid Tel: 630-285-0071 China - Hangzhou Tel: 82-2-554-7200 Tel: 34-91-708-08-90 Fax: 630-285-0075 Tel: 86-571-2819-3187 Fax: 82-2-558-5932 or Fax: 34-91-708-08-91 Cleveland Fax: 86-571-2819-3189 82-2-558-5934 UK - Wokingham Independence, OH China - Hong Kong SAR Malaysia - Kuala Lumpur Tel: 44-118-921-5869 Tel: 216-447-0464 Tel: 852-2943-5100 Tel: 60-3-6201-9857 Fax: 44-118-921-5820 Fax: 216-447-0643 Fax: 852-2401-3431 Fax: 60-3-6201-9859 Dallas China - Nanjing Malaysia - Penang Addison, TX Tel: 86-25-8473-2460 Tel: 60-4-227-8870 Tel: 972-818-7423 Fax: 86-25-8473-2470 Fax: 60-4-227-4068 Fax: 972-818-2924 China - Qingdao Philippines - Manila Detroit Tel: 86-532-8502-7355 Tel: 63-2-634-9065 Farmington Hills, MI Fax: 86-532-8502-7205 Fax: 63-2-634-9069 Tel: 248-538-2250 Fax: 248-538-2260 China - Shanghai Singapore Tel: 86-21-5407-5533 Tel: 65-6334-8870 Indianapolis Fax: 86-21-5407-5066 Fax: 65-6334-8850 Noblesville, IN Tel: 317-773-8323 China - Shenyang Taiwan - Hsin Chu Fax: 317-773-5453 Tel: 86-24-2334-2829 Tel: 886-3-5778-366 Fax: 86-24-2334-2393 Fax: 886-3-5770-955 Los Angeles Mission Viejo, CA China - Shenzhen Taiwan - Kaohsiung Tel: 949-462-9523 Tel: 86-755-8864-2200 Tel: 886-7-213-7828 Fax: 949-462-9608 Fax: 86-755-8203-1760 Fax: 886-7-330-9305 Santa Clara China - Wuhan Taiwan - Taipei Santa Clara, CA Tel: 86-27-5980-5300 Tel: 886-2-2508-8600 Tel: 408-961-6444 Fax: 86-27-5980-5118 Fax: 886-2-2508-0102 Fax: 408-961-6445 China - Xian Thailand - Bangkok Toronto Tel: 86-29-8833-7252 Tel: 66-2-694-1351 Mississauga, Ontario, Fax: 86-29-8833-7256 Fax: 66-2-694-1350 Canada China - Xiamen Tel: 905-673-0699 Tel: 86-592-2388138 Fax: 905-673-6509 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 11/29/12 Fax: 86-756-3210049 DS25160A-page 40  2012 Microchip Technology Inc.