MCP1403/4/5 4.5A Dual High-Speed Power MOSFET Drivers Features General Description • High Peak Output Current: 4.5A (typ.) The MCP1403/4/5 are a family of dual-inverting, dual- • Low Shoot-Through/Cross-Conduction Current in non-inverting, or complimentary output drivers. They Output Stage can delivery high peak currents of 4.5A typically into capacitive loads. These devices also feature low shoot- • Wide Input Supply Voltage Operating Range: through current, matched rise/fall times and - 4.5V to 18V propagation delays. • High Capacitive Load Drive Capability: The MCP1403/4/5 drivers operate from a 4.5V to 18V - 2200pF in 15ns single power supply and can easily charge and - 5600pF in 34ns discharge 2200pF gate capacitance in under 15ns • Short Delay Times: 40ns (typ.) (typ). They provide low enough impedances in both the • Low Supply Current: on and off states to ensure the MOSFETs intended state will not be affected, even by large transients. The - With Logic ‘1’ Input – 1.0mA (typ.) input to the MCP1403/4/5 may be driven directly from - With Logic ‘0’ Input – 150µA (typ.) either TTL or CMOS (3V to 18V). • Latch-Up Protected: Will Withstand 1.5A Reverse Current The MCP1403/4/5 dual-output 4.5A driver family is offered in both surface-mount and pin-through-hole • Logic Input Will Withstand Negative Swing packages with a -40oC to +125oC temperature rating. Up To 5V The low thermal resistance of the thermally enhanced • Packages: 8-Pin SOIC, PDIP, 8-Pin 6x5 DFN, DFN package allows for greater power dissipation and 16-Pin SOIC capability for driving heavier capacitive or resistive loads. Applications These devices are highly latch-up resistant under any • Switch Mode Power Supplies conditions within their power and voltage ratings. They • Pulse Transformer Drive are not subject to damage when up to 5V of noise spiking (of either polarity) occurs on the ground pin. All • Line Drivers terminals are fully protect against Electrostatic • Motor and Solenoid Drive Discharge (ESD) up to 4kV. Package Types 8-Pin MCP1404 MCP1404 MCP1403 MCP1405 MCP1403 MCP1405 PDIP/SOIC 16-Pin SOIC NC 1 8 NC NC NC NC 1 16 NC NC NC IN A 2 7 OUT A OUT A OUT A IN A 2 15 OUT A OUT A OUT A GND 3 6 VDD VDD VDD NC 3 14 OUT A OUT A OUT A IN B 4 5 OUT B OUT B OUT B GND 4 13 VDD VDD VDD GND 5 12 VDD VDD VDD NC 6 11 OUT B OUT B OUT B MCP1404 IN B 7 10 OUT B OUT B OUT B MCP1403 MCP1405 8-Pin DFN(2) NC 8 9 NC NC NC NC 1 8 NC NC NC Note1: Duplicate pins must both be connected for IN A 2 7 OUT A OUT A OUT A proper operation. GND 3 6 VDD VDD VDD 2: Exposed pad of the DFN package is electrically IN B 4 5 OUT B OUT B OUT B isolated. © 2006 Microchip Technology Inc. DS22022A-page 1

MCP1403/4/5 Functional Block Diagram (1) V DD Inverting 730µA 300mV Output Non-inverting Input Effective 4.7V MCP1403 Dual Inverting Input C = 20pF MCP1404 Dual Non-inverting (Each Input) MCP1405 Inverting / Non-inverting GND Note1: Unused inputs should be grounded. DS22022A-page 2 © 2006 Microchip Technology Inc.

MCP1403/4/5 1.0 ELECTRICAL † Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is CHARACTERISTICS a stress rating only and functional operation of the device at those or any other conditions above those indicated in the Absolute Maximum Ratings † operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods Supply Voltage................................................................+20V may affect device reliability. Input Voltage...............................(V + 0.3V) to (GND – 5V) DD Input Current (V >V )................................................50mA IN DD DC CHARACTERISTICS (NOTE 2) Electrical Specifications: Unless otherwise indicated, T = +25°C, with 4.5V ≤ V ≤ 18V. A DD Parameters Sym Min Typ Max Units Conditions Input Logic ‘1’, High Input Voltage VIH 2.4 1.5 — V Logic ‘0’, Low Input Voltage VIL — 1.3 0.8 V Input Current I –1 — 1 µA 0V ≤ V ≤ V IN IN DD Input Voltage V -5 — V +0.3 V IN DD Output High Output Voltage V V – 0.025 — — V DC Test OH DD Low Output Voltage V — — 0.025 V DC Test OL Output Resistance, High R — 2.2 3.0 Ω I = 10mA, V = 18V OH OUT DD Output Resistance, Low R — 2.8 3.5 Ω I = 10mA, V = 18V OL OUT DD Peak Output Current I — 4.5 — A V = 18V (Note 2) PK DD Latch-Up Protection With- I — >1.5 — A Duty cycle ≤ 2%, t ≤ 300µsec. REV stand Reverse Current Switching Time (Note1) Rise Time t — 15 28 ns Figure4-1, Figure4-2 R C = 2200pF L Fall Time t — 18 28 ns Figure4-1, Figure4-2 F C = 2200pF L Delay Time t — 40 48 ns Figure4-1, Figure4-2 D1 Delay Time t — 40 48 ns Figure4-1, Figure4-2 D2 Power Supply Supply Voltage V 4.5 — 18.0 V DD Power Supply Current I — 1.0 2.0 mA V = 3V (Both Inputs) S IN I — 0.15 0.25 mA V = 0V (Both Inputs) S IN Note 1: Switching times ensured by design. 2: Tested during characterization, not production tested. © 2006 Microchip Technology Inc. DS22022A-page 3

MCP1403/4/5 DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE) Electrical Specifications: Unless otherwise indicated, operating temperature range with 4.5V ≤ V ≤ 18V. DD Parameters Sym Min Typ Max Units Conditions Input Logic ‘1’, High Input Voltage VIH 2.4 — — V Logic ‘0’, Low Input Voltage VIL — — 0.8 V Input Current I –10 — +10 µA 0V ≤ V ≤ V IN IN DD Output High Output Voltage V V – 0.025 — — V DC TEST OH DD Low Output Voltage V — — 0.025 V DC TEST OL Output Resistance, High R — 3.1 6.0 Ω I = 10mA, V = 18V OH OUT DD Output Resistance, Low R — 3.7 7 Ω I = 10mA, V = 18V OL OUT DD Switching Time (Note1) Rise Time t — 25 40 ns Figure4-1, Figure4-2 R C = 2200pF L Fall Time t — 25 40 ns Figure4-1, Figure4-2 F C = 2200pF L Delay Time t — 50 65 ns Figure4-1, Figure4-2 D1 Delay Time t — 50 65 ns Figure4-1, Figure4-2 D2 Power Supply Power Supply Current I — 2.0 3.0 mA V = 3V (Both Inputs) S IN — 0.2 0.3 V = 0V (Both Inputs) IN Note 1: Switching times ensured by design. 2: Tested during characterization, not production tested. TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V ≤ V ≤ 18V. DD Parameters Sym Min Typ Max Units Conditions Temperature Ranges Specified Temperature Range T –40 — +125 °C A Maximum Junction Temperature T — — +150 °C J Storage Temperature Range T –65 — +150 °C A Package Thermal Resistances Thermal Resistance, 8L-6x5 DFN θ — 33.2 — °C/W Typical four-layer board with JA vias to ground plane Thermal Resistance, 8L-PDIP θ — 125 — °C/W JA Thermal Resistance, 8L-SOIC θ — 155 — °C/W JA Thermal Resistance, 16L-SOIC θ — 155 — °C/W 4-Layer JC51-7 Standard JA Board, Natural Convection DS22022A-page 4 © 2006 Microchip Technology Inc.

MCP1403/4/5 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, T = +25°C with 4.5V <= V <= 18V. A DD 100 100 90 6800 pF 90 6800 pF 80 80 ns) 70 4700 pF ns) 70 4700 pF e ( 60 2200 pF e ( 60 2200 pF m m Ti 50 Ti 50 se 40 all 40 Ri 30 F 30 20 1800 pF 20 1800 pF 10 10 4 6 8 10 12 14 16 18 4 6 8 10 12 14 16 18 Supply Voltage (V) Supply Voltage (V) FIGURE 2-1: Rise Time vs. Supply FIGURE 2-4: Fall Time vs. Supply Voltage. Voltage. 80 100 70 90 80 me (ns) 5600 5V 12V me (ns) 6700 12V Rise Ti 3400 Fall Ti 4500 5V 30 20 18V 20 18V 10 10 1000 10000 1000 10000 Capacitive Load (pF) Capacitive Load (pF) FIGURE 2-2: Rise Time vs. Capacitive FIGURE 2-5: Fall Time vs. Capacitive Load. Load. 24 160 CLOAD = 1800 pF VDD = 12V 22 ns) 135 CLOAD = 1800 pF e (ns) 1280 tFALL n Delay ( 110 m o Ti 16 ati 85 g a 14 tRISE op 60 tD1 Pr tD2 12 35 -40 -25 -10 5 20 35 50 65 80 95 110125 2 3 4 5 6 7 8 9 10 Temperature (oC) Input Amplitude (V) FIGURE 2-3: Rise and Fall Times vs. FIGURE 2-6: Propagation Delay vs. Input Temperature. Amplitude. © 2006 Microchip Technology Inc. DS22022A-page 5

MCP1403/4/5 Typical Performance Curves (Continued) Note: Unless otherwise indicated, T = +25°C with 4.5V <= V <= 18V. A DD 100 0.5 ns) 90 tD1 CLOAD = 1800 pF mA) 0.4 n Delay ( 7800 tD2 Current ( 0.3 Both Inputs = 1 Propagatio 456000 Quiescent 00..12 Both Inputs = 0 30 0 4 6 8 10 12 14 16 18 -40 -25 -10 5 20 35 50 65 80 95 110125 Supply Voltage (V) Temperature (oC) FIGURE 2-7: Propagation Delay Time vs. FIGURE 2-10: Quiescent Current vs. Supply Voltage. Temperature. 70 7 y (ns) 6605 CLOAD = 1800 pF tD2 6 TJ = +150oC VVIINN == 50VV ((MMCCPP11440043)) a 5 el 55 )(cid:58) gation D 4550 tD1 R (OUT-HI 34 TJ = +25oC pa 40 Pro 35 2 30 1 -40 -25 -10 5 20 35 50 65 80 95 110125 4 6 8 10 12 14 16 18 Temperature (oC) Supply Voltage (V) FIGURE 2-8: Propagation Delay Time vs. FIGURE 2-11: Output Resistance (Output Temperature. High) vs. Supply Voltage. 0.5 8 mA) 0.4 7 TJ = +150oC VVIINN == 05VV ((MMCCPP11440043)) ent Current ( 00..23 Both Inputs = 1 R ()(cid:58)OUT-LO 456 TJ = +25oC c s Both Inputs = 0 e 0.1 ui 3 Q 0 2 4 6 8 10 12 14 16 18 4 6 8 10 12 14 16 18 Supply Voltage (V) Supply Voltage (V) FIGURE 2-9: Quiescent Current vs. FIGURE 2-12: Output Resistance (Output Supply Voltage. Low) vs. Temperature. DS22022A-page 6 © 2006 Microchip Technology Inc.

MCP1403/4/5 Typical Performance Curves (Continued) Note: Unless otherwise indicated, T = +25°C with 4.5V <= V <= 18V. A DD 100 80 90 VDD = 18V 650 kHz 70 VDD = 18V 6,800 pF mA) 80 400 kHz mA) 60 4,700 pF nt ( 6700 50 kHz nt ( 50 urre 50 100 kHz urre 40 2,200 pF y C 40 200 kHz y C 30 ppl 30 ppl 20 u 20 u S 10 S 10 100 pF 0 0 100 1000 10000 10 100 1000 Capacitive Load (pF) Frequency (kHz) FIGURE 2-13: Supply Current vs. FIGURE 2-16: Supply Current vs. Capacitive Load. Frequency. 120 140 A)100 VDD = 12V 2 MHz 1 MHz A) 120 VDD = 12V 6,800 pF 4,700 pF m m 100 ent ( 80 100 kHz ent ( 80 2,200 pF Curr 60 500 kHz Curr 60 Supply 2400 200 kHz Supply 2400 100 pF 0 0 100 1000 10000 10 100 1000 10000 Capacitive Load (pF) Frequency (kHz) FIGURE 2-14: Supply Current vs. FIGURE 2-17: Supply Current vs. Capacitive Load. Frequency. 120 140 VDD = 6V 3.5 MHz 120 VDD = 6V 6,800 pF A) 100 2 MHz A) m m 100 ent ( 80 200 kHz ent ( 80 4,700 pF Curr 60 500 kHz 1 MHz Curr 60 ply 40 ply 40 2,200 pF p p Su 20 Su 20 100 pF 0 0 100 1000 10000 10 100 1000 10000 Capacitive Load (pF) Frequency (kHz) FIGURE 2-15: Supply Current vs. FIGURE 2-18: Supply Current vs. Capacitive Load. Frequency. © 2006 Microchip Technology Inc. DS22022A-page 7

MCP1403/4/5 Typical Performance Curves (Continued) Note: Unless otherwise indicated, T = +25°C with 4.5V <= V <= 18V. A DD 11.000E--066 c) e s A* y (11.000E--077 g er n E ver 11.000E--088 o s s o Cr 11.000E--099 4 6 8 10 12 14 16 18 Supply Voltage (V) Note: The values on this graph represent the loss seen by both drivers in a package during one complete cycle. For a sin- gle driver, divide the stated value by 2. For a single transition of a single driver divide the stated value by 4. FIGURE 2-19: Crossover Energy vs. Supply Voltage. DS22022A-page 8 © 2006 Microchip Technology Inc.

MCP1403/4/5 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table3-1. TABLE 3-1: PIN FUNCTION TABLE (1) 8-Pin 8-Pin 16-Pin PDIP Symbol Description DFN SOIC SOIC 1 1 1 NC No Connection 2 2 2 IN A Control Input for Output A — — 3 NC No Connection 3 3 4 GND Ground — — 5 GND Ground — — 6 NC No Connection 4 4 7 IN B Control Input for Output B — — 8 NC No Connection — — 9 NC No Connection 5 5 10 OUT B Output B — — 11 OUT B Output B 6 6 12 V Supply Input DD — — 13 V Supply Input DD 7 7 14 OUT A Output A — — 15 OUT A Output A 8 8 16 NC No Connection — PAD NC Exposed Metal Pad Note 1: Duplicate pins must be connected for proper operation. 3.1 Supply Input (V ) 3.4 Outputs A and B DD V is the bias supply input for the MOSFET driver and Outputs A and B are CMOS push-pull output that is DD has a voltage range of 4.5V to 18V. This input must be capable of sourcing and sinking 4.5A of peak current decoupled to ground with a local capacitor. This bypass (V = 18V). The low output impedance ensures the DD capacitor provides a localized low-impedance path for gate of the external MOSFET will stay in the intended the peak currents that are to be provided to the load. state even during large transients. These output also has a reverse current latch-up rating of 1.5A. 3.2 Control Inputs A and B 3.5 Exposed Metal Pad The MOSFET driver input is a high-impedance, TTL/CMOS-compatible input. The input also has The exposed metal pad of the DFN package is not hysteresis between the high and low input levels, internally connected to any potential. Therefore, this allowing them to be driven from slow rising and falling pad can be connected to a ground plane or other cop- signals, and to provide noise immunity. per plane on a printed circuit board to aid in heat removal from the package. 3.3 Ground (GND) Ground is the device return pin. The ground pin should have a low impedance connection to the bias supply source return. High peak currents will flow out the ground pin when the capacitive load is being discharged. © 2006 Microchip Technology Inc. DS22022A-page 9

MCP1403/4/5 4.0 APPLICATION INFORMATION 4.1 General Information V = 18V MOSFET drivers are high-speed, high current devices DD which are intended to source/sink high peak currents to 0.1µF charge/discharge the gate capacitance of external 1µF Ceramic MOSFETs or IGBTs. In high frequency switching power supplies, the PWM controller may not have the drive capability to directly drive the power MOSFET. A MOS- Input Output FET driver like the MCP1403/4/5 family can be used to C = 2200pF L provide additional source/sink current capability. Input 4.2 MOSFET Driver Timing MCP1404 (1/2 MCP1405) The ability of a MOSFET driver to transition from a fully off state to a fully on state are characterized by the driv- ers rise time (t ), fall time (t ), and propagation delays R F (t and t ). The MCP1403/4/5 family of drivers can +5V D1 D2 90% typically charge and discharge a 2200pF load capaci- Input tance in 15ns along with a typical matched propaga- tion delay of 40ns. Figure4-1 and Figure4-2 show the 10% 0V test circuit and timing waveform used to verify the 18V MCP1403/4/5 timing. t 90% t 90% D1 D2 Output tR tF VDD = 18V 0V 10% 10% 0.1µF 1µF Ceramic FIGURE 4-2: Non-Inverting Driver Timing Waveform. Input Output CL = 2200pF 4.3 Decoupling Capacitors Input Careful layout and decoupling capacitors are highly recommended when using MOSFET drivers. Large MCP1403 (1/2 MCP1405) currents are required to charge and discharge capacitive loads quickly. For example, 2.5A are needed to charge a 2200 pF load with 18V in 16 ns. To operate the MOSFET driver over a wide frequency +5V 90% range with low supply impedance a ceramic and low Input ESR film capacitor are recommended to be placed in parallel between the driver V and GND. A 1.0µF low 10% DD 0V ESR film capacitor and a 0.1µF ceramic capacitor t t D1 D2 t t placed between V and GND pins should be used. F R DD 18V 90% 90% These capacitors should be placed close to the driver Output to minimized circuit board parasitics and provide a local 10% 10% source for the required current. 0V 4.4 PCB Layout Considerations FIGURE 4-1: Inverting Driver Timing Waveform. Proper PCB layout is important in a high current, fast switching circuit to provide proper device operation and robustness of design. PCB trace loop area and inductance should be minimized by the use of ground planes or trace under MOSFET gate drive signals, separate analog and power grounds, and local driver decoupling. DS22022A-page 10 © 2006 Microchip Technology Inc.

MCP1403/4/5 Placing a ground plane beneath the MCP1403/4/5 will 4.5.2 QUIESCENT POWER DISSIPATION help as a radiated noise shield as well as providing The power dissipation associated with the quiescent some heat sinking for power dissipated within the current draw depends upon the state of the input pin. device. The MCP1403/4/5 devices have a quiescent current draw when both inputs are high of 1.0 mA (typ) and 4.5 Power Dissipation 0.15 mA (typ) when both inputs are low. The quiescent power dissipation is: The total internal power dissipation in a MOSFET driver is the summation of three separate power dissipation elements. P = (I × D+ I × (1–D))× V Q QH QL DD P = P + P + P Where: T L Q CC I = Quiescent current in the high state QH Where: D = Duty cycle P = Total power dissipation T I = Quiescent current in the low state QL P = Load power dissipation L V = MOSFET driver supply voltage DD P = Quiescent power dissipation Q P = Operating power dissipation CC 4.5.3 OPERATING POWER DISSIPATION The operating power dissipation occurs each time the 4.5.1 CAPACITIVE LOAD DISSIPATION MOSFET driver output transitions because for a very The power dissipation caused by a capacitive load is a short period of time both MOSFETs in the output stage direct function of frequency, total capacitive load, and are on simultaneously. This cross-conduction current supply voltage. The power lost in the MOSFET driver leads to a power dissipation describes as: for a complete charging and discharging cycle of a MOSFET is: P = CC× f ×V CC DD 2 Where: P = f× C × V L T DD CC = Cross-conduction constant (A*sec) Where: f = Switching frequency f = Switching frequency V = MOSFET driver supply voltage DD C = Total load capacitance T V = MOSFET driver supply voltage DD © 2006 Microchip Technology Inc. DS22022A-page 11

MCP1403/4/5 5.0 PACKAGING INFORMATION 5.1 Package Marking Information (Not to Scale) 8-Lead DFN Example: XXXXXXX MCP1403 XXXXXXX E/MF^e^3 XXYYWW 0648 NNN 256 8-Lead PDIP (300 mil) Example: XXXXXXXX MCP1403 XXXXXNNN E/P^e^3256 YYWW 0648 8-Lead SOIC (150 mil) Example: XXXXXXXX MCP1405E XXXXYYWW SN^e^30648 NNN 256 16-Lead SOIC (300 mil) Example: XXXXXXXXXXX MCP1405 XXXXXXXXXXX E/SO^e^3 XXXXXXXXXXX 0648256 YYWWNNN Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e3 Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. DS22022A-page 12 © 2006 Microchip Technology Inc.

MCP1403/4/5 8-Lead Plastic Dual-Flat, No-Lead Package (MF) 6x5 mm Body (DFN-S) – Saw Singulated Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D e D1 L b N N K E E2 E1 EXPOSED PAD NOTE 1 1 2 2 1 NOTE 1 D2 TOP VIEW BOTTOM VIEW ϕ A A2 A1 A3 NOTE 2 Units MILLIMETERS Dimension Limits MIN NOM MAX Number of Pins N 8 Pitch e 1.27 BSC Overall Height A — 0.85 1.10 Molded Package Thickness A2 — 0.65 0.80 Standoff A1 0.00 0.01 0.05 Base Thickness A3 0.20 REF Overall Length D 4.92 BSC Molded Package Length D1 4.67 BSC Exposed Pad Length D2 3.85 4.00 4.15 Overall Width E 5.99 BSC Molded Package Width E1 5.74 BSC Exposed Pad Width E2 2.16 2.31 2.46 Contact Width b 0.35 0.40 0.47 Contact Length § L 0.50 0.60 0.75 Contact-to-Exposed Pad § K 0.20 — — Mold Draft Angle Top ϕ — — 12° Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package may have one or more exposed tie bars at ends. 3. § Significant Characteristic 4. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing No. C04–113, 09/20/06 © 2006 Microchip Technology Inc. DS22022A-page 13

MCP1403/4/5 8-Lead Plastic Dual In-line (PA) – 300 mil Body (PDIP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E1 D 2 n 1 α E A A2 L c A1 β B1 p eB B Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 8 8 Pitch p .100 2.54 Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32 Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68 Base to Seating Plane A1 .015 0.38 Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26 Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60 Overall Length D .360 .373 .385 9.14 9.46 9.78 Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43 Lead Thickness c .008 .012 .015 0.20 0.29 0.38 Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78 Lower Lead Width B .014 .018 .022 0.36 0.46 0.56 Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92 Mold Draft Angle Top α 5 10 15 5 10 15 Mold Draft Angle Bottom β 5 10 15 5 10 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 DS22022A-page 14 © 2006 Microchip Technology Inc.

MCP1403/4/5 8-Lead Plastic Small Outline (OA) – Narrow, 150 mil Body (SOIC) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 B n 1 h α 45° c A A2 φ β L A1 Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 8 8 Pitch p .050 1.27 Overall Height A .053 .061 .069 1.35 1.55 1.75 Molded Package Thickness A2 .052 .056 .061 1.32 1.42 1.55 Standoff § A1 .004 .007 .010 0.10 0.18 0.25 Overall Width E .228 .237 .244 5.79 6.02 6.20 Molded Package Width E1 .146 .154 .157 3.71 3.91 3.99 Overall Length D .189 .193 .197 4.80 4.90 5.00 Chamfer Distance h .010 .015 .020 0.25 0.38 0.51 Foot Length L .019 .025 .030 0.48 0.62 0.76 Foot Angle φ 0 4 8 0 4 8 Lead Thickness c .008 .009 .010 0.20 0.23 0.25 Lead Width B .013 .017 .020 0.33 0.42 0.51 Mold Draft Angle Top α 0 12 15 0 12 15 Mold Draft Angle Bottom β 0 12 15 0 12 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 © 2006 Microchip Technology Inc. DS22022A-page 15

MCP1403/4/5 16-Lead Plastic Small Outline (SO) – Wide, 300 mil Body (SOIC) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E p E1 D 2 n 1 B h α 45° c A A2 φ β L A1 Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 16 16 Pitch p .050 1.27 Overall Height A .093 .099 .104 2.36 2.50 2.64 Molded Package Thickness A2 .088 .091 .094 2.24 2.31 2.39 Standoff § A1 .004 .008 .012 0.10 0.20 0.30 Overall Width E .394 .407 .420 10.01 10.34 10.67 Molded Package Width E1 .291 .295 .299 7.39 7.49 7.59 Overall Length D .398 .406 .413 10.10 10.30 10.49 Chamfer Distance h .010 .020 .029 0.25 0.50 0.74 Foot Length L .016 .033 .050 0.41 0.84 1.27 Foot Angle φ 0 4 8 0 4 8 Lead Thickness c .009 .011 .013 0.23 0.28 0.33 Lead Width B .014 .017 .020 0.36 0.42 0.51 Mold Draft Angle Top α 0 12 15 0 12 15 Mold Draft Angle Bottom β 0 12 15 0 12 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-013 Drawing No. C04-102 DS22022A-page 16 © 2006 Microchip Technology Inc.

MCP1403/4/5 APPENDIX A: REVISION HISTORY Revision A (December 2006) • Original Release of this Document. © 2006 Microchip Technology Inc. DS22022A-page 17

MCP1403/4/5 NOTES: DS22022A-page 18 © 2006 Microchip Technology Inc.

MCP1403/4/5 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X XX Examples: a) MCP1403-E/OA: 4.5A Dual Inverting Device Temperature Package MOSFET Driver, Range 8LD SOIC package. b) MCP1403-E/PA: 4.5A Dual Inverting Device: MCP1403: 4.5A Dual MOSFET Driver, Inverting MOSFET Driver, MCP1403T: 4.5A Dual MOSFET Driver, Inverting 8LD PDIP package. (Tape and Reel) c) MCP1403-E/MF: 4.5A Dual Inverting MCP1404: 4.5A Dual MOSFET Driver, Non-Inverting MOSFET Driver, MCP1404T: 4.5A Dual MOSFET Driver, Non-Inverting 8LD DFN package. (Tape and Reel) MCP1405: 4.5A Dual MOSFET Driver, Complementary d) MCP1403-E/SO: 4.5A Dual Inverting MCP1405T: 4.5A Dual MOSFET Driver, Complementary MOSFET Driver, (Tape and Reel) 16LD SOIC package. a) MCP1404T-E/OA: Tape and Reel. Temperature Range: E = -40°C to +125°C 4.5A Dual Non-Inverting, MOSFET Driver, 8LD SOIC package, Package: * MF = Dual, Flat, No-Lead (6x5 mm Body), 8-lead OA = Plastic SOIC (150 mil Body), 8-Lead b) MCP1404-E/PA: 4.5A Dual Non-Inverting, PA = Plastic DIP, (300 mil body), 8-lead MOSFET Driver, SO = Plastic SOIC (Wide), 16-Lead 8LD PDIP package. * All package offerings are Pb Free (Lead Free) a) MCP1405-E/OA: 4.5A Dual Complementary, MOSFET Driver, 8LD SOIC package. b) MCP1405-E/PA: 4.5A Dual Complementary, MOSFET Driver, 8LD PDIP package. c) MCP1405T-E/SO:Tape and Reel, 4.5A Dual Complementary MOSFET Driver, 16LD SOIC package. © 2006 Microchip Technology Inc. DS22022A-page 19

MCP1403/4/5 NOTES: DS22022A-page 20 © 2006 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, Accuron, and may be superseded by updates. It is your responsibility to dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PROMATE, PowerSmart, rfPIC, and SmartShunt are MICROCHIP MAKES NO REPRESENTATIONS OR registered trademarks of Microchip Technology Incorporated WARRANTIES OF ANY KIND WHETHER EXPRESS OR in the U.S.A. and other countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, INCLUDING BUT NOT LIMITED TO ITS CONDITION, SEEVAL, SmartSensor and The Embedded Control Solutions QUALITY, PERFORMANCE, MERCHANTABILITY OR Company are registered trademarks of Microchip Technology FITNESS FOR PURPOSE. Microchip disclaims all liability Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, CodeGuard, devices in life support and/or safety applications is entirely at dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, the buyer’s risk, and the buyer agrees to defend, indemnify and ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, hold harmless Microchip from any and all damages, claims, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active suits, or expenses resulting from such use. No licenses are Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, PICkit, conveyed, implicitly or otherwise, under any Microchip PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, intellectual property rights. PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2006, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company’s quality system processes and procedures are for its PIC® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2006 Microchip Technology Inc. DS22022A-page 21

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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: M icrochip: MCP1403-E/SN MCP1404-E/SN MCP1405-E/SN MCP1404-E/P MCP1403-E/P MCP1405-E/P