Freescale Semiconductor Document Number: MCF51AC256 Data Sheet: Technical Data Rev.7, 9/2011 MCF51AC256 MCF51AC256 Series ColdFire Microcontroller 80LQFP 64LQFP 14mm14mm 10mm10mm Covers:MCF51AC256A MCF51AC256B 44LQFP 64QFP MCF51AC128A 10mm10mm 14mm14mm MCF51AC128C The MCF51AC256 series are members of the • Two serial communications interfaces (SCI) ColdFire® family of 32-bit variable-length reduced • Up to two serial peripheral interfaces (SPI) instruction set (RISC) microcontroller. This • Two flexible timer modules (FTM) document provides an overview of the • Timer pulse-width modulator (TPM) MCF51AC256 series, focusing on its highly integrated and diverse feature set. The MCF51AC256 series are based on the V1 ColdFire core and operates at processor core speeds up to 50.33MHz. As part of Freescale’s Controller Continuum®, it is an ideal upgrade for designs based on the MC9S08AC128 series of 8-bit microcontrollers. The MCF51AC256 features the following functional units: • V1 ColdFire core with background debug module • Up to 256KB of flash memory • Up to 32KB of static RAM (SRAM) • Up to two analog comparators (ACMP) • Analog-to-digital converter (ADC) with up to 24 channels • Controller-area network (CAN) • Cyclic redundancy check (CRC) • Inter-integrated circuit (IIC) • Keyboard interrupt (KBI) • Multipurpose clock generator (MCG) • Rapid general-purpose input/output (RGPIO) This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. ©Freescale Semiconductor, Inc., 2008-2011. All rights reserved.

Table of Contents 1 MCF51AC256 Family Configurations. . . . . . . . . . . . . . . . . . . .3 Figure8.Typical I vs. V –V at V = 5 V OH DD OH DD 1.1 Device Comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 (High Drive, PTxDSn = 1) . . . . . . . . . . . . . . . . . . . . . . 24 1.2 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Figure9.Typical Run IDD vs. System Clock Freq. 1.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 for FEI and FBE Modes. . . . . . . . . . . . . . . . . . . . . . . . 27 1.3.1 Feature List . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Figure10.ADC Input Impedance Equivalency Diagram. . . . . . . 29 1.4 Part Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Figure11.Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 1.5 Pinouts and Packaging. . . . . . . . . . . . . . . . . . . . . . . . .12 Figure12.IRQ/KBIPx Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Figure13.Timer External Clock . . . . . . . . . . . . . . . . . . . . . . . . . 35 2.1 Parameter Classification. . . . . . . . . . . . . . . . . . . . . . . .17 Figure14.Timer Input Capture Pulse. . . . . . . . . . . . . . . . . . . . . 35 2.2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . .17 Figure15.SPI Master Timing (CPHA = 0) . . . . . . . . . . . . . . . . . 37 2.3 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .18 Figure16.SPI Master Timing (CPHA =1). . . . . . . . . . . . . . . . . . 37 2.4 Electrostatic Discharge (ESD) Protection Characteristics Figure17.SPI Slave Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . 38 19 Figure18.SPI Slave Timing (CPHA = 1) . . . . . . . . . . . . . . . . . . 38 2.5 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 List of Tables 2.6 Supply Current Characteristics. . . . . . . . . . . . . . . . . . .25 2.7 Analog Comparator (ACMP) Electricals . . . . . . . . . . . .27 Table1. MCF51AC256 Series Device Comparison . . . . . . . . . . 3 2.8 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .28 Table2. MCF51AC256 Series Functional Units . . . . . . . . . . . . . 6 2.9 External Oscillator (XOSC) Characteristics . . . . . . . . .31 Table3. Orderable Part Number Summary. . . . . . . . . . . . . . . . 10 2.10 MCG Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . .32 Table4. Pin Availability by Package Pin-Count. . . . . . . . . . . . . 14 2.11 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 Table5. Parameter Classifications . . . . . . . . . . . . . . . . . . . . . . 17 2.11.1 Control Timing. . . . . . . . . . . . . . . . . . . . . . . . . .34 Table6. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . 18 2.11.2 Timer (TPM/FTM) Module Timing . . . . . . . . . . .35 Table7. Thermal Characteristics. . . . . . . . . . . . . . . . . . . . . . . . 18 2.11.3 MSCAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Table8. ESD and Latch-up Test Conditions . . . . . . . . . . . . . . . 20 2.12 SPI Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Table9. ESD and Latch-Up Protection Characteristics. . . . . . . 20 2.13 Flash Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . .38 Table10.DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.14 EMC Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 Table11. Supply Current Characteristics. . . . . . . . . . . . . . . . . . 25 2.14.1 Radiated Emissions. . . . . . . . . . . . . . . . . . . . . .39 Table12.Analog Comparator Electrical Specifications. . . . . . . . 27 3 Mechanical Outline Drawings. . . . . . . . . . . . . . . . . . . . . . . . .40 Table13.5 Volt 12-bit ADC Operating Conditions . . . . . . . . . . . 28 4 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 Table14.5 Volt 12-bit ADC Characteristics (V = V , V = V ) . . . . . . . . . . . . . . . . . . 29 REFH DDA REFL SSA Table15.Oscillator Electrical Specifications List of Figures (Temperature Range = –40 to 105 C Ambient) . . . . . 31 Figure1.MCF51AC256 Series Block Diagram . . . . . . . . . . . . . . 5 Table16.MCG Frequency Specifications Figure2.MCF51AC256 Series ColdFire Microcontroller (Temperature Range = –40 to 105 C Ambient) . . . . . 32 80-Pin LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table17.Control Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure3.MCF51AC256 Series ColdFire Microcontroller Table18.TPM/FTM Input Timing . . . . . . . . . . . . . . . . . . . . . . . . 35 64-Pin QFP/LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table19.MSCAN Wake-Up Pulse Characteristics. . . . . . . . . . . 35 Figure4.MCF51AC256 Series ColdFire Microcontroller Table20.SPI Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 44-Pin LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table21.Flash Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure5.Typical I vs. V –V at V = 3 V Table22.Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . 40 OH DD OH DD (Low Drive, PTxDSn = 0) . . . . . . . . . . . . . . . . . . . . . . 22 Table23.Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure6.Typical I vs. V –V at V = 3 V OH DD OH DD (High Drive, PTxDSn = 1). . . . . . . . . . . . . . . . . . . . . . 23 Figure7.Typical I vs. V –V at V = 5 V OH DD OH DD (Low Drive, PTxDSn = 0) . . . . . . . . . . . . . . . . . . . . . . 23 MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 2 Freescale Semiconductor

MCF51AC256 Family Configurations 1 MCF51AC256 Family Configurations 1.1 Device Comparison The MCF51AC256 series is summarized in Table1. Table1. MCF51AC256 Series Device Comparison MCF51AC256A MCF51AC256B MCF51AC128A MCF51AC128C Feature 80-pin 64-pin 80-pin 64-pin 44-pin 80-pin 64-pin 80-pin 64-pin 44-pin Flash memory size (Kbytes) 256 128 RAM size (Kbytes) 32 32 or 161 V1 ColdFire core with BDM (background Yes debug module) ACMP1 (analog comparator) Yes ACMP2 (analog comparator) Yes Yes No Yes No ADC (analog-to-digital converter) channels 24 20 24 20 9 24 20 24 20 9 (12-bit) CAN (controller area network) Yes No Yes No COP (computer operating properly) Yes CRC (cyclic redundancy check) Yes RTI Yes DBG (debug) Yes IIC1 (inter-integrated circuit) Yes IRQ (interrupt request input) Yes INTC (interrupt controller) Yes KBI (keyboard interrupts) Yes LVD (low-voltage detector) Yes MCG (multipurpose clock generator) Yes OSC (crystal oscillator) Yes Port I/O2 69 54 69 54 36 69 54 69 54 36 RGPIO (rapid general-purpose I/O) 16 12 16 12 SCI1, SCI2 (serial communications Yes interfaces) SPI1 (serial peripheral interface) Yes SPI2 (serial peripheral interface) Yes No Yes No Yes No Yes No FTM1 (flexible timer module) channels 6 4 6 4 FTM2 channels 6 2 6 2 2 6 2 6 2 2 MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 3

MCF51AC256 Family Configurations Table1. MCF51AC256 Series Device Comparison (continued) MCF51AC256A MCF51AC256B MCF51AC128A MCF51AC128C Feature 80-pin 64-pin 80-pin 64-pin 44-pin 80-pin 64-pin 80-pin 64-pin 44-pin TPM3 (timer pulse-width modulator) 2 channels VBUS (debug visibility bus) Yes No Yes No Yes No Yes No 1 The members of MCF51AC128A with CAN support have 32 KB RAM. The other members have 16 KB RAM. 2 Up to 16 pins on Ports E and F are shared with the ColdFire Rapid GPIO module. 1.2 Block Diagram Figure 1 shows the connections between the MCF51AC256 series pins and modules. MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 4 Freescale Semiconductor

MCF51AC256 Family Configurations PTA7/AD1P17 VREFH VREFH Port B: Port D: PTA6/AD1P16 VVVRDSEDSFAAL VVVRDSSEDAFAL APADoD1r1Pt P7D0–: ACMP1 AAACCCMMMPPP111O+– ort A PPPTTTAAA345///AAACCCMMMPPP222O–+ AD1P15– P PTA2 Port J: AD1P8 Port A: PTA1/RxCAN DBG VBUSDDDDAPAPTSTSATA3T30-0- ADC APPADooDPrrPtt1 17GA6–:: ACMP2 AAACCCMMMPPP222O+– PPPTTTABB067///TAAxDDC11APPN67 BKGD/MS BDM PPBSoKTrPCt TLHK: AAPADDoDPPrP1t2 913H–8–: IIC PoSSrDCt ALC11: Port B PPPPTTTTBBBB3452////AAAADDDD1111PPPP3452 ADP20 PTB1/TPM3CH1/AD1P1 PTB0/TPM3CH0/AD1P0 Port G: ColdFire V1 core TPMCLK FTMPo1CrtH F5: KKBBII11PP43 PPTTCC65//RFTxMD22FLT RESET FTM1CH4 KBI1P2 C PTC4/SS2 FTM1 FFTTMM11CCHH32 KBI KKBBII11PP10 Port PPTTCC32//TMxCDL2K Port E: Port D: PTC1/SDA1 FTM1CH1 KBI1P7 PTC0/SCL1 IRQ/ SIM FTM1CH0 KBI1P6 PTD7/KBI1P7/AD1P15 TPMCLK KBI1P5 PTD6/FTM1CLK/AD1P14 TPMCLK Port H: PTD5/AD1P13 COP LVD IRQ FTM2 FFFFTTTTMMMM2222CCCCHHHH5432 MCG OSC PEoXXrTTt AAGLL: Port D PPPPTTTTDDDD1423////AFKKTDBBMII111P2PPC956/L//AAAKCDD/MA11DPPP1111P01–/1A2CMP1O Port F: PTD0/AD1P8/ACMP1+ FLASH FTM2CH1 LPO PTE7/RGPIO7/SPSCK1 FTM2CH0 PTE6/RGPIO6/MOSI1 MCF51AC256A/B = 256 KB PTE5/RGPIO5/MISO1 MCF51AC1R28AAM/C = 128 KB TPMCLK TPM3 TTPPMMPo33rCCt HHB10: Port A: Port E PPPPTTTTEEEE1342////RRRRGGGGPPPPIIIIOOOO1342////RFSFTTSxDMM1111CCHH10 CAN RxCAN MCF51AC256A/B = 32 KB PTE0/RGPIO0/TxD1 TxCAN MCF51AC128A = 32 KB PTF7/RGPIO15 MCF51AC128C = 16 KB PTF6/RGPIO14/FTM1FLT PTF5/RGPIO13/FTM2CH1 Port F: ort F PPTTFF34//RRGGPPIIOO1112//FFTTMM12CCHH50 RGPIO15 P PTF2/RGPIO10/FTM1CH4 RGPIO14 PTF1/RGPIO9/FTM1CH3 RGPIO13 PTF0/RGPIO8/FTM1CH2 RGPIO12 RGPIO11 PTG6/EXTAL RGPIO10 PTG5/XTAL RGPIO9 G PTG4/KBI1P4/AD1P19 RGPIO RGPIO8 CRC SCI1 PoRrxt DE1: Port PPTTGG23//KKBBII11PP23/AD1P18 Port E: TxD1 PTG1/KBI1P1 RGPIO7 PTG0/KBI1P0 RGPIO6 RTI Port C: RGPIO5 SCI2 RxD2 PTH6/MISO2 RGPIO4 TxD2 PTH5/MOSI2 RRRGGGPPPIIIOOO321 Port E: Port H PPPTTTHHH234///FFSTTPMMSC22CCKHH245//PBSKTPCT/LAKD11/APD231P22 RGPIO0 SS1 PTH1/FTM2CH3/PSTCLK0/AD1P21 SPI1 SPSCK1 PTH0/FTM2CH2/AD1P20 MOSI1 VVVDSSDSS VREG SPI2 SPPMMMoSIOIrSSCtS OOKHI1222: Port J PPPPPPTTTTTTJJJJJJ765342//////DDDPPDSSDDDDTTAAAATTT32TAAAA3210 Port C: PTJ1/PST1 SS2 PTJ0/PST0 Figure1. MCF51AC256 Series Block Diagram MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 5

MCF51AC256 Family Configurations 1.3 Features Table 2 describes the functional units of the MCF51AC256 series. Table2. MCF51AC256 Series Functional Units Functional Unit Function CF1 Core (V1 ColdFire core) Executes programs and interrupt handlers BDM (background debug module) Provides single pin debugging interface (part of the V1 ColdFire core) DBG (debug) Provides debugging and emulation capabilities (part of the V1 ColdFire core) VBUS (debug visibility bus) Allows for real-time program traces (part of the V1 ColdFire core) SIM (system integration module) Controls resets and chip level interfaces between modules Flash (flash memory) Provides storage for program code, constants and variables RAM (random-access memory) Provides storage for program variables RGPIO (rapid general-purpose input/output) Allows for I/O port access at CPU clock speeds VREG (voltage regulator) Controls power management across the device COP (computer operating properly) Monitors a countdown timer and generates a reset if the timer is not regularly reset by the software LVD (low-voltage detect) Monitors internal and external supply voltage levels, and generates a reset or interrupt when the voltages are too low CF1_INTC (interrupt controller) Controls and prioritizes all device interrupts ADC (analog-to-digital converter) Measures analog voltages at up to 12 bits of resolution FTM1, FTM2 (flexible timer/pulse-width Provides a variety of timing-based features modulators) TPM3 (timer/pulse-width modulator) Provides a variety of timing-based features CRC (cyclic redundancy check) Accelerates computation of CRC values for ranges of memory ACMP1, ACMP2 (analog comparators) Compares two analog inputs IIC (inter-integrated circuit) Supports standard IIC communications protocol KBI (keyboard interrupt) Provides pin interrupt capabilities MCG (multipurpose clock generator) Provides clocking options for the device, including a phase-locked loop (PLL) and frequency-locked loop (FLL) for multiplying slower reference clock sources OSC (crystal oscillator) Allows a crystal or ceramic resonator to be used as the system clock source or reference clock for the PLL or FLL LPO (low-power oscillator) Provides a second clock source for COP and RTI. CAN (controller area network) Supports standard CAN communications protocol SCI1, SCI2 (serial communications interfaces) Serial communications UARTs capable of supporting RS-232 and LIN protocols SPI1 (8-bit serial peripheral interfaces) Provides 8-bit 4-pin synchronous serial interface SPI2 (16-bit serial peripheral interfaces) Provides 16-bit 4-pin synchronous serial interface with FIFO MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 6 Freescale Semiconductor

MCF51AC256 Family Configurations 1.3.1 Feature List • 32-bit Version 1 ColdFire® central processor unit (CPU) — Up to 50.33MHz at 2.7V –5.5V — Provide 0.94 Dhrystone 2.1 DMIPS per MHz performance when running from internal RAM (0.76 DMIPS per MHz when running from flash) — Implements instruction set revision C (ISA_C) • On-chip memory — Up to 256 KB flash memory read/program/erase over full operating voltage and temperature — Up to 32 KB static random access memory (SRAM) — Security circuitry to prevent unauthorized access to SRAM and flash contents • Power-Saving Modes — Three low-power stop plus wait modes — Peripheral clock enable register can disable clocks to unused modules, reducing currents; allows clocks to remain enabled to specific peripherals in stop3 mode • System protection features — Watchdog computer operating properly (COP) reset with options to run from independent LPO clock or bus clock — Low-voltage detection with reset or interrupt — Illegal opcode and illegal address detection with programmable reset or exception response — Flash block protection • Debug support — Single-wire background debug interface — Real-time debug support, with 6 hardware breakpoints (4 PC, 1 address pair and 1 data) that can be configured into a 1- or 2-level trigger — On-chip trace buffer provides programmable start/stop recording conditions plus support for continuous or PC-profiling modes — Support for real-time program (and optional partial data) trace using the debug visibility bus • V1 ColdFire interrupt controller (CF1_INTC) — Support of 40 peripheral I/O interrupt requests plus seven software (one per level) interrupt requests — Fixed association between interrupt request source and level plus priority, up to two requests can be remapped to the highest maskable level + priority — Unique vector number for each interrupt source — Support for service routine interrupt acknowledge (software IACK) read cycles for improved system performance • Multipurpose clock generator (MCG) — Oscillator (XOSC); loop-control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz or 1 MHz to 16 MHz — LPO clock as an optional independent clock source for COP and RTI — FLL/PLL controlled by internal or external reference MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 7

MCF51AC256 Family Configurations — Trimmable internal reference allows 0.2% resolution and 2% deviation • Analog-to-digital converter (ADC) — 24 analog inputs with 12 bits resolution — Output formatted in 12-, 10- or 8-bit right-justified format — Single or continuous conversion (automatic return to idle after single conversion) — Operation in low-power modes for lower noise operation — Asynchronous clock source for lower noise operation — Automatic compare with interrupt for less-than, or greater-than or equal-to, programmable value — On-chip temperature sensor • Flexible timer/pulse-width modulators (FTM) — 16-bit Free-running counter or a counter with initial and final value. The counting can be up and unsigned, up and signed, or up-down and unsigned — Up to 6 channels, and each channel can be configured for input capture, output compare or edge-aligned PWM mode, all channels can be configured for center-aligned PWM mode – Channels can operate as pairs with equal outputs, pairs with complimentary outputs or independent channels (with independent outputs) – Each pair of channels can be combined to generate a PWM signal (with independent control of both edges of PWM signal) – Deadtime insertion is available for each complementary pair — The load of the FTM registers which have write buffer can be synchronized; write protection for critical registers — Generation of the triggers to ADC (hardware trigger) — A fault input for global fault control — Backwards compatible with TPM • Timer/pulse width modulator (TPM) — 16-bit free-running or modulo up/down count operation — Two channels, each channel may be input capture, output compare, or edge-aligned PWM — One interrupt per channel plus terminal count interrupt • Cyclic redundancy check (CRC) generator — High speed hardware CRC generator circuit using 16-bit shift register — CRC16-CCITT compliancy with x16 + x12 + x5 + 1 polynomial — Error detection for all single, double, odd, and most multi-bit errors — Programmable initial seed value • Analog comparators (ACMP) — Full rail to rail supply operation — Selectable interrupt on rising edge, falling edge, or either rising or falling edges of comparator output — Option to compare to fixed internal bandgap reference voltage — Option to allow comparator output to be visible on a pin, ACMPxO MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 8 Freescale Semiconductor

MCF51AC256 Family Configurations • Inter-integrated circuit (IIC) — Compatible with IIC bus standard — Multi-master operation — Software programmable for one of 64 different serial clock frequencies — Interrupt driven byte-by-byte data transfer — Arbitration lost interrupt with automatic mode switching from master to slave — Calling address identification interrupt — Bus busy detection — 10-bit address extension • Controller area network (CAN) — Implementation of the CAN protocol — Version 2.0A/B – Standard and extended data frames – Zero to eight bytes data length – Programmable bit rate up to 1 Mbps – Support for remote frames — Five receive buffers with FIFO storage scheme — Three transmit buffers with internal prioritization using a “local priority” concept — Flexible maskable identifier filter supports two full-size (32-bit) extended identifier filters, four 16-bit filters, or eight 8-bit filters — Programmable wakeup functionality with integrated low-pass filter — Programmable loopback mode supports self-test operation — Programmable listen-only mode for monitoring of CAN bus — Programmable bus-off recovery functionality — Separate signalling and interrupt capabilities for all CAN receiver and transmitter error states (warning, error passive, bus-off) — Internal timer for time-stamping of received and transmitted messages • Serial communications interfaces (SCI) — Full-duplex, standard non-return-to-zero (NRZ) format — Double-buffered transmitter and receiver with separate enables — Programmable baud rates (13-bit modulo divider) — Interrupt-driven or polled operation — Hardware parity generation and checking — Programmable 8-bit or 9-bit character length — Receiver wakeup by idle-line or address-mark — Optional 13-bit break character generation / 11-bit break character detection — Selectable transmitter output polarity • Serial peripheral interfaces (SPI) — Master or slave mode operation — Full-duplex or single-wire bidirectional option — Programmable transmit bit rate MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 9

MCF51AC256 Family Configurations — Double-buffered transmit and receive — Serial clock phase and polarity options — Slave select output — Selectable MSB-first or LSB-first shifting — 16-bit and FIFO operations in SPI2 • Input/Output — 69 GPIOs — 8 keyboard interrupt pins with selectable polarity — Hysteresis and configurable pull-up device on all input pins; Configurable slew rate and drive strength on all output pins — 16-bits Rapid GPIO pins connected to the processor’s local 32-bit platform bus with set, clear, and faster toggle functionality 1.4 Part Numbers MCF 51 AC 256 X V XX E Pb free indicator Status Package designator (MCF = Fully Qualified ColdFire) Temperature range (PCF = Product Engineering) (V = –40C to 105C, C= –40C to 85C ) Core CAN Feature (A: With CAN, B/C: Without CAN) Family Memory size designator Table3. Orderable Part Number Summary Flash / SRAM Freescale Part Number Description Package Temperature (Kbytes) MCF51AC256AVFUE MCF51AC256 ColdFire Microcontroller with CAN 256 / 32 64 QFP –40°C to 105°C MCF51AC256BVFUE MCF51AC256 ColdFire Microcontroller without CAN 256 / 32 64 QFP –40°C to 105°C MCF51AC256AVLKE MCF51AC256 ColdFire Microcontroller with CAN 256 / 32 80 LQFP –40°C to 105°C MCF51AC256BVLKE MCF51AC256 ColdFire Microcontroller without CAN 256 / 32 80 LQFP –40°C to 105°C MCF51AC256AVPUE MCF51AC256 ColdFire Microcontroller with CAN 256 / 32 64 LQFP –40°C to 105°C MCF51AC256BVPUE MCF51AC256 ColdFire Microcontroller without CAN 256 / 32 64 LQFP –40°C to 105°C MCF51AC128AVFUE MCF51AC128 ColdFire Microcontroller with CAN 128 / 32 64 QFP –40°C to 105°C MCF51AC128CVFUE MCF51AC128 ColdFire Microcontroller without CAN 128 / 16 64 QFP –40°C to 105°C MCF51AC128AVLKE MCF51AC128 ColdFire Microcontroller with CAN 128 / 32 80 LQFP –40°C to 105°C MCF51AC128CVLKE MCF51AC128 ColdFire Microcontroller without CAN 128 / 16 80 LQFP –40°C to 105°C MCF51AC128AVPUE MCF51AC128 ColdFire Microcontroller with CAN 128 / 32 64 LQFP –40°C to 105°C MCF51AC128CVPUE MCF51AC128 ColdFire Microcontroller without CAN 128 / 16 64 LQFP –40°C to 105°C MCF51AC256ACFUE MCF51AC256 ColdFire Microcontroller with CAN 256 / 32 64 QFP –40°C to 85°C MCF51AC256BCFUE MCF51AC256 ColdFire Microcontroller without CAN 256 / 32 64 QFP –40°C to 85°C MCF51AC256ACLKE MCF51AC256 ColdFire Microcontroller with CAN 256 / 32 80 LQFP –40°C to 85°C MCF51AC256BCLKE MCF51AC256 ColdFire Microcontroller without CAN 256 / 32 80 LQFP –40°C to 85°C MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 10 Freescale Semiconductor

MCF51AC256 Family Configurations Table3. Orderable Part Number Summary MCF51AC256ACPUE MCF51AC256 ColdFire Microcontroller with CAN 256 / 32 64 LQFP –40°C to 85°C MCF51AC256BCPUE MCF51AC256 ColdFire Microcontroller without CAN 256 / 32 64 LQFP –40°C to 85°C MCF51AC256BCFGE MCF51AC256 ColdFire Microcontroller without CAN 256/32 44 LQFP –40°C to 85°C MCF51AC128ACFUE MCF51AC128 ColdFire Microcontroller with CAN 128 / 32 64 QFP –40°C to 85°C MCF51AC128CCFUE MCF51AC128 ColdFire Microcontroller without CAN 128 / 16 64 QFP –40°C to 85°C MCF51AC128ACLKE MCF51AC128 ColdFire Microcontroller with CAN 128 / 32 80 LQFP –40°C to 85°C MCF51AC128CCLKE MCF51AC128 ColdFire Microcontroller without CAN 128 / 16 80 LQFP –40°C to 85°CC MCF51AC128ACPUE MCF51AC128 ColdFire Microcontroller with CAN 128 / 32 64 LQFP –40°C to 85°C MCF51AC128CCPUE MCF51AC128 ColdFire Microcontroller without CAN 128 / 16 64 LQFP –40°C to 85°C MCF51AC128CCFGE MCF51AC128 ColdFire Microcontroller without CAN 128 / 16 44 LQFP –40°C to 85°C MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 11

MCF51AC256 Family Configurations 1.5 Pinouts and Packaging Figure 2 shows the pinout of the 80-pin LQFP. 4 1 5P 29 P1D1 P1P1 D1A D1D1 RxD2TxD2MCLKMISO2MOSI2SPSCK2SDA1SCL1 EXTALXTALMS KBI1P7/AFTM1CLK/AD1P13TM2CLK/AKBI1P4/A PTC5/PTC3/PTC2/PTH6/PTH5/PTH4/PTC1/PTC0/VDDVSSPTG6/PTG5/BKGD/VREFLVREFHPTD7/PTD6/PTD5/PTD4/FPTG4/ 09876543210987654321 PTC4/SS2 18777777777766666666660 PTG3/KBI1P3/AD1P18 IRQ/TPMCLK 2 59 PTD3/KBI1P6/AD1P11 RESET 3 58 PTD2/KBI1P5/AD1P10/ACMP1O PTF0/RGPIO8/FTM1CH2 4 57 VSSA PTF1/RGPIO9/FTM1CH3 5 56 VDDA PTF2/RGPIO10/FTM1CH4 6 55 PTD1/AD1P9/ACMP1– PTF3/RGPIO11/FTM1CH5 7 54 PTD0/AD1P8/ACMP1+ PTF4/RGPIO12/FTM2CH0 8 53 PTB7/AD1P7 PTC6/FTM2FLT 9 52 PTB6/AD1P6 PTF7/RGPIO15 10 80-Pin 51 PTB5/AD1P5 PTF5/RGPIO13/FTM2CH1 11 LQFP 50 PTB4/AD1P4 PTF6/RGPIO14/FTM1FLT 12 49 PTB3/AD1P3 PTJ0/PST0 13 48 PTB2/AD1P2 PTJ1/PST1 14 47 PTB1/TPM3CH1/AD1P1 PTJ2/PST2 15 46 PTB0/TPM3CH0/AD1P0 PTJ3/PST3 16 45 PTH3/FTM2CH5/BKPT/AD1P23 PTE0/RGPIO0/TxD1 17 44 PTH2/FTM2CH4/PSTCLK1/AD1P22 PTE1/RGPIO1/RxD1 18 43 PTH1/FTM2CH3/PSTCLK0/AD1P21 PTE2/RGPIO2/FTM1CH0 19 42 PTH0/FTM2CH2/AD1P20 PTE3/RGPIO3/FTM1CH1 20 41 PTA7/AD1P17 12345678901234567890 22222222233333333334 1111 S D0123012NN2O–+6 4/RGPIO4/SSRGPIO5/MISORGPIO6/MOSIGPIO7/SPSCKVSVDPTJ4/DDATAPTJ5/DDATAPTJ6/DDATAPTJ7/DDATAPTG0/KBI1PPTG1/KBI1PPTG2/KBI1P•PTA0/TxCA•PTA1/RxCAPTAPTA3/ACMP2PTA4/ACMP2PTA5/ACMP2PTA6/AD1P1 •m TexmCbAeNrs a tnhda tR dxoC nAoNt saurpep noortt CavAaNilable in the E//R PTPTE5PTE6TE7/ P Figure2. MCF51AC256 Series ColdFire Microcontroller 80-Pin LQFP Figure 3 shows the pinout of the 64-pin LQFP and QFP. MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 12 Freescale Semiconductor

MCF51AC256 Family Configurations 4 2 1 1 5P P9 P1D1 D1P1 D1A AD1 AK/ K/A RxD2TxD2MCLKSDA1SCL1 EXTALXTALMS KBI1P7/FTM1CLAD1P13FTM2CLKBI1P4/ TC5/TC3/TC2/TC1/TC0/ SSTG6/TG5/KGD/ REFL REFHTD7/TD6/TD5/TD4/TG4/ PPPPPVPPBVVPPPPP 4321098765432109 6666655555555554 PTC4 1 48 PTG3/KBI1P3/AD1P18 IRQ/TPMCLK 2 47 PTD3/KBI1P6/AD1P11 RESET 3 46 PTD2/KBI1P5/AD1P10/ACMP1O PTF0/RGPIO8/FTM1CH2 4 45 V SSA PTF1/RGPIO9/FTM1CH3 5 44 V DDA PTF2/RGPIO10/FTM1CH4 6 43 PTD1/AD1P9/ACMP1– PTF3/RGPIO11/FTM1CH5 7 42 PTD0/AD1P8/ACMP1+ 64-Pin QFP PTF4/RGPIO12/FTM2CH0 8 41 PTB7/AD1P7 64-Pin LQFP PTC6/FTM2FLT 9 40 PTB6/AD1P6 PTF7/RGPIO15 10 39 PTB5/AD1P5 PTF5/RGPIO13/FTM2CH1 11 38 PTB4/AD1P4 PTF6/RGPIO14/FTM1FLT 12 37 PTB3/AD1P3 PTE0/RGPIO0/TxD1 13 36 PTB2/AD1P2 PTE1/RGPIO1/RxD1 14 35 PTB1/TPM3CH1/AD1P1 PTE2/RGPIO2/FTM1CH0 15 34 PTB0/TPM3CH0/AD1P0 PTE3/RGPIO3/FTM1CH1 16 33 PTA7/AD1P17 17181920212223242526272829303132 E4/RGPIO4/SS1/RGPIO5/MISO1/RGPIO6/MOSI1RGPIO7/SPSCK1VSSVDDPTG0/KBI1P0PTG1/KBI1P1PTG2/KBI1P2•PTA0/TxCAN•PTA1/RxCANPTA2PTA3/ACMP2OPTA4/ACMP2–PTA5/ACMP2+PTA6/AD1P16 •m TexmCbAeNrs a tnhda tR dxoC nAoNt saurpep noortt CavAaNilable in the PTE5E67/ TTE PPT P Figure3. MCF51AC256 Series ColdFire Microcontroller 64-Pin QFP/LQFP Figure 4 shows the pinout of the 44-pin LQFP. MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 13

MCF51AC256 Family Configurations L PTC5/RxD2 PTC3/TxD2 PTC2/MCLK PTC1/SDA1 PTC0/SCL1 VSS PTG6/EXTA PTG5/XTAL BKGD/MS VREFL VREFH 44 34 43 42 41 40 39 38 37 36 35 PTC4 1 33 PTG3/KBI1P3/AD1P18 IRQ/TPMCLK 2 32 PTD3/KBI1P6/AD1P11 RESET 3 31 PTD2/KBI1P5/AD1P10/ACMP1O PTF0/RGPIO8/FTM1CH2 4 30 V SSA PTF1/RGPIO9/FTM1CH3 5 29 V DDA 44-Pin LQFP PTF4/RGPIO12/FTM2CH0 6 28 PTD1/AD1P9/ACMP1- PTF5/RGPIO13/FTM2CH1 7 27 PTD0/AD1P8/ACMP1+ PTE0/RGPIO0/TxD1 8 26 PTB3/AD1P3 PTE1/RGPIO1/RxD1 9 25 PTB2/AD1P2 PTE2/RGPIO2/FTM1CH0 10 24 PTB1/TPM3CH1/AD1P1 PTE3/RGPIO3/FTM1CH1 11 23 PTB0/TPM3CH0/AD1P0 13 14 15 16 17 18 19 20 21 12 22 1 1 1 1 S D 0 1 2 N N TE4/RGPIO4/SS 5/RGPIO5/MISO 6/RGPIO6/MOSI RGPIO7/SPSCK VS VD PTG0/KBI1P PTG1/KBI1P PTG2/KBI1P •PTA0/TxCA •PTA1/RxCA P PTE PTE TE7/ P • TxCAN and RxCAN are not available in the members that do not support CAN Figure4. MCF51AC256 Series ColdFire Microcontroller 44-Pin LQFP Table 4 shows the package pin assignments. Table4. Pin Availability by Package Pin-Count Pin Number Lowest <-- Priority --> Highest 80 64 44 Port Pin Alt 1 Alt 2 Alt 3 1 1 1 PTC4 SS2 2 2 2 IRQ TPMCLK1 3 3 3 RESET 4 4 4 PTF0 RGPIO8 FTM1CH2 5 5 5 PTF1 RGPIO9 FTM1CH3 6 6 — PTF2 RGPIO10 FTM1CH4 7 7 — PTF3 RGPIO11 FTM1CH5 MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 14 Freescale Semiconductor

MCF51AC256 Family Configurations Table4. Pin Availability by Package Pin-Count (continued) Pin Number Lowest <-- Priority --> Highest 80 64 44 Port Pin Alt 1 Alt 2 Alt 3 8 8 6 PTF4 RGPIO12 FTM2CH0 9 9 — PTC6 FTM2FLT 10 10 — PTF7 RGPIO15 11 11 7 PTF5 RGPIO13 FTM2CH1 12 12 — PTF6 RGPIO14 FTM1FLT 13 — — PTJ0 PST0 14 — — PTJ1 PST1 15 — — PTJ2 PST2 16 — — PTJ3 PST3 17 13 8 PTE0 RGPIO0 TxD1 18 14 9 PTE1 RGPIO1 RxD1 19 15 10 PTE2 RGPIO2 FTM1CH0 20 16 11 PTE3 RGPIO3 FTM1CH1 21 17 12 PTE4 RGPIO4 SS1 22 18 13 PTE5 RGPIO5 MISO1 23 19 14 PTE6 RGPIO6 MOSI1 24 20 15 PTE7 RGPIO7 SPSCK1 25 21 16 V SS 26 22 17 V DD 27 — — PTJ4 DDATA0 28 — — PTJ5 DDATA1 29 — — PTJ6 DDATA2 30 — — PTJ7 DDATA3 31 23 18 PTG0 KBI1P0 32 24 19 PTG1 KBI1P1 33 25 20 PTG2 KBI1P2 34 26 21 PTA0 TxCAN2 35 27 22 PTA1 RxCAN3 36 28 — PTA2 37 29 — PTA3 ACMP2O 38 30 — PTA4 ACMP2– 39 31 — PTA5 ACMP2+ 40 32 — PTA6 AD1P16 41 33 — PTA7 AD1P17 42 — — PTH0 FTM2CH2 AD1P20 43 — — PTH1 FTM2CH3 PSTCLK0 AD1P21 44 — — PTH2 FTM2CH4 PSTCLK1 AD1P22 45 — — PTH3 FTM2CH5 BKPT AD1P23 46 34 23 PTB0 TPM3CH0 AD1P0 47 35 24 PTB1 TPM3CH1 AD1P1 48 36 25 PTB2 AD1P2 MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 15

MCF51AC256 Family Configurations Table4. Pin Availability by Package Pin-Count (continued) Pin Number Lowest <-- Priority --> Highest 80 64 44 Port Pin Alt 1 Alt 2 Alt 3 49 37 26 PTB3 AD1P3 50 38 — PTB4 AD1P4 51 39 — PTB5 AD1P5 52 40 — PTB6 AD1P6 53 41 — PTB7 AD1P7 54 42 27 PTD0 AD1P8 ACMP1+ 55 43 28 PTD1 AD1P9 ACMP1– 56 44 29 V DDA 57 45 30 V SSA 58 46 31 PTD2 KBI1P5 AD1P10 ACMP1O 59 47 32 PTD3 KBI1P6 AD1P11 60 48 33 PTG3 KBI1P3 AD1P18 61 49 — PTG4 KBI1P4 AD1P19 62 50 — PTD4 FTM2CLK AD1P12 63 51 — PTD5 AD1P13 64 52 — PTD6 FTM1CLK AD1P14 65 53 — PTD7 KBI1P7 AD1P15 66 54 34 V REFH 67 55 35 V REFL 68 56 36 BKGD MS 69 57 37 PTG5 XTAL 70 58 38 PTG6 EXTAL 71 59 39 V SS 72 — — V DD 73 60 40 PTC0 SCL1 74 61 41 PTC1 SDA1 75 — — PTH4 SPCK2 76 — — PTH5 MOSI2 77 — — PTH6 MISO2 78 62 42 PTC2 MCLK 79 63 43 PTC3 TxD2 80 64 44 PTC5 RxD2 1 TPMCLK, FTM1CLK, and FTM2CLK options are configured via software; out of reset, FTM1CLK, FTM2CLK, and TPMCLK are available to FTM1, FTM2, and TPM3 respectively. 2 TxCAN is available in the member that supports CAN. 3 RxCAN is available in the member that supports CAN. MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 16 Freescale Semiconductor

Electrical Characteristics 2 Electrical Characteristics This section contains electrical specification tables and reference timing diagrams for the MCF51AC256 microcontroller, including detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications. The electrical specifications are preliminary and are from previous designs or design simulations. These specifications may not be fully tested or guaranteed at this early stage of the product life cycle. These specifications will, however, be met for production silicon. Finalized specifications will be published after complete characterization and device qualifications have been completed. NOTE The parameters specified in this data sheet supersede any values found in the module specifications. 2.1 Parameter Classification The electrical parameters shown in this supplement are guaranteed by various methods. To give the customer a better understanding the following classification is used and the parameters are tagged accordingly in the tables where appropriate: Table5. Parameter Classifications P Those parameters are guaranteed during production testing on each individual device. Those parameters are achieved by the design characterization by measuring a statistically relevant C sample size across process variations. Those parameters are achieved by design characterization on a small sample size from typical devices T under typical conditions unless otherwise noted. All values shown in the typical column are within this category. D Those parameters are derived mainly from simulations. NOTE The classification is shown in the column labeled “C” in the parameter tables where appropriate. 2.2 Absolute Maximum Ratings Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the limits specified in Table 6 may affect device reliability or cause permanent damage to the device. For functional operating conditions, refer to the remaining tables in this section. This device contains circuitry protecting against damage due to high static voltage or electrical fields; however, it is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for instance, either V or V ). SS DD MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 17

Electrical Characteristics Table6. Absolute Maximum Ratings Rating Symbol Value Unit Supply voltage V –0.3 to 5.8 V DD Input voltage V –0.3 to V + 0.3 V In DD Instantaneous maximum current I 25 mA Single pin limit (applies to all port pins)1,2,3 D Maximum current into V I 120 mA DD DD Storage temperature T –55 to 150 C stg 1 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive (V ) and negative (V ) clamp DD SS voltages, then use the larger of the two resistance values. 2 All functional non-supply pins are internally clamped to V and V . SS DD 3 Power supply must maintain regulation within operating V range during instantaneous and DD operating maximum current conditions. If positive injection current (V > V ) is greater than In DD I , the injection current may flow out of V and could result in external power supply going DD DD out of regulation. Ensure external V load will shunt current greater than maximum injection DD current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is present, or if the clock rate is very low which would reduce overall power consumption. 2.3 Thermal Characteristics This section provides information about operating temperature range, power dissipation, and package thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in on-chip logic and it is user-determined rather than being controlled by the MCU design. In order to take P into account in power calculations, determine the difference between actual pin voltage and V or I/O SS V and multiply by the pin current for each I/O pin. Except in cases of unusually high pin current (heavy DD loads), the difference between pin voltage and V or V will be very small. SS DD Table7. Thermal Characteristics Rating Symbol Value Unit Operating temperature range (packaged) T –40 to 105 C A Maximum junction temperature T 150 C J Thermal resistance 1,2,3,4 80-pin LQFP 1s 51 2s2p 38 64-pin LQFP 1s 59 2s2p  41 C/W JA 64-pin QFP 50 1s 36 2s2p 44-pin LQFP 1s 67 2s2p 45 MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 18 Freescale Semiconductor

Electrical Characteristics 1 Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance 2 Junction to Ambient Natural Convection 3 1s — Single layer board, one signal layer 4 2s2p — Four layer board, 2 signal and 2 power layers The average chip-junction temperature (T ) in C can be obtained from: J T = T + (P   ) Eqn.1 J A D JA where: T = Ambient temperature, C A  = Package thermal resistance, junction-to-ambient, C/W JA P = P P D int I/O P = I  V , Watts — chip internal power int DD DD P = Power dissipation on input and output pins — user determined I/O For most applications, P  P and can be neglected. An approximate relationship between P and T I/O int D J (if P is neglected) is: I/O P = K  (T + 273C) Eqn.2 D J Solving Equation1 and Equation2 for K gives: K = P  (T + 273C) +   (P )2 Eqn.3 D A JA D where K is a constant pertaining to the particular part. K can be determined from Equation3 by measuring P (at equilibrium) for a known T . Using this value of K, the values of P and T can be obtained by D A D J solving Equation1 and Equation2 iteratively for any value of T . A 2.4 Electrostatic Discharge (ESD) Protection Characteristics Although damage from static discharge is much less common on these devices than on early CMOS circuits, normal handling precautions should be used to avoid exposure to static discharge. Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels of static without suffering any permanent damage. All ESD testing is in conformity with CDF-AEC-Q00 Stress Test Qualification for Automotive Grade Integrated Circuits. (http://www.aecouncil.com/) This device was qualified to AEC-Q100 Rev E. A device is considered to have failed if, after exposure to ESD pulses, the device no longer meets the device specification requirements. Complete dc parametric and functional testing is performed per the MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 19

Electrical Characteristics applicable device specification at room temperature followed by hot temperature, unless specified otherwise in the device specification. Table8. ESD and Latch-up Test Conditions Model Description Symbol Value Unit Human body Series resistance R1 1500  Storage capacitance C 100 pF Number of pulse per pin — 3 Charge device Series resistance R1 0  model Storage capacitance C 0 pF Number of pulse per pin — 3 — Latch-up Minimum input voltage limit — –2.5 V Maximum input voltage limit — 7.5 V Table9. ESD and Latch-Up Protection Characteristics Num Rating Symbol Min Max Unit 1 Human body model (HBM) V ±2000 — V HBM 2 Charge device model (CDM) V ±500 — V CDM 3 Latch-up current at T = 85 C I ±100 — mA A LAT 2.5 DC Characteristics This section includes information about power supply requirements, I/O pin characteristics, and power supply current in various operating modes. Table10. DC Characteristics Num C Parameter Symbol Min Typical1 Max Unit 1 — Operating voltage 2.7 — 5.5 V Output high voltage — Low drive (PTxDSn = 0) 5 V, I = –4 mA V – 1.5 — — Load DD 3 V, I = –2 mA V – 1.5 — — Load DD 5 V, I = –2 mA V – 0.8 — — Load DD 3 V, I = –1 mA V – 0.8 — — Load DD 2 P V V OH Output high voltage — High drive (PTxDSn = 1) 5 V, I = –15 mA V – 1.5 — — Load DD 3 V, I = –8 mA V – 1.5 — — Load DD 5 V, I = –8 mA V – 0.8 — — Load DD 3 V, I = –4 mA V – 0.8 — — Load DD MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 20 Freescale Semiconductor

Electrical Characteristics Table10. DC Characteristics (continued) Num C Parameter Symbol Min Typical1 Max Unit Output low voltage — Low Drive (PTxDSn = 0) 5 V, I = 4 mA 1.5 Load 3 V, I = 2 mA 1.5 Load — — 5 V, I = 2 mA 0.8 Load 3 V, I = 1 mA 0.8 Load 3 P V V OL Output low voltage — High Drive (PTxDSn = 1) 5 V, I = 15 mA 1.5 Load 3 V, I = 8 mA 1.5 Load — — 5 V, I = 8 mA 0.8 Load 3 V, I = 4 mA 0.8 Load Output high current — Max total I for all ports OH 4 C 5V I 100 mA OHT — — 3V 60 Output low current — Max total I for all ports OL 5 C 5 V I 100 mA OLT — — 3 V 60 6 P Input high voltage; all digital inputs V 0.65  V — — V IH DD 7 P Input low voltage; all digital inputs V — — 0.35  V V IL DD 8 D Input hysteresis; all digital inputs V 0.06  V — — mV hys DD 9 P Input leakage current; input only pins2 |I | — 0.1 1 A In 10 P High impedance (off-state) leakage current2 |I | — 0.1 1 A OZ 11 P Internal pullup resistors3 R 20 45 65 k PU 12 P Internal pulldown resistors4 R 20 45 65 k PD 13 C Input capacitance; all non-supply pins C — — 8 pF In 14 P POR rearm voltage V 0.9 1.4 2.0 V POR 15 D POR rearm time t 10 — — s POR Low-voltage detection threshold — high range 16 P V V V falling LVDH 4.2 4.35 4.5 DD V rising 4.27 4.4 4.6 DD Low-voltage detection threshold — low range 17 P V V V falling LVDL 2.48 2.68 2.7 DD V rising 2.5 2.7 2.72 DD Low-voltage warning threshold — high range 18 P V V V falling LVWH 4.2 4.4 4.5 DD V rising 4.27 4.45 4.6 DD Low-voltage warning threshold low range 19 P V V V falling LVWL 2.48 2.68 2.7 DD V rising 2.5 2.7 2.72 DD Low-voltage inhibit reset/recover hysteresis 20 T 5 V V 100 mV hys — — 3 V 60 21 D RAM retention voltage V — 0.6 1.0 V RAM MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 21

Electrical Characteristics Table10. DC Characteristics (continued) Num C Parameter Symbol Min Typical1 Max Unit DC injection current5 6 7 8 (single pin limit) V >V 0 2 mA IN DD — V <V 0 –0.2 IN SS 22 D DC injection current (Total MCU limit, includes sum of all IIC stressed pins) mA V >V 0 — 25 IN DD V <V 0 –5 IN SS 1 Typical values are based on characterization data at 25C unless otherwise stated. 2 Measured with V = V or V . In DD SS 3 Measured with V = V . In SS 4 Measured with V = V . In DD 5 Power supply must maintain regulation within operating V range during instantaneous and operating maximum current DD conditions. If positive injection current (V > V ) is greater than I , the injection current may flow out of V and could result In DD DD DD in external power supply going out of regulation. Ensure external V load will shunt current greater than maximum injection DD current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is present, or if clock rate is very low (which would reduce overall power consumption). 6 All functional non-supply pins are internally clamped to V and V . SS DD 7 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive and negative clamp voltages, then use the larger of the two values. 8 The RESET pin does not have a clamp diode to V . Do not drive this pin above V . DD DD V –V (V) DD OH Average of I OH –6.0E-3 –5.0E-3 -40C 25C –4.0E-3 105C A) –3.0E-3 (H O I –2.0E-3 –1.0E-3 000E+0 0 0.3 0.5 0.8 0.9 1.2 1.5 V –V Supply OH Figure5. Typical I vs. V –V at V = 3 V (Low Drive, PTxDSn = 0) OH DD OH DD MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 22 Freescale Semiconductor

Electrical Characteristics Average of IOH VDD–VOH (V) –20.0E-3 –18.0E-3 -40C –16.0E-3 25C –14.0E-3 105C –12.0E-3 –10.0E-3 A) –8.0E-3 (OH I –6.0E-3 –4.0E-3 –2.0E-3 000E+0 0 0.3 0.5 0.8 0.9 1.2 1.5 V –V Supply OH Figure6. Typical I vs. V –V at V = 3 V (High Drive, PTxDSn = 1) OH DD OH DD V –V (V) DD OH Average of I OH –7.0E-3 -40C –6.0E-3 25C –5.0E-3 105C –4.0E-3 A) –3.0E-3 (OH I –2.0E-3 –1.0E-3 000E+0 0.00 0.30 0.50 0.80 1.00 1.30 2.00 V –V Supply OH Figure7. Typical I vs. V –V at V = 5 V (Low Drive, PTxDSn = 0) OH DD OH DD MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 23

Electrical Characteristics Average of IOH VDD–VOH (V) –30.0E-3 –25.0E-3 -40C 25C –20.0E-3 105C –15.0E-3 A) (H O –10.0E-3 I –5.0E-3 000E+0 0.00 0.30 0.50 0.80 1.00 1.30 2.00 V –V Supply OH Figure8. Typical I vs. V –V at V = 5 V (High Drive, PTxDSn = 1) OH DD OH DD MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 24 Freescale Semiconductor

Electrical Characteristics 2.6 Supply Current Characteristics Table11. Supply Current Characteristics Num C Parameter Symbol V (V) Typical1 Max2 Unit DD 5 2.27 — 2 MHz 3.3 2.24 — 5 3.67 — Run supply current measured at 4 MHz 3.3 3.64 — 1 T FEI mode, all modules off, system clock at: 5 6.55 — 8 MHz 3.3 6.54 — 5 11.90 — 16 MHz 3.3 11.85 — 5 3.28 — 2 MHz 3.3 3.26 — 5 4.33 — Run supply current measured at 4 MHz 3.3 4.32 — 2 T FEI mode, all modules on, 5 8.17 — system clock at: 8 MHz 3.3 8.05 — 5 14.8 — 16 MHz RI 3.3 14.74 — DD mA 5 3.28 — 2 MHz 3.3 3.26 — 5 4.69 — Run supply current measured at 4 MHz 3 T FBE mode, all modules off 3.3 4.67 — (RANGE = 1, HGO = 0), system 5 7.48 — 8 MHz clock at: 3.3 7.46 — 5 13.10 — 16 MHz 3.3 13.07 — 5 3.64 — 2 MHz 3.3 3.63 — 5 5.38 — Run supply current measured at 4 MHz 4 T FBE mode, all modules on 3.3 5.35 — (RANGE = 1, HGO = 0), system 5 8.65 — 8 MHz clock at: 3.3 8.64 — 5 15.55 — 16 MHz 3.3 15.40 — MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 25

Electrical Characteristics Table11. Supply Current Characteristics (continued) Num C Parameter Symbol V (V) Typical1 Max2 Unit DD Wait mode supply3 current measured at 5 1.3 2 5 C (CPU clock = 2MHz, f = 1 MHz) mA Bus 3 1.29 2 Wait mode supply3 current measured at 5 5.11 8 6 C (CPU clock = 16MHz, fBus = 8 MHz) WIDD 3 5.1 8 mA Wait mode supply3 current measured at 5 15.24 25 7 C (CPU clock = 50MHz, f = 25 MHz) mA Bus 3 15.2 25 Stop2 mode supply current –40 C 2.5 5 1.40 A 25 C 2.5 120 C 200 8 C S2I DD –40 C 2.5 3 1.16 A 25 C 2.5 120C 200 Stop3 mode supply current –40 C 2.5 5 1.60 A 25 C 2.5 120C 220 9 C S3I DD –40 C 2.5 A 25 C 3 1.35 2.5 120 C 220 5 300 nA 10 C RTI adder to stop2 or stop33, 25 C S23I DDRTI 3 300 nA Adder to stop3 for oscillator enabled4 11 C S3I 5, 3 5 A (ERCLKEN =1 and EREFSTEN = 1) DDOSC 1 Typicals are measured at 25 C. 2 Values given here are preliminary estimates prior to completing characterization. 3 Most customers are expected to find that auto-wakeup from stop2 or stop3 can be used instead of the higher current wait mode. 4 Values given under the following conditions: low range operation (RANGE = 0), low power mode (HGO = 0). MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 26 Freescale Semiconductor

Electrical Characteristics Figure9. Typical Run I vs. System Clock Freq. for FEI and FBE Modes DD 2.7 Analog Comparator (ACMP) Electricals Table12. Analog Comparato r Electrical Specifications Num C Rating Symbol Min Typical Max Unit 1 — Supply voltage V 2.7 — 5.5 V DD 2 T Supply current (active) I — 20 35 A DDAC 3 D Analog input voltage V V – 0.3 — V V AIN SS DD 4 D Analog input offset voltage V — 20 40 mV AIO 5 D Analog comparator hysteresis V 3.0 6.0 20.0 mV H 6 D Analog input leakage current I — — 1.0 A ALKG 7 D Analog comparator initialization delay t — — 1.0 s AINIT Bandgap voltage reference 8 P factory trimmed at V = 5.3248 V, Temp = 25 C V 1.18 1.20 1.21 V DD BG MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 27

Electrical Characteristics 2.8 ADC Characteristics Table13. 5 Volt 12-bit ADC Operating Conditions Num C Characteristic Conditions Symb Min Typical1 Max Unit Comment D Absolute V 2.7 — 5.5 V DDA 1 Supply voltage Delta to V D DD V –100 0 100 mV (V – V )2 DDA DD DDA Delta to V 2 D Ground voltage SS V –100 0 100 mV (V – V )2 SSA SS SSA Reference 3 D V 2.7 V V V voltage high REFH DDA DDA Reference 4 D V V V V V voltage low REFL SSA SSA SSA 5 D Input voltage V V — V V ADIN REFL REFH Input 6 C C — 4.5 5.5 pF capacitance ADIN Input 7 C R — 3 5 k resistance ADIN 12-bit mode C f > 4MHz — — 2 ADCK f < 4MHz — — 5 ADCK Analog source 10-bit mode External 8 R k C resistance f > 4MHz AS — — 5 to MCU ADCK f < 4MHz — — 10 ADCK 8-bit mode (all valid C — — 10 f ) ADCK High speed D ADC 0.4 — 8.0 (ADLPC = 0) conversion 9 f MHz clock ADCK Low power D frequency 0.4 — 4.0 (ADLPC = 1) 1 Typical values assume V = 5.0 V, Temp = 25 C, f = 1.0 MHz unless otherwise stated. Typical values are for reference DDA ADCK only and are not tested in production. 2 DC potential difference. MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 28 Freescale Semiconductor

Electrical Characteristics SIMPLIFIED INPUT PIN EQUIVALENT CIRCUIT ZADIN SIMPLIFIED Pad ZAS leakage CHANNEL SELECT due to CIRCUIT ADC SAR R input R ENGINE AS protection ADIN + V ADIN – C VAS + AS – R ADIN INPUT PIN R ADIN INPUT PIN R ADIN INPUT PIN C ADIN Figure10. ADC Input Impedance Equivalency Diagram Table14. 5 Volt 12-bit ADC Characteristics (V = V , V = V ) REFH DDA REFL SSA Num C Characteristic Conditions Symb Min Typical1 Max Unit Comment Supply current ADLPC = 1 1 T I — 133 — A ADLSMP = 1 DDA ADCO = 1 Supply current ADLPC = 1 2 T I — 218 — A ADLSM = 0 DDA ADCO = 1 Supply current ADLPC = 0 3 T I — 327 — A ADLSMP = 1 DDA ADCO = 1 Supply current ADLPC = 0 4 D I — 0.582 1 mA ADLSMP = 0 DDA ADCO = 1 5 T Supply current Stop, reset, module off I — 0.011 1 A DDA ADC High speed (ADLPC = 0) 2 3.3 5 t = 6 P asynchronous f MHz ADACK ADACK 1/f clock source Low power (ADLPC = 1) 1.25 2 3.3 ADACK MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 29

Electrical Characteristics Table14. 5 Volt 12-bit ADC Characteristics (V = V , V = V ) (continued) REFH DDA REFL SSA Num C Characteristic Conditions Symb Min Typical1 Max Unit Comment Conversion Short sample (ADLSMP = 0) — 20 — ADCK See 7 P time (including tADC cycles Table10 sample time) Long sample (ADLSMP = 1) — 40 — for conversion Short sample (ADLSMP = 0) — 3.5 — 8 T Sample time t ADCK time Long sample (ADLSMP = 1) ADS — 23.5 — cycles variances T 12-bit mode — 3.0 — Total Includes 9 P unadjusted 10-bit mode E — 1 2.5 LSB2 quantizatio TUE error n T 8-bit mode — 0.5 1.0 T 12-bit mode — 1.75 — Differential 10 P 10-bit mode3 DNL — 0.5 1.0 LSB2 non-linearity T 8-bit mode3 — 0.3 0.5 T 12-bit mode — 1.5 — Integral 11 T 10-bit mode INL — 0.5 1.0 LSB2 non-linearity T 8-bit mode — 0.3 0.5 T 12-bit mode — 1.5 — Zero-scale V = 12 P 10-bit mode E — 0.5 1.5 LSB2 ADIN error ZS V SSA T 8-bit mode — 0.5 0.5 T 12-bit mode — 1 — V = 13 P Full-scale error 10-bit mode E — 0.5 1 LSB2 ADIN FS V DDA T 8-bit mode — 0.5 0.5 12-bit mode — –1 to 0 — Quantization 14 D 10-bit mode E — — 0.5 LSB2 error Q 8-bit mode — — 0.5 12-bit mode — 1 — Pad Input leakage 15 D 10-bit mode E — 0.2 2.5 LSB2 leakage4 * error IL R AS 8-bit mode — 0.1 1 Temp sensor 16 D 25C V — 1.396 — V voltage TEMP25 –40 C–25 C — 3.266 — Temp sensor 17 D m mV/C slope 25 C–85 C — 3.638 — 1 Typical values assume V = 5.0 V, Temp = 25 C, f = 1.0 MHz unless otherwise stated. Typical values are for reference only DDA ADCK and are not tested in production. 2 1 LSB = (V – V )/2N. REFH REFL MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 30 Freescale Semiconductor

Electrical Characteristics 3 Monotonicity and No-Missing-Codes guaranteed in 10-bit and 8-bit modes 4 Based on input pad leakage current. Refer to pad electricals. 2.9 External Oscillator (XOSC) Characteristics Table15. Oscillator Electrical Specifications (Temperature Range = –40 to 105 C Ambient) Num C Rating Symbol Min Typical1 Max Unit Oscillator crystal or resonator (EREFS=1, ERCLKEN = 1) Low range (RANGE = 0) f 32 — 38.4 kHz lo High range (RANGE = 1) FEE or FBE mode2 f 1 — 5 MHz 1 C hi-fll High range (RANGE = 1) PEE or PBE mode3 f 1 — 16 MHz hi-pll High range (RANGE = 1, HGO = 1) BLPE mode f 1 — 16 MHz hi-hgo High range (RANGE = 1, HGO = 0) BLPE mode f 1 — 8 MHz hi-lp C See crystal or resonator 2 — Load capacitors 1 C manufacturer’s recommendation. 2 Feedback resistor 3 — Low range (32 kHz to 38.4 kHz) R 10 F M High range (1 MHz to 16 MHz) 1 Series resistor Low range, low gain (RANGE = 0, HGO = 0) — 0 — Low range, high gain (RANGE = 0, HGO = 1) — 100 — High range, low gain (RANGE = 1, HGO = 0) — 0 — 4 — R k High range, high gain (RANGE = 1, HGO = 1) S  8 MHz — 0 0  MHz — 0 10  MHz — 0 20 Crystal start-up time 4 Low range, low gain (RANGE = 0, HGO = 0) t — 200 — CSTL-LP 5 T Low range, high gain (RANGE = 0, HGO = 1) t — 400 — CSTL-HGO ms High range, low gain (RANGE = 1, HGO = 0)5 t — 5 — CSTH-LP High range, high gain (RANGE = 1, HGO = 1)5 t — 15 — CSTH-HGO Square wave input clock frequency (EREFS=0, ERCLKEN = 1) 6 T FEE or FBE mode 2 f 0.03125 — 5 MHz extal PEE or PBE mode 3 1 — 16 BLPE mode 0 — 40 1 Data in Typical column was characterized at 5.0 V, 25 C or is typical recommended value. 2 When MCG is configured for FEE or FBE mode, input clock source must be divisible using RDIV to within the range of 31.25 kHz to 39.0625 kHz. 3 When MCG is configured for PEE or PBE mode, input clock source must be divisible using RDIV to within the range of 1 MHz to 2 MHz. 4 This parameter is characterized and not tested on each device. Proper PC board layout procedures must be followed to achieve specifications. 5 4 MHz crystal MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 31

Electrical Characteristics MCU EXTAL XTAL R R S F C1 Crystal or Resonator C2 2.10 MCG Specifications Table16. MCG Frequency Specifications(Temperature Range = –40 to 105 C Ambient) Num C Rating Symbol Min Typical1 Max Unit Internal reference frequency — factory trimmed at 1 C f — 32.768 — kHz V = 5 V and temperature = 25 C int_ft DD 2 C Average internal reference frequency — untrimmed f 31.25 — 39.0625 kHz int_ut 3 T Internal reference startup time t — 60 100 s irefst C Low range (DRS=00) 16 — 20 DCO output frequency 4 C Mid range (DRS=01) f 32 — 40 MHz range — untrimmed 2 dco_ut C High range (DRS=10) 48 — 60 P DCO output frequency2 Low range (DRS=00) — 16.82 — 5 P reference =32768Hz Mid range (DRS=01) f — 33.69 — MHz dco_DMX32 P and DMX32 = 1 High range (DRS=10) — 50.48 — Resolution of trimmed DCO output frequency at fixed 6 D f — 0.1 0.2 %f voltage and temperature (using FTRIM) dco_res_t dco Resolution of trimmed DCO output frequency at fixed 7 D f — 0.2 0.4 %f voltage and temperature (not using FTRIM) dco_res_t dco Total deviation of trimmed DCO output frequency over 0.5 8 D f — 2 %f voltage and temperature dco_t –1.0 dco Total deviation of trimmed DCO output frequency over 9 D f — 0.5 1 %f fixed voltage and temperature range of 0–70 C dco_t dco 10 D FLL acquisition time3 t — — 1 ms fll_acquire 11 D PLL acquisition time4 t — — 1 ms pll_acquire Long term jitter of DCO output clock (averaged over 12 D C — 0.02 0.2 %f 2ms interval) 5 Jitter dco 13 D VCO operating frequency f 7.0 — 55.0 MHz vco 16 D Jitter of PLL output clock measured over 625 ns6 f — 0.5666 — %f pll_jitter_625ns pll 17 D Lock entry frequency tolerance 7 D 1.49 — 2.98 % lock MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 32 Freescale Semiconductor

Electrical Characteristics Table16. MCG Frequency Specifications (continued)(Temperature Range = –40 to 105 C Ambient) Num C Rating Symbol Min Typical1 Max Unit 18 D Lock exit frequency tolerance 8 D 4.47 — 5.97 % unl t 19 D Lock time — FLL t — — fll_acquire+ s fll_lock f 1075(1/int_t) t 20 D Lock time — PLL t — — pll_acquire+ s pll_lock f 1075(1/pll_ref) Loss of external clock minimum frequency — 21 D RANGE = 0 f (3/5)  f — — kHz loc_low int 1 Data in Typical column was characterized at 5.0 V, 25 C or is typical recommended value. 2 The resulting bus clock frequency must not exceed the maximum specified bus clock frequency of the device. 3 This specification applies when the FLL reference source or reference divider is changed, trim value changed or changing from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference, this specification assumes it is already running. 4 This specification applies when the PLL VCO divider or reference divider is changed, or changing from PLL disabled (BLPE, BLPI) to PLL enabled (PBE, PEE). If a crystal/resonator is being used as the reference, this specification assumes it is already running. 5 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f . BUS Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise injected into the FLL circuitry via V and V and variation in crystal oscillator frequency increase the C percentage for DD SS Jitter a given interval. 6 625 ns represents 5 time quanta for CAN applications, under worst case conditions of 8 MHz CAN bus clock, 1 Mbps CAN bus speed, and 8 time quanta per bit for bit time settings. 5 time quanta is the minimum time between a synchronization edge and the sample point of a bit using 8 time quanta per bit. 7 Below D minimum, the MCG enters lock. Above D maximum, the MCG will not enter lock. But if the MCG is already in lock lock lock, then the MCG may stay in lock. 8 Below D minimum, the MCG will not exit lock if already in lock. Above D maximum, the MCG is guaranteed to exit lock. unl unl o 2.11 AC Characteristics This section describes ac timing characteristics for each peripheral system. MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 33

Electrical Characteristics 2.11.1 Control Timing Table17. Con trol Timing Num C Parameter Symbol Min Typical1 Max Unit 1 D Bus frequency (t = 1/f ) f dc — 24 MHz cyc Bus Bus 2 D Internal low-power oscillator period t 800 — 1500 s LPO External reset pulse width2 3 D t 100 — — ns (t = 1/f ) extrst cyc Self_reset 4 D Reset low drive t 66  t — — ns rstdrv cyc 5 D Active background debug mode latch setup time t 500 — — ns MSSU 6 D Active background debug mode latch hold time t 100 — — ns MSH IRQ pulse width 7 D Asynchronous path2 100 t t — — ns Synchronous path3 ILIH, IHIL 1.5  t cyc KBIPx pulse width 8 D Asynchronous path2 100 t t — — ns Synchronous path3 ILIH, IHIL 1.5  t cyc Port rise and fall time (load = 50 pF)4 Slew rate control disabled (PTxSE = 0), Low Drive — 11 9 D Slew rate control enabled (PTxSE = 1), Low Drive t , t — 35 — ns Rise Fall Slew rate control disabled (PTxSE = 0), Low Drive — 40 Slew rate control enabled (PTxSE = 1), Low Drive — 75 1 Typical values are based on characterization data at V = 5.0 V, 25 C unless otherwise stated. DD 2 This is the shortest pulse that is guaranteed to be recognized as a reset pin request. Shorter pulses are not guaranteed to override reset requests from internal sources. 3 This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case. 4 Timing is shown with respect to 20% V and 80% V levels. Temperature range –40 C to 105 C. DD DD t extrst RESET PIN Figure11. Reset Timing t IHIL IRQ/KBIPx IRQ/KBIPx t ILIH Figure12. IRQ/KBIPx Timing MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 34 Freescale Semiconductor

Electrical Characteristics 2.11.2 Timer (TPM/FTM) Module Timing Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that can be used as the optional external source to the timer counter. These synchronizers operate from the current bus rate clock. Table18. TPM/FTM Input Timing NUM C Function Symbol Min Max Unit 1 — External clock frequency fTPMext DC fBus/4 MHz 2 — External clock period tTPMext 4 — tcyc 3 D External clock high time tclkh 1.5 — tcyc 4 D External clock low time tclkl 1.5 — tcyc 5 D Input capture pulse width tICPW 1.5 — tcyc t TPMext t clkh TPMxCLK t clkl Figure13. Timer External Clock t ICPW TPMxCHn TPMxCHn t ICPW Figure14. Timer Input Capture Pulse 2.11.3 MSCAN Table19. MSCAN Wake-U p Pulse Characteristics Num C Parameter Symbol Min Typical1 Max Unit 1 D MSCAN wake-up dominant pulse filtered t — — 2 s WUP 2 D MSCAN wake-up dominant pulse pass t 5 — 5 s WUP 1 Typical values are based on characterization data at V = 5.0 V, 25 C unless otherwise stated. DD MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 35

Electrical Characteristics 2.12 SPI Characteristics Table 20 and Figure15 through Figure 18 describe the timing requirements for the SPI system. Table20. SPI Timing No. C Function Symbol Min Max Unit Operating frequency — D Master f f /2048 f /2 Hz op Bus Bus Slave 0 f /4 Bus SPSCK period 1 D Master t 2 2048 t SPSCK cyc Slave 4 — t cyc Enable lead time 2 D Master t 12 — t Lead SPSCK Slave 1 — t cyc Enable lag time 3 D Master t 12 — t Lag SPSCK Slave 1 — t cyc Clock (SPSCK) high or low time 4 D Master t t –30 1024 t ns WSPSCK cyc cyc Slave t – 30 — ns cyc Data setup time (inputs) 5 D Master t 15 — ns SU Slave 15 — ns Data hold time (inputs) 6 D Master t 0 — ns HI Slave 25 — ns 7 D Slave access time t — 1 t a cyc 8 D Slave MISO disable time t — 1 t dis cyc Data valid (after SPSCK edge) 9 D Master t — 25 ns v Slave — 25 ns Data hold time (outputs) 10 D Master t 0 — ns HO Slave 0 — ns Rise time 11 D Input t — t – 25 ns RI cyc Output t — 25 ns RO Fall time 12 D Input t — t – 25 ns FI cyc Output t — 25 ns FO MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 36 Freescale Semiconductor

Electrical Characteristics SS1 (OUTPUT) 2 1 11 3 SPSCK 4 (CPOL = 0) (OUTPUT) 4 12 SPSCK (CPOL = 1) (OUTPUT) 5 6 MISO (INPUT) MSB IN2 BIT 6 . . . 1 LSB IN 9 9 10 MOSI (OUTPUT) MSB OUT2 BIT 6 . . . 1 LSB OUT NOTES: 1. SS output mode (DDS7 = 1, SSOE = 1). 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB. Figure15. SPI Master Timing (CPHA = 0) SS(1) (OUTPUT) 1 2 12 11 3 SPSCK (CPOL = 0) (OUTPUT) 4 4 11 12 SPSCK (CPOL = 1) (OUTPUT) 5 6 MISO (INPUT) MSB IN(2) BIT 6 . . . 1 LSB IN 9 10 MOSI PORT DATA MASTER MSB OUT(2) BIT 6 . . . 1 MASTER LSB OUT PORT DATA (OUTPUT) NOTES: 1. SS output mode (DDS7 = 1, SSOE = 1). 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB. Figure16. SPI Master Timing (CPHA =1) MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 37

Electrical Characteristics SS (INPUT) 1 12 11 3 SPSCK (CPOL = 0) (INPUT) 2 4 4 11 12 SPSCK (CPOL = 1) (INPUT) 8 7 9 10 10 MISO SEE (OUTPUT) SLAVE MSB OUT BIT 6 . . . 1 SLAVE LSB OUT NOTE 5 6 MOSI (INPUT) MSB IN BIT 6 . . . 1 LSB IN NOTE: 1. Not defined but normally MSB of character just received Figure17. SPI Slave Timing (CPHA = 0) SS (INPUT) 1 3 2 12 11 SPSCK (CPOL = 0) (INPUT) 4 4 11 12 SPSCK (CPOL = 1) (INPUT) 9 10 8 MISO SEE (OUTPUT) NOTE SLAVE MSB OUT BIT 6 . . . 1 SLAVE LSB OUT 7 5 6 MOSI (INPUT) MSB IN BIT 6 . . . 1 LSB IN NOTE: 1. Not defined but normally LSB of character just received Figure18. SPI Slave Timing (CPHA = 1) 2.13 Flash Specifications This section provides details about program/erase times and program-erase endurance for the Flash memory. Program and erase operations do not require any special power sources other than the normal V supply. DD For more detailed information about program/erase operations, see Chapter4, “Memory.” MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 38 Freescale Semiconductor

Electrical Characteristics Table21. Flash Characteristics Num C Characteristic Symbol Min Typical1 Max Unit 1 — Supply voltage for program/erase V 2.7 — 5.5 V prog/erase 2 — Supply voltage for read operation V 2.7 — 5.5 V Read 3 — Internal FCLK frequency2 f 150 — 200 kHz FCLK 4 — Internal FCLK period (1/FCLK) t 5 — 6.67 s Fcyc 5 — Byte program time (random location)2 t 9 t prog Fcyc 6 — Byte program time (burst mode)2 t 4 t Burst Fcyc 7 — Page erase time3 t 4000 t Page Fcyc 8 — Mass erase time2 t 20,000 t Mass Fcyc Program/erase endurance4 9 C T to T = –40 C to 105 C — 10,000 — — cycles L H T = 25 C — 100,000 — 10 C Data retention5 t 15 100 — years D_ret 1 Typical values are based on characterization data at V = 5.0 V, 25 C unless otherwise stated. DD 2 The frequency of this clock is controlled by a software setting. 3 These values are hardware state machine controlled. User code does not need to count cycles. This information supplied for calculating approximate time to program and erase. 4 Typical endurance for flash was evaluated for this product family on the 9S12Dx64. For additional information on how Freescale Semiconductor defines typical endurance, please refer to Engineering Bulletin EB619/D, Typical Endurance for Nonvolatile Memory. 5 Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated to 25C using the Arrhenius equation. For additional information on how Freescale Semiconductor defines typical data retention, please refer to Engineering Bulletin EB618/D, Typical Data Retention for Nonvolatile Memory. 2.14 EMC Performance Electromagnetic compatibility (EMC) performance is highly dependant on the environment in which the MCU resides. Board design and layout, circuit topology choices, location and characteristics of external components as well as MCU software operation all play a significant role in EMC performance. The system designer should consult Freescale applications notes such as AN2321, AN1050, AN1263, AN2764, and AN1259 for advice and guidance specifically targeted at optimizing EMC performance. 2.14.1 Radiated Emissions Microcontroller radiated RF emissions are measured from 150 kHz to 1 GHz using the TEM/GTEM Cell method in accordance with the IEC 61967-2 and SAE J1752/3 standards. The measurement is performed with the microcontroller installed on a custom EMC evaluation board while running specialized EMC test software. The radiated emissions from the microcontroller are measured in a TEM cell in two package orientations (North and East). For more detailed information concerning the evaluation results, conditions and setup, please refer to the EMC Evaluation Report for this device. MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 39

Mechanical Outline Drawings 3 Mechanical Outline Drawings Table 22 provides the available package types and their document numbers. The latest package outline/mechanical drawings are available on the MCF51AC256 Series Product Summary pages at http://www.freescale.com. To view the latest drawing, either: • Click on the appropriate link in Table 22, or • Open a browser to the FreescaleÆ website (http://www.freescale.com), and enter the appropriate document number (from Table 22) in the “Enter Keyword” search box at the top of the page. Table22. Package Information Pin Count Type Document No. 80 LQFP 98ARL10530D 64 LQFP 98ASS23234W 64 QFP 98ASB42844B 44 LQFP 98ASS23225W MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 40 Freescale Semiconductor

Revision History 4 Revision History Table23. Revision History Revision Description 1 Initial published 2 Updated ADC channels, Item 1, 4-5 on Table 2.10 3 Completed all theTBDs. Changed RTC to RTI in Figure1. Corrected the block diagram. Changed V to V , V to V . DDAD DDA SSAD SSA Added charge device model data and removed machine data in Table8. Updated the specifications of V , V , V and V in Table10. LVDH LVDL LVWH LVWL Updated S2I , S3I in Table11. DD DD Added C column in Table14. Updated f in Table16. dco_DMX32 4 Corrected the expansion of SPI to serial peripheral interface. 5 Updated V in the Table10. LVDL Updated RI in the Table11. DD 6 Updated V , V , V and V in the Table10. LVDH LVDL LVWH LVWL Added LPO on the Figure1 and LPO features in the Section1.3, “Features.” 7 Added 44-pin LQFP package information for AC256 and AC128. MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7 Freescale Semiconductor 41

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