Analog Multiplexers / Demultiplexers High−Performance Silicon−Gate CMOS MC74VHC4051, MC74VHC4052, MC74VHC4053 The MC74VHC4051, MC74VHC4052 and MC74VHC4053 utilize www.onsemi.com silicon−gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. These analog MARKING DIAGRAMS multiplexers/demultiplexers control analog voltages that may vary across the complete power supply range (from V to V ). CC EE The VHC4051, VHC4052 and VHC4053 are identical in pinout to 16 9 the high−speed HC4051A, HC4052A and HC4053A, and the VHC405xG metal−gate MC14051B, MC14052B and MC14053B. The SOIC−16 AWLYYWW Channel−Select inputs determine which one of the Analog D SUFFIX 1 8 CASE 751B Inputs/Outputs is to be connected, by means of an analog switch, to the Common Output/Input. When the Enable pin is HIGH, all analog switches are turned off. 16 9 The Channel−Select and Enable inputs are compatible with standard CMOS outputs; with pullup resistors they are compatible with LSTTL VHC outputs. 405x These devices have been designed so that the ON resistance (R ) is TSSOP−16 ALYW(cid:2) on DT SUFFIX (cid:2) more linear over input voltage than Ron of metal−gate CMOS analog CASE 948F switches. 1 8 • Fast Switching and Propagation Speeds • Low Crosstalk Between Switches VHC405x = Specific Device Code • (x = 1, 2 or 3) Diode Protection on All Inputs/Outputs A = Assembly Location • Analog Power Supply Range (V − V ) = 2.0 to 12.0 V L, WL = Wafer Lot CC EE • Y, YY = Year Digital (Control) Power Supply Range (V − GND) = 2.0 to 6.0 V CC W, WW = Work Week • Improved Linearity and Lower ON Resistance Than Metal−Gate G or (cid:2) = Pb−Free Package Counterparts (Note: Microdot may be in either location) • Low Noise • Chip Complexity: VHC4051 — 184 FETs or 46 Equivalent Gates ORDERING INFORMATION VHC4052 — 168 FETs or 42 Equivalent Gates See detailed ordering and shipping information in the package VHC4053 — 156 FETs or 39 Equivalent Gates dimensions section on page 16 of this data sheet. • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant © Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: January, 2020 − Rev. 8 MC74VHC4051/D

MC74VHC4051, MC74VHC4052, MC74VHC4053 13 X0 14 X1 15 X2 3 COMMON AINNPAULTOSG/ X312 MULTIPLEXER/ X OUTPUT/ OUTPUTS X4 1 DEMULTIPLEXER INPUT 5 X5 2 X6 4 X7 11 A CHANNEL 10 SELECT B INPUTS C 9 6 ENABLE PIN 16 = VCC PIN 7 = VEE PIN 8 = GND MC74VHC4051 Single−Pole, 8−Position Plus Common Off 12 X0 14 X1 13 15 X SWITCH X X2 11 X3 ANALOG COMMON INPUTS/OUTPUTS 1 OUTPUTS/INPUTS Y0 Y1 5 Y SWITCH 3 Y 2 Y2 4 Y3 10 A CHANNEL‐SELECT INPUTS B 9 PIN 16 = VCC PIN 7 = VEE PIN 8 = GND 6 ENABLE MC74VHC4052 Double−Pole, 4−Position Plus Common Off 12 X0 14 13 X SWITCH X X1 2 Y0 15 COMMON ANALOG 1 Y SWITCH Y INPUTS/OUTPUTS Y1 OUTPUTS/INPUTS 5 Z0 4 3 Z SWITCH Z Z1 11 A CHANNEL‐SELECT B10 PIN 16 = VCC INPUTS 9 PIN 7 = VEE C PIN 8 = GND 6 ENABLE NOTE: This device allows independent control of each switch. Channel−Select Input A controls the X−Switch, Input B controls the Y−Switch and Input C controls the Z−Switch MC74VHC4053 Triple Single−Pole, Double−Position Plus Common Off Figure 1. Logic Diagrams www.onsemi.com 2

MC74VHC4051, MC74VHC4052, MC74VHC4053 FUNCTION TABLE − MC74VHC4051 Control Inputs VCC X2 X1 X0 X3 A B C Select 16 15 14 13 12 11 10 9 Enable C B A ON Channels L L L L X0 L L L H X1 L L H L X2 L L H H X3 L H L L X4 1 2 3 4 5 6 7 8 L H L H X5 X4 X6 X X7 X5 Enable VEE GND L H H L X6 Figure 2. Pinout: MC74VHC4051 (Top View) L H H H X7 H X X X NONE X = Don’t Care VCC X2 X1 X X0 X3 A B FUNCTION TABLE − MC74VHC4052 16 15 14 13 12 11 10 9 Control Inputs Select Enable B A ON Channels L L L Y0 X0 L L H Y1 X1 L H L Y2 X2 1 2 3 4 5 6 7 8 L H H Y3 X3 H X X NONE Y0 Y2 Y Y3 Y1 Enable VEE GND Figure 3. Pinout: MC74VHC4052 (Top View) X = Don’t Care FUNCTION TABLE − MC74VHC4053 VCC Y X X1 X0 A B C Control Inputs 16 15 14 13 12 11 10 9 Select Enable C B A ON Channels L L L L Z0 Y0 X0 L L L H Z0 Y0 X1 L L H L Z0 Y1 X0 L L H H Z0 Y1 X1 L H L L Z1 Y0 X0 1 2 3 4 5 6 7 8 L H L H Z1 Y0 X1 L H H L Z1 Y1 X0 Y1 Y0 Z1 Z Z0 Enable VEE GND L H H H Z1 Y1 X1 Figure 4. Pinout: MC74VHC4053 (Top View) H X X X NONE X = Don’t Care www.onsemi.com 3

MC74VHC4051, MC74VHC4052, MC74VHC4053 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Symbol Parameter Value Unit This device contains protection ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ circuitry to guard against damage VCC Positive DC Supply Voltage (Referenced to GND) – 0.5 to + 7.0 V ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ due to high static voltages or electric (Referenced to VEE) – 0.5 to + 14.0 fields. However, precautions must ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ VEE Negative DC Supply Voltage (Referenced to GND) – 7.0 to + 5.0 V be taken to avoid applications of any ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ voltage higher than maximum rated VIS Analog Input Voltage VEE − 0.5 to V voltages to this high−impedance cir- ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVCÎÎC + 0ÎÎ.5 ÎÎÎÎÎÎÎÎ cuit. For proper operation, Vin and ÎÎÎÎVÎÎin ÎÎÎÎDÎÎigitalÎÎ InpuÎÎt VoÎÎltageÎÎ (ReÎÎfereÎÎncedÎÎ to GÎÎNDÎÎ) ÎÎÎÎÎÎÎΖ 0ÎÎ.5 toÎÎ VCCÎÎ + 0ÎÎÎÎ.5 ÎÎVÎÎ Vout should be constrained to the ÎÎÎÎÎÎI ÎÎÎÎDÎÎC CuÎÎrrenÎÎt, IntÎÎo orÎÎ OutÎÎ of AÎÎny PÎÎin ÎÎÎÎÎÎÎÎÎÎÎÎÎαÎÎ25ÎÎÎÎÎÎÎÎmAÎÎ ranUgneu GseNdD i n(cid:2)p u(Vtsin moru Vsto uat)l w(cid:2)a yVsC Cb.e ÎÎPÎD ÎÎPoÎwerÎ DisÎsipatÎion iÎn StiÎll AirÎÎÎSOICÎ PaÎckagÎe†ÎÎÎÎ500ÎÎÎÎmWÎ tied to an appropriate logic voltage TSSOP Package† 450 level (e.g., either GND or VCC). ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Unused outputs must be left open. ÎÎÎÎTsÎÎtg ÎÎÎÎStÎÎoragÎÎe TeÎÎmpeÎÎratuÎÎre RÎÎangeÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎΖÎÎ 65 ÎÎto + ÎÎ150ÎÎÎÎÎÎ(cid:3)CÎÎ ÎÎTÎL ÎÎLeÎad TÎempÎeratÎure, Î1 mmÎ froÎm CÎase Îfor 1Î0 SeÎconÎds ÎÎÎÎ260ÎÎÎÎ(cid:3)CÎ Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. †Derating — SOIC Package: – 7 mW/(cid:3)C from 65(cid:3) to 125(cid:3)C TSSOP Package: − 6.1 mW/(cid:3)C from 65(cid:3) to 125(cid:3)C RECOMMENDED OPERATING CONDITIONS ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Symbol Parameter Min Max Unit ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ VCC Positive DC Supply Voltage (Referenced to GND) 2.0 6.0 V ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(RÎÎeferÎÎenceÎÎd toÎÎ VEEÎÎ) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ2ÎÎ.0 ÎÎÎÎ12ÎÎ.0 ÎÎÎÎÎÎ ÎÎÎÎVÎÎEE ÎÎÎÎNÎÎegaÎÎtive ÎÎDC ÎÎSuppÎÎly VÎÎoltagÎÎe, OÎÎutpuÎÎt (RÎÎefereÎÎnceÎÎd to ÎÎGNDÎÎ) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ− ÎÎ6.0ÎÎÎÎGNÎÎD ÎÎÎÎVÎÎ ÎÎÎÎVÎÎIS ÎÎÎÎAÎÎnaloÎÎg InÎÎput VÎÎoltaÎÎge ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVÎÎEE ÎÎÎÎVCÎÎC ÎÎÎÎVÎÎ ÎÎÎÎVÎÎin ÎÎÎÎDÎÎigitaÎÎl InpÎÎut VÎÎoltagÎÎe (RÎÎeferÎÎenceÎÎd toÎÎ GNÎÎD) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎGÎÎNDÎÎÎÎVCÎÎC ÎÎÎÎVÎÎ ÎÎÎÎVÎÎIO* ÎÎÎÎSÎÎtaticÎÎ or DÎÎynaÎÎmicÎÎ VoltÎÎage ÎÎAcroÎÎss SÎÎwitcÎÎh ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ1ÎÎ.2 ÎÎÎÎVÎÎ ÎÎÎÎTÎÎA ÎÎÎÎOÎÎperÎÎatingÎÎ TemÎÎperÎÎatureÎÎ RaÎÎnge,ÎÎ All PÎÎackÎÎage ÎÎTypeÎÎs ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎΖÎÎ 55 ÎÎÎÎ+ 1ÎÎ25 ÎÎÎÎ(cid:3)CÎÎ ÎÎtÎr, tf ÎÎIÎnputÎ RiseÎ/FaÎll TimÎe ÎÎÎÎÎÎVCÎC = Î2.0 VÎÎÎÎÎÎÎÎÎÎÎÎÎ0 ÎÎ10Î00 ÎÎnsÎ ÎÎÎÎÎÎ(CÎhannÎel SÎelecÎt or EÎnabÎle InÎputsÎ) ÎÎVCÎC = Î3.0 VÎÎÎÎÎÎÎÎÎÎÎÎÎ0 ÎÎ80Î0 ÎÎÎ VCC = 4.5 V 0 500 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVCÎC = Î6.0 VÎÎÎÎÎÎÎÎÎÎÎÎÎ0 ÎÎ40Î0 ÎÎÎ Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. *For voltage drops across switch greater than 1.2V (switch on), excessive VCC current may be drawn; i.e., the current out of the switch may contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. www.onsemi.com 4

MC74VHC4051, MC74VHC4052, MC74VHC4053 DC CHARACTERISTICS — Digital Section (Voltages Referenced to GND) VEE = GND, Except Where Noted Guaranteed Limit VCC Symbol Parameter Condition V −55 to 25°C ≤85°C ≤125°C Unit VIH Minimum High−Level Input Ron = Per Spec 2.0 1.50 1.50 1.50 V Voltage, Channel−Select or 3.0 2.10 2.10 2.10 Enable Inputs 4.5 3.15 3.15 3.15 6.0 4.20 4.20 4.20 VIL Maximum Low−Level Input Ron = Per Spec 2.0 0.5 0.5 0.5 V Voltage, Channel−Select or 3.0 0.9 0.9 0.9 Enable Inputs 4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 Iin Maximum Input Leakage Current, Vin = VCC or GND, 6.0 ±0.1 ±1.0 ±1.0 μA Channel−Select or Enable Inputs VEE = − 6.0 V ICC Maximum Quiescent Supply Channel Select, Enable and μA Current (per Package) VIS = VCC or GND; VEE = GND 6.0 1 10 40 VIO = 0 V VEE = − 6.0 6.0 4 40 80 ÎDÎC EÎLEÎÎCTRÎICAÎL CÎHAÎRACÎTEÎRISÎTICÎÎS AnÎalogÎ SecÎtionÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎGÎÎÎuaraÎÎnteÎÎed LÎÎÎimitÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVCCÎÎÎVEEÎÎΖ 5Î5 toÎÎÎÎÎÎÎÎÎÎÎ Symbol Parameter Test Conditions V V 25(cid:3)C (cid:2) 85(cid:3)C (cid:2) 125(cid:3)C Unit ÎÎÎÎRÎÎon ÎÎÎÎMÎÎaximÎÎum “ÎÎON”ÎÎ ResÎÎistanÎÎceÎÎÎÎÎÎVÎÎin = VÎÎIL oÎÎr VIHÎÎÎÎÎÎÎÎÎÎÎÎ3.0ÎÎÎÎÎÎ0.0ÎÎÎÎÎÎ20ÎÎ0 ÎÎÎÎÎÎ24ÎÎ0 ÎÎÎÎÎÎ320ÎÎÎÎÎÎΩÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎVÎIS = ÎVCCÎ to VÎEE ÎÎÎÎÎ4.5ÎÎÎ0.0ÎÎÎ16Î0 ÎÎÎ20Î0 ÎÎÎ280ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎISÎÎ (cid:2) 2ÎÎ.0 mÎÎA ÎÎÎÎÎÎÎÎÎÎÎÎ4.5ÎÎÎÎÎΖ 4.5ÎÎÎÎÎÎ12ÎÎ0 ÎÎÎÎÎÎ15ÎÎ0 ÎÎÎÎÎÎ170ÎÎÎÎÎÎ (Figures 5 through 11) 6.0 – 6.0 100 125 140 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎVÎin = VÎIL oÎr VIHÎÎÎÎÎÎ3.0ÎÎÎ0.0ÎÎÎ15Î0 ÎÎÎ18Î0 ÎÎÎ230ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎVÎIS = ÎVCCÎ or VÎEE (EÎndpÎointsÎÎ) Î4.5ÎÎÎ0.0ÎÎÎ11Î0 ÎÎÎ14Î0 ÎÎÎ190ÎÎÎÎ IS (cid:2) 2.0 mA 4.5 – 4.5 90 120 140 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(FÎÎigurÎÎes 5ÎÎ throÎÎugh1ÎÎ1) ÎÎÎÎÎÎÎÎ6.0ÎÎÎÎÎΖ 6.0ÎÎÎÎÎÎ8ÎÎ0 ÎÎÎÎÎÎ10ÎÎ0 ÎÎÎÎÎÎ115ÎÎÎÎÎÎÎÎ ÎÎΔRÎon ÎÎMÎaximÎum DÎiffeÎrencÎe in ΓON”ÎÎÎVÎin = VÎIL oÎr VIHÎÎÎÎÎÎ3.0ÎÎÎ0.0ÎÎÎ4Î0 ÎÎÎ50ÎÎÎÎ80ÎÎÎΩÎ Resistance Between Any Two VIS = 1/2 (VCC − VEE) 4.5 0.0 20 25 40 ÎÎÎÎÎChÎannÎels iÎn theÎ SamÎe PÎackaÎgeÎÎISÎ (cid:2) 2Î.0 mÎA ÎÎÎÎÎÎ4.5ÎÎΖ 4.5ÎÎÎ1Î0 ÎÎÎ15ÎÎÎÎ18ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ6.0ÎÎΖ 6.0ÎÎÎ1Î0 ÎÎÎ12ÎÎÎÎ14ÎÎÎÎ Ioff Maximum Off−Channel Leakage Vin = VIL or VIH; μA Current, Any One Channel VIO = VCC − VEE; 6.0 − 6.0 0.1 0.5 1.0 Switch Off (Figure 12) Maximum Off−ChannelVHC4051 Vin = VIL or VIH; 6.0 − 6.0 0.2 2.0 4.0 Leakage Current, VHC4052 VIO = VCC − VEE; 6.0 − 6.0 0.1 1.0 2.0 Common Channel VHC4053 Switch Off (Figure 13) 6.0 − 6.0 0.1 1.0 2.0 Ion Maximum On−ChannelVHC4051 Vin = VIL or VIH; 6.0 − 6.0 0.2 2.0 4.0 μA Leakage Current, VHC4052 Switch−to−Switch = 6.0 − 6.0 0.1 1.0 2.0 Channel−to−Channel VHC4053 VCC − VEE; (Figure 14) 6.0 − 6.0 0.1 1.0 2.0 www.onsemi.com 5

MC74VHC4051, MC74VHC4052, MC74VHC4053 AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns) Guaranteed Limit VCC Symbol Parameter V −55 to 25°C ≤85°C ≤125°C Unit tPLH, Maximum Propagation Delay, Channel−Select to Analog Output 2.0 270 320 350 ns tPHL (Figures 18, 19) 3.0 90 110 125 4.5 59 79 85 6.0 45 65 75 tPLH, Maximum Propagation Delay, Analog Input to Analog Output 2.0 40 60 70 ns tPHL (Figures 20, 21) 3.0 25 30 32 4.5 12 15 18 6.0 10 13 15 tPLZ, Maximum Propagation Delay, Enable to Analog Output 2.0 160 200 220 ns tPHZ (Figures 22, 23) 3.0 70 95 110 4.5 48 63 76 6.0 39 55 63 tPZL, Maximum Propagation Delay, Enable to Analog Output 2.0 245 315 345 ns tPZH (Figures 22, 23) 3.0 115 145 155 4.5 49 69 83 6.0 39 58 67 Cin Maximum Input Capacitance, Channel−Select or Enable Inputs 10 10 10 pF CI/O Maximum Capacitance Analog I/O 35 35 35 pF (All Switches Off) Common O/I: VHC4051 130 130 130 VHC4052 80 80 80 VHC4053 50 50 50 Feedthrough 1.0 1.0 1.0 Typical @ 25°C, VCC = 5.0 V, VEE = 0 V CPD Power Dissipation Capacitance (Figure 25)* VHC4051 45 pF VHC4052 80 VHC4053 45 *Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC. www.onsemi.com 6

MC74VHC4051, MC74VHC4052, MC74VHC4053 ADDITIONAL APPLICATION CHARACTERISTICS (GND = 0 V) Limit* VCC VEE Symbol Parameter Condition V V 25°C Unit BW Maximum On−Channel Bandwidth fin = 1MHz Sine Wave; Adjust fin Voltage to ‘51 ‘52 ‘53 MHz or Minimum Frequency Response Obtain 0dBm at VOS; Increase fin 2.25 −2.25 80 95 120 (Figure 15) Frequency Until dB Meter Reads −3dB; RL = 50Ω, CL = 10pF 46..5000 −−46..5000 8800 9955 112200 — Off−Channel Feedthrough Isolation fin = Sine Wave; Adjust fin Voltage to 2.25 −2.25 −50 dB (Figure 16) Obtain 0dBm at VIS 4.50 −4.50 −50 fin = 10kHz, RL = 600Ω, CL = 50pF 6.00 −6.00 −50 2.25 −2.25 −40 4.50 −4.50 −40 fin = 1.0MHz, RL = 50Ω, CL = 10pF 6.00 −6.00 −40 — Feedthrough Noise. Vin ≤ 1MHz Square Wave (tr = tf = 6ns); 2.25 −2.25 25 mVPP Channel−Select Input to Common Adjust RL at Setup so that IS = 0A; 4.50 −4.50 105 I/O (Figure 17) Enable = GND RL = 600Ω, CL = 50pF 6.00 −6.00 135 2.25 −2.25 35 4.50 −4.50 145 RL = 10kΩ, CL = 10pF 6.00 −6.00 190 — Crosstalk Between Any Two fin = Sine Wave; Adjust fin Voltage to 2.25 −2.25 −50 dB Switches (Figure 24) Obtain 0dBm at VIS 4.50 −4.50 −50 (Test does not apply to VHC4051) fin = 10kHz, RL = 600Ω, CL = 50pF 6.00 −6.00 −50 2.25 −2.25 −60 4.50 −4.50 −60 fin = 1.0MHz, RL = 50Ω, CL = 10pF 6.00 −6.00 −60 THD Total Harmonic Distortion fin = 1kHz, RL = 10kΩ, CL = 50pF % (Figure 26) THD = THDmeasured − THDsource VIS = 4.0VPP sine wave 2.25 −2.25 0.10 VIS = 8.0VPP sine wave 4.50 −4.50 0.08 VIS = 11.0VPP sine wave 6.00 −6.00 0.05 *Limits not tested. Determined by design and verified by qualification. 300 180 160 S) 250 S) M M 140 H H O O E ( 200 E ( 120 C 125°C C 125°C N N A A 100 ESIST 150 25°C ESIST 80 25°C N R 100 -(cid:3)55°C N R 60 O O , on , on 40 -(cid:3)55°C R 50 R 20 0 0 0 0.25 0.5 0.75 1.0 1.25 1.5 1.75 2.0 2.25 0 0.25 0.5 0.75 1.0 1.25 1.5 1.75 2.0 2.25 2.5 2.75 3.0 VIS, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE VIS, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE Figure 5. Typical On Resistance, V − V = 2.0 V Figure 6. Typical On Resistance, V − V = 3.0 V CC EE CC EE www.onsemi.com 7

MC74VHC4051, MC74VHC4052, MC74VHC4053 120 105 S) 100 S) 90 M M OH OH 75 125°C CE ( 80 125°C CE ( N N 60 STA 60 STA 25°C ESI 25°C ESI 45 ON R 40 ON R -(cid:3)55°C , n -(cid:3)55°C , n 30 o o R R 20 15 0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VIS, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE VIS, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE Figure 7. Typical On Resistance, V − V = 4.5 V Figure 8. Typical On Resistance, V − V = 6.0 V CC EE CC EE 80 60 70 MS) MS) 50 125°C H 60 H O O NCE ( 50 125°C NCE ( 40 25°C A A ST 40 ST 30 ON RESI 30 25°C ON RESI 20 -(cid:3)55°C , n 20 -(cid:3)55°C , n o o R R 10 10 0 0 -4.5 -3.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0 1.0 2.0 3.0 4.0 5.0 6.0 VIS, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE VIS, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE Figure 9. Typical On Resistance, V − V = 9.0 V Figure 10. Typical On Resistance, V − V = 12.0 V CC EE CC EE PLOTTER PROGRAMMABLE POWER MINI COMPUTER DC ANALYZER SUPPLY - + VCC DEVICE UNDER TEST ANALOG IN COMMON OUT GND VEE Figure 11. On Resistance Test Set−Up www.onsemi.com 8

MC74VHC4051, MC74VHC4052, MC74VHC4053 VCC VCC VEE 16 VCC VEE ANALOG I/O 16 VCC OFF OFF VCC A NC OFF COMMON O/I VCC OFF COMMON O/I VIH 6 VIH 6 7 7 8 8 VEE VEE Figure 12. Maximum Off Channel Leakage Current, Figure 13. Maximum Off Channel Leakage Current, Any One Channel, Test Set−Up Common Channel, Test Set−Up VCC A 16 VCC 0.1μF 1V6CC VOS dB ON fin ON METER VEE OFF COMMON O/I N/C CL* RL VCC ANALOG I/O VIL 6 6 7 7 8 8 VEE VEE *Includes all probe and jig capacitance Figure 14. Maximum On Channel Leakage Current, Figure 15. Maximum On Channel Bandwidth, Channel to Channel, Test Set−Up Test Set−Up VIS VCC VOS VCC 0.1μF 16 dB RL 16 fin OFF METER ON/OFF COMMON O/I TEST RL CL* RL ANALOG I/O OFF/ON RL CL* POINT RL 6 6 7 7 VCC 8 Vin ≤1 MHz 8 11 VEE CHANNEL SELECT VCC tr = tf = 6 ns VEE CHANNEL SELECT VIL or VIH GND *Includes all probe and jig capacitance *Includes all probe and jig capacitance Figure 16. Off Channel Feedthrough Isolation, Figure 17. Feedthrough Noise, Channel Select to Test Set−Up Common Out, Test Set−Up www.onsemi.com 9

MC74VHC4051, MC74VHC4052, MC74VHC4053 VCC VCC 16 VCC CHANNEL 50% ANALOG I/O ON/OFF COMMON O/I TEST SELECT POINT OFF/ON GND CL* tPLH tPHL 6 ANALOG 50% 7 OUT 8 CHANNEL SELECT *Includes all probe and jig capacitance Figure 18. Propagation Delays, Channel Select Figure 19. Propagation Delay, Test Set−Up Channel to Analog Out Select to Analog Out VCC 16 ANALOG I/O COMMON O/I VCC ON TEST ANALOG POINT IN 50% CL* GND tPLH tPHL 6 7 ANALOG 8 50% OUT *Includes all probe and jig capacitance Figure 20. Propagation Delays, Analog In Figure 21. Propagation Delay, Test Set−Up to Analog Out Analog In to Analog Out tf tr POSITION 1 WHEN TESTING tPHZ AND tPZH 90% VCC 1 POSITION 2 WHEN TESTING tPLZ AND tPZL ENABLE 50% 2 10% VCC GND VCC 16 1kΩ tPZL tPLZ HIGH 1 ANALOG I/O IMPEDANCE TEST ON/OFF ANALOG 50% 2 POINT OUT 10% CL* VOL tPZH tPHZ ENABLE 90% VOH 6 ANALOG 7 50% OUT 8 HIGH IMPEDANCE Figure 22. Propagation Delays, Enable to Figure 23. Propagation Delay, Test Set−Up Analog Out Enable to Analog Out www.onsemi.com 10

MC74VHC4051, MC74VHC4052, MC74VHC4053 VCC VIS A VCC 16 16 RL VOS fin ON ON/OFF COMMON O/I ANALOG I/O NC 0.1μF OFF/ON OFF VEE RL RL CL* RL CL* 6 VCC 7 6 VEE 8 11 7 8 CHANNEL SELECT *Includes all probe and jig capacitance Figure 24. Crosstalk Between Any Two Figure 25. Power Dissipation Capacitance, Switches, Test Set−Up Test Set−Up 0 VIS VCC VOS -(cid:3)10 FUNDAMENTAL FREQUENCY 0.1μF 16 TO -(cid:3)20 fin ON DISTORTION -(cid:3)30 RL CL* METER -(cid:3)40 dB -(cid:3)50 DEVICE -(cid:3)60 6 SOURCE -(cid:3)70 7 8 -(cid:3)80 VEE *Includes all probe and jig capacitance -(cid:3)90 -100 1.0 2.0 3.125 FREQUENCY (kHz) Figure 26. Total Harmonic Distortion, Test Set−Up Figure 27. Plot, Harmonic Distortion APPLICATIONS INFORMATION The Channel Select and Enable control pins should be at outputs to V or GND through a low value resistor helps CC V or GND logic levels. V being recognized as a logic minimize crosstalk and feedthrough noise that may be CC CC high and GND being recognized as a logic low. In this picked up by an unused switch. example: Although used here, balanced supplies are not a V = +5V = logic high requirement. The only constraints on the power supplies are CC GND = 0V = logic low that: The maximum analog voltage swings are determined by VCC − GND = 2 to 6 volts the supply voltages VCC and VEE. The positive peak analog VEE − GND = 0 to −6 volts voltage should not exceed VCC. Similarly, the negative peak VCC − VEE = 2 to 12 volts analog voltage should not go below VEE. In this example, and VEE ≤ GND the difference between V and V is ten volts. Therefore, When voltage transients above V and/or below V are CC EE CC EE using the configuration of Figure 28, a maximum analog anticipated on the analog channels, external Germanium or signal of ten volts peak−to−peak can be controlled. Unused Schottky diodes (D ) are recommended as shown in Figure x analog inputs/outputs may be left floating (i.e., not 29. These diodes should be able to absorb the maximum connected). However, tying unused analog inputs and anticipated current surges during clipping. www.onsemi.com 11

MC74VHC4051, MC74VHC4052, MC74VHC4053 +5V VCC VCC VCC +5V 16 +5V Dx 16 Dx ANALOG ANALOG ON ON/OFF SIGNAL SIGNAL -5V -5V Dx Dx VEE VEE 6 11 TO EXTERNAL CMOS 7 10 CIRCUITRY 0 to 5V 7 8 9 DIGITAL SIGNALS 8 -5V VEE Figure 28. Application Example Figure 29. External Germanium or Schottky Clipping Diodes +5V +5V 16 16 +5V +5V +5V +5V ANALOG ANALOG ANALOG ANALOG ON/OFF ON/OFF SIGNAL SIGNAL SIGNAL SIGNAL VEE +5V VEE VEE VEE * R R R +5V 6 11 6 11 LSTTL/NMOS LSTTL/NMOS 7 10 7 10 CIRCUITRY CIRCUITRY 8 9 8 9 VEE * 2K ≤ R ≤ 10K VEE HCT BUFFER a. Using Pull−Up Resistors b. Using HCT Interface Figure 30. Interfacing LSTTL/NMOS to CMOS Inputs www.onsemi.com 12

MC74VHC4051, MC74VHC4052, MC74VHC4053 11 Level A Shifter 10 Level B Shifter 9 Level C Shifter 13 X0 14 X1 15 X2 12 X3 1 X4 5 X5 2 X6 4 X7 6 Level ENABLE Shifter 3 X Figure 31. Function Diagram, VHC4051 www.onsemi.com 13

MC74VHC4051, MC74VHC4052, MC74VHC4053 10 Level A Shifter 9 Level B Shifter 12 X0 14 X1 15 X2 11 X3 13 X 1 Y0 5 Y1 2 Y2 4 Y3 6 Level ENABLE Shifter 3 Y Figure 32. Function Diagram, VHC4052 www.onsemi.com 14

MC74VHC4051, MC74VHC4052, MC74VHC4053 11 Level A Shifter 12 X0 13 X1 10 Level 14 B X Shifter 2 Y0 1 Y1 9 Level 15 C Y Shifter 5 Z0 3 Z1 6 Level ENABLE Shifter 4 Z Figure 33. Function Diagram, VHC4053 www.onsemi.com 15

MC74VHC4051, MC74VHC4052, MC74VHC4053 ORDERING & SHIPPING INFORMATION Device Package Shipping† MC74VHC4051DR2G SOIC−16 MC74VHC4052DR2G 2500 / Tape & Reel (Pb−Free) MC74VHC4053DR2G MC74VHC4051DTR2G NLVVHC4051DTR2G* MC74VHC4052DTR2G TSSOP−16 2500 / Tape & Reel NLVVHC4052DTR2G* (Pb−Free) MC74VHC4053DTR2G NLVVHC4053DTR2G* †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. www.onsemi.com 16

MC74VHC4051, MC74VHC4052, MC74VHC4053 PACKAGE DIMENSIONS SOIC−16 CASE 751B−05 ISSUE K −A− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 16 9 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. −B− P8 PL 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION 1 8 0.25 (0.010) M B S SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES DIM MIN MAX MIN MAX G A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F K R X 45(cid:3) F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 0.009 C K 0.10 0.25 0.004 0.009 M 0 (cid:3) 7 (cid:3) 0 (cid:3) 7 (cid:3) −T− SEATING P 5.80 6.20 0.229 0.244 PLANE M J R 0.25 0.50 0.010 0.019 D 16 PL 0.25 (0.010) M T B S A S SOLDERING FOOTPRINT 8X 6.40 16X1.12 1 16 16X 0.58 1.27 PITCH 8 9 DIMENSIONS: MILLIMETERS www.onsemi.com 17

MC74VHC4051, MC74VHC4052, MC74VHC4053 PACKAGE DIMENSIONS TSSOP−16 CASE 948F ISSUE B 16X K REF NOTES: 0.10 (0.004) M T U S V S 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 0.15 (0.006) T U S K 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD ÇÇK1Ç FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT 16 9 ÇÉÇÉÇÉ EXCEED 0.15 (0.006) PER SIDE. 2XL/2 J1 4. DIMENSION B DOES NOT INCLUDE ÇÉÇÉÇÉ INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL B SECTION N−N NOT EXCEED 0.25 (0.010) PER SIDE. L −U− J 5D.ADMIMBAERN SPIROONT KR UDSOIEOSN N. AOLTL OINWCALUBLDEE DAMBAR PROTRUSION SHALL BE 0.08 PIN 1 (0.003) TOTAL IN EXCESS OF THE K IDENT. N DIMENSION AT MAXIMUM MATERIAL 1 8 0.25 (0.010) CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. M 7. DIMENSION A AND B ARE TO BE 0.15 (0.006) T U S DETERMINED AT DATUM PLANE −W−. A N MILLIMETERS INCHES −V− DIM MIN MAX MIN MAX F A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 DETAIL E C −−− 1.20 −−− 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC C −W− H 0.18 0.28 0.007 0.011 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 0.10 (0.004) K 0.19 0.30 0.007 0.012 −T− SEATING H DETAIL E K1 0.19 0.25 0.007 0.010 PLANE D G ML 06 .(cid:3) 4 0 BSC8 (cid:3) 00. 2(cid:3) 52 BS8C (cid:3) SOLDERING FOOTPRINT 7.06 1 0.65 PITCH 16X 16X 0.36 1.26 DIMENSIONS: MILLIMETERS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: TECHNICAL SUPPORT Email Requests to: orderlit@onsemi.com North American Technical Support: Europe, Middle East and Africa Technical Support: Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 00421 33 790 2910 ON Semiconductor Website: www.onsemi.com Phone: 011 421 33 790 2910 For additional information, please contact your local Sales Representative ◊ www.onsemi.com 18