MC74VHC1G50, MC74VHC1GT50 Buffer The MC74VHC1G50 / MC74VHC1GT50 is an advanced high speed CMOS buffer in tiny footprint packages. The MC74VHC1G50 has CMOS level input thresholds while the MC74VHC1GT50 has TTL level input thresholds. www.onsemi.com The input structures provide protection when voltages up to 5.5 V MARKING are applied, regardless of the supply voltage. This allows the device to DIAGRAMS be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when V = 0 V and when the output voltage CC exceeds VCC. These input and output structures help prevent device SC−88A XX M(cid:2) DF SUFFIX destruction caused by supply voltage − input/output voltage mismatch, (cid:2) CASE 419A battery backup, hot insertion, etc. Features • • Designed for 2.0 V to 5.5 V VCC Operation DBSVC S−7U4FAFIX XXX M(cid:2) 3.5 ns tPD at 5 V (typ) (cid:2) • CASE 318BQ Inputs/Outputs Over−Voltage Tolerant up to 5.5 V • I Supports Partial Power Down Protection OFF • 5 Source/Sink 8 mA at 3.0 V • TSOP−5 XX M(cid:2) Available in SC−88A, SC−74A, TSOP−5, SOT−553, SOT−953 and 5 DT SUFFIX (cid:2) UDFN6 Packages 1 CASE 483 • 1 Chip Complexity < 100 FETs • NLV Prefix for Automotive and Other Applications Requiring SOT−553 Unique Site and Control Change Requirements; AEC−Q100 XV5 SUFFIX XX M(cid:2) Qualified and PPAP Capable CASE 463B (cid:2) • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant SOT−953 P5 SUFFIX X M CASE 527AE IN A 1 OUT Y 1 UDFN6 Figure 1. Logic Symbol 1.45 x 1.0 XM 1 CASE 517AQ UDFN6 1.0 x 1.0 X M CASE 517BX 1 XX = Specific Device Code M = Date Code* (cid:2) = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position may vary depending upon manufacturing location. ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 7 of this data sheet. © Semiconductor Components Industries, LLC, 2012 1 Publication Order Number: November, 2018 − Rev. 13 MC74VHC1G50/D

MC74VHC1G50, MC74VHC1GT50 NC VCC A VCC 1 5 1 5 NC 1 6 VCC A GND 2 2 A 2 5 NC GND Y NC Y 3 4 3 4 GND 3 4 Y (SC−88A/SOT−553/ SOT−953 TSOP−5/ SC−74A) UDFN6 Figure 2. Pinout (Top View) PIN ASSIGNMENT (SC−88A/SOT−553/ TSOP−5/SC−74A) PIN ASSIGNMENT (SOT−953) PIN ASSIGNMENT (UDFN) Pin Function Pin Function Pin Function 1 NC 1 A 1 NC 2 A 2 GND 2 A 3 GND 3 NC 3 GND 4 Y 4 Y 4 Y 5 VCC 5 VCC 5 NC 6 VCC FUNCTION TABLE A Input Y Output L L H H www.onsemi.com 2

MC74VHC1G50, MC74VHC1GT50 MAXIMUM RATINGS Symbol Characteristics Value Unit VCC DC Supply Voltage TSOP−5, SC−88A (NLV) −0.5 to +7.0 V SC−74A, SC−88A, UDFN6, SOT−553, SOT−953 −0.5 to +6.5 VIN DC Input Voltage TSOP−5, SC−88A (NLV) −0.5 to +7.0 V SC−74A, SC−88A, UDFN6, SOT−553, SOT−953 −0.5 to +6.5 VOUT DC Output Voltage Active−Mode (High or Low State) −0.5 to VCC + 0.5 V TSOP−5, SC−88A (NLV) Tri−State Mode (Note 1) −0.5 to +7.0 Power−Down Mode (VCC = 0 V) −0.5 to +7.0 DC Output Voltage Active−Mode (High or Low State) −0.5 to VCC + 0.5 V SC−74A, SC−88A, UDFN6, SOT−553, SOT−953 Tri−State Mode (Note 1) −0.5 to +6.5 Power−Down Mode (VCC = 0 V) −0.5 to +6.5 IIK DC Input Diode Current VIN < GND −20 mA IOK DC Output Diode Current VOUT < GND ±20 mA IOUT DC Output Source/Sink Current ±12.5 mA ICC or IGND DC Supply Current per Supply Pin or Ground Pin ±25 mA TSTG Storage Temperature Range −65 to +150 °C TL Lead Temperature, 1 mm from Case for 10 secs 260 °C TJ Junction Temperature Under Bias +150 °C (cid:2)JA Thermal Resistance (Note 2) SC−88A 659 °C/W SC−74A 555 TSOP−5 555 SOT−553 562 SOT−953 560 UDFN6 382 PD Power Dissipation in Still Air SC−88A 190 mW SC−74A 225 TSOP−5 225 SOT−553 222 SOT−953 223 UDFN6 327 MSL Moisture Sensitivity Level 1 − FR Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in − VESD ESD Withstand Voltage (Note 3) Human Body Model 2000 V Charged Device Model 1000 ILatchup Latchup Performance (Note 4) (cid:2)100 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Applicable to devices with outputs that may be tri−stated. 2. Measured with minimum pad spacing on an FR4 board, using 10mm−by−1inch, 2 ounce copper trace no air flow. 3. HBM tested to ANSI/ESDA/JEDEC JS−001−2017. CDM tested to EIA/JESD22−C101−F. JEDEC recommends that ESD qualification to EIA/JESD22−A115−A (Machine Model) be discontinued per JEDEC/JEP172A. 4. Tested to EIA/JESD78 Class II. www.onsemi.com 3

MC74VHC1G50, MC74VHC1GT50 RECOMMENDED OPERATING CONDITIONS Symbol Characteristics Min Max Unit VCC Positive DC Supply Voltage 2.0 5.5 V VIN DC Input Voltage 0 5.5 V VOUT DC Output Voltage TSOP−5, SC−88A (NLV) 0 VCC V DC Output Voltage SC−74A, SC−88A, UDFN6, SOT−553, SOT−953 Active−Mode (High or Low State) 0 VCC Tri−State Mode (Note 1) 0 5.5 Power−Down Mode (VCC = 0 V) 0 5.5 TA Operating Temperature Range −55 +125 °C tr , tf Input Rise and Fall Time TSOP−5, SC−88A (NLV) ns/V VCC = 3.0 V to 3.6 V 0 100 VCC = 4.5 V to 5.5 V 0 20 Input Rise and Fall Time SC−74A, SC−88A, UDFN6, SOT−553, SOT−953 VCC = 1.65 V to 1.95 V 0 20 VCC = 2.3 V to 2.7 V 0 20 VCC = 3.0 V to 3.6 V 0 10 VCC = 4.5 V to 5.5 V 0 5 Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. DC ELECTRICAL CHARACTERISTICS (MC74VHC1G50) Test VCC TA = 25°C −40°C ≤ TA ≤ 85°C −55°C ≤ TA ≤ 125°C Symbol Parameter Conditions (V) Min Typ Max Min Max Min Max Unit VIH High−Level Input 2.0 1.5 − − 1.5 − 1.5 − V Voltage 3.0 2.1 − − 2.1 − 2.1 − 4.5 3.15 − − 3.15 − 3.15 − 5.5 3.85 − − 3.85 − 3.85 − VIL Low−Level Input 2.0 − − 0.5 − 0.5 − 0.5 V Voltage 3.0 − − 0.9 − 0.9 − 0.9 4.5 − − 1.35 − 1.35 − 1.35 5.5 − − 1.65 − 1.65 − 1.65 VOH High−Level Output VIN = VIH or VIL V Voltage IOH = −50 (cid:3)A 2.0 1.9 2.0 − 1.9 − 1.9 − IOH = −50 (cid:3)A 3.0 2.9 3.0 − 2.9 − 2.9 − IOH = −50 (cid:3)A 4.5 4.4 4.5 − 4.4 − 4.4 − IOH = −4 mA 3.0 2.58 − − 2.48 − 2.34 − IOH = −8 mA 4.5 3.94 − − 3.80 − 3.66 − VOL Low−Level Output VIN = VIH or VIL V Voltage IOL = 50 (cid:3)A 2.0 − 0.0 0.1 − 0.1 − 0.1 IOL = 50 (cid:3)A 3.0 − 0.0 0.1 − 0.1 − 0.1 IOL = 50 (cid:3)A 4.5 − 0.0 0.1 − 0.1 − 0.1 IOL = 4 mA 3.0 − − 0.36 − 0.44 − 0.52 IOL = 8 mA 4.5 − − 0.36 − 0.44 − 0.52 IIN Input Leakage VIN = 5.5 V or 1.65 − − ±0.1* − ±1.0 − (cid:2)1.0 (cid:3)A Current GND to 5.5 IOFF Power Off Leakage VIN = 5.5 V or 0 − − 1.0 − 10 − 10 (cid:3)A Current VOUT = 5.5 V ICC Quiescent Supply VIN = VCC or 5.5 − − 1.0 − 20 − 40 (cid:3)A Current GND *Guaranteed by design. www.onsemi.com 4

MC74VHC1G50, MC74VHC1GT50 DC ELECTRICAL CHARACTERISTICS (MC74VHC1GT50) Test VCC TA = 25°C −40°C ≤ TA ≤ 85°C −55°C ≤ TA ≤ 125°C Symbol Parameter Conditions (V) Min Typ Max Min Max Min Max Unit VIH High−Level Input 2.0 1.0 − − 1.0 − 1.0 − V Voltage 3.0 1.4 − − 1.4 − 1.4 − 4.5 2.0 − − 2.0 − 2.0 − 5.5 2.0 − − 2.0 − 2.0 − VIL Low−Level Input 2.0 − − 0.28 − 0.28 − 0.28 V Voltage 3.0 − − 0.45 − 0.45 − 0.45 4.5 − − 0.8 − 0.8 − 0.8 5.5 − − 0.8 − 0.8 − 0.8 VOH High−Level Output VIN = VIH or VIL V Voltage IOH = −50 (cid:3)A 2.0 1.9 2.0 − 1.9 − 1.9 − IOH = −50 (cid:3)A 3.0 2.9 3.0 − 2.9 − 2.9 − IOH = −50 (cid:3)A 4.5 4.4 4.5 − 4.4 − 4.4 − IOH = −4 mA 3.0 2.58 − − 2.48 − 2.34 − IOH = −8 mA 4.5 3.94 − − 3.80 − 3.66 − VOL Low−Level Output VIN = VIH or VIL V Voltage IOL = 50 (cid:3)A 2.0 − 0.0 0.1 − 0.1 − 0.1 IOL = 50 (cid:3)A 3.0 − 0.0 0.1 − 0.1 − 0.1 IOL = 50 (cid:3)A 4.5 − 0.0 0.1 − 0.1 − 0.1 IOL = 4 mA 3.0 − − 0.36 − 0.44 − 0.52 IOL = 8 mA 4.5 − − 0.36 − 0.44 − 0.52 IIN Input Leakage Cur- VIN = 5.5 V or 1.65 − − ±0.1* − ±1.0 − (cid:2)1.0 (cid:3)A rent GND to 5.5 IOFF Power Off Leakage VIN = 5.5 V or 0 − − 1.0 − 10 − 10 (cid:3)A Current VOUT = 5.5 V ICC Quiescent Supply VIN = VCC or 5.5 − − 1.0 − 20 − 40 (cid:3)A Current GND ICCT Increase in Quies- One Input: VIN 5.5 − − 1.35 − 1.5 − 1.65 mA cent Supply Current = 3.4 V; Other per Input Pin Input at VCC or GND *Guaranteed by design. AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) TA = 25°C −40°C ≤ TA ≤ 85°C −55°C ≤ TA ≤ 125°C Symbol Parameter Conditions VCC (V) Min Typ Max Min Max Min Max Unit tPLH, Propagation Delay, CL = 15 pF 3.0 to 3.6 − 4.5 7.1 − 8.5 − 10.0 ns tPHL A(F itgou Yres 3 and 4) CL = 50 pF − 6.4 10.6 − 12.0 − 14.5 CL = 15 pF 4.5 to 5.5 − 3.5 5.5 − 6.5 − 8.0 CL = 50 pF − 4.5 7.5 − 8.5 − 10.0 CIN Input Capacitance − 4.0 10 − 10 − 10 pF COUT Output Capacitance Output in − 6.0 − − − − − pF High Impedance State Typical @ 25°C, VCC = 5.0 V CPD Power Dissipation Capacitance (Note 5) 8.0 pF 5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD (cid:2) VCC (cid:2) fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD (cid:2) VCC2 (cid:2) fin + ICC (cid:2) VCC. www.onsemi.com 5

MC74VHC1G50, MC74VHC1GT50 OPEN Test Switch CL, pF RL, (cid:2) VCC GND Position tPLH / tPHL Open See AC Characteristics Table X RL tPLZ / tPZL VCC 1 k DUT OUTPUT tPHZ / tPZH GND 1 k X = Don’t Care RT CL* CL includes probe and jig capacitance RT is ZOUT of pulse generator (typically 50 (cid:4)) f = 1 MHz Figure 3. Test Circuit tr = 3 ns tf = 3 ns VCC 90% 90% VCC INPUT Vmi Vmi INPUT Vmi Vmi GND 10% 10% GND tPZL tPLZ tPHL tPLH ~VCC VOH OUTPUT Vmo Vmo OUTPUT Vmo VOL + VY VOL VOL tPLH tPHL tPZH tPHZ VOH VOH −V OVHY OUTPUT Vmo Vmo OUTPUT Vmo VOL ~0 V Figure 4. Switching Waveforms Vmo, V VCC, V Vmi, V tPLH, tPHL tPZL, tPLZ, tPZH, tPHZ VY, V 3.0 to 3.6 VCC/2 (VOH − VOL)/2 VCC/2 0.3 4.5 to 5.5 VCC/2 (VOH − VOL)/2 VCC/2 0.3 www.onsemi.com 6

MC74VHC1G50, MC74VHC1GT50 ORDERING INFORMATION Pin 1 Orientation Device Packages Specific Device Code (See below) Shipping† MC74VHC1G50DFT1G SC−88A VR Q2 3000 / Tape & Reel MC74VHC1G50DFT2G SC−88A VR Q4 3000 / Tape & Reel NLVVHC1G50DFT2G* SC−88A VR Q4 3000 / Tape & Reel M74VHC1GT50DFT1G SC−88A VL Q2 3000 / Tape & Reel M74VHC1GT50DFT2G SC−88A VL Q4 3000 / Tape & Reel NL17VHC1GT50DF1G SC−88A HR Q2 3000 / Tape & Reel NLVVHC1GT50DFT2G* SC−88A VL Q4 3000 / Tape & Reel NLVVHC1GT50DFT1G* SC−88A VL Q2 3000 / Tape & Reel MC74VHC1G50DBVT1G SC−74A TBD Q4 3000 / Tape & Reel (In Development) MC74VHC1GT50DBVT1G SC−74A TBD Q4 3000 / Tape & Reel (In Development) MC74VHC1G50DTT1G TSOP−5 VR Q4 3000 / Tape & Reel M74VHC1GT50DTT1G TSOP−5 VL Q4 3000 / Tape & Reel NLV74VHC1GT50DTT1G* TSOP−5 VLR Q4 3000 / Tape & Reel MC74VHC1G50XV5T2G SOT−553 TBD Q4 3000 / Tape & Reel (In Development) MC74VHC1GT50XV5T2G SOT−553 TBD Q4 3000 / Tape & Reel (In Development) MC74VHC1G50P5T5G SOT−953 TBD Q2 4000 / Tape & Reel (In Development) MC74VHC1GT50P5T5G SOT−953 TBD Q2 4000 / Tape & Reel (In Development) MC74VHC1G50MU1TCG UDFN6, 1.45 x 1.0, 0.5P TBD Q4 3000 / Tape & Reel (In Development) MC74VHC1GT50MU1TCG UDFN6, 1.45 x 1.0, 0.5P TBD Q4 3000 / Tape & Reel (In Development) MC74VHC1G50MU3TCG UDFN6, 1.0 x 1.0, 0.35 TBD Q4 3000 / Tape & Reel (In Development) MC74VHC1GT50MU3TCG UDFN6, 1.0 x 1.0, 0.35 TBD Q4 3000 / Tape & Reel (In Development) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. Pin 1 Orientation in Tape and Reel www.onsemi.com 7

MC74VHC1G50, MC74VHC1GT50 PACKAGE DIMENSIONS SC−88A (SC−70−5/SOT−353) CASE 419A−02 ISSUE L A NOTES: 1. DIMENSIONING AND TOLERANCING G PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE 5 4 MOLD FLASH, PROTRUSIONS, OR GATE BURRS. S −B− INCHES MILLIMETERS 1 2 3 DIM MIN MAX MIN MAX A 0.071 0.087 1.80 2.20 B 0.045 0.053 1.15 1.35 C 0.031 0.043 0.80 1.10 D 0.004 0.012 0.10 0.30 D 5 PL 0.2 (0.008) M B M G 0.026 BSC 0.65 BSC H --- 0.004 --- 0.10 J 0.004 0.010 0.10 0.25 N K 0.004 0.012 0.10 0.30 N 0.008 REF 0.20 REF S 0.079 0.087 2.00 2.20 J C K H SOLDER FOOTPRINT* 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 (cid:3) (cid:4) 0.0748 mm SCALE 20:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 8

MC74VHC1G50, MC74VHC1GT50 PACKAGE DIMENSIONS SC−74A CASE 318BQ ISSUE B 5Xb NOTES: 0.20 C A B 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. M 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH 5 4 THICKNESS. MINIMUM LEAD THICKNESS IS THE E1 E MINIMUM THICKNESS OF BASE MATERIAL. 1 2 3 0.05 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD A1 FLASH, PROTRUSIONS, OR GATE BURRS. MOLD L B FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT e DETAIL A EXCEED 0.15 PER SIDE. A D MILLIMETERS DIM MIN MAX TOP VIEW A 0.90 1.10 A1 0.01 0.10 A DETAIL A b 0.25 0.50 c 0.10 0.26 D 2.85 3.15 E 2.50 3.00 E1 1.35 1.65 c SIDE VIEW C SPELAATNIENG END VIEW Le 0.02.095 BS0C.60 M 0 (cid:3) 10 (cid:3) RECOMMENDED SOLDERING FOOTPRINT* 0.95 PITCH 2.40 5X 1.00 5X 0.70 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 9

MC74VHC1G50, MC74VHC1GT50 PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE M NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME NOTE 5 D5X Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 0.20 C A B 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH 2X 0.10 T THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. M 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD 2X 0.20 T B 5 4 S FFLLAASSHH,, PPRROOTTRRUUSSIIOONNSS,, OORR GGAATTEE BBUURRRRSS. SMHOALLDL NOT 1 2 3 EXCEED 0.15 PER SIDE. DIMENSION A. K 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL B G DETAIL Z TTRRIIMMMMEEDD LLEEAADD INSO ATL TLOO WEXETDE INND T HMIOS RLEO CTHATAINO N0..2 A A FROM BODY. MILLIMETERS TOP VIEW DIM MIN MAX A 2.85 3.15 B 1.35 1.65 DETAIL Z C 0.90 1.10 J D 0.25 0.50 C G 0.95 BSC H 0.01 0.10 0.05 J 0.10 0.26 H C SPELAATNIENG END VIEW MK 0.02 0(cid:3) 010.6 (cid:3) 0 SIDE VIEW S 2.50 3.00 SOLDERING FOOTPRINT* 1.9 0.074 0.95 0.037 2.4 0.094 1.0 0.039 0.7 (cid:3) (cid:4) 0.028 SCALE 10:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 10

MC74VHC1G50, MC74VHC1GT50 PACKAGE DIMENSIONS SOT−553, 5 LEAD CASE 463B ISSUE C D NOTES: A 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. −X− L 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 5 4 E MILLIMETERS INCHES −Y− HE DIM MIN NOM MAX MIN NOM MAX 1 2 3 A 0.50 0.55 0.60 0.020 0.022 0.024 b 0.17 0.22 0.27 0.007 0.009 0.011 c 0.08 0.13 0.18 0.003 0.005 0.007 b 5 PL c D 1.55 1.60 1.65 0.061 0.063 0.065 e E 1.15 1.20 1.25 0.045 0.047 0.049 0.08 (0.003) M X Y e 0.50 BSC 0.020 BSC L 0.10 0.20 0.30 0.004 0.008 0.012 HE 1.55 1.60 1.65 0.061 0.063 0.065 SOLDERING FOOTPRINT* 0.3 0.0118 0.45 0.0177 1.0 1.35 0.0394 0.0531 0.5 0.5 0.0197 0.0197 (cid:3) (cid:4) mm SCALE 20:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 11

MC74VHC1G50, MC74VHC1GT50 PACKAGE DIMENSIONS SOT−953 CASE 527AE ISSUE E D X NOTES: A 1. DIMENSIONING AND TOLERANCING PER ASME Y Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD 5 4 FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF THE BASE MATERIAL. IPNIND IOCANTEOR E HE 4. DFLIMAESNHS, PIORNOST RDU ASNIODN ES D, OOR N GOATT INE CBLUURDRES M.OLD 1 2 3 MILLIMETERS DIM MIN NOM MAX A 0.34 0.37 0.40 TOP VIEW C b 0.10 0.15 0.20 C 0.07 0.12 0.17 SIDE VIEW D 0.95 1.00 1.05 E 0.75 0.80 0.85 e 0.35 BSC e HE 0.95 1.00 1.05 L 0.175 REF 5X L L2 0.05 0.10 0.15 L3 −−− −−− 0.15 5X L3 SOLDERING FOOTPRINT* 5X 5X 0.35 0.20 5X L2 5X b PACKAGE 0.08 X Y OUTLINE BOTTOM VIEW 1.20 1 0.35 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 12

MC74VHC1G50, MC74VHC1GT50 PACKAGE DIMENSIONS UDFN6, 1.45x1.0, 0.5P CASE 517AQ ISSUE O D A L L NOTES: B 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. L1 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND DETAIL A 0.30 mm FROM THE TERMINAL TIP. PIN ONE ÉÉÉ E OPTIONAL REFERENCE CONSTRUCTIONS MILLIMETERS ÉÉÉ DIM MIN MAX A 0.45 0.55 0.10 C A1 0.00 0.05 ÉÉÉ EXPOSED Cu MOLD CMPD A2 0.07 REF TOP VIEW b 0.20 0.30 0.10 C ÉÉÉÉÉÉ D 1.45 BSC E 1.00 BSC DETAIL B e 0.50 BSC DETAIL B L 0.30 0.40 0.05 C OPTIONAL L1 −−− 0.15 A CONSTRUCTIONS MOUNTING FOOTPRINT 6X 0.05 C A1 6X SIDE VIEW A2 C SPELAATNIENG PACKAGE 0.30 OUTLINE e 6XL 1.24 1 3 DETAIL A 6X 1 0.53 0.50 PITCH 6 4 DIMENSIONS: MILLIMETERS 6Xb *For additional information on our Pb−Free strategy and soldering 0.10 C A B details, please download the ON Semiconductor Soldering and BOTTOM VIEW 0.05 C NOTE 3 Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 13

MC74VHC1G50, MC74VHC1GT50 PACKAGE DIMENSIONS UDFN6, 1x1, 0.35P CASE 517BX ISSUE O D A B L1 L NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED PIN ONE L3 TERMINAL AND IS MEASURED BETWEEN REFERENCE ÉÉÉ E 0.15 AND 0.20 MM FROM TERMINAL TIP. DETAIL A 4. PACKAGE DIMENSIONS EXCLUSIVE OF BURRS AND MOLD FLASH. 2X 0.08 CÉÉÉ ALTERNATE TERMINAL CONSTRUCTION MILLIMETERS DIM MIN MAX 2X 0.08 C A 0.50 0.65 TOP VIEW EXPOSED CuÉÉMOLD CMPD A1 0.00 0.05 A3 0.13 REF 0.05 C DETAIL B ÉÇÉÇ b 0.17 0.23 D 1.00 BSC A3 E 1.00 BSC A DETAIL B e 0.35 ALTERNATE L 0.20 0.40 CONSTRUCTION L1 −−− 0.15 0.05 C L3 0.26 0.33 A1 SIDE VIEW C SEATING PLANE RECOMMENDED SOLDERING FOOTPRINT* e DETAIL A1 3 6XL 6X0.25 06.X52 1.20 PACKAGE 6 4 OUTLINE 1 6Xb 0.35 0.07 M C A B PITCH BOTTOM VIEW 0.05 M C NOTE 3 DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada For additional information, please contact your local Email: orderlit@onsemi.com Sales Representative ◊ www.onsemi.com MC74VHC1G50/D 14

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