MC74LVX245 Octal Bus Transceiver With 5 V−Tolerant Inputs The MC74LVX245 is an advanced high speed CMOS octal bus transceiver. It is intended for two−way asynchronous communication between http://onsemi.com data buses. The direction of data transmission is determined by the level of the T/R input. The output enable pin (OE) can be used to disable the device, so that the buses are effectively isolated. All inputs are equipped with protection circuits against static discharge. SOIC−20 TSSOP−20 DW SUFFIX DT SUFFIX Features CASE 751D CASE 948E • High Speed: t = 4.7 ns (Typ) at V = 3.3 V PD CC • Low Power Dissipation: I = 4 (cid:2)A (Max) at T = 25°C PIN ASSIGNMENT CC A • Power Down Protection Provided on Inputs VCC OE B0 B1 B2 B3 B4 B5 B6 B7 • 20 19 18 17 16 15 14 13 12 11 Balanced Propagation Delays • Low Noise: V = 0.8 V (Max) OLP • Pin and Function Compatible with Other Standard Logic Families • Latchup Performance Exceeds 300 mA • ESD Performance: Human Body Model > 2000 V; 1 2 3 4 5 6 7 8 9 10 Machine Model > 200 V T/R A0 A1 A2 A3 A4 A5 A6 A7 GND • These Devices are Pb−Free and are RoHS Compliant 20−Lead (Top View) Application Notes MARKING DIAGRAMS • Do Not Force a Signal on an I/O Pin when it is an Active Output, 20 Damage May Occur • All Floating (High Impedance) Input or I/O Pins must be Fixed by LVX245 Means of Pullup or Pulldown Resistors or Bus Terminator ICs AWLYYWWG • A Parasitic Diode is Formed between the Bus and V Terminals CC 1 Therefore, the LVX245 cannot be Used to Interface 5.0 V to 3.0 V SOIC−20 Systems Directly 20 LVX 245 ALYW(cid:2) (cid:2) 1 TSSOP−20 LVX245 = Specific Device Code A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or (cid:2) = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: August, 2014 − Rev. 5 MC74LVX245/D

MC74LVX245 OE 19 T/R 1 2 A0 18 B0 3 A1 17 B1 4 A2 16 B2 5 A3 15 B3 6 A4 14 B4 7 A5 13 B5 8 A6 12 B6 9 A7 11 B7 Figure 1. Logic Diagram Table 1. PIN NAMES Pins Function OE Output Enable Input T/R Transmit/Receive Input A0−A7 Side A 3−State Inputs or 3−State Outputs Bo−B7 Side B 3−State Inputs or 3−State Outputs INPUTS OPERATING MODE OE T/R Non−Inverting L L B Data to A Bus L H A Data to B Bus H X Z H = High Voltage Level; L = Low Voltage Level; Z = High Impedance State; X = High or Low Voltage Level and Transitions are Acceptable; For ICC reasons, Do Not Float Inputs http://onsemi.com 2

MC74LVX245 MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage –0.5 to +7.0 V Vin DC Input Voltage (T/R, OE) –0.5 to +7.0 V VI/O DC Output Voltage –0.5 to VCC +0.5 V IIK Input Diode Current −20 mA IOK Output Diode Current ±20 mA Iout DC Output Current, per Pin ±25 mA ICC DC Supply Current, VCC and GND Pins ±75 mA PD Power Dissipation 180 mW Tstg Storage Temperature –65 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC DC Supply Voltage 2.0 3.6 V Vin DC Input Voltage (T/R, OE) 0 5.5 V VI/O DC Output Voltage 0 VCC V TA Operating Temperature, All Package Types −40 +85 °C (cid:3)t/(cid:3)V Input Rise and Fall Time 0 100 ns/V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. DC ELECTRICAL CHARACTERISTICS VCC TA = 25°C TA = −40 to 85°C Symbol Parameter Test Conditions V Min Typ Max Min Max Unit VIH High−Level Input Voltage 2.0 1.5 1.5 V 3.0 2.0 2.0 3.6 2.4 2.4 VIL Low−Level Input Voltage 2.0 0.5 0.5 V 3.0 0.8 0.8 3.6 0.8 0.8 VOH High−Level Output Voltage IOH = −50 (cid:2)A 2.0 1.9 2.0 1.9 V (Vin = VIH or VIL) IOH = −50 (cid:2)A 3.0 2.9 3.0 2.9 IOH = −4 mA 3.0 2.58 2.48 VOL Low−Level Output Voltage IOL = 50 (cid:2)A 2.0 0.0 0.1 0.1 V (Vin = VIH or VIL) IOL = 50 (cid:2)A 3.0 0.0 0.1 0.1 IOL = 4 mA 3.0 0.36 0.44 Iin Input Leakage Current Vin = 5.5 V or GND 3.6 ±0.1 ±1.0 (cid:2)A (T/R, OE) IOZ Maximum 3−State Leakage Current Vin = VIL or VIH 3.6 ±0.2 ±2.5 (cid:2)A Vout = VCC or GND 5 ICC Quiescent Supply Current Vin = VCC or GND 3.6 4.0 40.0 (cid:2)A Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. http://onsemi.com 3

MC74LVX245 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) TA = 25°C TA = −40 to 85°C Symbol Parameter Test Conditions Min Typ Max Min Max Unit tPLH, Propagation Delay VCC = 2.7 V CL = 15 pF 6.1 10.7 1.0 13.5 ns tPHL Input to Output CL = 50 pF 8.6 14.2 1.0 17.0 VCC = 3.3 ± 0.3 V CL = 15 pF 4.7 6.6 1.0 8.0 CL = 50 pF 7.2 10.1 1.0 11.5 tPZL, Output Enable Time to VCC = 2.7 V CL = 15 pF 9.0 16.9 1.0 20.5 ns tPZH High and Low Level RL = 1 k(cid:4) CL = 50 pF 11.5 20.4 1.0 24.0 VCC = 3.3 ± 0.3 V CL = 15 pF 7.1 11.0 1.0 13.0 RL = 1 k(cid:4) CL = 50 pF 9.6 14.5 1.0 16.5 tPLZ, Output Disable Time From VCC = 2.7 V CL = 50 pF 11.5 18.0 1.0 21.0 ns tPHZ High and Low Level RL = 1 k(cid:4) VCC = 3.3 ± 0.3 V CL = 50 pF 9.6 12.8 1.0 14.5 RL = 1 k(cid:4) tOSHL Output−to−Output Skew VCC = 2.7 V CL = 50 pF 1.5 1.5 ns tOSLH (Note 1) VCC = 3.3 ±0.3 V CL = 50 pF 1.5 1.5 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter guaranteed by design. CAPACITIVE CHARACTERISTICS TA = 25°C TA = −40 to 85°C Symbol Parameter Min Typ Max Min Max Unit Cin Input Capacitance (T/R, OE) 4 10 10 pF CI/O Maximum 3−State I/O Capacitance 8 pF CPD Power Dissipation Capacitance (Note 2) 21 pF 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD (cid:2) VCC (cid:2) fin + ICC/8 (per bit). CPD is used to determine the no−load dynamic power consumption; PD = CPD (cid:2) VCC2 (cid:2) fin + ICC (cid:2) VCC. NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 3.3V, Measured in SOIC Package) TA = 25°C Symbol Characteristic Typ Max Unit VOLP Quiet Output Maximum Dynamic VOL 0.5 0.8 V VOLV Quiet Output Minimum Dynamic VOL −0.5 −0.8 V VIHD Minimum High Level Dynamic Input Voltage 2.0 V VILD Maximum Low Level Dynamic Input Voltage 0.8 V http://onsemi.com 4

MC74LVX245 SWITCHING WAVEFORMS VCC T/R 50% GND VCC Input VCC OE 50% VCC 50% VCC A or B 50% GND GND tPZL tPLZ tPLH tPHL HIGH IMPEDANCE OBu otpr uAt 50% VCC A or B 50% VCC VOL +0.3V tPZH tPHZ VOH -0.3V A or B 50% VCC HIGH IMPEDANCE Figure 2. Figure 3. TEST CIRCUITS TEST POINT TEST POINT OUTPUT OUTPUT 1 k(cid:4) CTEOSNTNINEGCT tP TLOZ AVNCDC WtPZHLE.N DEVICE DEVICE CONNECT TO GND WHEN UNDER UNDER TESTING tPHZ AND tPZH. TEST CL* TEST CL* *Includes all probe and jig capacitance *Includes all probe and jig capacitance Figure 4. Propagation Delay Test Circuit Figure 5. 3−State Test Circuit ORDERING INFORMATION Device Package Shipping† MC74LVX245DWR2G SOIC−20 1000 / Tape & Reel (Pb−Free) MC74LVX245DTR2G TSSOP−20 2500 / Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5

MC74LVX245 PACKAGE DIMENSIONS TSSOP−20 CASE 948E−02 ISSUE C NOTES: 20X K REF K 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 0.15 (0.006) T U S 0.10 (0.004) M T U S V S ÍÍKÍ1 Í 2. CONTROLLING DIMENSION: MILLIMETER. ÍÍÍÍ 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE 2X L/2 20 11 J JÍ1 ÍÍÍ BSHUARLRLS N. OMTO ELDXC FELEADS H0 .O15R ( G0.A0T06E) BPUERRR SSIDE. 4. DIMENSION B DOES NOT INCLUDE B SECTION N−N INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION L −U− SHALL NOT EXCEED 0.25 (0.010) PER SIDE. PIN 1 0.25 (0.010) 5. DIMENSION K DOES NOT INCLUDE IDENT N DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 1 10 (0.003) TOTAL IN EXCESS OF THE K M DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR 0.15 (0.006) T U S REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE A N DETERMINED AT DATUM PLANE −W−. −V− F MILLIMETERS INCHES DIM MIN MAX MIN MAX DETAIL E A 6.40 6.60 0.252 0.260 B 4.30 4.50 0.169 0.177 C --- 1.20 --- 0.047 −W− D 0.05 0.15 0.002 0.006 C F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC G H 0.27 0.37 0.011 0.015 D H J 0.09 0.20 0.004 0.008 DETAIL E J1 0.09 0.16 0.004 0.006 0.100 (0.004) K 0.19 0.30 0.007 0.012 −T− SPELAATNIENG KML1 00.61 (cid:3).940 BSC08.2 (cid:3)5 0.0000 (cid:3).2752 B0S.C081 (cid:3)0 SOLDERING FOOTPRINT* 7.06 1 0.65 PITCH 16X 16X 0.36 1.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6

MC74LVX245 PACKAGE DIMENSIONS SOIC−20 CASE 751D−05 ISSUE G D NOTES: A (cid:2) 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD 20 11 M PROTRUSION. B 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. (cid:3) 5. DIMENSION B DOES NOT INCLUDE DAMBAR H M 45 PROTRUSION. ALLOWABLE PROTRUSION 10X 0.25 E hX SDCHIOMANELDNLI STBIIOEO NN0.. 1A3T TMOATXAILM IUNM E MXCATEESRSI AOLF B 1 10 MILLIMETERS DIM MIN MAX A 2.35 2.65 B A1 0.10 0.25 20X B B 0.35 0.49 C 0.23 0.32 0.25 M T A S B S D 12.65 12.95 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 A L 0.50 0.90 L (cid:2) 0 (cid:3) 7 (cid:3) SEATING 18X e A1 TPLANE C ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com MC74LVX245/D 7

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