MC74LVX08 Quad 2-Input AND Gate With 5 V−Tolerant Inputs The MC74LVX08 is an advanced high speed CMOS 2−input AND gate. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. http://onsemi.com Features • High Speed: t = 4.8 ns (Typ) at V = 3.3 V PD CC • Low Power Dissipation: I = 2 (cid:2)A (Max) at T = 25°C CC A SOIC−14 NB TSSOP−14 • Power Down Protection Provided on Inputs D SUFFIX DT SUFFIX • CASE 751A CASE 948G Balanced Propagation Delays • Low Noise: VOLP = 0.5 V (Max) PIN ASSIGNMENT • Pin and Function Compatible with Other Standard Logic Families • VCC A2 B2 O2 A3 B3 O3 Latchup Performance Exceeds 300 mA 14 13 12 11 10 9 8 • ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V • These Devices are Pb−Free and are RoHS Compliant 1 2 3 4 5 6 7 1 A0 3 A0 B0 O0 A1 B1 O1 GND 2 O0 B0 14−Lead (Top View) 4 A1 6 5 O1 MARKING DIAGRAMS B1 13 A2 11 14 12 O2 B2 LVX08G 10 AWLYWW A3 8 9 O3 B3 1 SOIC−14 NB Figure 1. Logic Diagram 14 LVX PIN NAMES 08 ALYW(cid:2) Pins Function (cid:2) An, Bn Data Inputs 1 On Outputs TSSOP−14 LVX08 = Specific Device Code A = Assembly Location FUNCTION TABLE WL, L = Wafer Lot INPUTS OUTPUTS Y = Year WW, W = Work Week An Bn On G or (cid:2) = Pb−Free Package L L L (Note: Microdot may be in either location) L H L H L L ORDERING INFORMATION H H H See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. © Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: August, 2014 − Rev. 6 MC74LVX08/D

MC74LVX08 MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage –0.5 to +7.0 V Vin DC Input Voltage –0.5 to +7.0 V Vout DC Output Voltage –0.5 to VCC +0.5 V IIK Input Diode Current −20 mA IOK Output Diode Current ±20 mA Iout DC Output Current, per Pin ±25 mA ICC DC Supply Current, VCC and GND Pins ±50 mA PD Power Dissipation 180 mW Tstg Storage Temperature –65 to +150 (cid:3)C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC DC Supply Voltage 2.0 3.6 V Vin DC Input Voltage 0 5.5 V Vout DC Output Voltage 0 VCC V TA Operating Temperature, All Package Types −40 +85 (cid:3)C (cid:3)t/(cid:3)V Input Rise and Fall Time 0 100 ns/V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. DC ELECTRICAL CHARACTERISTICS VCC TA = 25°C TA = −40 to 85°C Symbol Parameter Test Conditions V Min Typ Max Min Max Unit VIH High−Level Input Voltage 2.0 1.5 1.5 V 3.0 2.0 2.0 3.6 2.4 2.4 VIL Low−Level Input Voltage 2.0 0.5 0.5 V 3.0 0.8 0.8 3.6 0.8 0.8 VOH High−Level Output Voltage IOH = −50 (cid:2)A 2.0 1.9 2.0 1.9 V (Vin = VIH or VIL) IOH = −50 (cid:2)A 3.0 2.9 3.0 2.9 IOH = −4 mA 3.0 2.58 2.48 VOL Low−Level Output Voltage IOL = 50 (cid:2)A 2.0 0.0 0.1 0.1 V (Vin = VIH or VIL) IOL = 50 (cid:2)A 3.0 0.0 0.1 0.1 IOL = 4 mA 3.0 0.36 0.44 Iin Input Leakage Current Vin = 5.5 V or GND 3.6 ±0.1 ±1.0 (cid:2)A ICC Quiescent Supply Current Vin = VCC or GND 3.6 2.0 20.0 (cid:2)A Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. http://onsemi.com 2

MC74LVX08 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) TA = 25°C TA = −40 to 85°C Symbol Parameter Test Conditions Min Typ Max Min Max Unit tPLH, Propagation Delay, Input to VCC = 2.7V CL = 15 pF 6.3 11.4 1.0 13.5 ns tPHL Output CL = 50 pF 8.8 14.9 1.0 17.0 VCC = 3.3 ± 0.3V CL = 15 pF 4.8 7.1 1.0 8.5 CL = 50 pF 7.3 10.6 1.0 12.0 tOSHL Output−to−Output Skew VCC = 2.7 V CL = 50 pF 1.5 1.5 ns tOSLH (Note 1) VCC = 3.3 ±0.3 V CL = 50 pF 1.5 1.5 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter guaranteed by design. CAPACITIVE CHARACTERISTICS TA = 25°C TA = −40 to 85°C Symbol Parameter Min Typ Max Min Max Unit Cin Input Capacitance 4 10 10 pF CPD Power Dissipation Capacitance (Note 2) 18 pF 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD (cid:2) VCC (cid:2) fin + ICC/4 (per gate). CPD is used to determine the no−load dynamic power consumption; PD = CPD (cid:2) VCC2 (cid:2) fin + ICC (cid:2) VCC. NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 3.3 V, Measured in SOIC Package) TA = 25°C Symbol Characteristic Typ Max Unit VOLP Quiet Output Maximum Dynamic VOL 0.3 0.5 V VOLV Quiet Output Minimum Dynamic VOL −0.3 −0.5 V VIHD Minimum High Level Dynamic Input Voltage 2.0 V VILD Maximum Low Level Dynamic Input Voltage 0.8 V TEST POINT A or B VCC OUTPUT 50% GND DEVICE UNDER tPLH tPHL TEST CL* O 50% VCC *Includes all probe and jig capacitance Figure 2. Switching Waveforms Figure 3. Test Circuit ORDERING INFORMATION Device Package Shipping† MC74LVX08DR2G SOIC−14 NB 2500 Tape & Reel (Pb−Free) MC74LVX08DTG TSSOP−14 96 Units / Rail (Pb−Free) MC74LVX08DTR2G TSSOP−14 2500 Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 3

MC74LVX08 PACKAGE DIMENSIONS TSSOP−14 CASE 948G ISSUE B 14X K REF NOTES: 1. DIMENSIONING AND TOLERANCING PER 0.10 (0.004) M T U S V S ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 0.15 (0.006) T U S 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. N MOLD FLASH OR GATE BURRS SHALL NOT 0.25 (0.010) EXCEED 0.15 (0.006) PER SIDE. 2XL/2 14 8 4I.NTDEIMRLEENASDIO FNL ABS DHO OERS PNROOT TINRCULSUIODNE. M INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. L B 5. DIMENSION K DOES NOT INCLUDE DAMBAR −U− N PROTRUSION. ALLOWABLE DAMBAR PIN 1 PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN IDENT. F EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 1 7 DETAIL E 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. 0.15 (0.006) T U S A K MILLIMETERS INCHES −V− ÇÇK1Ç DIM MIN MAX MIN MAX A 4.90 5.10 0.193 0.200 ÇÉÇÉÇÉ B 4.30 4.50 0.169 0.177 J J1 C −−− 1.20 −−− 0.047 ÇÉÇÉÇÉ D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 SECTION N−N G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 J 0.09 0.20 0.004 0.008 −W− J1 0.09 0.16 0.004 0.006 C K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 0.10 (0.004) L 6.40 BSC 0.252 BSC M 0 (cid:3) 8 (cid:3) 0 (cid:3) 8 (cid:3) −T− SEATING D G H DETAIL E PLANE SOLDERING FOOTPRINT* 7.06 1 0.65 PITCH 14X 14X 0.36 1.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 4

MC74LVX08 PACKAGE DIMENSIONS SOIC−14 NB CASE 751A−03 D A ISSUE K NOTES: B 1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2.CONTROLLING DIMENSION: MILLIMETERS. 14 8 3.DIMENSION b DOES NOT INCLUDE DAMBAR A3 PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. H E 4.DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. L 5.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 1 7 DETAIL A MILLIMETERS INCHES 0.25 M B M 13Xb DIM MIN MAX MIN MAX A 1.35 1.75 0.054 0.068 0.25 M C A S B S A1 0.10 0.25 0.004 0.010 A3 0.19 0.25 0.008 0.010 DETAIL A b 0.35 0.49 0.014 0.019 h A D 8.55 8.75 0.337 0.344 X 45(cid:3) E 3.80 4.00 0.150 0.157 e 1.27 BSC 0.050 BSC H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 e A1 C SEATING M ML 0.04 0(cid:3) 1.72 5(cid:3) 0.001 6(cid:3) 0.074 9(cid:3) PLANE SOLDERING FOOTPRINT* 6.50 14X 1.18 1 1.27 PITCH 14X 0.58 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com MC74LVX08/D 5