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MC74LCX74DTR2G产品简介:
ICGOO电子元器件商城为您提供MC74LCX74DTR2G由ON Semiconductor设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 MC74LCX74DTR2G价格参考¥0.92-¥1.14。ON SemiconductorMC74LCX74DTR2G封装/规格:逻辑 - 触发器, 。您可以下载MC74LCX74DTR2G参考资料、Datasheet数据手册功能说明书,资料中有MC74LCX74DTR2G 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC D-TYPE POS TRG DUAL 14TSSOP触发器 2-3.6V CMOS Dual D-Type |
产品分类 | |
品牌 | ON Semiconductor |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 逻辑集成电路,触发器,ON Semiconductor MC74LCX74DTR2G74LCX |
数据手册 | |
产品型号 | MC74LCX74DTR2G |
不同V、最大CL时的最大传播延迟 | 7ns @ 3.3V,50pF |
产品种类 | 触发器 |
传播延迟时间 | 8 ns |
低电平输出电流 | 24 mA |
元件数 | 2 |
其它名称 | MC74LCX74DTR2G-ND |
功能 | 设置(预设)和复位 |
包装 | 带卷 (TR) |
商标 | ON Semiconductor |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | 14-TSSOP(0.173",4.40mm 宽) |
封装/箱体 | TSSOP-14 |
工作温度 | -40°C ~ 85°C (TA) |
工厂包装数量 | 2500 |
最大工作温度 | + 85 C |
最小工作温度 | - 40 C |
极性 | Inverting/Non-Inverting |
标准包装 | 2,500 |
每元件位数 | 1 |
电压-电源 | 2 V ~ 3.6 V |
电流-输出高,低 | 24mA,24mA |
电流-静态 | 10µA |
电源电压-最大 | 3.6 V |
电源电压-最小 | 2 V |
电路数量 | 2 |
类型 | D 型 |
系列 | MC74LCX74 |
触发器类型 | 正边沿 |
输入电容 | 7pF |
输入类型 | Single-Ended |
输入线路数量 | 1 |
输出类型 | Differential |
输出线路数量 | 1 |
逻辑类型 | D-Type Flip-Flop |
逻辑系列 | 74LC |
频率-时钟 | 150MHz |
高电平输出电流 | - 24 mA |
MC74LCX74 Low-Voltage CMOS Dual D-Type Flip-Flop With 5 V−Tolerant Inputs The MC74LCX74 is a high performance, dual D−type flip−flop http://onsemi.com with asynchronous clear and set inputs and complementary (O, O) outputs. It operates from a 2.3 to 3.6 V supply. High impedance TTL MARKING compatible inputs significantly reduce current loading to input drivers DIAGRAMS while TTL compatible outputs offer improved switching noise 14 performance. A VI specification of 5.5 V allows MC74LCX74 inputs SOIC−14 to be safely driven from 5.0 V devices. 14 LCX74G D SUFFIX The MC74LCX74 consists of 2 edge−triggered flip−flops with CASE 751A AWLYWW 1 individual D−type inputs. The flip−flop will store the state of 1 individual D inputs, that meet the setup and hold time requirements, on the LOW−to−HIGH Clock (CP) transition. 14 Features TSSOP−14 LCX Designed for 2.3 V to 3.6 V VCC Operation 14 1 CDATS SEU 9F4F8IXG AL7Y(cid:2)4W(cid:2) 5.0 V Tolerant Inputs − Interface Capability With 5.0 V TTL Logic 1 LVTTL Compatible A = Assembly Location LVCMOS Compatible L, WL = Wafer Lot 24 mA Balanced Output Sink and Source Capability Y, YY = Year Near Zero Static Supply Current in All Three Logic States (10 (cid:2)A) WG ,o Wr (cid:2)W == PWbo−rFkr eWee Peakckage Substantially Reduces System Power Requirements (Note: Microdot may be in either location) Latchup Performance Exceeds 500 mA ESD Performance: Human Body Model >2000 V ORDERING INFORMATION Machine Model >200 V See detailed ordering and shipping information in the package These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS dimensions section on page 3 of this data sheet. Compliant Semiconductor Components Industries, LLC, 2012 1 Publication Order Number: October, 2012 − Rev. 8 MC74LCX74/D
MC74LCX74 4 SD1 SD D1 2 D Q 5 O1 6 3 Q O1 CP1 CP VCC CD2 D2 CP2 SD2 O2 O2 CD 14 13 12 11 10 9 8 1 CD1 10 SD2 1 2 3 4 5 6 7 SD CD1 D1 CP1 SD1 O1 O1 GND Figure 1. Pinout: 14−Lead (Top View) D2 12 D Q 9 O2 8 CP2 11 CP Q O2 CD 13 CD2 Figure 2. Logic Diagram PIN NAMES Pins Function CP1, CP2 Clock Pulse Inputs D1−D2 Data Inputs CD1, CD2 Direct Clear Inputs SD1, SD2 Direct Set Inputs On−On Outputs TRUTH TABLE Inputs Outputs SDn CDn CPn Dn On On Operating Mode L H X X H L Asynchronous Set H L X X L H Asynchronous Clear L L X X H H Undetermined H H h H L Load and Read Register H H l L H H H X NC NC Hold H = High Voltage Level h = High Voltage Level One Setup Time Prior to the Low−to−High Clock Transition L = Low Voltage Level l = Low Voltage Level One Setup Time Prior to the Low−to−High Clock Transition NC = No Change X = High or Low Voltage Level and Transitions are Acceptable = Low−to−High Transition = Not a Low−to−High Transition For ICC reasons, DO NOT FLOAT Inputs http://onsemi.com 2
MC74LCX74 MAXIMUM RATINGS Symbol Parameter Value Condition Units VCC DC Supply Voltage −0.5 to +7.0 V VI DC Input Voltage −0.5 VI +7.0 V VO DC Output Voltage −0.5 VO VCC + 0.5 Output in HIGH or LOW State (Note 1) V IIK DC Input Diode Current −50 VI < GND mA IOK DC Output Diode Current −50 VO < GND mA +50 VO > VCC mA IO DC Output Source/Sink Current 50 mA ICC DC Supply Current Per Supply Pin 100 mA IGND DC Ground Current Per Ground Pin 100 mA TSTG Storage Temperature Range −65 to +150 C MSL Moisture Sensitivity Level 1 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. IO absolute maximum rating must be observed. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Type Max Units VCC Supply Voltage V Operating 2.0 2.5, 3.3 3.6 Data Retention Only 1.5 2.5, 3.3 3.6 VI Input Voltage 0 5.5 V VO Output Voltage (HIGH or LOW State) 0 VCC V IOH HIGH Level Output Current mA VCC = 3.0 V − 3.6 V −24 VCC = 2.7 V − 3.0 V −12 VCC = 2.3 V − 2.7 V −8 IOL LOW Level Output Current mA VCC = 3.0 V − 3.6 V +24 VCC = 2.7 V − 3.0 V +12 VCC = 2.3 V − 2.7 V +8 TA Operating Free−Air Temperature −40 +85 C (cid:3)t/(cid:3)V Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V 0 10 ns/V ORDERING INFORMATION Device Package Shipping† MC74LCX74DG SOIC−14 55 Units / Rail (Pb−Free) MC74LCX74DR2G SOIC−14 2500 Tape & Reel (Pb−Free) MC74LCX74DTG TSSOP−14 96 Units / Rail (Pb−Free) MC74LCX74DTR2G TSSOP−14 2500 Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 3
MC74LCX74 DC ELECTRICAL CHARACTERISTICS TA = −40C to +85C Symbol Characteristic Condition Min Max Units VIH HIGH Level Input Voltage (Note 2) 2.3 V VCC 2.7 V 1.7 V 2.7 V VCC 3.6 V 2.0 VIL LOW Level Input Voltage (Note 2) 2.3 V VCC 2.7 V 0.7 V 2.7 V VCC 3.6 V 0.8 VOH HIGH Level Output Voltage 2.3 V VCC 3.6 V; IOH = −100 (cid:2)A VCC−0.2 V VCC = 2.3 V; IOH = −8 mA 1.8 VCC = 2.7 V; IOH = −12 mA 2.2 VCC = 3.0 V; IOH = −18 mA 2.4 VCC = 3.0 V; IOH = −24 mA 2.2 VOL LOW Level Output Voltage 2.3 V VCC 3.6 V; IOL = 100 (cid:2)A 0.2 V VCC = 2.3 V; IOL = 8 mA 0.6 VCC = 2.7 V; IOL = 12 mA 0.4 VCC = 3.0 V; IOL = 16 mA 0.4 VCC = 3.0 V; IOL = 24 mA 0.55 IOFF Power Off Leakage Current VCC = 0, VIN = 5.5 V or VOUT = 5.5 V 10 (cid:2)A IIN Input Leakage Current VCC = 3.6 V, VIN = 5.5 V or GND 5 (cid:2)A ICC Quiescent Supply Current VCC = 3.6 V, VIN = 5.5 V or GND 10 (cid:2)A (cid:3)ICC Increase in ICC per Input 2.3 VCC 3.6 V; VIH = VCC − 0.6 V 500 (cid:2)A 2. These values of VI are used to test DC electrical characteristics only. AC CHARACTERISTICS (tR = tF = 2.5 ns; RL = 500 (cid:4)) Limits TA = −40C to +85C VCC = 3.3 V (cid:2) 0.3 V VCC = 2.7 V VCC = 2.5 V (cid:2) 0.2 V CL = 50 pF CL = 50 pF CL = 30 pF Symbol Parameter Waveform Min Max Min Max Min Max Units fmax Clock Pulse Frequency 1 150 150 150 MHz tPLH Propagation Delay 1 1.5 7.0 1.5 8.0 1.5 8.4 ns tPHL CPn to On or On 1.5 7.0 1.5 8.0 1.5 8.4 tPLH Propagation Delay 2 1.5 7.0 1.5 8.0 1.5 8.4 ns tPHL SDn or CDn to On or On 1.5 7.0 1.5 8.0 1.5 8.4 ts Setup Time, 1 2.5 2.5 4.0 ns HIGH or LOW Dn to CPn th Hold Time, HIGH or LOW Dn to CPn 1 1.5 1.5 2.0 ns tw CPn Pulse Width, HIGH or LOW 4 3.3 3.3 4.0 ns SDn or CDn Pulse Width, LOW 3.3 3.6 4.0 trec Recovery Time SDn or CDn to CPn 3 2.5 3.0 4.5 ns tOSHL Output−to−Output Skew (Note 3) 1.0 ns tOSLH 1.0 3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter guaranteed by design. http://onsemi.com 4
MC74LCX74 DYNAMIC SWITCHING CHARACTERISTICS TA = +25C Symbol Characteristic Condition Min Typ Max Units VOLP Dynamic LOW Peak Voltage VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V 0.8 V (Note 4) VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V 0.6 V VOLV Dynamic LOW Valley Voltage VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V −0.8 V (Note 4) VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V −0.6 V 4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is measured in the LOW state. CAPACITIVE CHARACTERISTICS Symbol Parameter Condition Typical Units CIN Input Capacitance VCC = 3.3 V, VI = 0 V or VCC 7 pF COUT Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 8 pF CPD Power Dissipation Capacitance 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 25 pF Vcc Dn Vmi 0 V ts th tw Vcc CPn Vmi 0 V fmax tPLH, tPHL VOH On, Vmo On VOL WAVEFORM 1 − PROPAGATION DELAYS, SETUP AND HOLD TIMES tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns Vcc SDn 0 V Vcc CDn 1.5 V 0 V tPLH tPHL On Vmo Vmo VOL tPLH VOH On Vmo Vmo tPHL WAVEFORM 2 − PROPAGATION DELAYS tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns Figure 3. AC Waveforms http://onsemi.com 5
MC74LCX74 Vcc tw SDn, CDn Vmi 0 V trec Vcc Vmi CPn 0 V WAVEFORM 3 − RECOVERY TIME tR = tF = 2.5 ns from 10% to 90%; f = 1 MHz; tw = 500 ns Vcc CPn Vmi Vmi tw 0 V Vcc tw SDn, CDn, CPn Vmi Vmi 0 V WAVEFORM 4 − PULSE WIDTH tR = tF = 2.5 ns (or fast as required) from 10% to 90%; Output requirements: VOL 0.8 V, VOH 2.0 V Vcc Symbol 3.3 V + 0.3 V 2.7 V 2.5 V + 0.2 V Vmi 1.5 V 1.5 V Vcc/2 Vmo 1.5 V 1.5 V Vcc/2 Figure 3. AC Waveforms (Continued) VCC PULSE DUT GENERATOR RT CL RL CL= 50 pF at VCC = 3.3 0.3 V or equivalent (includes jig and probe capacitance) CL= 30 pF at VCC = 2.5 0.2 V or equivalent (includes jig and probe capacitance) RL= R1 = 500 (cid:4) or equivalent RT= ZOUT of pulse generator (typically 50 (cid:4)) Figure 4. Test Circuit http://onsemi.com 6
MC74LCX74 PACKAGE DIMENSIONS TSSOP−14 CASE 948G ISSUE B 14X K REF NOTES: 1. DIMENSIONING AND TOLERANCING PER 0.10 (0.004) M T U S V S ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 0.15 (0.006) T U S 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. N MOLD FLASH OR GATE BURRS SHALL NOT 0.25 (0.010) EXCEED 0.15 (0.006) PER SIDE. 14 8 4. DIMENSION B DOES NOT INCLUDE 2XL/2 INTERLEAD FLASH OR PROTRUSION. M INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. L B 5. DIMENSION K DOES NOT INCLUDE −U− N DAMBAR PROTRUSION. ALLOWABLE PIN 1 DAMBAR PROTRUSION SHALL BE 0.08 IDENT. F (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL 1 7 DETAIL E CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE 0.15 (0.006) T U S A K DETERMINED AT DATUM PLANE −W−. −V− K1 MILLIMETERS INCHES ÇÉÇÉÇÉ DIM MIN MAX MIN MAX A 4.90 5.10 0.193 0.200 J J1 ÇÉÇÉÇÉ B 4.30 4.50 0.169 0.177 C −−− 1.20 −−− 0.047 SECTION N−N D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 −W− J 0.09 0.20 0.004 0.008 C J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 0.10 (0.004) K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC −T− SPELAATNIENG D G H DETAIL E M 0 (cid:3) 8 (cid:3) 0 (cid:3) 8 (cid:3) SOLDERING FOOTPRINT* 7.06 1 0.65 PITCH 14X 14X 0.36 1.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7
MC74LCX74 PACKAGE DIMENSIONS SOIC−14 NB CASE 751A−03 ISSUE K D A NOTES: B 1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2.CONTROLLING DIMENSION: MILLIMETERS. 14 8 3.DIMENSION b DOES NOT INCLUDE DAMBAR A3 PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. H E 4.DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. L 5.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 1 7 DETAIL A MILLIMETERS INCHES 0.25 M B M 13Xb DIM MIN MAX MIN MAX A 1.35 1.75 0.054 0.068 0.25 M C A S B S A1 0.10 0.25 0.004 0.010 A3 0.19 0.25 0.008 0.010 DETAIL A b 0.35 0.49 0.014 0.019 h A X 45(cid:3) DE 83..5850 84..7050 00..135307 00..135474 e 1.27 BSC 0.050 BSC H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 e A1 C SEATING M ML 0.04 0(cid:3) 1.72 5(cid:3) 0.001 6(cid:3) 0.047 9(cid:3) PLANE SOLDERING FOOTPRINT* 6.50 14X 1.18 1 1.27 PITCH 14X 0.58 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com MC74LCX74/D 8
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