MC74HC139A Dual 1-of-4 Decoder/ Demultiplexer High−Performance Silicon−Gate CMOS The MC74HC139A is identical in pinout to the LS139. The device http://onsemi.com inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. MARKING This device consists of two independent 1−of−4 decoders, each of DIAGRAMS which decodes a two−bit Address to one−of−four active−low outputs. 16 Active−low Selects are provided to facilitate the demultiplexing and PDIP−16 cascading functions. The demultiplexing function is accomplished by 16 MC74HC139AN N SUFFIX using the Address inputs to select the desired device output, and AWLYYWWG CASE 648 utilizing the Select as a data input. 1 1 Features • 16 Output Drive Capability: 10 LSTTL Loads SOIC−16 • HC139AG Outputs Directly Interface to CMOS, NMOS and TTL 16 D SUFFIX • CASE 751B AWLYWW Operating Voltage Range: 2.0 to 6.0 V 1 • Low Input Current: 1.0 (cid:2)A 1 • High Noise Immunity Characteristic of CMOS Devices 16 • In Compliance with the Requirements Defined by JEDEC Standard TSSOP−16 HC No. 7A 16 DT SUFFIX 139A • ALYW(cid:2) Chip Complexity: 100 FETs or 25 Equivalent Gates 1 CASE 948F (cid:2) • NLV Prefix for Automotive and Other Applications Requiring 1 Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS A = Assembly Location L, WL = Wafer Lot Compliant Y, YY = Year W, WW = Work Week G or (cid:2) = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2012 1 Publication Order Number: July, 2012 − Rev. 11 MC74HC139A/D

MC74HC139A 2 4 ADDRESS A0a Y0a INPUTS 3 5 SELECA0Taa 21 1156 SVCECLECTb A1a 6 YY12aa ACOTUIVTPEU−LTOSW 7 A1a 3 14 A0b Y3a Y0a 4 13 A1b 1 PIN 16 = VCC Y1a 5 12 Y0b SELECTa PIN 8 = GND Y2a 6 11 Y1b 14 12 ADDRESS A0b Y0b Y3a 7 10 Y2b INPUTS A1b 13 11 Y1b ACTIVE−LOW GND 8 9 Y3b 10 OUTPUTS Y2b 9 Figure 1. Pin Assignment Y3b 15 SELECTb Figure 2. Logic Diagram FUNCTION TABLE Inputs Outputs Select A1 A0 Y0 Y1 Y2 Y3 H X X H H H H L L L L H H H L L H H L H H L H L H H L H L H H H H H L X = don’t care ORDERING INFORMATION Device Package Shipping† MC74HC139ANG PDIP−16 2000 Units / Box (Pb−Free) MC74HC139ADG SOIC−16 48 Units / Rail (Pb−Free) MC74HC139ADR2G SOIC−16 2500 / Tape & Reel (Pb−Free) MC74HC139ADTR2G TSSOP−16 2500 / Tape & Reel (Pb−Free) NLV74HC139ADR2G* SOIC−16 2500 / Tape & Reel (Pb−Free) NLV74HC139ADTR2G* TSSOP−16 2500 / Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable http://onsemi.com 2

MC74HC139A MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) (cid:2)0.5 to (cid:3)7.0 V VIN DC Input Voltage (Referenced to GND) (cid:2)1.5 to VCC (cid:3)1.5 V VOUT DC Output Voltage (Referenced to GND) (Note 1) (cid:2)0.5 to VCC (cid:3)0.5 V IIN DC Input Current, per Pin (cid:4)20 mA IOUT DC Output Current, per Pin (cid:4)25 mA ICC DC Supply Current, VCC Pin (cid:4)50 mA IGND DC Ground Current per Ground Pin (cid:4)50 mA TSTG Storage Temperature Range (cid:2)65 to (cid:3)150 (cid:3)C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 (cid:3)C TJ Junction Temperature Under Bias (cid:3)150 (cid:3)C (cid:3)JA Thermal Resistance PDIP 78 (cid:3)C/W SOIC 112 TSSOP 148 PD Power Dissipation in Still Air at 85(cid:3)C PDIP 750 mW SOIC 500 TSSOP 450 MSL Moisture Sensitivity Level 1 FR Flammability Rating Oxygen Index: 30% − 35% UL 94 V−0 @ 0.125 in VESD ESD Withstand Voltage Human Body Model (Note 2) (cid:5)2000 V Machine Model (Note 3) (cid:5)200 Charged Device Model (Note 4) (cid:5)1000 ILATCHUP Latchup Performance Above VCC and Below GND at 85(cid:3)C (Note 5) (cid:4)300 mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. IO absolute maximum rating must be observed. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS ÎÎSyÎmboÎÎl ÎÎÎÎÎÎÎÎÎPaÎramÎeterÎÎÎÎÎÎÎÎÎÎÎMÎinÎÎÎÎMaÎx ÎÎÎUniÎt ÎÎÎÎVÎÎCCÎÎÎÎÎÎDC ÎÎSuppÎÎly VÎÎoltagÎÎe ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(ReÎÎfereÎÎncedÎÎ to GÎÎNDÎÎÎÎ) ÎÎÎÎ2.0 ÎÎÎÎÎÎÎÎ6.0ÎÎÎÎÎÎÎÎVÎÎ ÎÎÎÎVIN,ÎÎ VOUÎÎÎÎT ÎÎDC ÎÎInpuÎÎt VolÎÎtageÎÎ, OuÎÎtput ÎÎVoltaÎÎge ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(ReÎÎfereÎÎncedÎÎ to GÎÎNDÎÎÎÎ) ÎÎÎÎ0 ÎÎÎÎÎÎÎÎVCÎÎC ÎÎÎÎÎÎVÎÎ ÎÎÎÎÎÎTA ÎÎÎÎÎÎOpeÎÎratinÎÎg TeÎÎmpeÎÎratuÎÎre, AÎÎll PaÎÎckagÎÎe TyÎÎpesÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(cid:2)ÎÎ55ÎÎÎÎÎÎÎÎ(cid:3)12ÎÎ5 ÎÎÎÎÎÎ(cid:3)CÎÎ ÎÎtÎr, tf ÎÎÎInpuÎt RisÎe anÎd FaÎll TiÎme ÎÎÎÎÎÎÎÎÎÎÎVCÎC = Î2.0 VÎÎÎÎ0 ÎÎÎÎ100Î0 ÎÎÎnsÎ (Figure 3) VCC = 4.5 V 0 500 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVCÎC = Î6.0 VÎÎÎÎ0 ÎÎÎÎ40Î0 ÎÎÎÎ 6. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level. http://onsemi.com 3

MC74HC139A DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC Guaranteed Limit Symbol Parameter Test Conditions V (cid:2)55(cid:3)C to 25(cid:3)C (cid:6)85(cid:3)C (cid:6)125(cid:3)C Unit ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎVÎIH ÎÎMÎinimÎumÎ HighÎ−LeÎvel IÎnputÎÎÎVOÎUT =Î 0.1Î V oÎr VCCÎ (cid:2)0Î.1 VÎÎÎÎ2Î.0 ÎÎÎ1Î.5 ÎÎÎÎ1.5ÎÎÎ1.Î5 ÎÎVÎ Voltage |IOUT| (cid:6) 20 (cid:2)A 4.5 3.15 3.15 3.15 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ6ÎÎ.0 ÎÎÎÎÎÎ4ÎÎ.2 ÎÎÎÎÎÎÎÎ4.2ÎÎÎÎÎÎ4.ÎÎ2 ÎÎÎÎÎÎ ÎÎVÎIL ÎÎMÎaxiÎmumÎ LowÎ−LeÎvel IÎnputÎÎÎVOÎUT =Î 0.1Î V oÎr VCCÎ (cid:2)0Î.1 VÎÎÎÎ2Î.0 ÎÎÎ0Î.5 ÎÎÎÎ0.5ÎÎÎ0.Î5 ÎÎVÎ Voltage |IOUT| (cid:6) 20 (cid:2)A 4.5 1.35 1.35 1.35 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ6ÎÎ.0 ÎÎÎÎÎÎ1ÎÎ.8 ÎÎÎÎÎÎÎÎ1.8ÎÎÎÎÎÎ1.ÎÎ8 ÎÎÎÎÎÎ ÎÎVÎOH ÎÎMÎinimÎumÎ HighÎ−LeÎvel OÎutpÎut ÎÎVIÎN = VÎIH oÎr VILÎÎÎÎÎÎÎ2Î.0 ÎÎÎ1Î.9 ÎÎÎÎ1.9ÎÎÎ1.Î9 ÎÎVÎ ÎÎÎÎÎVÎoltaÎge ÎÎÎÎÎÎÎ|IOÎUT| Î(cid:6) 20Î (cid:2)AÎÎÎÎÎÎÎ4Î.5 ÎÎÎ4Î.4 ÎÎÎÎ4.4ÎÎÎ4.Î4 ÎÎÎ 6.0 5.9 5.9 5.9 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVIÎÎN = VÎÎIH oÎÎr VILÎÎÎÎ|IOUÎÎT| (cid:6)ÎÎ 4.0ÎÎ mAÎÎÎÎ4ÎÎ.5 ÎÎÎÎÎÎ3ÎÎ.98 ÎÎÎÎÎÎÎÎ3.84ÎÎÎÎÎÎ3.7ÎÎ0 ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ|IOUÎÎT| (cid:6)ÎÎ 5.2ÎÎ mAÎÎÎÎ6ÎÎ.0 ÎÎÎÎÎÎ5ÎÎ.48 ÎÎÎÎÎÎÎÎ5.34ÎÎÎÎÎÎ5.2ÎÎ0 ÎÎÎÎÎÎ ÎÎVÎOL ÎÎMÎaxiÎmumÎ LowÎ−LeÎvel OÎutpÎut ÎÎVIÎN = VÎIH oÎr VILÎÎÎÎÎÎÎ2Î.0 ÎÎÎ0Î.1 ÎÎÎÎ0.1ÎÎÎ0.Î1 ÎÎVÎ Voltage |IOUT| (cid:6) 20 (cid:2)A 4.5 0.1 0.1 0.1 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ6ÎÎ.0 ÎÎÎÎÎÎ0ÎÎ.1 ÎÎÎÎÎÎÎÎ0.1ÎÎÎÎÎÎ0.ÎÎ1 ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎVIÎN = VÎIH oÎr VILÎÎ|IOUÎT| (cid:6)Î 4.0Î mAÎÎ4Î.5 ÎÎÎ0Î.26 ÎÎÎÎ0.33ÎÎÎ0.4Î0 ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ|IOUÎÎT| (cid:6)ÎÎ 5.2ÎÎ mAÎÎÎÎ6ÎÎ.0 ÎÎÎÎÎÎ0ÎÎ.26 ÎÎÎÎÎÎÎÎ0.33ÎÎÎÎÎÎ0.4ÎÎ0 ÎÎÎÎÎÎ ÎÎIÎIN ÎÎMÎaxiÎmumÎ InpÎut LeÎakaÎge ÎÎÎVIÎN = VÎCC Îor GÎND ÎÎÎÎÎÎ6Î.0 ÎÎÎ(cid:4)Î0.1ÎÎÎ(cid:4)Î1.0ÎÎÎ(cid:4)1Î.0 ÎÎ(cid:2)ÎA Current ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ICC Maximum Quiescent Supply VIN = VCC or GND 6.0 4 40 160 (cid:2)A ÎÎÎÎÎCÎurreÎnt (Îper PÎackÎage)ÎÎÎÎIOÎUT =Î 0 (cid:2)AÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns) VCC Guaranteed Limit ÎÎSymÎboÎÎl ÎÎÎÎÎÎÎPaÎramÎeterÎÎÎÎÎÎÎÎÎÎV ÎÎ(cid:2)5Î5(cid:3)CÎ to 2Î5(cid:3)CÎÎ(cid:6)Î85(cid:3)ÎÎC (cid:6)Î12Î5(cid:3)CÎÎUnÎit ÎÎtPÎLH, ÎÎMÎaxiÎmumÎ ProÎpagÎationÎ DelÎay, SÎelecÎt to ÎOutpÎut YÎÎÎÎÎÎÎ2Î.0 ÎÎÎ1Î15 ÎÎÎÎ145ÎÎÎ17Î5 ÎÎnÎs tPHL (Figures 1 and 3) 4.5 23 29 35 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ6ÎÎ.0 ÎÎÎÎÎÎ2ÎÎ0 ÎÎÎÎÎÎÎÎ25ÎÎÎÎÎÎ30ÎÎÎÎÎÎÎÎ ÎÎtPÎLH, ÎÎMÎaxiÎmumÎ ProÎpagÎationÎ DelÎay, IÎnputÎ A toÎ OutÎput YÎÎÎÎÎÎÎ2Î.0 ÎÎÎ1Î15 ÎÎÎÎ145ÎÎÎ17Î5 ÎÎnÎs ÎÎtPÎHL ÎÎ(ÎFiguÎres 2Î anÎd 3)ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ4Î.5 ÎÎÎ2Î3 ÎÎÎÎ29ÎÎÎ35ÎÎÎÎ 6.0 20 25 30 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tTLH, Maximum Output Transition Time, Any Output 2.0 75 95 110 ns ÎÎtTÎHL ÎÎ(ÎFiguÎres 1Î anÎd 3)ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ4Î.5 ÎÎÎ1Î5 ÎÎÎÎ19ÎÎÎ22ÎÎÎÎ 6.0 13 16 19 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎCÎin ÎÎMÎaxiÎmumÎ InpÎut CÎapacÎitancÎe ÎÎÎÎÎÎÎÎÎÎÎÎ− ÎÎÎ1Î0 ÎÎÎÎ10ÎÎÎ10ÎÎÎpÎF 7. For propagation delays with loads other than 50 pF, and information on typical parametric values, see the ON Semiconductor High−Speed CMOS Data Book (DL129/D). Typical @ 25°C, VCC = 5.0 V CPD Power Dissipation Capacitance (Per Decoder) (Note 8) 55 pF 8. Used to determine the no−load dynamic power consumption: PD = CPD VCC2f (cid:3) ICC VCC. http://onsemi.com 4

MC74HC139A tf tr 9500%% VCC VALID VALID VCC SELECT 10% GND INPUT A 50% tPHL tPLH GND 90% tPLH tPHL 50% OUTPUT Y 10% OUTPUT Y 50% tTHL tTLH Figure 3. Switching Waveform Figure 4. Switching Waveform TEST POINT OUTPUT DEVICE UNDER TEST CL* * Includes all probe and jig capacitance Figure 5. Test Circuit http://onsemi.com 5

MC74HC139A PIN DESCRIPTIONS ADDRESS INPUTS inputs. A high level on this input forces all outputs to a high level. A0 , A1 , A0 , A1 (Pins 2, 3, 14, 13) a a b b Address inputs. These inputs, when the respective 1−of−4 OUTPUTS decoder is enabled, determine which of its four active−low outputs is selected. Y0a − Y3a, Y0b − Y3b (Pins 4 − 7, 12, 11, 10, 9) Active−low outputs. These outputs assume a low level CONTROL INPUTS when addressed and the appropriate Select input is active. These outputs remain high when not addressed or the Select , Select (Pins 1, 15) a b appropriate Select input is inactive. Active−low select inputs. For a low level on this input, the outputs for that particular decoder follow the Address SELECT Y0 Y1 A0 Y2 Y3 A1 Figure 6. Expanded Logic Diagram (1/2 of Device) http://onsemi.com 6

MC74HC139A PACKAGE DIMENSIONS PDIP−16 CASE 648−08 ISSUE T −A− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 16 9 3. DIMENSION L TO CENTER OF LEADS B WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE 1 8 MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. F C L INCHES MILLIMETERS DIM MIN MAX MIN MAX S A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 −T− SEATING D 0.015 0.021 0.39 0.53 PLANE F 0.040 0.70 1.02 1.77 H K J M GH 00..100500 BBSSCC 21..5247 BBSSCC G J 0.008 0.015 0.21 0.38 D16 PL K 0.110 0.130 2.80 3.30 0.25 (0.010) M T A M ML 0.209 5(cid:3) 0.1300 5(cid:3) 7.05 0(cid:3) 71.07 4(cid:3) S 0.020 0.040 0.51 1.01 http://onsemi.com 7

MC74HC139A PACKAGE DIMENSIONS SOIC−16 CASE 751B−05 ISSUE K −A− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 16 9 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. −B− P8 PL 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION 1 8 0.25 (0.010) M B S SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES DIM MIN MAX MIN MAX G A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F K R X 45(cid:3) F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 0.009 C K 0.10 0.25 0.004 0.009 M 0 (cid:3) 7 (cid:3) 0 (cid:3) 7 (cid:3) −T− SEATING P 5.80 6.20 0.229 0.244 PLANE M J R 0.25 0.50 0.010 0.019 D 16 PL 0.25 (0.010) M T B S A S SOLDERING FOOTPRINT* 8X 6.40 16X1.12 1 16 16X 0.58 1.27 PITCH 8 9 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 8

MC74HC139A PACKAGE DIMENSIONS TSSOP−16 CASE 948F−01 ISSUE B 16X K REF NOTES: 0.10 (0.004) M T U S V S 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 0.15 (0.006) T U S K 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD K1 FLASH. PROTRUSIONS OR GATE BURRS. ÇÉÇÉÇÉ MOLD FLASH OR GATE BURRS SHALL NOT 16 9 EXCEED 0.15 (0.006) PER SIDE. 2XL/2 J1 ÇÉÇÉÇÉ 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL B SECTION N−N NOT EXCEED 0.25 (0.010) PER SIDE. L −U− J 5D.ADMIMBAERN SPIROONT KR UDSOIEOSN N. AOLTL OINWCALUBLDEE DAMBAR PROTRUSION SHALL BE 0.08 PIN 1 (0.003) TOTAL IN EXCESS OF THE K IDENT. N DIMENSION AT MAXIMUM MATERIAL 1 8 0.25 (0.010) CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. M 7. DIMENSION A AND B ARE TO BE 0.15 (0.006) T U S DETERMINED AT DATUM PLANE −W−. A N MILLIMETERS INCHES −V− DIM MIN MAX MIN MAX F A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 DETAIL E C −−− 1.20 −−− 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC C −W− H 0.18 0.28 0.007 0.011 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 0.10 (0.004) K 0.19 0.30 0.007 0.012 −T− SEATING H DETAIL E K1 0.19 0.25 0.007 0.010 PLANE D G ML 06 .(cid:3) 4 0 BSC8 (cid:3) 00. 2(cid:3) 52 BS8C (cid:3) SOLDERING FOOTPRINT 7.06 1 0.65 PITCH 16X 16X 0.36 1.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 9

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