MC74AC573, MC74ACT573 Octal Buffer/Line Driver with 3-State Outputs The MC74AC573/74ACT573 is a high−speed octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The MC74AC573/74ACT573 is functionally identical to the www.onsemi.com MC74AC373/74ACT373 but has inputs and outputs on opposite sides. Features MARKING • Inputs and Outputs on Opposite Sides of Package Allowing Easy DIAGRAM Interface with Microprocessors • Useful as Input or Output Port for Microprocessors 20 • xxx573 Functionally Identical to MC74AC373/74ACT373 1 AWLYYWWG • 3−State Outputs for Bus Interfacing SO−20 • DW SUFFIX Outputs Source/Sink 24 mA CASE 751D • ′ACT573 Has TTL Compatible Inputs • These are Pb−Free Devices VCC O0 O1 O2 O3 O4 O5 O6 O7 LE 20 xxx 20 19 18 17 16 15 14 13 12 11 1 573 ALYW (cid:2) TSSOP−20 (cid:2) DT SUFFIX CASE 948E xxx = AC or ACT A = Assembly Location WL, L = Wafer Lot 1 2 3 4 5 6 7 8 9 10 YY, Y = Year OE D0 D1 D2 D3 D4 D5 D6 D7 GND WW, W = Work Week G or (cid:2) = Pb−Free Package Figure 1. Pinout 20−Lead Packages Conductors (Note: Microdot may be in either location) (Top View) PIN ASSIGNMENT ORDERING INFORMATION PIN FUNCTION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. D0−D7 Data Inputs LE Latch Enable Input OE 3−State Output Enable Input O0−O7 3−State Latch Outputs D0 D1 D2 D3 D4 D5 D6 D7 LE OE O0 O1 O2 O3 O4 O5 O6 O7 Figure 2. Logic Symbol © Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: March, 2015 − Rev. 8 MC74AC573/D

MC74AC573, MC74ACT573 Functional Description TRUTH TABLE The MC74AC573/74ACT574 contains eight D−type Inputs Outputs latches with 3−state output buffers. When the Latch Enable OE LE Dn On (LE) input is HIGH, data on the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch L H H H output will change state each time its D input changes. When L H L L LE is LOW the latches store the information that was present L L X O0 on the D inputs a setup time preceding the HIGH−to−LOW H X X Z transition of LE. The 3−state buffers are controlled by the Output Enable (OE) input. When OE is LOW, the buffers are H = HIGH Voltage Level L = LOW Voltage Level enabled. When OE is HIGH the buffers are in the high Z = High Impedance impedance mode but this does not interfere with entering X = Immaterial new data into the latches. O0 = Previous O0 before LOW−to−HIGH Transition of Clock D0 D1 D2 D3 D4 D5 D6 D7 D D D D D D D D Q Q Q Q Q Q Q Q LE LE LE LE LE LE LE LE LE OE O0 O1 O2 O3 O4 O5 O6 O7 NOTE: That this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Figure 3. Logic Diagram www.onsemi.com 2

MC74AC573, MC74ACT573 MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) −0.5 to +7.0 V VIN DC Input Voltage (Referenced to GND) −0.5 to VCC +0.5 V VOUT DC Output Voltage (Referenced to GND) (Note 1) −0.5 to VCC +0.5 V IIK DC Input Diode Current ±20 mA IOK DC Output Diode Current ±50 mA IOUT DC Output Sink/Source Current ±50 mA ICC DC Supply Current, per Output Pin ±50 mA IGND DC Ground Current, per Output Pin ±100 mA TSTG Storage Temperature Range (cid:2)65 to (cid:3)150 (cid:3)C TL Lead temperature, 1 mm from Case for 10 Seconds 260 (cid:3)C TJ Junction Temperature Under Bias 140 (cid:3)C (cid:2)JA Thermal Resistance (Note 2) SOIC 65.8 (cid:3)C/W TSSOP 110.7 MSL Moisture Sensitivity Level 1 FR Flammability Rating Oxygen Index: 30% − 35% UL 94 V−0 @ 0.125 in VESD ESD Withstand Voltage Human Body Model (Note 3) > 2000 V Machine Model (Note 4) > 200 Charged Device Model (Note 5) > 1000 ILatchup Latchup Performance Above VCC and Below GND at 85(cid:3)C (Note 6) ±100 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. IOUT absolute maximum rating must be observed. 2. The package thermal impedance is calculated in accordance with JESD 51−7. 3. Tested to EIA/JESD22−A114−A. 4. Tested to EIA/JESD22−A115−A. 5. Tested to JESD22−C101−A. 6. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Typ Max Unit ′AC 2.0 5.0 6.0 VCC Supply Voltage ′ACT 4.5 5.0 5.5 V VIN, VOUT DC Input Voltage, Output Voltage (Ref. to GND) 0 − VCC V VCC @ 3.0 V − 150 − Input Rise and Fall Time (Note 1) tr, tf ′AC Devices except Schmitt Inputs VCC @ 4.5 V − 40 − ns/V VCC @ 5.5 V − 25 − Input Rise and Fall Time (Note 2) VCC @ 4.5 V − 10 − tr, tf ′ACT Devices except Schmitt Inputs VCC @ 5.5 V − 8.0 − ns/V TA Operating Ambient Temperature Range −40 25 85 °C IOH Output Current − High − − −24 mA IOL Output Current − Low − − 24 mA Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. www.onsemi.com 3

MC74AC573, MC74ACT573 DC CHARACTERISTICS 74AC 74AC Symbol Parameter V(VCC) TA = +25°C −4T0A°C = to Unit Conditions +85°C Typ Guaranteed Limits VIH Minimum High Level 3.0 1.5 2.1 2.1 VOUT = 0.1 V Input Voltage 4.5 2.25 3.15 3.15 V or VCC − 0.1 V 5.5 2.75 3.85 3.85 VIL Maximum Low Level 3.0 1.5 0.9 0.9 VOUT = 0.1 V Input Voltage 4.5 2.25 1.35 1.35 V or VCC − 0.1 V 5.5 2.75 1.65 1.65 VOH Minimum High Level 3.0 2.99 2.9 2.9 IOUT = −50 (cid:3)A Output Voltage 4.5 4.49 4.4 4.4 V 5.5 5.49 5.4 5.4 *VIN = VIL or VIH 3.0 − 2.56 2.46 −12 mA V 4.5 − 3.86 3.76 IOH −24 mA 5.5 − 4.86 4.76 −24 mA VOL Maximum Low Level 3.0 0.002 0.1 0.1 IOUT = 50 (cid:3)A Output Voltage 4.5 0.001 0.1 0.1 V 5.5 0.001 0.1 0.1 *VIN = VIL or VIH 3.0 − 0.36 0.44 12 mA V 4.5 − 0.36 0.44 IOL 24 mA 5.5 − 0.36 0.44 24 mA IIN MLeaaxkimaguem C Iunrpruetnt 5.5 − ±0.1 ±1.0 (cid:3)A VI = VCC, GND IOZ Maximum VI (OE) = VIL, VIH 3−State 5.5 − ±0.5 ±5.0 (cid:3)A VI = VCC, GND Current VO = VCC, GND IOLD †Minimum Dynamic 5.5 − − 75 mA VOLD = 1.65 V Max Output Current IOHD 5.5 − − −75 mA VOHD = 3.85 V Min ICC MSuapxpimlyu Cmu Qrreunietscent 5.5 − 8.0 80 (cid:3)A VIN = VCC or GND NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC. *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. www.onsemi.com 4

MC74AC573, MC74ACT573 AC CHARACTERISTICS (For Figures and Waveforms − See Section 3) 74AC 74AC Symbol Parameter VCC* TA = +25°C TtAo = + −8450°C°C Unit Fig. (V) CL = 50 pF CL = 50 pF No. Min Typ Max Min Max Propagation Delay 3.3 2.5 − 13.0 2.0 15.0 tPLH Dn to On 5.0 2.5 − 10.0 2.0 11.5 ns 3−5 Propagation Delay 3.3 2.5 − 12.0 2.0 14.0 tPHL Dn to On 5.0 2.5 − 9.5 2.0 11.0 ns 3−5 Propagation Delay 3.3 2.5 − 13.0 2.0 15.0 tPLH LE to On 5.0 2.5 − 9.5 2.0 11.0 ns 3−6 Propagation Delay 3.3 2.5 − 12.0 2.0 14.0 tPHL LE to On 5.0 2.5 − 8.5 2.0 10.0 ns 3−6 3.3 2.5 − 11.0 2.0 12.0 tPZH Output Enable Time 5.0 2.5 − 9.0 2.0 10.0 ns 3−7 3.3 2.5 − 11.0 2.0 12.5 tPZL Output Enable Time 5.0 2.5 − 8.5 2.0 9.5 ns 3−8 3.3 2.5 − 12.5 2.0 13.5 tPHZ Output Disable Time 5.0 2.5 − 11.0 2.0 12.0 ns 3−7 3.3 2.5 − 9.5 2.0 10.5 tPLZ Output Disable Time 5.0 2.5 − 8.0 2.0 9.0 ns 3−8 *Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V. AC OPERATING REQUIREMENTS 74AC 74AC Symbol Parameter VCC* TA = +25°C TtAo = + −8450°C°C Unit Fig. (V) CL = 50 pF CL = 50 pF No. Typ Guaranteed Minimum Setup Time, HIGH or LOW 3.3 − 3.5 4.0 ts Dn to LE 5.0 − 3.0 3.5 ns 3−9 Hold Time, HIGH or LOW 3.3 − 2.0 2.0 th Dn to LE 5.0 − 2.0 2.0 ns 3−9 3.3 − 6.0 7.0 tw LE Pulse Width, HIGH 5.0 − 4.0 5.0 ns 3−6 *Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V. www.onsemi.com 5

MC74AC573, MC74ACT573 DC CHARACTERISTICS 74ACT 74ACT Symbol Parameter V(VCC) TA = +25°C −4T0A°C = to Unit Conditions +85°C Typ Guaranteed Limits VIH Minimum High Level 4.5 1.5 2.0 2.0 VOUT = 0.1 V V Input Voltage 5.5 1.5 2.0 2.0 or VCC − 0.1 V VIL Maximum Low Level 4.5 1.5 0.8 0.8 VOUT = 0.1 V V Input Voltage 5.5 1.5 0.8 0.8 or VCC − 0.1 V VOH Minimum High Level 4.5 4.49 4.4 4.4 IOUT = −50 (cid:3)A V Output Voltage 5.5 5.49 5.4 5.4 *VIN = VIL or VIH 4.5 − 3.86 3.76 V −24 mA 5.5 − 4.86 4.76 IOH −24 mA VOL Maximum Low Level 4.5 0.001 0.1 0.1 IOUT = 50 (cid:3)A V Output Voltage 5.5 0.001 0.1 0.1 *VIN = VIL or VIH 4.5 − 0.36 0.44 V 24 mA 5.5 − 0.36 0.44 IOL 24 mA IIN MLeaaxkimaguem C Iunrpruetnt 5.5 − ±0.1 ±1.0 (cid:3)A VI = VCC, GND (cid:4)ICCT Additional Max. ICC/Input 5.5 0.6 − 1.5 mA VI = VCC −2.1 V IOZ Maximum VI (OE) = VIL, VIH 3-State 5.5 − ±0.5 ±5.0 (cid:3)A VI = VCC, GND Current VO = VCC, GND IOLD †Minimum Dynamic 5.5 − − 75 mA VOLD = 1.65 V Max Output Current IOHD 5.5 − − −75 mA VOHD = 3.85 V Min ICC MSuapxpimlyu Cmu Qrreunietscent 5.5 − 8.0 80 (cid:3)A VIN = VCC or GND *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. AC CHARACTERISTICS (For Figures and Waveforms − See Section 3) 74ACT 74ACT Symbol Parameter VCC* TA = +25°C TtAo = + −8450°C°C Unit Fig. (V) CL = 50 pF CL = 50 pF No. Min Typ Max Min Max Propagation Delay tPLH Dn to On 5.0 2.5 − 10.5 2.0 12 ns 3−5 Propagation Delay tPHL Dn to On 5.0 2.5 − 10.5 2.0 12 ns 3−5 Propagation Delay tPLH LE to On 5.0 3.0 − 10.5 2.5 12 ns 3−6 Propagation Delay tPHL LE to On 5.0 2.5 − 9.5 2.0 10.5 ns 3−6 tPZH Output Enable Time 5.0 2.0 − 10 1.5 11 ns 3−7 tPZL Output Enable Time 5.0 1.5 − 9.5 1.5 10.5 ns 3−8 tPHZ Output Disable Time 5.0 2.5 − 11 1.5 12.5 ns 3−7 tPLZ Output Disable Time 5.0 1.5 − 8.5 1.0 9.5 ns 3−8 *Voltage Range 5.0 V is 5.0 V ±0.5 V. www.onsemi.com 6

MC74AC573, MC74ACT573 AC OPERATING REQUIREMENTS 74ACT 74ACT Symbol Parameter VCC* TA = +25°C TtAo = + −8450°C°C Unit Fig. (V) CL = 50 pF CL = 50 pF No. Typ Guaranteed Minimum Setup Time, HIGH or LOW ts Dn to LE 5.0 − 3.0 3.5 ns 3−9 Hold Time, HIGH or LOW th Dn to LE 5.0 − 0 0 ns 3−9 tw LE Pulse Width, HIGH 5.0 − 3.5 4.0 ns 3−6 *Voltage Range 5.0 V is 5.0 V ±0.5 V. CAPACITANCE Value Symbol Parameter Unit Test Conditions Typ CIN Input Capacitance 5.0 pF VCC = 5.0 V CPD Power Dissipation Capacitance 25 pF VCC = 5.0 V www.onsemi.com 7

MC74AC573, MC74ACT573 ORDERING INFORMATION Device Package Shipping† MC74AC573DWG SOIC−20 38 Units / Rail (Pb−Free) MC74AC573DWR2G SOIC−20 1000 Units / Tape & Reel (Pb−Free) MC74AC573DTR2G TSSOP−20 2500 Units / Tape & Reel (Pb−Free) MC74ACT573DWG SOIC−20 38 Units / Rail (Pb−Free) MC74ACT573DWR2G SOIC−20 1000 Units / Tape & Reel (Pb−Free) MC74ACT573DTR2G TSSOP−20 2500 Units / Tape & Reel (Pb−Free) †For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 8

MC74AC573, MC74ACT573 PACKAGE DIMENSIONS TSSOP−20 DT SUFFIX CASE 948E−02 ISSUE C NOTES: 20X K REF K 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 0.15 (0.006) T U S 0.10 (0.004) M T U S V S K1 2. CONTROLLING DIMENSION: ÍÍÍÍ MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE ÍÍÍÍ MOLD FLASH, PROTRUSIONS OR GATE 20 11 J J1 BURRS. MOLD FLASH OR GATE BURRS 2X L/2 ÍÍÍÍ SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE B SECTION N−N INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION L −U− SHALL NOT EXCEED 0.25 (0.010) PER SIDE. PIN 1 5. DIMENSION K DOES NOT INCLUDE IDENT 0.25 (0.010) DAMBAR PROTRUSION. ALLOWABLE N DAMBAR PROTRUSION SHALL BE 0.08 1 10 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL M CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR 0.15 (0.006) T U S REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE A DETERMINED AT DATUM PLANE −W−. N MILLIMETERS INCHES −V− F DIM MIN MAX MIN MAX A 6.40 6.60 0.252 0.260 DETAIL E B 4.30 4.50 0.169 0.177 C --- 1.20 --- 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 −W− G 0.65 BSC 0.026 BSC C H 0.27 0.37 0.011 0.015 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 D G H K 0.19 0.30 0.007 0.012 DETAIL E K1 0.19 0.25 0.007 0.010 0.100 (0.004) ML 06 (cid:3).40 BSC8 (cid:3) 00 (cid:3).252 BSC8 (cid:3) −T− SEATING PLANE SOLDERING FOOTPRINT* 7.06 1 0.65 PITCH 16X 16X 0.36 1.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 9

MC74AC573, MC74ACT573 PACKAGE DIMENSIONS SOIC−20W DW SUFFIX CASE 751D−05 ISSUE G D NOTES: A (cid:2) 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD M 20 11 PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. B (cid:3) 5. DIMENSION B DOES NOT INCLUDE DAMBAR H M 45 PROTRUSION. ALLOWABLE PROTRUSION 10X 0.25 E hX SDCHIOMANELDNLI STBIIOEO NN0.. 1A3T TMOATXAILM IUNM E MXCATEESRSI AOLF B 1 10 MILLIMETERS DIM MIN MAX A 2.35 2.65 A1 0.10 0.25 20X B B B 0.35 0.49 C 0.23 0.32 0.25 M T A S B S D 12.65 12.95 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 A L 0.50 0.90 (cid:2) 0 (cid:3) 7 (cid:3) L SEATING 18X e A1 TPLANE C ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative www.onsemi.com MC74AC573/D 10

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: MC74AC573DTR2G MC74AC573DWG MC74AC573DWR2G MC74ACT573DTR2G MC74ACT573DWG MC74ACT573DWR2G