MC33275, NCV33275 300 mA, Low Dropout Voltage Regulator The MC33275 series are micropower low dropout voltage regulators available in a wide variety of output voltages as well as packages, SOT−223, SOP−8, DPAK, and DFN 4x4 surface mount packages. These devices feature a very low quiescent current and are www.onsemi.com capable of supplying output currents up to 300 mA. Internal current and thermal limiting protection are provided by the presence of a short LOW DROPOUT circuit at the output and an internal thermal shutdown circuit. MICROPOWER VOLTAGE Due to the low input−to−output voltage differential and bias current REGULATOR specifications, these devices are ideally suited for battery powered computer, consumer, and industrial equipment where an extension of useful battery life is desirable. MARKING DIAGRAMS Features • Low Input−to−Output Voltage Differential of 25 mV at I = 10 mA, O 4 SOT−223 AYW • and 260 mV at IO = 300 mA 1 ST SUFFIX 275xx(cid:2) Extremely Tight Line and Load Regulation CASE 318E (cid:2) 3 • Stable with Output Capacitance of only 0.33 (cid:2)F for 2.5 V Output 1 Voltage • 8 Internal Current and Thermal Limiting • SOIC−8 275xx NCV Prefix for Automotive and Other Applications Requiring 8 D SUFFIX ALYW(cid:2) (cid:2) Unique Site and Control Change Requirements; AEC−Q100 1 CASE 751 Qualified and PPAP Capable 1 • These are Pb−Free Devices Applications 4 • DPAK 275xxG Battery Powered Consumer Products DT SUFFIX ALYWW • Hand−Held Instruments 1 2 CASE 369C • 3 Camcorders and Cameras Vin Vout DFN−8, 4x4 1 275xx MN SUFFIX ALYW(cid:2) CASE 488AF (cid:2) 1 Thermal & Anti−sat xx = Voltage Version Protection A = Assembly Location L = Wafer Lot Rint Y = Year W, WW= Work Week (cid:2) or G = Pb−Free Device 1.23 V (Note: Microdot may be in either location) V. Ref. 54 K GND ORDERING INFORMATION This device contains 41 active transistors See detailed ordering and shipping information on page 10 of this data sheet. Figure 1. Simplified Block Diagram © Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: March, 2015 − Rev. 20 MC33275/D

MC33275, NCV33275 PIN CONNECTIONS GND GND 4 4 1 8 Input Output ÇÇÇÇ ÇÇ 2 7 Input 1 8 Output GND GND 3 6 InÇÇput ÇÇ2 7ÇÇN/C 1 2 3 1 2 3 GNN/DC 4 5 GN/NCD InNÇp/uCt Ç43 56ÇGN/NCD Vin GND Vout VinGND Vout Pins 4 and 5 Not Connected MC33275ST MC33275DT MC33275D MC33275MN MAXIMUM RATINGS Rating Symbol Value Unit Input Voltage VCC 13 Vdc Power Dissipation and Thermal Characteristics TA = 25°C Maximum Power Dissipation PD Internally Limited W Case 751 (SOIC−8) D Suffix Thermal Resistance, Junction−to−Ambient R(cid:3)JA 160 °C/W Thermal Resistance, Junction−to−Case R(cid:3)JC 25 °C/W Case 318E (SOT−223) ST Suffix Thermal Resistance, Junction−to−Air R(cid:3)JA 245 °C/W Thermal Resistance, Junction−to−Case R(cid:3)JC 15 °C/W Case 369A (DPAK−3) DT Suffix Thermal Resistance, Junction−to−Air R(cid:3)JA 92 °C/W Thermal Resistance, Junction−to−Case R(cid:3)JC 6.0 °C/W Case 488AF (DFN−8, 4x4) MN Suffix Thermal Resistance, Junction−to−Air (with 1.0 oz PCB cu area) R(cid:3)JA 183 °C/W Thermal Resistance, Junction−to−Air (with 1.8 oz PCB cu area) R(cid:3)JA 93 °C/W Thermal Resistance, Junction−to−Case psi−JC* 9.0 °C/W Output Current IO 300 mA Maximum Junction Temperature TJ 150 °C Operating Ambient Temperature Range TA −40 to +125 °C Storage Temperature Range Tstg −65 to +150 °C Electrostatic Discharge Sensitivity (ESD) ESD V Human Body Model (HBM) 4000 Machine Model (MM) 400 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. *“C’’ (“case’’) is defined as the solder−attach interface between the center of the exposed pad on the bottom of the package, and the board to which it is attached. www.onsemi.com 2

MC33275, NCV33275 ELECTRICALCHARACTERISTICS (CL = 1.0(cid:2)F, TA = 25°C, for min/max values TJ = −40°C to +125°C, Note 1) Characteristic Symbol Min Typ Max Unit Output Voltage IO = 0 mA to 250 mA VO Vdc 2.5 V Suffix TA = 25°C, Vin = [VO + 1] V 2.475 2.50 2.525 3.0 V Suffix 2.970 3.00 3.030 3.3 V Suffix 3.267 3.30 3.333 5.0 V Suffix 4.950 5.00 5.05 2.5 V Suffix Vin = [VO + 1] V, 0 < IO < 100 mA 2.450 − 2.550 3.0 V Suffix 2% Tolerance from TJ = −40 to +125°C 2.940 − 3.060 3.3 V Suffix 3.234 − 3.366 5.0 V Suffix 4.900 − 5.100 Line Regulation Vin = [VO + 1] V to 12 V, IO = 250 mA, Regline − 2.0 10 mV All Suffixes TA = 25°C Load Regulation Vin = [VO + 1] V, IO = 0 mA to 250 mA, Regload − 5.0 25 mV All Suffixes TA = 25°C Dropout Voltage Vin − VO mV IO = 10 mA TJ = −40°C to +125°C − 25 100 IO = 100 mA − 115 200 IO = 250 mA − 220 400 IO = 300 mA − 260 500 Ripple Rejection (120 Hz) Vin(peak−peak) = [VO + 1.5] V to [VO + 5.5] V − 65 75 − dB Output Noise Voltage Vn (cid:2)Vrms CL = 1.0 (cid:2)F IO = 50 mA (10 Hz to 100 kHz) − 160 − CL = 200 (cid:2)F − 46 − CURRENTPARAMETERS Quiescent Current ON Mode Vin = [VO + 1] V, IO = 0 mA IQOn − 125 200 (cid:2)A Quiescent Current ON Mode SAT Vin = [VO − 0.5] V, IO = 0 mA (Notes 2, 3) IQSAT (cid:2)A 3.0 V Suffix − 1500 2000 3.3 V Suffix − 1500 2000 5.0 V Suffix − 1500 2000 Current Limit Vin = [VO + 1] V, VO Shorted ILIMIT − 450 − mA THERMAL SHUTDOWN Thermal Shutdown − − 150 − °C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. Low duty pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 2. Quiescent Current is measured where the PNP pass transistor is in saturation. Vin = [VO − 0.5] V guarantees this condition. 3. For 2.5 V version, IQSAT is constrained by the minimum input voltage of 2.5 V. www.onsemi.com 3

MC33275, NCV33275 DEFINITIONS Load Regulation − The change in output voltage for a Depending on ambient temperature, it is possible to change in load current at constant chip temperature. calculate the maximum power dissipation and so the Dropout Voltage − The input/output differential at which maximum current as following: the regulator output no longer maintains regulation against T (cid:3) T further reductions in input voltage. Measured when the Pd(cid:2) J A output drops 100 mV below its nominal value (which is R(cid:3)JA measured at 1.0 V differential), dropout voltage is affected The maximum operating junction temperature TJ is by junction temperature, load current and minimum input specified at 150°C, if TA = 25°C, then PD can be found. By supply requirements. neglecting the quiescent current, the maximum power Output Noise Voltage − The RMS AC voltage at the dissipation can be expressed as: output with a constant load and no input ripple, measured P over a specified frequency range. Iout(cid:2)V (cid:3)D V Maximum Power Dissipation − The maximum total CC out dissipation for which the regulator will operate within The thermal resistance of the whole circuit can be specifications. evaluated by deliberately activating the thermal shutdown Quiescent Current − Current which is used to operate the of the circuit (by increasing the output current or raising the regulator chip and is not delivered to the load. input voltage for example). Line Regulation − The change in output voltage for a Then you can calculate the power dissipation by change in the input voltage. The measurement is made under subtracting the output power from the input power. All conditions of low dissipation or by using pulse techniques variables are then well known: power dissipation, thermal such that the average chip temperature is not significantly shutdown temperature and ambient temperature. affected. T (cid:3) T Maximum Package Power Dissipation − The maximum R(cid:3)JA(cid:2) JP A D package power dissipation is the power dissipation level at which the junction temperature reaches its maximum value i.e. 150°C. The junction temperature is rising while the difference between the input power (V X I ) and the CC CC output power (V X I ) is increasing. out out www.onsemi.com 4

MC33275, NCV33275 7 200 7 70 TA = 25°C TA = 25°C 60 V, INPUT VOLTAGE (V)in654321 CIVLoL =u =t 1= 00 .3 4m.73A (cid:2)VF VVoinut -05115005000OUTPUT VOLTAGE CHANGE (mVV, INPUT VOLTAGE (V)in654321 CIVLoL =u =t 1= 30 33 m .(cid:2)3A FV VVoinut -0245131000000OUTPUT VOLTAGE CHANGE (mV ) ) 0 -100 0 -20 0 20 40 60 80 100 120 140 160 180 200 0 50 100 150 200 TIME ((cid:2)S) TIME ((cid:2)S) Figure 2. Line Transient Response Figure 3. Line Transient Response 1.0 300 350 200 0.8 250 0.14 100 LOAD 0.6 OU 150 LOAD CURRENT OU mA) 0 CURRENT 0.4 TPUT mA) 50 0.09TPUT URRENT (--120000 -00..22 0 VOLTAGE URRENT (---21555000 -00.0.041 VOLTAGE LOAD C----564300000000 CVTVAoiLnu ==t= = 214 5.3.03°. 3 (cid:2)VC VF CHVAoNutGE ---000...864 CHANGE (V) LOAD C----654355550000 CHVAoNutGE CVTVAoiLnu ==t= = 234 533.3°..03 VC V(cid:2)F --00..0116 CHANGE (V) -1.0 -700 -750 -0.16 0 50 100 150 200 250 300 350 400 0 50 100 150 200 250 300 TIME ((cid:2)S) TIME ((cid:2)S) Figure 4. Load Transient Response Figure 5. Load Transient Response 3.5 300 3.0 250 IL = 1 mA V) GE (V) 2.5 IL = 250 mA GE (m 200 TA 2.0 TA L L O O 150 V V T 1.5 T U U TP PO 100 U 1.0 O O R D 50 0.5 0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 1 10 100 1000 INPUT VOLTAGE (V) IO, OUTPUT CURRENT (mA) Figure 6. Output Voltage versus Input Voltage Figure 7. Dropout Voltage versus Output Current www.onsemi.com 5

MC33275, NCV33275 300 12 250 10 V) IL = 300 mA m E ( 200 8 G OLTA 150 IL = 250 mA (mA) 6 IL = 300 mA V d POUT 100 IL = 100 mA Ign 4 RO IL = 100 mA D 50 2 IL = 10 mA IL = 50 mA 0 0 -40 0 25 85 0 1 2 3 4 5 6 7 8 TEMPERATURE (°C) Vin (VOLTS) Figure 8. Dropout Voltage versus Temperature Figure 9. Ground Pin Current versus Input Voltage 8 2.5 7 IL = 250 mA 2.495 IO = 0 6 2.49 A) 5 LTS) IO = 250 mA m O ( 4 V 2.485 d ( gn ut I 3 IL = 100 mA Vo 2.48 2 IL = 50 mA 2.475 1 0 2.47 -40 -20 0 20 40 60 80 100 120 140 -40 0 25 85 TA (°C) TEMPERATURE (°C) Figure 10. Ground Pin Current versus Figure 11. Output Voltage versus Ambient Ambient Temperature Temperature (Vin = Vout + 1V) www.onsemi.com 6

MC33275, NCV33275 2.5 2.495 IO = 0 2.49 S) OLT 2.485 IO = 250 mA V ( ut 2.48 o V 2.475 2.47 2.465 -40 0 25 85 TEMPERATURE (°C) Figure 12. Output Voltage versus Ambient Temperature (V = 12 V) in 70 60 IL = 10 mA 50 IL = 1 mA 40 B d 30 20 10 0 0.1 1 10 100 FREQUENCY (kHz) Figure 13. Ripple Rejection 70 60 IL = 100 mA 50 IL = 250 mA 40 B d 30 20 10 0 0.1 1 10 100 FREQUENCY (kHz) Figure 14. Ripple Rejection www.onsemi.com 7

MC33275, NCV33275 APPLICATIONS INFORMATION Vin Vout Cin Cout LOAD GND Figure 15. Typical Application Circuit The MC33275 regulators are designed with internal 100 current limiting and thermal shutdown making them Vout = 3.0 V user−friendly. Figure 15 is a typical application circuit. The Cout = 1.0 (cid:2)F Cin = 1.0 (cid:2)F output capability of the regulator is in excess of 300 mA, with a typical dropout voltage of less than 260 mV. Internal m) 10 h protective features include current and thermal limiting. R (o ES Stable Region EXTERNAL CAPACITORS These regulators require only a 0.33 (cid:2)F (or greater) 1.0 capacitance between the output and ground for stability for 1.8 V, 2.5 V, 3.0 V, and 3.3 V output voltage options. Output voltage options of 5.0 V require only 0.22 (cid:2)F for stability. 0.1 The output capacitor must be mounted as close as possible 0 50 100 150 200 250 300 to the MC33275. If the output capacitor must be mounted LOAD CURRENT (mA) further than two centimeters away, then a larger value of Figure 16. ESR for V = 3.0V out output capacitor may be required for stability. A value of 0.68 (cid:2)F or larger is recommended. Most type of aluminum, Applications should be tested over all operating conditions to insure stability. tantalum, or multilayer ceramic will perform adequately. THERMAL PROTECTION Solid tantalums or appropriate multilayer ceramic capacitors are recommended for operation below 25°C. An Internal thermal limiting circuitry is provided to protect the integrated circuit in the event that the maximum junction input bypass capacitor is recommended to improve transient temperature is exceeded. When activated, typically at response or if the regulator is connected to the supply input 150°C, the output is disabled. There is no hysteresis built filter with long wire lengths, more than 4 inches. This will into the thermal protection. As a result the output will appear reduce the circuit’s sensitivity to the input line impedance at high frequencies. A 0.33 (cid:2)F or larger tantalum, mylar, to be oscillating during thermal limit. The output will turn off until the temperature drops below the 150°C then the ceramic, or other capacitor having low internal impedance output turns on again. The process will repeat if the junction at high frequencies should be chosen. The bypass capacitor increases above the threshold. This will continue until the should be mounted with shortest possible lead or track existing conditions allow the junction to operate below the length directly across the regulator’s input terminals. temperature threshold. Figure 16 shows the ESR that allows the LDO to remain Thermal limit is not a substitute for proper stable for various load currents. heatsinking. The internal current limit will typically limit current to 450 mA. If during current limit the junction exceeds 150°C, the thermal protection will protect the device also. Current limit is not a substitute for proper heatsinking. OUTPUT NOISE In many applications it is desirable to reduce the noise present at the output. Reducing the regulator bandwidth by increasing the size of the output capacitor will reduce the noise. www.onsemi.com 8

MC33275, NCV33275 W) 180 1.6 N ( E, O ANCCW) 160 PD(max) for TA = 50°C 1.4 PATI ESIST°AIR ( 140 2.0 oz. Copper 1.2 DISSI AL R−TO− 120 MSiizneim Puamd ÎÎÎÎL ÎÎ 1.0 WER MN O , THERJAJUNCTIO 18000 LÎÎÎÎÎÎ 00..68 XIMUM P R(cid:3) R(cid:3)JA MA 60 0.4 , D 0 5.0 10 15 20 25 30 P L, LENGTH OF COPPER (mm) Figure 17. SOT−223 Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length W) E, 100 PD(max) for TA = 50°C 1.6 ON ( NCW) 90 1.4 ATI AC P L RESIST°TO−AIR ( 7800 MSiizneim Puamd 2.ÎÎ0 ozÎÎ. CLoÎÎpperÎÎ11..02 ER DISSI A− L W MN O , THERJAJUNCTIO 5600 ÎÎÎÎ00..68 XIMUM P R(cid:3) R(cid:3)JA A M 40 0.4 , D 0 5.0 10 15 20 25 30 P L, LENGTH OF COPPER (mm) Figure 18. DPAK Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length W) TANCE,°CW) 117500 PD(max) for TA = 50°C 32..28 PATION ( ESISAIR ( 130 2.4 DISSI L RTO− 110 GÎraphÎ RepÎresenÎts SyÎmmeÎtrical ÎLayouÎt 2.0 ER A− W , THERMAUNCTION 7900 R(cid:3)JA ÎÎL ÎÎC2.o0Lp opÎÎze.r ÎÎÎÎÎÎ3ÎÎ.0 ÎÎ11..26 MUM PO R(cid:3)JJ 50 mm 0.8 AXI M 30 0.4 , D 0 10 20 30 40 50 P L, LENGTH OF COPPER (mm) Figure 19. SOP−8 Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length www.onsemi.com 9

MC33275, NCV33275 ORDERING INFORMATION Operating Temperature Device VO Typ (V) Range, Tolerance Case Package Marking Shipping† MC33275D−2.5G 751 SOIC−8 27525 98 Units/Rail (Pb−Free) MC33275D−2.5R2G 751 SOIC−8 27525 2500/Tape & Reel (Pb−Free) MC33275DT−2.5G 369A DPAK 27525G 75 Units/Rail (Pb−Free) 2.5 V MC33275DT−2.5RKG (Fixed Voltage) 369A DPAK 27525G 2500/Tape & Reel (Pb−Free) MC33275MN−2.5R2G 1% Tolerance 488AF DFN8 27525 3000/Tape & Reel at TA = 25°C (Pb−Free) MC33275ST−2.5T3G 318E SOT−223 27525 4000/Tape & Reel (Pb−Free) MC33275D−3.0G 751 SOIC−8 27530 98 Units/Rail (Pb−Free) MC33275D−3.0R2G 2% Tolerance at 751 SOIC−8 27530 2500/Tape & Reel TJ from −40°C to +125°C (Pb−Free) MC33275DT−3.0G 369A DPAK 27530G 75 Units/Rail (Pb−Free) 3.0 V MC33275DT−3.0RKG (Fixed Voltage) 369A DPAK 27530G 2500/Tape & Reel (Pb−Free) MC33275MN−3.0R2G 488AF DFN8 27530 3000/Tape & Reel (Pb−Free) MC33275ST−3.0T3G 318E SOT−223 27530 4000/Tape & Reel (Pb−Free) MC33275D−3.3G 751 SOIC−8 27533 98 Units/Rail (Pb−Free) MC33275D−3.3R2G 1% Tolerance 751 SOIC−8 27533 2500/Tape & Reel at TA = 25°C (Pb−Free) MC33275DT−3.3G 369A DPAK 27533G 75 Units/Rail (Pb−Free) MC33275DT−3.3RKG 3.3 V 369A DPAK 27533G 2500/Tape & Reel (Fixed Voltage) (Pb−Free) MC33275ST−3.3T3G 2% Tolerance at 318E SOT−223 27533 4000/Tape & Reel TJ from −40°C to +125°C (Pb−Free) NCV33275ST3.3T3G* 1% Tolerance 318E SOT−223 27533 4000/Tape & Reel at TA = 25°C (Pb−Free) MC33275MN−3.3R2G 488AF DFN−8 27330 3000/Tape & Reel (Pb−Free) MC33275D−5.0G 1% Tolerance 751 SOIC−8 27550 98 Units/Rail at TA = 25°C (Pb−Free) MC33275D−5.0R2G 751 SOIC−8 27550 2500/Tape & Reel (Pb−Free) MC33275DT−5.0G 369A DPAK 27550G 75 Units/Rail 5.0 V (Pb−Free) (Fixed Voltage) MC33275DT−5.0RKG 369A DPAK 27550G 2500/Tape & Reel 2% Tolerance at TJ from −40°C to +125°C (Pb−Free) MC33275MN−5.0R2G 1% Tolerance 488AF DFN−8 27550 3000/Tape & Reel at TA = 25°C (Pb−Free) MC33275ST−5.0T3G 318E SOT−223 27550 4000/Tape & Reel (Pb−Free) NCV33275ST−5.0T3G* 318E SOT−223 27550 4000/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable www.onsemi.com 10

MC33275, NCV33275 PACKAGE DIMENSIONS SOT−223 (TO−261) ST SUFFIX CASE 318E−04 ISSUE N D b1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCH. 4 MILLIMETERS INCHES HE E DAIM 1M.5IN0 N1.O6M3 M1.A75X 0M.0I6N0 0N.O06M4 0M.0A6X8 1 2 3 A1 0.02 0.06 0.10 0.001 0.002 0.004 b 0.60 0.75 0.89 0.024 0.030 0.035 b1 2.90 3.06 3.20 0.115 0.121 0.126 c 0.24 0.29 0.35 0.009 0.012 0.014 b D 6.30 6.50 6.70 0.249 0.256 0.263 e1 E 3.30 3.50 3.70 0.130 0.138 0.145 e e 2.20 2.30 2.40 0.087 0.091 0.094 e1 0.85 0.94 1.05 0.033 0.037 0.041 L 0.20 −−− −−− 0.008 −−− −−− C L1 1.50 1.75 2.00 0.060 0.069 0.078 (cid:2) A H(cid:2)E 60.7°0 7.−00 71.03°0 0.206°4 0.2−76 01.208°7 0.08 (0003) A1 L L1 SOLDERING FOOTPRINT* 3.8 0.15 2.0 0.079 6.3 2.3 2.3 0.248 0.091 0.091 2.0 0.079 (cid:4) (cid:5) 1.5 mm SCALE 6:1 0.059 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 11

MC33275, NCV33275 PACKAGE DIMENSIONS SOIC−8 NB D SUFFIX CASE 751−07 ISSUE AK NOTES: −X− 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. A 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) 8 5 PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR B S 0.25 (0.010) M Y M PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL 1 IN EXCESS OF THE D DIMENSION AT −Y− 4 K 6. 7M5A1X−I0M1U TMH RMUA T7E51R−IA0L6 CAROEN DOIBTSIOONL.ETE. NEW STANDARD IS 751−07. G MILLIMETERS INCHES DIM MIN MAX MIN MAX A 4.80 5.00 0.189 0.197 C NX 45(cid:3) B 3.80 4.00 0.150 0.157 SEATING C 1.35 1.75 0.053 0.069 PLANE D 0.33 0.51 0.013 0.020 −Z− G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 0.10 (0.004) J 0.19 0.25 0.007 0.010 H D M J K 0.40 1.27 0.016 0.050 M 0 (cid:3) 8 (cid:3) 0 (cid:3) 8 (cid:3) N 0.25 0.50 0.010 0.020 0.25 (0.010)M Z Y S X S S 5.80 6.20 0.228 0.244 SOLDERING FOOTPRINT* 1.52 0.060 7.0 4.0 0.275 0.155 0.6 1.270 0.024 0.050 (cid:4) (cid:5) mm SCALE 6:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 12

MC33275, NCV33275 PACKAGE DIMENSIONS 8 PIN DFN, 4x4 MN SUFFIX CASE 488AF ISSUE C D A NOTES: B L L 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED L1 TERMINAL AND IS MEASURED BETWEEN ÉÉ 0.15 AND 0.30MM FROM TERMINAL TIP. PIN ONE E DETAIL A 4. COPLANARITY APPLIES TO THE EXPOSED REFERENCE ÉÉ OPTIONAL PAD AS WELL AS THE TERMINALS. 2X 0.15 C ÉÉ CONSTRUCTIONS 5. DCEOTNASILTSR UAC ATNIODN BS S FHOORW T EORPMTIIONNAALSL. MILLIMETERS 2X 0.15 C DIM MIN MAX TOP VIEW A3 A 0.80 1.00 EXPOSEDÇ Cu ÇMÇOLD CMPD ÉÉ A1 0.00 0.05 A3 0.20 REF DETAIL B ÉÉÉ ÉÇÉÇ b 0.25 0.35 0.10 C D 4.00 BSC ÇÇÇÇ A A1 D2 1.91 2.21 E 4.00 BSC 8X 0.08 C (A3) DETAIL B E2 2.09 2.39 ALTERNATE e 0.80 BSC NOTE 4 A1 C SEATING CONSTRUCTIONS K 0.20 −−− SIDE VIEW PLANE L 0.30 0.50 L1 −−− 0.15 D2 SOLDERING FOOTPRINT* DETAIL A 8X L Ç1 ÇÇÇ4 2.21 8X 0.63 E2 ÇÇÇÇ K 8 5 8Xb 4.30 2.39 e 0.10 C A B PACKAGE OUTLINE 0.05 C NOTE 3 BOTTOM VIEW 8X 0.35 0.80 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 13

MC33275, NCV33275 PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE E NOTES: A 1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. E C 2.CONTROLLING DIMENSION: INCHES. A 3.THERMAL PAD CONTOUR OPTIONAL WITHIN DI- b3 B MENSIONS b3, L3 and Z. c2 4.DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL 4 NOT EXCEED 0.006 INCHES PER SIDE. L3 Z Z 5.DIMENSIONS D AND E ARE DETERMINED AT THE D DETAIL A H 6.DOAUTTUEMRSM OA SATN EDX BT RAERME EDSE OTEFR TMHIEN EPDLA ASTT DICA TBUOMDY. 1 2 3 PLANE H. 7.OPTIONAL MOLD FEATURE. L4 INCHES MILLIMETERS NOTE 7 b2 c BOTTOM VIEW BOTTOM VIEW DIM MIN MAX MIN MAX A 0.086 0.094 2.18 2.38 e SIDE VIEW ALTERNATE A1 0.000 0.005 0.00 0.13 b CONSTRUCTION b 0.025 0.035 0.63 0.89 0.005 (0.13) M C H b2 0.028 0.045 0.72 1.14 TOP VIEW b3 0.180 0.215 4.57 5.46 c 0.018 0.024 0.46 0.61 L2 GPLAAUNGEE C SPELAATNIENG cD2 00..203158 00..204254 50..9476 60..2621 E 0.250 0.265 6.35 6.73 e 0.090 BSC 2.29 BSC L H 0.370 0.410 9.40 10.41 A1 L 0.055 0.070 1.40 1.78 L1 L1 0.114 REF 2.90 REF DETAIL A L2 0.020 BSC 0.51 BSC ROTATED 90(cid:2) CW L3 0.035 0.050 0.89 1.27 L4 −−− 0.040 −−− 1.01 Z 0.155 −−− 3.93 −−− SOLDERING FOOTPRINT* 6.20 3.00 0.244 0.118 2.58 0.102 5.80 1.60 6.17 0.228 0.063 0.243 (cid:4) (cid:5) mm SCALE 3:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative www.onsemi.com MC33275/D 14

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: NCV33275ST-5.0T3 NCV33275ST5.0T3G MC33275MN-2.5R2G MC33275MN-3.0R2G MC33275D-2.5 MC33275D-2.5G MC33275D-2.5R2 MC33275D-2.5R2G MC33275D-3.0 MC33275D-3.0G MC33275D-3.0R2 MC33275D-3.0R2G MC33275D-3.3 MC33275D-3.3G MC33275D-3.3R2 MC33275D-3.3R2G MC33275D-5.0 MC33275D-5.0G MC33275D-5.0R2 MC33275D-5.0R2G MC33275DT-2.5 MC33275DT-2.5G MC33275DT-2.5RK MC33275DT-2.5RKG MC33275DT-3.0 MC33275DT-3.0G MC33275DT-3.0RK MC33275DT-3.0RKG MC33275DT- 3.3 MC33275DT-3.3G MC33275DT-3.3RK MC33275DT-3.3RKG MC33275DT-5.0 MC33275DT-5.0G MC33275DT- 5.0RK MC33275DT-5.0RKG MC33275MN-3.3R2G MC33275MN-5.0R2 MC33275MN-5.0R2G MC33275ST-2.5T3 MC33275ST-2.5T3G MC33275ST-3.0T3 MC33275ST-3.0T3G MC33275ST-3.3T3 MC33275ST-3.3T3G MC33275ST-5.0T3 MC33275ST-5.0T3G NCV33275ST3.3T3G