MC33078, MC33079, NCV33078, NCV33079 Low Noise Dual/Quad Operational Amplifiers The MC33078/9 series is a family of high quality monolithic amplifiers employing Bipolar technology with innovative high http://onsemi.com performance concepts for quality audio and data signal processing applications. This family incorporates the use of high frequency PNP input transistors to produce amplifiers exhibiting low input voltage MARKING DIAGRAMS noise with high gain bandwidth product and slew rate. The all NPN output stage exhibits no deadband crossover distortion, large output voltage swing, excellent phase and gain margins, low open loop high DUAL 8 frequency output impedance and symmetrical source and sink AC frequency performance. PDIP−8 MC33078P The MC33078/9 family offers both dual and quad amplifier P SUFFIX AWL versions and is available in the plastic DIP and SOIC packages (P and 8 CASE 626 YYWWG D suffixes). 1 1 Features • Dual Supply Operation: (cid:2)5.0 V to (cid:2)18 V 8 • (cid:3) SOIC−8 33078 Low Voltage Noise: 4.5 nV/ Hz 8 D SUFFIX ALYW • Low Input Offset Voltage: 0.15 mV 1 CASE 751 (cid:2) • Low T.C. of Input Offset Voltage: 2.0 (cid:2)V/°C 1 • Low Total Harmonic Distortion: 0.002% QUAD • High Gain Bandwidth Product: 16 MHz • High Slew Rate: 7.0 V/(cid:2)s 14 • PDIP−14 MC33079P High Open Loop AC Gain: 800 @ 20 kHz 14 P SUFFIX • Excellent Frequency Stability CASE 646 AWLYYWWG 1 • 1 Large Output Voltage Swing: +14.1 V/ −14.6 V • ESD Diodes Provided on the Inputs • NCV Prefix for Automotive and Other Applications Requiring 14 Unique Site and Control Change Requirements SOIC−14 MC33079DG • 14 D SUFFIX These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS AWLYWW CASE 751A 1 Compliant 1 VCC R2 D1 Q4 A = Assembly Location Q9 WL, L = Wafer Lot Q3 Q5 D3 Q11 YY, Y = Year Neg Pos R7 WW, W = Work Week C2 G or (cid:2) = Pb−Free Package Q3 J1 Amplifier Biasing Q8 D4 C3 R9 Q6 ORDERING INFORMATION Q12 Vout See detailed ordering and shipping information in the package Q2 D2 Q10 dimensions section on page 10 of this data sheet. R6 R4 Z1 Q1 Q7 R1 C1 R3 R5 VEE Figure 1. Representative Schematic Diagram (Each Amplifier) © Semiconductor Components Industries, LLC, 2011 1 Publication Order Number: November, 2011 − Rev. 9 MC33078/D

MC33078, MC33079, NCV33078, NCV33079 PIN CONNECTIONS DUAL QUAD CASE 626/751 CASE 646/751A Output 1 1 8 VCC Output 1 1 14 Output 4 - 2 (cid:5) (cid:5)13 2 + 1 7 Output 2 Inputs 1 (cid:4)1 4(cid:4) Inputs 4 Inputs 1 3 12 3 6 - VCC 4 11 VEE VEE 4 2 + 5 Inputs 2 Inputs 2 5 (cid:4)(cid:5)2 3(cid:4)(cid:5)10 Inputs 3 6 9 (Dual, Top View) Output 2 7 8 Output 3 (Quad, Top View) MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage (VCC to VEE) VS +36 V Input Differential Voltage Range VIDR Note 1 V Input Voltage Range VIR Note 1 V Output Short Circuit Duration (Note 2) tSC Indefinite sec Maximum Junction Temperature TJ +150 °C Storage Temperature Tstg −(cid:2)60 to +150 °C ESD Protection at any Pin Vesd V MC33078/NCV33078 − Human Body Model 600 − Machine Model 200 MC33079/NCV33079 − Human Body Model 550 − Machine Model 150 Maximum Power Dissipation PD Note 2 mW Operating Temperature Range TA −40 to +85 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Either or both input voltages must not exceed the magnitude of VCC or VEE. 2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (see Figure 2). http://onsemi.com 2

MC33078, MC33079, NCV33078, NCV33079 DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V, TA = 25°C, unless otherwise noted.) Characteristics Symbol Min Typ Max Unit Input Offset Voltage (RS = 10 (cid:3), VCM = 0 V, VO = 0 V) |VIO| mV (MC33078)TA = +25°C − 0.15 2.0 TA = −40° to +85°C − − 3.0 (MC33079)TA = +25°C − 0.15 2.5 TA = −40° to +85°C − − 3.5 Average Temperature Coefficient of Input Offset Voltage (cid:4)VIO/(cid:4)T − 2.0 − (cid:2)V/°C RS = 10 (cid:3), VCM = 0 V, VO = 0 V, TA = Tlow to Thigh Input Bias Current (VCM = 0 V, VO = 0 V) IIB nA TA = +25°C − 300 750 TA = −40° to +85°C − − 800 Input Offset Current (VCM = 0 V, VO = 0 V) IIO nA TA = +25°C − 25 150 TA = −40° to +85°C − − 175 Common Mode Input Voltage Range ((cid:4)VIO = 5.0 mV, VO = 0 V) VICR ±13 ±14 − V Large Signal Voltage Gain (VO = (cid:2)10 V, RL = 2.0 k(cid:3)) AVOL dB TA = +25°C 90 110 − TA = −40° to +85°C 85 − − Output Voltage Swing (VID = (cid:2)1.0V) V RL = 600 (cid:3) VO(cid:2)+ − +10.7 − RL = 600 (cid:3) VO(cid:2)− − −11.9 − RL = 2.0 k(cid:3) VO(cid:2)+ +13.2 +13.8 − RL = 2.0 k(cid:3) VO(cid:2)− − −13.7 −13.2 RL = 10 k(cid:3) VO(cid:2)+ +13.5 +14.1 − RL = 10 k(cid:3) VO(cid:2)− − −14.6 −14 Common Mode Rejection (Vin = ±13V) CMR 80 100 − dB Power Supply Rejection (Note 3) PSR 80 105 − dB VCC/VEE = +15 V/ −15 V to +5.0 V/ −5.0 V Output Short Circuit Current (VID = 1.0 V, Output to Ground) ISC mA Source +15 +29 − Sink −20 −37 − Power Supply Current (VO = 0 V, All Amplifiers) ID mA (MC33078) TA = +25°C − 4.1 5.0 (MC33078) TA = −40° to +85°C − − 5.5 (MC33079) TA = +25°C − 8.4 10 (MC33079) TA = −40° to +85°C − − 11 3. Measured with VCC and VEE differentially varied simultaneously. http://onsemi.com 3

MC33078, MC33079, NCV33078, NCV33079 AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V, TA = 25°C, unless otherwise noted.) Characteristics Symbol Min Typ Max Unit Slew Rate (Vin = −10 V to +10 V, RL = 2.0 k(cid:3), CL = 100 pF AV = +1.0) SR 5.0 7.0 − V/(cid:2)s Gain Bandwidth Product (f = 100 kHz) GBW 10 16 − MHz Unity Gain Bandwidth (Open Loop) BW − 9.0 − MHz Gain Margin (RL = 2.0 k(cid:3)) Am dB CL = 0 pF − −11 − CL = 100 pF − −(cid:2)6.0 − Phase Margin (RL = 2.0 k(cid:3)) (cid:5)m Deg CL = 0 pF − 55 − CL = 100 pF − 40 − Channel Separation (f = 20 Hz to 20 kHz) CS − −120 − dB Power Bandwidth (VO = 27 Vpp, RL = 2.0 k(cid:3), THD (cid:2) 1.0%) BWp − 120 − kHz Total Harmonic Distortion THD − 0.002 − % (RL = 2.0 k(cid:3), f = 20 Hz to 20 kHz, VO = 3.0 Vrms, AV = +1.0) Open Loop Output Impedance (VO = 0 V, f = 9.0 MHz) |ZO| − 37 − (cid:3) Differential Input Resistance (VCM = 0 V) Rin − 175 − k(cid:3) Differential Input Capacitance (VCM = 0 V) Cin − 12 − pF Equivalent Input Noise Voltage (RS = 100 (cid:3), f = 1.0 kHz) en − 4.5 − nV/√Hz Equivalent Input Noise Current (f = 1.0 kHz) in − 0.5 − Hz√pA/ W)2400 800 m SSIPATION (21060000 MC33078P & MC33079P ENT (nA) 600 VTAC M= =25 °0C V R DI MC33079D URR OWE1200 AS C 400 UM P 800 UT BI MAXIM 400 MC33078D (cid:3), INPB 200 (cid:3), D II P 0 0 -55 -40 -20 0 20 40 60 80 100 120 140 160 0 5.0 10 15 20 TA, AMBIENT TEMPERATURE (°C) VCC, | VEE |, SUPPLY VOLTAGE (V) Figure 2. Maximum Power Dissipation Figure 3. Input Bias Current versus versus Temperature Supply Voltage 1000 2.0 VCC = +15 V NT (nA) 800 VVVCECECM === -+011 V55 VV GE (mV) 1.0 RVVECSEM = = =1 -001 (cid:3)V5 V Unit 1 RE TA AV = +1 CUR 600 VOL Unit 2 AS ET 0 T BI 400 FFS U O NP UT Unit 3 (cid:3), IB 200 NP -1.0 II (cid:3), IO VI 0 -2.0 -55 -25 0 25 50 75 100 125 -55 -25 0 25 50 75 100 125 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 4. Input Bias Current versus Temperature Figure 5. Input Offset Voltage versus Temperature http://onsemi.com 4

MC33078, MC33079, NCV33078, NCV33079 600 V) VCC -0 T (nA) 500 VVTACE EC= ==2 5-+°11C55 VV E RANGE ( VVCCCC --01..50 +VCM VVCEEC = = - 3+.30. 0V V to t o- 1+51 5V V URREN 400 OLTAG VCC -1.5 Voltage (cid:4)VOV I=O 0= V5.0 mV AS C 300 DE V Range UT BI 200 N MO VEE +1.5 NP MO VEE +1.0 I(cid:3), IIB100 T COM VEE +0.5 -VCM 0 PU VEE +0 -15 -10 -(cid:2)5.0 0 5.0 10 15 N -(cid:2)55 -(cid:2)25 0 25 50 75 100 125 VCM, COMMON MODE VOLTAGE (V) , ICR TA, AMBIENT TEMPERATURE (°C) VI Figure 6. Input Bias Current versus Figure 7. Input Common Mode Voltage Common Mode Voltage Range versus Temperature mA) 50 VOLTAGE (V) VVCCCC --13..00 -55°C 25°C VVCEEC == - +1155 V V T CURRENT ( 40 Sink VVRVCEILD EC< = ==1 1 0- .+0101 5 (cid:3)V5 V V ATION VCC -5.0 125°C CIRCUI 30 Source ATUR VEE +5.0 125°C ORT PUT S VEE +3.0 25°C UT SH 20 T P OU -55°C UT , Vsat VEE +1.00 1.0 2.0 3.0 4.0 (cid:3)(cid:4)|, OSC 10-(cid:2)55 -(cid:2)25 0 25 50 75 100 125 RL, LOAD RESISTANCE TO GROUND (k(cid:3)) | I TA, AMBIENT TEMPERATURE (°C) Figure 8. Output Saturation Voltage versus Figure 9. Output Short Circuit Current Load Resistance to Ground versus Temperature 10 160 mA) 89..00 ±15 V ±10 V VRVCOL M == =∞0 0V V TION (dB) 140 (cid:4) VCM -+ADM (cid:4) VO ENT ( 7.0 ±5.0 V EJEC 120 CMR = 20Log (cid:4) VCM × ADM RR 6.0 MC33079 E R 100 (cid:4) VO U D PLY C 45..00 ±15 V ±10 V MC33078 N MO 80 VCC = +15 V UP ±5.0 V MO VEE = -15 V I(cid:3)(cid:4), SCC 123...000 ±4.0 V Supply Voltages MR, COM 6400 VT(cid:4)ACV M=C M=25 =0° CV±1.5 V C 0 20 -(cid:2)55 -(cid:2)25 0 25 50 75 100 125 100 1.0 k 10 k 100 k 1.0 M 10 M TA, AMBIENT TEMPERATURE (°C) f, FREQUENCY (Hz) Figure 10. Supply Current versus Figure 11. Common Mode Rejection Temperature versus Frequency http://onsemi.com 5

MC33078, MC33079, NCV33078, NCV33079 140 30 N (dB) 120 +PSR = 20Log (cid:4)V(cid:4)OV/CACDM -PSR = 20Log (cid:4)V(cid:4)OV/CACDM T (MHz) RCLL == 100 p kF(cid:3) UPPLY REJECTIO 1860000 -PSR+PSR A-+DMV(cid:4)EVECC (cid:4)VO DWIDTH PRODUC 2100 fT A= =1 0205 °kCHz R S AN E 40 B OW VCC = +15 V AIN PSR, P 200 TVAE E= =2 5-°1C5 V GWB, G 0 100 1.0 k 10 k 100 k 1.0 M 10 M 0 5.0 10 15 20 f, FREQUENCY (Hz) VCC |VEE| , SUPPLY VOLTAGE (V) Figure 12. Power Supply Rejection Figure 13. Gain Bandwidth Product versus Frequency versus Supply Voltage MHz) 20 20 TA = 25°C VO + RODUCT ( 15 GE (Vp) 1150 RL = 10 k(cid:3)RL = 2.0 k(cid:3) WIDTH P 10 T VOLTA 5.00 D U WB, GAIN BAN 5.0 VVfRC =CELL EC1== 0 ==100 0 - p+k 1kF1H5(cid:3)5 zV V V , OUTPO---511.005 RL = 10R Lk (cid:3)= 2.0 k(cid:3) G VO - 0 -20 -55 -25 0 25 50 75 100 125 0 5.0 10 15 20 TA, AMBIENT TEMPERATURE (°C) VCC |VEE| , SUPPLY VOLTAGE (V) Figure 14. Gain Bandwidth Product Figure 15. Maximum Output Voltage versus Temperature versus Supply Voltage 35 110 30 N (dB) Rf ≤L =1 0 2 .H0z k(cid:3) )p GAI (cid:4)VO = 2/3 (VCC -VEE) E (Vp 25 AGE 100 TA = 25°C LTAG 20 VOLT O P T V 15 VCC = +15 V OO OUTPU 10 VRAVCL C== =+2 .1-0.1 0k5(cid:3) V OPEN L 90 ,O THD ≤ 1.0% (cid:4), L V 5.0 TA = 25°C (cid:3)(cid:5)VO A 0 80 10 100 1.0 k 10 k 100 k 1.0 M 10 M 0 5.0 10 15 20 f, FREQUENCY (Hz) VCC |VEE| , SUPPLY VOLTAGE (V) Figure 16. Output Voltage versus Frequency Figure 17. Open Loop Voltage Gain versus Supply Voltage http://onsemi.com 6

MC33078, MC33079, NCV33078, NCV33079 110 B) 50 GE GAIN (d 105 VVRf ≤CEL E C=1 =0 2= .H- 0 1+z k51(cid:3) 5V V ΩNCE ((cid:3)(cid:4)) 40 VVTVACEO EC == == 20 5- +V°1C155 V V OLTA (cid:4)VO = -10 V to +10 V EDA 30 OP V 100 T IMP LO PU 20 A(cid:3)(cid:5)(cid:4), OPEN VOL 95 | Z(cid:3)|, OUTO10 AV = 1000 AV = 100 AV = 10 AV = 1.0 90 0 -55 -25 0 25 50 75 100 125 1.0 k 10 k 100 k 1.0 M 10 M TA, AMBIENT TEMPERATURE (°C) f, FREQUENCY (Hz) Figure 18. Open Loop Voltage Gain Figure 19. Output Impedance versus Temperature versus Frequency 160 1.0 Drive Channel %) ATION (dB)115400 MMCC3333007798 VVR(cid:4)CELV EC=O ==D2 .-+=011 2K550 (cid:3) VV Vpp STORTION ( 0.1 VVVTACEO EC == == 21 5-+.0°11 C5V5 rVVms +- 2.0V kO(cid:3) PAR TA = 25°C C DI HANNEL SE113200 100 (cid:3) 1-+0 k(cid:3) VOM L HARMONI 0.01 CS, C110 100 (cid:3) CS = 20 Log (cid:4)VOA D, TOTA 100 Measurement Channel (cid:4)VOM TH 0.001 10 100 1.0 k 10 k 100 k 10 100 1.0 k 10 k 100 k f, FREQUENCY (Hz) f, FREQUENCY (Hz) Figure 20. Channel Separation Figure 21. Total Harmonic Distortion versus Frequency versus Frequency 1.0 10 ON (%) 0.5 VVf =CE EC2 .= 0= - k 1+H51z 5V V AV = 1000 9.0 VTAin == 225/3° C(VCC -VEE) Falling STORTI 0.1 TA = 25°C AV = 100 μV/(cid:5) s) 78..00 Rising C DI RA -10 k(cid:3) TE ( 6.0 TOTAL HARMONI 0.000..000551 AAVV = = 1 1.00 Vin + 2.0V kO(cid:3) SR, SLEW RA 5342....0000 (cid:4)Vin -+ 2k(cid:3).0VO D, 1.0 H T 0.001 0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 4 6 8 10 12 14 16 18 20 VO, OUTPUT VOLTAGE (Vrms) VCC |VEE| , SUPPLY VOLTAGE (V) Figure 22. Total Harmonic Distortion Figure 23. Slew Rate versus Supply Voltage versus Output Voltage http://onsemi.com 7

MC33078, MC33079, NCV33078, NCV33079 10 120 0 VCC = +15 V dB) VCC = +15 V μ(cid:3)s) 8.0 V(cid:4)EVEin = = - 2105 VV Falling GE GAIN (100 VRTAEL E== =22 5.-0°1 Ck5(cid:3) V 45 REES) SR, SLEW RATE (V/ 64..00 (cid:4)Vin -+ 2k(cid:3).R0VisOing (cid:3)(cid:3), OPEN LOOP VOLTAOL 86420000 Gain Phase 91035φ, EXCESS PHASE (DEG V A 2.0 0 180 -55 -25 0 25 50 75 100 125 1.0 10 100 1.0 k 10 k 100 k 1.0 M 10 M TA, AMBIENT TEMPERATURE (°C) f, FREQUENCY (Hz) Figure 24. Slew Rate versus Temperature Figure 25. Voltage Gain and Phase versus Frequency 14 0 100 GAIN MARGIN (dB) 811.200 Vin 2-+.0 k(cid:3) CVLO 25°C -55°C Phase 123000 GIN (DEGREES) HOOT (%) 8600 (cid:4)Vin -+ CLVO 1225-5°(cid:2)5°CC5°C A(cid:3), OPEN LOOP m642...000 VVVCEOEC = == 0 -+ V1155 VV125°C 125°2C5°C -55°C Gain 456000φ, PHASE MARm os, OVERS 4200 VV(cid:4)CEVECin == = -+ 1110550 V VmV 0 70 0 1 10 100 1000 10 100 1.0 k 10 k CL, OUTPUT LOAD CAPACITANCE (pF) CL, OUTPUT LOAD CAPACITANCE (pF) Figure 26. Open Loop Gain Margin and Figure 27. Overshoot versus Output Phase Margin versus Load Capacitance Load Capacitance √PUT REFERRED NOISE VOLTAGE ((cid:3)(cid:3)(cid:3)(cid:3))nV/Hz185321853210.....00000000000 VTVACE EC=CV ==u2o r 5l-+rte°a11Cng55te VV 100.1√PUT REFERRED NOISE CURRENT ()pA/Hz √, REFERRED NOISE VOLTAGE (V)nV/Hzn1011100.0000 VfTVV A=CEn ( EC=1to .==20ta 5 -+kl)°11H C=55z V(cid:3)V(inRs)2(cid:2)(cid:4)(cid:2)en2(cid:2)(cid:4)(cid:2)4KTRS e(cid:3), INn 10 100 f, FREQ1U.E0 NkCY (Hz) 10 k 100 k i, INn 10 100 RS, SOU1.R0C kE RESIST1A0N kCE ((cid:3)) 100 k 1.0 M Figure 28. Input Referred Noise Voltage and Figure 29. Total Input Referred Noise Voltage Current versus Frequency versus Source Resistance http://onsemi.com 8

MC33078, MC33079, NCV33078, NCV33079 14 70 12 60 S) E Gain E N MARGIN (dB)861..000 RR12 +- VO Phase 543000 MARGIN (DEGR A , GAIm4.0 VRVCET EC= = =R -+11 1+55R VV2 20 PHASE AV = +100 , m 2.0 VO = 0 V 10φ 0 TA = 25°C 0 10 100 1.0 k 10 k 100 k RT, DIFFERENTIAL SOURCE RESISTANCE ((cid:3)) Figure 30. Phase Margin and Gain Margin versus Differential Source Resistance LTAGE (5.0 V/DIV) VVARCTAVCELL EC==== ==2-12 510.-+0°.0110 C k55p(cid:3) FVV OLTAGE (5.0 V/DIV) VARCTVAVCELL EC==== ==2+12 50.1-+0°0.11 0C k55p(cid:3) FVV O V T V UT U P P T T U U O (cid:3), OO V(cid:3), O V t, TIME (2.0 (cid:2)s/DIV) t, TIME (2.0 (cid:2)s/DIV) Figure 31. Inverting Amplifier Slew Rate Figure 32. Non−inverting Amplifier Slew Rate V) 0 V/DIV) VVRCEL EC= ==2 .-+011 k55(cid:3) VV 100 nV/DI VVBCEWEC === 0-+.11155 H VVz to 10 Hz LTAGE (5. CATAVL === 2+1501°0.0C pF OLTAGE ( TA = 25°C O V V E T S U OI UTP T N O U V(cid:3), O (cid:3), INP n e t, TIME (200 (cid:2)s/DIV) t, TIME (1.0 sec/DIV) Figure 33. Non−inverting Amplifier Overshoot Figure 34. Low Frequency Noise Voltage versus Time http://onsemi.com 9

MC33078, MC33079, NCV33078, NCV33079 0.1 (cid:2)F 10 (cid:3) 100 k(cid:3) - 2.0 k(cid:3) D.U.T. + 22 (cid:2)F 1/2 4.3 k(cid:3) + 4.7 (cid:2)F MC33078 Scope ×1 - 100 k(cid:3) Rin = 1.0 M(cid:3) Voltage Gain = 50,000 2.2 (cid:2)F 24.3 k(cid:3) 110 k(cid:3) 0.1 (cid:2)F Note: All capacitors are non−polarized. Figure 35. Voltage Noise Test Circuit (0.1 Hz to 10 Hz ) p−p ORDERING INFORMATION Device Package Shipping† MC33078DG 98 Units / Rail SOIC−8 MC33078DR2G (Pb−Free) 2500 / Tape & Reel NCV33078DR2G* MC33078P PDIP−8 MC33078PG PDIP−8 50 Units / Rail (Pb−Free) MC33079DG SOIC−14 55 Units / Rail (Pb−Free) MC33079DR2G SOIC−14 2500 / Tape & Reel NCV33079DR2G* (Pb−Free) MC33079P PDIP−14 MC33079PG PDIP−14 25 Units / Rail (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NCV devices are qualified for automotive use. http://onsemi.com 10

MC33078, MC33079, NCV33078, NCV33079 PACKAGE DIMENSIONS PDIP−8 N SUFFIX CASE 626−05 ISSUE M NOTES: D A 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. D1 2. CONTROLLING DIMENSION: INCHES. 3. DIMENSION E IS MEASURED WITH THE LEADS RE- E STRAINED PARALLEL AT WIDTH E2. 4. DIMENSION E1 DOES NOT INCLUDE MOLD FLASH. 8 5 5. ROUNDED CORNERS OPTIONAL. E1 INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX A −−−− −−−− 0.210 −−−− −−−− 5.33 1 4 A1 0.015 −−−− −−−− 0.38 −−−− −−−− b 0.014 0.018 0.022 0.35 0.46 0.56 C 0.008 0.010 0.014 0.20 0.25 0.36 NOTE 5 F c D 0.355 0.365 0.400 9.02 9.27 10.02 D1 0.005 −−−− −−−− 0.13 −−−− −−−− TOP VIEW E2 E 0.300 0.310 0.325 7.62 7.87 8.26 E1 0.240 0.250 0.280 6.10 6.35 7.11 END VIEW E2 0.300 BSC 7.62 BSC NOTE 3 E3 −−−− −−−− 0.430 −−−− −−−− 10.92 e 0.100 BSC 2.54 BSC e/2 A L 0.115 0.130 0.150 2.92 3.30 3.81 L A1 C SEATING PLANE E3 e 8Xb 0.010 M C A SIDE VIEW END VIEW http://onsemi.com 11

MC33078, MC33079, NCV33078, NCV33079 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK NOTES: −X− 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. A 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) 8 5 PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR B S 0.25 (0.010) M Y M PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL 1 IN EXCESS OF THE D DIMENSION AT −Y− 4 K 6. M75A1X−I0M1U TMH RMUA T7E51R−IA0L6 CAROEN DOIBTSIOONL.ETE. NEW STANDARD IS 751−07. G MILLIMETERS INCHES DIM MIN MAX MIN MAX A 4.80 5.00 0.189 0.197 C NX 45(cid:3) B 3.80 4.00 0.150 0.157 SEATING C 1.35 1.75 0.053 0.069 PLANE D 0.33 0.51 0.013 0.020 −Z− G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 0.10 (0.004) J 0.19 0.25 0.007 0.010 H D M J K 0.40 1.27 0.016 0.050 M 0 (cid:3) 8 (cid:3) 0 (cid:3) 8 (cid:3) N 0.25 0.50 0.010 0.020 0.25 (0.010)M Z Y S X S S 5.80 6.20 0.228 0.244 SOLDERING FOOTPRINT* 1.52 0.060 7.0 4.0 0.275 0.155 0.6 1.270 0.024 0.050 (cid:6) (cid:7) mm SCALE 6:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 12

MC33078, MC33079, NCV33078, NCV33079 PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE P NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 14 8 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN B FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 1 7 5. ROUNDED CORNERS OPTIONAL. INCHES MILLIMETERS A DIM MIN MAX MIN MAX A 0.715 0.770 18.16 19.56 F L B 0.240 0.260 6.10 6.60 C 0.145 0.185 3.69 4.69 D 0.015 0.021 0.38 0.53 N C GF 0.004.1000 B0S.0C70 1.20.254 BS1C.78 H 0.052 0.095 1.32 2.41 −T− J 0.008 0.015 0.20 0.38 K 0.115 0.135 2.92 3.43 SEATING L 0.290 0.310 7.37 7.87 PLANE K J M −−− 10 (cid:3) −−− 10 (cid:3) H G D14 PL M N 0.015 0.039 0.38 1.01 0.13 (0.005) M http://onsemi.com 13

MC33078, MC33079, NCV33078, NCV33079 PACKAGE DIMENSIONS SOIC−14 NB CASE 751A−03 ISSUE K D A NOTES: B 1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2.CONTROLLING DIMENSION: MILLIMETERS. 14 8 3.DIMENSION b DOES NOT INCLUDE DAMBAR A3 PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. H E 4.DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. L 5.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 1 7 DETAIL A MILLIMETERS INCHES 0.25 M B M 13Xb DIM MIN MAX MIN MAX A 1.35 1.75 0.054 0.068 0.25 M C A S B S A1 0.10 0.25 0.004 0.010 A3 0.19 0.25 0.008 0.010 DETAIL A b 0.35 0.49 0.014 0.019 h A X 45(cid:3) DE 83..5850 84..7050 00..135307 00..135474 e 1.27 BSC 0.050 BSC H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 e A1 C SEATING M ML 0.04 0(cid:3) 1.72 5(cid:3) 0.010 6(cid:3) 0.047 9(cid:3) PLANE SOLDERING FOOTPRINT* 6.50 14X 1.18 1 1.27 PITCH 14X 0.58 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com MC33078/D 14

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