MC3403, MC3303 Single Supply Quad Operational Amplifiers The MC3403 is a low cost, quad operational amplifier with true differential inputs. The device has electrical characteristics similar to the popular MC1741C. However, the MC3403 has several distinct advantages over standard operational amplifier types in single supply http://onsemi.com applications. The quad amplifier can operate at supply voltages as low as 3.0 V or as high as 36 V with quiescent currents about one third of MARKING those associated with the MC1741C (on a per amplifier basis). The DIAGRAMS common mode input range includes the negative supply, thereby eliminating the necessity for external biasing components in many 14 applications. The output voltage range also includes the negative SOIC−14 MC3x03DG power supply voltage. 14 D SUFFIX AWLYWW CASE 751A 1 Features 1 • Short Circuit Protected Outputs • Class AB Output Stage for Minimal Crossover Distortion • 14 True Differential Input Stage • Single Supply Operation: 3.0 V to 36 V PDIP−14 MC3x03P • Split Supply Operation: ±1.5 V to ±18 V P SUFFIX AWLYYWWG CASE 646 • 14 Low Input Bias Currents: 500 nA Max • 1 1 Four Amplifiers Per Package x = 3 or 4 • Internally Compensated A = Assembly Location • WL = Wafer Lot Similar Performance to Popular MC1741C YY, Y= Year • Industry Standard Pin−outs WW = Work Week • ESD Diodes Added for Increased Ruggedness G = Pb−Free Package • Pb−Free Packages are Available PIN CONNECTIONS Single Supply Split Supplies Out 1 1 14 Out 4 3.0 V to 36 V VCC VCC 2 13 1 1 1.5 V to 18 V Inputs 1 -1 4- Inputs 4 3 + + 12 2 2 VCC 4 11 VEE/GND 3 3 1.5 V to 18 V 5 10 4 4 Inputs 2 + 2 3 + Inputs 3 - - VEE, GND VEE 6 9 Out 2 7 8 Out 3 (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2012 1 Publication Order Number: January, 2012 − Rev. 11 MC3403/D

MC3403, MC3303 ORDERING INFORMATION Device Package Shipping† MC3303D SOIC−14 MC3303DG SOIC−14 55 Units / Rail (Pb−Free) MC3303DR2 SOIC−14 MC3303DR2G SOIC−14 2500 Tape & Reel (Pb−Free) MC3303P PDIP−14 MC3303PG PDIP−14 25 Units / Rail (Pb−Free) MC3403D SOIC−14 MC3403DG SOIC−14 55 Units / Rail (Pb−Free) MC3403DR2 SOIC−14 MC3403DR2G SOIC−14 2500 Tape & Reel (Pb−Free) MC3403P PDIP−14 MC3403PG PDIP−14 25 Units / Rail (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MAXIMUM RATINGS Rating Symbol Value Unit Power Supply Voltages Vdc Single Supply VCC 36 Split Supplies VCC, VEE ±18 Input Differential Voltage Range (Note 1) VIDR ±36 Vdc Input Common Mode Voltage Range (Notes 1 and 2) VICR ±18 Vdc Storage Temperature Range Tstg −55 to +125 °C Operating Ambient Temperature Range TA °C MC3303 −40 to +85 MC3403 0 to +70 Junction Temperature TJ 150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Split power supplies. 2. For supply voltages less than ±18 V, the absolute maximum input voltage is equal to the supply voltage. http://onsemi.com 2

MC3403, MC3303 ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V for MC3403; VCC = +14 V, VEE = GND for MC3303 TA = 25°C, unless otherwise noted.) MC3403 MC3303 Characteristic Symbol Min Typ Max Min Typ Max Unit Input Offset Voltage VIO − 2.0 10 − 2.0 8.0 mV TA = Thigh to Tlow (Note 3) − − 12 − − 10 Input Offset Current IIO − 30 50 − 30 75 nA TA = Thigh to Tlow − − 200 − − 250 Large Signal Open Loop Voltage Gain AVOL V/mV VO = ±10 V, RL = 2.0 k(cid:2) 20 200 − 20 200 − TA = Thigh to Tlow 15 − − 15 − − Input Bias Current IIB − −200 −500 − −200 −500 nA TA = Thigh to Tlow − − −800 − − −1000 Output Impedance f = 20 Hz zo − 75 − − 75 − (cid:2) Input Impedance f = 20 Hz zi 0.3 1.0 − 0.3 1.0 − M(cid:2) Output Voltage Range VO V RL = 10 k(cid:2) ±12 ±13.5 − 12 12.5 − RL = 2.0 k(cid:2) ±10 ±13 − 10 12 − RL = 2.0 k(cid:2), TA = Thigh to Tlow ±10 − − 10 − − Input Common Mode Voltage Range VICR +13 V +13 V − +12 V +12.5 V − V −VEE −VEE −VEE −VEE Common Mode Rejection RS ≤ 10 k(cid:2) CMR 70 90 − 70 90 − dB Power Supply Current (VO = 0) RL = ∞ ICC, IEE − 2.8 7.0 − 2.8 7.0 mA Individual Output Short−Circuit Current (Note 4) ISC ±10 ±20 ±45 ±10 ±30 ±45 mA Positive Power Supply Rejection Ratio PSRR+ − 30 150 − 30 150 (cid:3)V/V Negative Power Supply Rejection Ratio PSRR− − 30 150 − 30 150 (cid:3)V/V Average Temperature Coefficient of Input (cid:4)IIO/(cid:4)T − 50 − − 50 − pA/°C Offset Current TA = Thigh to Tlow Average Temperature Coefficient of Input (cid:4)VIO/(cid:4)T − 10 − − 10 − (cid:3)V/°C Offset Voltage TA = Thigh to Tlow Power Bandwidth BWp − 9.0 − − 9.0 − kHz AV = 1, RL = 10 k(cid:2)(cid:5) VO = 20 V(p−p), THD = 5% Small−Signal Bandwidth BW − 1.0 − − 1.0 − MHz AV = 1, RL = 10 k(cid:2)(cid:5) VO = 50 mV Slew Rate AV = 1, Vi = −10 V to +10 V SR − 0.6 − − 0.6 − V/(cid:3)s Rise Time AV = 1, RL = 10 k(cid:2)(cid:5) VO = 50 mV tTLH − 0.35 − − 0.35 − (cid:3)s Fall Time AV = 1, RL = 10 k(cid:2)(cid:5) VO = 50 mV tTLH − 0.35 − − 0.35 − (cid:3)s Overshoot AV = 1, RL = 10 k(cid:2)(cid:5) VO = 50 mV os − 20 − − 20 − % Phase Margin AV = 1, RL = 2.0 k(cid:2), VO = 200 pF (cid:6)m − 60 − − 60 − ° Crossover Distortion − − 1.0 − − 1.0 − % (Vin = 30 mVpp,Vout= 2.0 Vpp, f = 10 kHz) 3. MC3303: Tlow = −40°C, Thigh = +85°C, MC3403: Tlow = 0°C, Thigh = +70°C 4. Not to exceed maximum package power dissipation. http://onsemi.com 3

MC3403, MC3303 ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.) MC3403 MC3303 Characteristic Symbol Min Typ Max Min Typ Max Unit Input Offset Voltage VIO − 2.0 10 − − 10 mV Input Offset Current IIO − 30 50 − − 75 nA Input Bias Current IIB − −200 −500 − − −500 nA Large Signal Open Loop Voltage Gain AVOL 10 200 − 10 200 − V/mV RL = 2.0 k(cid:2) Power Supply Rejection Ratio PSRR − − 150 − − 150 (cid:3)V/V Output Voltage Range (Note 5) VOR Vpp RL = 10 k(cid:2), VCC = 5.0 V 3.3 3.5 − 3.3 3.5 − RL = 10 k(cid:2), 5.0 ≤ VCC ≤30 V VCC−2.0 VCC−1.7 − VCC−2.0 VCC−1.7 − Power Supply Current ICC − 2.5 7.0 − 2.5 7.0 mA Channel Separation CS − −120 − − −120 − dB f = 1.0 kHz to 20 kHz (Input Referenced) 5. Output will swing to ground with a 10 k(cid:2) pull down resistor. Bias Circuitry Common to Four Output Amplifiers VCC Q19 Q18 Q27 Q20 Q17 Q16 Q23 40 k 5.0 pF Q29 31k Q28 Q1 + Q15 Q22 Q24 2.0 k Q13 Inputs 25 Q9 37 k Q11 - Q21 Q25 Q6 Q12 Q30 Q2 Q5 2.4 k Q10 Q7 Q3 Q4 60 k Q8 VEE (GND) Figure 1. Representative Schematic Diagram (1/4 of Circuit Shown) http://onsemi.com 4

MC3403, MC3303 CIRCUIT DESCRIPTION stage performs not only the first stage gain function but also performs the level shifting and Transconductance reduction functions. By reducing the Transconductance, a smaller compensation capacitor (only 5.0 pF) can be employed, thus V DI saving chip area. The Transconductance reduction is 0 V/ accomplished by splitting the collectors of Q24 and Q22. 5. Another feature of this input stage is that the input common mode range can include the negative supply or ground, in single supply operation, without saturating either the input devices or the differential to single−ended converter. The second stage consists of a standard current source load 20 (cid:3)s/DIV amplifier stage. The output stage is unique because it allows the output to Figure 2. Inverter Pulse Response swing to ground in single supply operation and yet does not exhibit any crossover distortion in split supply operation. The MC3403/3303 is made using four internally This is possible because Class AB operation is utilized. compensated, two−stage operational amplifiers. The first Each amplifier is biased from an internal voltage regulator stage of each consists of differential input device Q24 and which has a low temperature coefficient, thus giving each Q22 with input buffer transistors Q25 and Q21 and the amplifier good temperature characteristics as well as differential to single ended converter Q3 and Q4. The first excellent power supply rejection. 120 AV = 100 VCC = 15 V V/DIV N (dB) 100 TVAE E= =2 5-°1C5 V 0.5 NAL GAI 80 G E SI G 60 GE LTA R O A V 40 , LOLOOP 20 DIV AVN L mV/ OPE 0 0 5 -20 *Note Class A B output stage produces distortion less sinewave. 1.0 10 100 1.0 k 10 k 100 k 1.0 M 50 (cid:3)s/DIV f, FREQUENCY (Hz) Figure 3. Sine Wave Response Figure 4. Open Loop Frequency Response 30 TA = 25°C 25 +15 V pp) 30 E (V)pp 20 -+ VO NGE (V LTAG 15 -15 V 10 k E RA 20 O G V A UT 10 OLT OUTP 5.0 UT V 10 V,OO 0 TA = 25°C OUTP , O V -5.0 0 1.0 k 10 k 100 k 1.0 M 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20 f, FREQUENCY (Hz) VCC AND (VEE), POWER SUPPLY VOLTAGES (V) Figure 5. Power Bandwidth Figure 6. Output Swing versus Supply Voltage http://onsemi.com 5

MC3403, MC3303 300 VCC = 15 V T (nA) TVAE E= =2 5-°1C5 V T (nA) 170 N N E E RR 200 RR U U C C S S A A BI BI 160 T T PU 100 PU N N , IB , IB II II 150 -75 -55 -35 -15 5.0 25 45 65 85 105 125 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20 T, TEMPERATURE (°C) VCC AND (VEE), POWER SUPPLY VOLTAGES (V) Figure 7. Input Bias Current Figure 8. Input Bias Current versus Temperature versus Supply Voltage VCC 50 k 1N914 VCC 10 k 5.0 k R2 - 1N914 MC1/32403 VO 10 k VCC + Vref - 1/2 MC3403 VO + 10 k 1 R1 VO = R1R +1R2 Vref = 12 (cid:2) VCC fo = 2(cid:7)RC R C For: fo = 1.0 kHz 1 R C R = 16 k(cid:2) VO = 2 VCC C = 0.01 (cid:3)F Figure 9. Voltage Reference Figure 10. Wien Bridge Oscillator 1 R R2 Hysteresis e1 +1/2 C R VOH MC3403 R1 − Vref - VO 1/2 MC3403 VO R1 a R1 -MC1/32403 eo Vin + VOL VinL VinH + R1 b R1 1 VinL(cid:2)= R1 +R2 (VOL -Vref) +Vref Vref R - C 1/2 R1 MC3403 VinH(cid:2)= R1 +R2 (VOH -Vref) +Vref e2 + R R1 eo = C (1 +a +b) (e2 −e1) Vh(cid:2)= R1 +R2 (VOH -VOL) Figure 11. High Impedance Differential Figure 12. Comparator with Hysteresis Amplifier http://onsemi.com 6

MC3403, MC3303 1 R R fo = 2(cid:7)RC 100 k R1 = QR 1 C1 R2 C C Vref = 2 VCC Vin - R2 = R1 1/2 - TBP (cid:2)R = 160 k(cid:2) MC3403 1/2 100 k - R3 = TNR2 (cid:2)C = 0.001 (cid:3)F + MC3403 1/2 (cid:3)C1 = 10 C R1 = 1.6 M(cid:2) + MC3403 R2 = 1.6 M(cid:2) Vref + R3 = 1.6 M(cid:2) Vref Bandpass R3 Vref Output R1 R2 - C1 1/2 Notch Output MC3403 For: fo = 1.0 kHz Where: TBP = center frequency gain + Q = 10 TN = passband notch gain TTBNP == 11 Vref Figure 13. Bi−Quad Filter VCC C R3 R1 C Vin - CO 1/2 MC3403 VO 1 R2 + CO = 10 C Vref = 2 VCC Vref + TrianOguletp Wutave R3 30R02 k Given: fo = center frequencVyref Vref = 12 VCC 1/2 + A(fo) = gain at center frequency MC3403 Square Wave 75 k 1/2 - R1 MC3403 Output Choose value fo, C 100 k - Q R3 R1 R5 Then: R3 = R1 = R2 = C Vref (cid:7) fo C 2 A(fo) 4Q2 R1 -R5 Rf For less than 10% error from operational amplifier OBoW fo < 0.1 f = R1 +RC if R3 = R2 R1 Iwf hseoruer cfoe aimndp eBdWan acree veaxrpierse,s fsiletedr inm Hayz .be preceded with 4 CRf R1 R2 +R1 voltage follower buffer to stabilize filter parameters. Figure 14. Function Generator Figure 15. Multiple Feedback Bandpass Filter http://onsemi.com 7

MC3403, MC3303 PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE H NOTES: 1.DIMENSIONING AND TOLERANCING PER −A− ANSI Y14.5M, 1982. 2.CONTROLLING DIMENSION: MILLIMETER. 14 8 3.DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4.MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. −B− P7 PL 5.DDIAMMEBNASRIO PNR DO TDROUESSIO NNO. TA LINLCOLWUADBELE 0.25 (0.010) M B M DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL 1 7 CONDITION. G MILLIMETERS INCHES RX 45(cid:2) F DIM MIN MAX MIN MAX C A 8.55 8.75 0.337 0.344 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 −T− D 0.35 0.49 0.014 0.019 SEATING D14 PL K M J GF 0.14.027 BS1C.25 0.001.0650 B0.S0C49 PLANE J 0.19 0.25 0.008 0.009 0.25 (0.010) M T B S A S K 0.10 0.25 0.004 0.009 M 0 (cid:2) 7 (cid:2) 0 (cid:2) 7 (cid:2) P 5.80 6.20 0.228 0.244 R 0.25 0.50 0.010 0.019 SOLDERING FOOTPRINT* 7X 7.04 14X 1.52 1 14X 0.58 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 8

MC3403, MC3303 PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE P NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 14 8 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN B FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 1 7 5. ROUNDED CORNERS OPTIONAL. INCHES MILLIMETERS A DIM MIN MAX MIN MAX A 0.715 0.770 18.16 19.56 F L B 0.240 0.260 6.10 6.60 C 0.145 0.185 3.69 4.69 D 0.015 0.021 0.38 0.53 N C GF 0.004.1000 B0S.0C70 1.20.254 BS1C.78 H 0.052 0.095 1.32 2.41 −T− J 0.008 0.015 0.20 0.38 K 0.115 0.135 2.92 3.43 SEATING L 0.290 0.310 7.37 7.87 PLANE K J M −−− 10 (cid:2) −−− 10 (cid:2) H G D14 PL M N 0.015 0.039 0.38 1.01 0.13 (0.005) M ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com MC3403/D 9

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: MC3303DG MC3303DR2G MC3403DG MC3403DR2G