MC14512B 8-Channel Data Selector The MC14512B is an 8−channel data selector constructed with MOS P−channel and N−channel enhancement mode devices in asingle monolithic structure. This data selector finds primary application in signal multiplexing functions. It may also be used for data routing, digital signal switching, signal gating, and number http://onsemi.com sequence generation. Features • Diode Protection on All Inputs • Single Supply Operation 1 • 3−State Output (Logic “1”, Logic “0”, High Impedance) SOIC−16 • D SUFFIX Supply Voltage Range = 3.0 Vdc to 18 Vdc CASE 751B • Capable of Driving Two Low−power TTL Loads or One Low−power Schottky TTL Load Over the Rated Temperature Range PIN ASSIGNMENT • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 X0 1 16 VDD Qualified and PPAP Capable X1 2 15 DIS • This Device is Pb−Free and is RoHS Compliant X2 3 14 Z X3 4 13 C MAXIMUM RATINGS (Voltages Referenced to VSS) X4 5 12 B Parameter Symbol Value Unit X5 6 11 A DC Supply Voltage Range VDD −0.5 to +18.0 V X6 7 10 INH Input or Output Voltage Range Vin, Vout −0.5 to VDD V (DC or Transient) + 0.5 VSS 8 9 X7 Input or Output Current Iin, Iout ±10 mA (DC or Transient) per Pin MARKING DIAGRAM Power Dissipation, Per Package (Note 1) PD 500 mW Ambient Temperature Range TA −55 to +125 °C 16 Storage Temperature Range Tstg −65 to +150 °C A1W45L1Y2WBGW Lead Temperature (8−Second Soldering) TL 260 °C 1 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be A = Assembly Location assumed, damage may occur and reliability may be affected. WL = Wafer Lot 1. Temperature Derating: “D/DW” Package: –7.0 mW/(cid:2)C From 65(cid:2)C To 125(cid:2)C YY, Y = Year This device contains protection circuitry to guard against damage due to high WW = Work Week static voltages or electric fields. However, precautions must be taken to avoid G = Pb−Free Package applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD. ORDERING INFORMATION Unused inputs must always be tied to an appropriate logic voltage level See detailed ordering and shipping information in the package (e.g., either VSS or VDD). Unused outputs must be left open. dimensions section on page 3 of this data sheet. © Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: July, 2014 − Rev. 10 MC14512B/D

MC14512B TRUTH TABLE C B A Inhibit Disable Z 0 0 0 0 0 X0 0 0 1 0 0 X1 0 1 0 0 0 X2 0 1 1 0 0 X3 1 0 0 0 0 X4 1 0 1 0 0 X5 1 1 0 0 0 X6 1 1 1 0 0 X7 X X X 1 0 0 X X X X 1 High Impedance NOTE: X = Don’t Care ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ − 55(cid:2)C 25(cid:2)C 125(cid:2)C VDD Typ Characteristic Symbol Vdc Min Max Min (Note 2) Max Min Max Unit Output Voltage “0” Level VOL 5.0 − 0.05 − 0 0.05 − 0.05 Vdc Vin = VDD or 0 10 − 0.05 − 0 0.05 − 0.05 15 − 0.05 − 0 0.05 − 0.05 “1” Level Vin = 0 or VDD VOH 51.00 49..9955 −− 49..9955 51.00 −− 49..9955 −− Vdc 15 14.95 − 14.95 15 − 14.95 − Input Voltage “0” Level VIL Vdc (VO = 4.5 or 0.5 Vdc) 5.0 − 1.5 − 2.25 1.5 − 1.5 (VO = 9.0 or 1.0 Vdc) 10 − 3.0 − 4.50 3.0 − 3.0 (VO = 13.5 or 1.5 Vdc) 15 − 4.0 − 6.75 4.0 − 4.0 “1” Level (VO = 0.5 or 4.5 Vdc) VIH 5.0 3.5 − 3.5 2.75 − 3.5 − Vdc (VO = 1.0 or 9.0 Vdc) 10 7.0 − 7.0 5.50 − 7.0 − (VO = 1.5 or 13.5 Vdc) 15 11 − 11 8.25 − 11 − Output Drive Current IOH mAd (VOH = 2.5 Vdc) Source 5.0 –3.0 − –2.4 –4.2 − –1.7 − c (VOH = 4.6 Vdc) 5.0 –0.64 − –0.51 –0.88 − –0.36 − (VOH = 9.5 Vdc) 10 –1.6 − –1.3 –2.25 − –0.9 − (VOH = 13.5 Vdc) 15 –4.2 − –3.4 –8.8 − –2.4 − (VOL = 0.4 Vdc) Sink IOL 5.0 0.64 − 0.51 0.88 − 0.36 − mAd (VOL = 0.5 Vdc) 10 1.6 − 1.3 2.25 − 0.9 − c (VOL = 1.5 Vdc) 15 4.2 − 3.4 8.8 − 2.4 − Input Current Iin 15 − ±0.1 − ±0.00001 ±0.1 − ±1.0 (cid:2)Adc Input Capacitance (Vin = 0) Cin − − − − 5.0 7.5 − − pF Quiescent Current IDD 5.0 − 5.0 − 0.005 5.0 − 150 (cid:2)Adc (Per Package) 10 − 10 − 0.010 10 − 300 15 − 20 − 0.015 20 − 600 Total Supply Current (Note 3) (Note 4) IT 5.0 IT = (0.8 (cid:2)A/kHz) f + IDD (cid:2)Adc (Dynamic plus Quiescent, 10 IT = (1.6 (cid:2)A/kHz) f + IDD Per Package) 15 IT = (2.4 (cid:2)A/kHz) f + IDD (CL = 50 pF on all outputs, all buffers switching) 3−State Leakage Current ITL 15 − ±0.1 − ±0.0001 ±0.1 − ±3.0 (cid:2)Adc Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. 3. The formulas given are for the typical characteristics only at 25(cid:2)C. 4. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL – 50) Vfk where: IT is in (cid:2)A (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.001. http://onsemi.com 2

MC14512B SWITCHING CHARACTERISTICS (Note 5) (CL = 50 pF, TA = 25(cid:2)C, See Figure 1) All Types Typ Characteristic Symbol VDD (Note 6) Max Unit Output Rise and Fall Time tTLH, ns tTLH, tTHL = (1.5 ns/pF) CL + 25 ns tTHL 5.0 100 200 tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns 10 50 100 tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns 15 40 80 Propagation Delay Time (Figure 2) tPLH ns Inhibit, Control, or Data to Z 5.0 330 650 10 125 250 15 85 170 Propagation Delay Time (Figure 2) tPHL ns Inhibit, Control, or Data to Z 5.0 330 650 10 125 250 15 85 170 3−State Output Delay Times (Figure 3) tPHZ, tPLZ, 5.0 60 150 ns “1” or “0” to High Z, and tPZH, tPZL 10 35 100 High Z to “1” or “0” 15 30 75 5. The formulas given are for the typical characteristics only at 25(cid:2)C. 6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. ORDERING INFORMATION Device Package Shipping† MC14512BDG SOIC−16 48 Units / Rail (Pb−Free) NLV14512BDG* SOIC−16 48 Units / Rail (Pb−Free) MC14512BDR2G SOIC−16 2500 / Tape & Reel (Pb−Free) NLV14512BDR2G* SOIC−16 2500 / Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. http://onsemi.com 3

MC14512B ID VDD DISABLE INHIBIT Z A CL B C X0 X1 PULSE Vin 50% GENERATOR X2 X3 50% X4 DUTY X5 CYCLE X6 X7 VSS Figure 1. Power Dissipation Test Circuit and Waveform VDD 20 ns 20 ns 90% VDD DATA 50% DISABLE 10% VSS INHIBIT Z tPLH 90% tPHL VOH A 50% B CL Z 10% VOL C tTLH tTHL X0 TEST CONDITIONS: PULSE GENERATOR X1 INHIBIT = VSS X2 A, B, C = VSS X3 X4 20 ns 20 ns X5 INHIBIT, 90% VDD X6 A, B, OR C 1500%% VSS X7 Parameter Test Conditions tPHL tPLH 90% VOH VSS AIn, hBib, iCt ttoo ZZ A,I nBh, C= V= SVSS, SX, OX O= V= DVDDD Z 501%0% VOL tTHL tTLH Figure 2. AC Test Circuit and Waveforms VDD PULSE 20 ns GENERATOR DISABLE VDD 90% 20 ns VDD 50% VDD AINHIBIT Z CL DIINSPAUBTLE 10% VSS S3 BC 1(cid:2)k S1 tPLZ 90%tPZLVOH S4 XXX012 S2 OUTPUT tPHZ 10% tPZHVOL ≈≈(cid:3)221. 50V VV@, @A VN DVDDD D1= 5 =(cid:3) V 55 VV, X3 VSS OUTPUT 90% VOH ≈(cid:3)6 V @ VDD = 10 V VSS XX45 10% VOL ≈10 V @ VDD = 15 V Switch Positions for 3−State Test X6 X7 Test S1 S2 S3 S4 tPHZ Open Closed Closed Open VSS tPLZ Closed Open Open Closed tPZL Closed Open Open Closed tPZH Open Closed Closed Open Figure 3. 3−State AC Test Circuit and Waveform http://onsemi.com 4

MC14512B LOGIC DIAGRAM 13 C 12 B 15 11 A DISABLE X0 1 10 SELECTED DATA BUS INHIBIT DEVICE X1 2 VDD IOD MC14512B X2 3 IL LOAD 14 4 Z ITL X3 MC14512B 5 X4 ITL X5 6 MC14512B 7 VSS X6 9 X7 1 1 OUT IN IN OUT 2 2 TRANSMISSION GATE 3−STATE MODE OF OPERATION Output terminals of several MC14512B 8−Bit Data (including fanout to other device inputs), and can be Selectors can be connected to a single date bus as shown. calculated by: One MC14512B is selected by the 3−state control, and the I – I OD L remaining devices are disabled into a high−impedance “off” N = + 1 I TL state. The number of 8−bit data selectors, N, that may be connected to a bus line is determined from the output drive N must be calculated for both high and low logic state of the current, I , 3−state or disable output leakage current, I , bus line. OD TL and the load current, I , required to drive the bus line L http://onsemi.com 5

MC14512B PACKAGE DIMENSIONS SOIC−16 CASE 751B−05 ISSUE K −A− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 16 9 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. −B− P8 PL 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION 1 8 0.25 (0.010) M B S SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES DIM MIN MAX MIN MAX G A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 F D 0.35 0.49 0.014 0.019 K R X 45(cid:2) F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 0.009 C K 0.10 0.25 0.004 0.009 M 0 (cid:2) 7 (cid:2) 0 (cid:2) 7 (cid:2) −T− SEATING P 5.80 6.20 0.229 0.244 PLANE M J R 0.25 0.50 0.010 0.019 D 16 PL 0.25 (0.010) M T B S A S SOLDERING FOOTPRINT 8X 6.40 16X1.12 1 16 16X 0.58 1.27 PITCH 8 9 DIMENSIONS: MILLIMETERS ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com MC14512B/D 6