MC14016B Quad Analog Switch/ Quad Multiplexer The MC14016B quad bilateral switch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each MC14016B consists of four independent switches capable of controlling either digital or analog signals. http://onsemi.com Thequad bilateral switch is used in signal gating, chopper, modulator, demodulator and CMOS logic implementation. Features • Diode Protection on All Inputs SOIC−14 SOEIAJ−14 • Supply Voltage Range = 3.0 Vdc to 18 Vdc D SUFFIX F SUFFIX • CASE 751A CASE 965 Linearized Transfer Characteristics • Low Noise − 12 nV/√Cycle, f ≥ 1.0 kHz typical MARKING DIAGRAMS • Pin−for−Pin Replacements for CD4016B, CD4066B (Note Improved Transfer Characteristic Design Causes More Parasitic Coupling 14 Capacitance than CD4016) • For Lower R , Use The HC4016 High−Speed CMOS Device or 14016BG ON AWLYWW The MC14066B • This Device Has Inputs and Outputs Which Do Not Have ESD 1 Protection. Antistatic Precautions Must Be Taken SOIC−14 • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 14 Qualified and PPAP Capable • MC14016B These Devices are Pb−Free and are RoHS Compliant ALYWG MAXIMUM RATINGS (Voltages Referenced to VSS) 1 Symbol Parameter Value Unit SOEIAJ−14 VDD DC Supply Voltage Range −0.5 to +18.0 V Vin, Vout Input or Output Voltage Range −0.5 to VDD + 0.5 V A = Assembly Location (DC or Transient) WL, L = Wafer Lot YY, Y = Year Iin Input Current (DC or Transient) ±10 mA WW, W = Work Week per Control Pin G = Pb−Free Indicator ISW Switch Through Current ±25 mA PD Power Dissipation, per Package 500 mW ORDERING INFORMATION (Note 1) See detailed ordering and shipping information in the package TA Ambient Temperature Range −55 to +125 °C dimensions section on page 2 of this data sheet. Tstg Storage Temperature Range −65 to +150 °C TL Lead Temperature 260 °C (8−Second Soldering) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Temperature Derating: “D/DW” Packages: –7.0 mW/(cid:2)C From 65(cid:2)C To 125(cid:2)C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. © Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: July, 2014 − Rev. 11 MC14016B/D

MC14016B PIN ASSIGNMENT BLOCK DIAGRAM IN 1 1 14 VDD CONTROL 1 13 2 OUT 1 2 13 CONTROL 1 1 OUT 1 IN 1 OUT 2 3 12 CONTROL 4 5 IN 2 4 11 IN 4 CONTROL 2 3 OUT 2 CONTROL 2 5 10 OUT 4 4 IN 2 CONTROL 3 6 9 OUT 3 6 CONTROL 3 9 VSS 7 8 IN 3 OUT 3 8 IN 3 12 CONTROL 4 10 OUT 4 11 LOGIC DIAGRAM IN 4 (1/4 OF DEVICE SHOWN) VDD = PIN 14 OUT VSS = PIN 7 CONTROL Control Switch LOGIC DIVASGSR ≤A VMin R ≤E VSDTDRICTIONS IN 0 = VSS Off VSS ≤ Vout ≤ VDD 1 = VDD On ORDERING INFORMATION Device Package Shipping† MC14016BDG SOIC−14 55 Units / Rail (Pb−Free) MC14016BDR2G SOIC−14 2500 / Tape & Reel (Pb−Free) NLV14016BDR2G* SOIC−14 2500 / Tape & Reel (Pb−Free) MC14016BFELG SOEIAJ−14 2000 / Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. http://onsemi.com 2

MC14016B ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ −55(cid:2)C 25(cid:2)C 125(cid:2)C VDD Typ Characteristic Figure Symbol Vdc Min Max Min (Note2) Max Min Max Unit Input Voltage 1 VIL 5.0 − − − 1.5 0.9 − − Vdc Control Input 10 − − − 1.5 0.9 − − 15 − − − 1.5 0.9 − − VIH 5.0 − − 3.0 2.0 − − − Vdc 10 − − 8.0 6.0 − − − 15 − − 13 11 − − − Input Current Control − Iin 15 − ±0.1 − ±0.00001 ±0.1 − ±1.0 (cid:2)Adc Input Capacitance − Cin pF Control − − − − 5.0 − − − Switch Input − − − − 5.0 − − − − Switch Output − − − 5.0 − − − − Feed Through − − − 0.2 − − − Quiescent Current 2,3 IDD 5.0 − 0.25 − 0.0005 0.25 − 7.5 (cid:2)Adc (Per Package) (Note 3) 10 − 0.5 − 0.0010 0.5 − 15 15 − 1.0 − 0.0015 1.0 − 30 “ON” Resistance 4,5,6 RON (cid:3) (VC = VDD, RL = 10 k(cid:3)) (Vin = +10 Vdc) − 600 − 260 660 − 840 (Vin = +0.25 Vdc) VSS = 0 Vdc − 600 − 310 660 − 840 (Vin = +5.6 Vdc) 10 − 600 − 310 660 − 840 (Vin = +15 Vdc) − 360 − 260 400 − 520 (Vin = +0.25 Vdc) VSS = 0 Vdc − 360 − 260 400 − 520 (Vin = +9.3 Vdc) 15 − 360 − 300 400 − 520 (cid:4) “ON” Resistance − (cid:4)RON (cid:3) Between any 2 circuits in a common package (VC = VDD) − (Vin = +5.0 Vdc, VSS = −5.0 Vdc) 5.0 − − − 15 − − − (Vin = +7.5 Vdc, VSS = −7.5 Vdc) 7.5 − − 10 − − − Input/Output Leakage Current − − (cid:2)Adc (VC = VSS) (Vin = +7.5, Vout = −7.5 Vdc) 7.5 − ±0.1 − ±0.0015 ±0.1 − ±1.0 (Vin = −7.5, Vout = +7.5 Vdc) 7.5 − ±0.1 − ±0.0015 ±0.1 − ±1.0 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. NOTE: All unused inputs must be returned to VDD or VSS as appropriate for the circuit application. 2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. 3. For voltage drops across the switch ((cid:4)Vswitch) > 600 mV ( > 300 mV at high temperature), excessive VDD current may be drawn; i.e., the current out of the switch may contain both VDD and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. (See first page of this data sheet.) Reference Figure 14. http://onsemi.com 3

MC14016B ELECTRICAL CHARACTERISTICS (Note 4) (CL = 50 pF, TA = 25(cid:2)C) VDD Typ Characteristic Figure Symbol Vdc Min (Note 5) Max Unit Propagation Delay Time (VSS = 0 Vdc) 7 tPLH, 5.0 − 15 45 ns Vin to Vout tPHL 10 − 7.0 20 (VC = VDD, RL = 10 k(cid:3)) 15 − 6.0 15 Control to Output 8 tPHZ, ns (Vin ≤ 10 Vdc, RL = 10 k(cid:3)) tPLZ, 5.0 − 34 120 tPZH, 10 − 20 110 tPZL 15 − 15 100 Crosstalk, Control to Output (VSS = 0 Vdc) 9 − 5.0 − 30 − mV (VC = VDD, Rin = 10 k(cid:3), Rout = 10 k(cid:3), 10 − 50 − f = 1.0 kHz) 15 − 100 − Crosstalk between any two switches (VSS = 0 Vdc) − − 5.0 − – 80 − dB (RL = 1.0 k(cid:3), f = 1.0 MHz, crosstalk (cid:2) 20log10Vout1) Vout2 Noise Voltage (VSS = 0 Vdc) 10,11 − 5.0 − 24 − nV/√Cycle (VC = VDD, f = 100 Hz) 10 − 25 − 15 − 30 − (VC = VDD, f = 100 kHz) 5.0 − 12 − 10 − 12 − 15 − 15 − Second Harmonic Distortion (VSS = – 5.0 Vdc) − − 5.0 − 0.16 − % (Vin = 1.77 Vdc, RMS Centered @ 0.0 Vdc, RL = 10 k(cid:3), f = 1.0 kHz) Insertion Loss (VC = VDD, Vin = 1.77 Vdc, 12 − 5.0 dB VSS = −5.0 Vdc, RMS centered = 0.0 Vdc, f = 1.0 MHz) Iloss (cid:2) 20log10VVoinut) − 2.3 − (RL = 1.0 k(cid:3)) − 0.2 − (RL = 10 k(cid:3)) − 0.1 − (RL = 100 k(cid:3)) − 0.05 − (RL = 1.0 M(cid:3)) Bandwidth (−3.0 dB) 12,13 BW 5.0 MHz (VC = VDD, Vin = 1.77 Vdc, VSS = −5.0 Vdc, RMS centered @ 0.0 Vdc) (RL = 1.0 k(cid:3)) − 54 − (RL = 10 k(cid:3)) − 40 − (RL = 100 k(cid:3)) − 38 − (RL = 1.0 M(cid:3)) − 37 − OFF Channel Feedthrough Attenuation − − 5.0 kHz (VSS = −5.0 Vdc) (VC = VSS, 20 log10 VVoinut (cid:2) –50dB) − 1250 − (RL = 1.0 k(cid:3)) − 140 − (RL = 10 k(cid:3)) − 18 − (RL = 100 k(cid:3)) − 2.0 − (RL = 1.0 M(cid:3)) 4. The formulas given are for typical characteristics only at 25(cid:2)C. 5. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. http://onsemi.com 4

MC14016B VC IS Vin Vout VIL: VC is raised from VSS until VC = VIL. VIL: at VC = VIL: IS = ±10 (cid:2)A with Vin = VSS, Vout = VDD or Vin = VDD, Vout = VSS. VIH: When VC = VIH to VDD, the switch is ON and the RON specifications are met. Figure 1. Input Voltage Test Circuit 10,000 VDD = 15 Vdc 10 Vdc VDD μN (W) 1000 TA = 25°C 5.0 Vdc O TI A ID SIP S 100 DI R VDD Vout WE TO ALL O PULSE 4 CIRCUITS CONTROL 10 k , PD 10 GENERATOR INPUT P fc VSS Vin 1.0 PD = VDD x ID 5.0(cid:2)k 10(cid:2)k 100(cid:2)k 1.0(cid:2)M 10(cid:2)M 50(cid:2)M fc, FREQUENCY (Hz) Figure 2. Quiescent Power Dissipation Figure 3. Typical Power Dissipation per Circuit Test Circuit (1/4 of device shown) TYPICAL R versus INPUT VOLTAGE ON 700 VSS = 0 Vdc HMS) 600 RTAL == 2150° kC(cid:3) O 500 E ( C N 400 STA VC = VDD = 10 Vdc SI E 300 R N” , “ON 200 VC = VDD = 15 Vdc O R 100 0 0 2.0 6.0 10 14 18 20 Vin, INPUT VOLTAGE (Vdc) Figure 4. V = 0 V SS http://onsemi.com 5

MC14016B Vout RL CL Vin Vout 20 ns 20 ns RL 90% VDD VC Vin 50% 10% VSS tPLH tPHL Vin Vout 50% Figure 5. R Characteristics Figure 6. Propagation Delay Test Circuit ON Test Circuit and Waveforms Vout VC RL CL Vin VX 20 ns 90% VDD Vout VC 50% 10% VSS VC 10 k 15 pF tPZH tPHZ Vin = VDD 90% Vout 10% Vx = VSS Vin tPZL tPLZ Vout 90% 10% Vin = VSS 1 k Vx = VDD Figure 7. Turn−On Delay Time Test Circuit Figure 8. Crosstalk Test Circuit and Waveforms 35 30 E) VDD = 15 Vdc L YC 25 C 10 Vdc nV/ 20 E ( G 5.0 Vdc TA 15 L O OUT QUAN-TECH E V 10 MODEL S VC = VDD 2283 NOI 5.0 IN OR EQUIV 0 10 100 1.0(cid:2)k 10 k 100 k f, FREQUENCY (Hz) Figure 9. Noise Voltage Test Circuit Figure 10. Typical Noise Characteristics http://onsemi.com 6

MC14016B 2.0 RL = 1 M(cid:3) AND 100 k(cid:3) B) 0 SS (d -2.0 10 k(cid:3) LO 1.0 TION -4.0 k(cid:3)-3.0 dB (RL = 1.0 M(cid:3) ) R SE -6.0 -3.0 dB (RL = 10 k(cid:3) ) N AL I -3.0 dB (RL = 1.0 k(cid:3) ) C -8.0 PI Y T -10 -12 10 k 100 k 1.0(cid:2)M 10 M 100 M fin, INPUT FREQUENCY (Hz) Figure 11. Typical Insertion Loss/Bandwidth Characteristics Vout VC RL + 2.5 Vdc Vin 0.0 Vdc - 2.5 Vdc Figure 12. Frequency Response Test Circuit ON SWITCH CONTROL SECTION OF IC LOAD V SOURCE Figure 13. (cid:4)V Across Switch http://onsemi.com 7

MC14016B APPLICATIONS INFORMATION Figure A illustrates use of the Analog Switch. The 0−to−5 V The example shows a 5 V signal which allows no p−p Digital Control signal is used to directly control a 5 V margin at either peak. If voltage transients above V p−p DD analog signal. and/or below V are anticipated on the analog channels, SS The digital control logic levels are determined by V external diodes (D ) are recommended as shown in Figure DD x and V . The V voltage is the logic high voltage; the V B. These diodes should be small signal types able to absorb SS DD SS voltage is logic low. For the example, V = +5 V logic high the maximum anticipated current surges during clipping. DD at the control inputs; V = GND = 0 V logic low. The absolute maximum potential difference between SS The maximum analog signal level is determined by V V and V is 18.0 V. Most parameters are specified up to DD DD SS and V . The analog voltage must not swing higher than 15 V which is the recommended maximum difference SS V or lower than V . between V and V . DD SS DD SS +5 V VDD VSS +5.0 V +5 V 5 Vp-p SWITCH ANALOG SIGNAL IN SWITCH 5 Vp-p +2.5 V OUT ANALOG SIGNAL EXTERNAL 0-TO-5 V DIGITAL CMOS GND DIGITAL CONTROL SIGNALS MC14016B CIRCUITRY Figure A. Application Example VDD VDD Dx Dx SWITCH SWITCH IN OUT Dx Dx VSS VSS Figure B. External Germanium or Schottky Clipping Diodes http://onsemi.com 8

MC14016B PACKAGE DIMENSIONS SOIC−14 NB CASE 751A−03 ISSUE K D A NOTES: B 1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2.CONTROLLING DIMENSION: MILLIMETERS. 14 8 3.DIMENSION b DOES NOT INCLUDE DAMBAR A3 PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. H E 4.DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. L 5.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 1 7 DETAIL A MILLIMETERS INCHES 0.25 M B M 13Xb DIM MIN MAX MIN MAX A 1.35 1.75 0.054 0.068 0.25 M C A S B S A1 0.10 0.25 0.004 0.010 A3 0.19 0.25 0.008 0.010 DETAIL A b 0.35 0.49 0.014 0.019 h A D 8.55 8.75 0.337 0.344 X 45(cid:2) E 3.80 4.00 0.150 0.157 e 1.27 BSC 0.050 BSC H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 e A1 C SEATING M ML 0.04 0(cid:2) 1.72 5(cid:2) 0.001 6(cid:2) 0.074 9(cid:2) PLANE SOLDERING FOOTPRINT* 6.50 14X 1.18 1 1.27 PITCH 14X 0.58 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 9

MC14016B PACKAGE DIMENSIONS SOEIAJ−14 CASE 965 ISSUE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED 14 8 LE AT THE PARTING LINE. MOLD FLASH OR Q1 PPRERO TSRIDUES.IONS SHALL NOT EXCEED 0.15 (0.006) 4. TERMINAL NUMBERS ARE SHOWN FOR E HE M(cid:2) REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) 1 7 L TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DETAIL P DAMBAR CANNOT BE LOCATED ON THE LOWER Z RADIUS OR THE FOOT. MINIMUM SPACE D BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). VIEW P MILLIMETERS INCHES e A DIM MIN MAX MIN MAX c A --- 2.05 --- 0.081 A1 0.05 0.20 0.002 0.008 b 0.35 0.50 0.014 0.020 c 0.10 0.20 0.004 0.008 D 9.90 10.50 0.390 0.413 b A1 E 5.10 5.45 0.201 0.215 e 1.27 BSC 0.050 BSC 0.13 (0.005) M 0.10 (0.004) HE 7.40 8.20 0.291 0.323 L 0.50 0.85 0.020 0.033 LE 1.10 1.50 0.043 0.059 M 0 (cid:2) 10 (cid:2) 0 (cid:2) 10 (cid:2) Q1 0.70 0.90 0.028 0.035 Z --- 1.42 --- 0.056 ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com MC14016B/D 10

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